WO2020210966A1 - 一种磁膜电感、裸片以及电子设备 - Google Patents

一种磁膜电感、裸片以及电子设备 Download PDF

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Publication number
WO2020210966A1
WO2020210966A1 PCT/CN2019/082793 CN2019082793W WO2020210966A1 WO 2020210966 A1 WO2020210966 A1 WO 2020210966A1 CN 2019082793 W CN2019082793 W CN 2019082793W WO 2020210966 A1 WO2020210966 A1 WO 2020210966A1
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Prior art keywords
magnetic film
magnetic flux
magnetic
flux groove
insulating medium
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PCT/CN2019/082793
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English (en)
French (fr)
Inventor
龚顺强
邹鹏
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华为技术有限公司
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Priority to CN201980095458.0A priority Critical patent/CN113692645B/zh
Priority to PCT/CN2019/082793 priority patent/WO2020210966A1/zh
Publication of WO2020210966A1 publication Critical patent/WO2020210966A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

Definitions

  • This application relates to the field of inductor technology, and in particular to a magnetic film inductor, a bare chip and an electronic device.
  • the prior art provides a bare chip, which can be integrated with a magnetic film inductor, so as to greatly improve the efficiency of the bare chip and reduce power consumption.
  • the magnetic film inductors include magnetic flux grooves.
  • the angle of the sidewalls of the magnetic flux grooves is relatively steep, resulting in
  • the thickness of the upper magnetic film included in the magnetic film inductor on the side wall of the magnetic flux groove is not uniform, because in the process of making the magnetic film inductor, it is impossible to ensure that the upper magnetic film of different magnetic film inductors is on the side wall of the magnetic flux groove.
  • the uniformity of the inductance of different magnetic film inductors in the same die is very poor, and the saturation characteristics of the inductance are also relatively large, resulting in a loss of yield.
  • the present application provides a magnetic film inductor, a bare chip, and an electronic device, which are used to effectively improve the yield of the magnetic film inductor and meet the performance requirements for the use of the magnetic film inductor.
  • the first aspect of the embodiments of the present application provides a magnetic film inductor.
  • the magnetic film inductor is provided on a bare chip and includes a lower magnetic film, an upper magnetic film, a support, an insulating medium, and at least one metal coil.
  • the semiconductor device on the die is electrically connected; the insulating medium is arranged on the surface of the lower magnetic film, the metal coil is arranged on the surface of the insulating medium away from the lower magnetic film, and the insulating medium is used for The metal coil is electrically isolated from the lower magnetic film, the insulating medium is further provided with the support member on the surface of the insulating medium away from the lower magnetic film, and the support member is used to support and fix the upper magnetic film to On the surface of the lower magnetic film; the insulating medium is recessed with a magnetic flux groove toward the end surface of the upper magnetic film, and the end of the support member extends to the magnetic flux groove and is located in the magnetic flux groove.
  • the area of the outer surface of the support member inside the groove is larger than the area of the target side wall of the magnetic flux groove, and the target side wall is the side wall connecting the magnetic flux groove and the support member.
  • the upper magnetic film inductor shown in this aspect since the end of the support member can extend into the magnetic flux groove, the upper magnetic film only needs to cover the surface of the support member without covering
  • the transition area between the support and the insulating medium avoids the disadvantage that the upper magnetic film cannot guarantee uniform coverage in the transition area, and inside the magnetic flux groove, the area of the outer surface of the support is larger than the all
  • the area of the target side wall of the magnetic flux groove is compared with the prior art solution of directly covering the upper magnetic film on the side wall of the magnetic flux groove.
  • This aspect can effectively improve the area of the upper magnetic film on the magnetic flux groove.
  • the coverage rate inside the through slot improves the inductance of the magnetic film inductor, so that the magnetic film inductor has a higher magnetic saturation characteristic of the inductance.
  • the angle of the transition angle is smaller than the angle of the connection angle, and the transition The angle is the angle formed between the side wall of the support away from the insulating medium and the horizontal plane, and the connecting angle is the angle formed between the side wall of the magnetic flux groove and the horizontal plane.
  • transition angle is relatively steep relative to the connection angle, and the transition angle is relatively gentle, it is effective when the upper magnetic film covers the outer wall of the support. This improves the coverage rate and coverage uniformity of the upper magnetic film on the surface of the support.
  • the surface of the transition angle is covered with the support member.
  • the upper magnetic film extends to the inside of the magnetic flux groove by covering the outer surface of the support member, which improves the upper magnetic film inductance.
  • the part of the upper magnetic film located in the magnetic flux groove is continuous and uniform, which effectively guarantees the thickness of the medium included in the upper magnetic film, thereby effectively avoiding the short circuit of the magnetic film included in the upper magnetic film, which will not Cause the loss of the magnetic film inductor to increase significantly, increase the saturation current, can meet the performance requirements for the use of the magnetic film inductor, and because the upper magnetic film does not break at the magnetic flux groove, it effectively improves the magnetic The yield of film inductance.
  • the bottom of the magnetic flux groove is an air gap, and the air gap is located in the magnetic flux groove.
  • the internal insulating material is formed, and along the vertical direction of the magnetic film inductor, the thickness of the air gap is smaller than the thickness of the insulating medium.
  • the air gaps with different thicknesses have different energy storage capabilities, that is, the longer the air gap, the longer the air gap The greater the energy that can be stored, the greater the sense.
  • the sidewall of the magnetic flux groove is a first In a stepped structure, the upper surface of the first stepped structure and the side wall of the first stepped structure are covered with the support member.
  • the supporting member can be uniformly arranged in the magnetic flux groove, and the magnetic flux groove inside the magnetic flux groove can be protected.
  • the area of the outer surface of the support is larger than the area of the target side wall of the magnetic flux groove, so as to effectively ensure the coverage of the upper magnetic film in the magnetic flux groove.
  • the support member can extend to the inside of the magnetic flux groove along the guide of the transition gap, which effectively guarantees the uniformity of the thickness when the support member extends to the inside of the magnetic flux groove, so that the upper magnetic film is located at the If the magnetic film and the dielectric layer included in the magnetic flux groove will not shrink, the part of the upper magnetic film located in the magnetic flux groove will not be continuous and uniform, which effectively guarantees the content of the upper magnetic film.
  • the thickness of the medium is the thickness of the medium.
  • the support member faces the side of the insulating medium
  • the wall has a second stepped structure, and the second stepped structure is arranged in close contact with the first stepped structure.
  • the magnetic film and the dielectric layer included in the portion of the upper magnetic film located in the magnetic flux groove are not reduced, so that the upper magnetic film is located
  • the part in the magnetic flux groove is continuous and uniform, which effectively guarantees the thickness of the medium included in the upper magnetic film, thereby effectively avoiding the short circuit of the magnetic film included in the upper magnetic film, which will not cause magnetic film inductance
  • the loss of the magnetic film is significantly increased, and the saturation current is increased, which can meet the performance requirements for the use of magnetic film inductance, and because the upper magnetic film will not break at the magnetic flux groove, it effectively improves the performance of the magnetic film inductance. rate.
  • the insulating medium includes a first sublayer and a second sublayer, and the first sublayer and The second sublayers are all deposited from inorganic materials, wherein the first sublayer is deposited on the surface of the lower magnetic film, and the second sublayer is deposited on the surface of the first sublayer;
  • the magnetic flux groove is formed by etching the surface of the first sub-layer after chemical mechanical polishing and CMP, and the air gap in the magnetic flux groove is deposited by the second sub-layer.
  • the first sublayer when the first sublayer is deposited on the surface of the lower magnetic film, CMP can be performed, and the surface of the first sublayer after the CMP treatment can be etched until the The bottom surface of the magnetic flux groove exposes the lower magnetic film, and then a second sublayer is deposited on the surface of the first sublayer. Because the first sublayer is uniformly deposited by CVD, the second sublayer is effectively deposited. The uniformity of the surface of the second sublayer is ensured, thereby ensuring the uniformity of the air gap on the bottom surface of the magnetic flux groove, and improving the magnetic saturation characteristics of the magnetic flux inductance. In addition, the second sub-layer is deposited in the magnetic flux groove by CVD, which effectively guarantees the purpose of accurately controlling the thickness of the air gap deposited inside the magnetic flux groove.
  • a second aspect of the embodiments of the present application provides a die, including a die and a magnetic film inductor disposed on the die, and the magnetic film inductor is as shown in the first aspect of the foregoing embodiment of the present application.
  • the third aspect of the embodiments of the present application provides an electronic device, including a die and a magnetic film inductor disposed on the die, and the magnetic film inductor is as shown in the first aspect of the foregoing embodiment of the present application.
  • FIG. 1 is a schematic diagram of the overall structure of an embodiment of a magnetic film inductor provided in the prior art
  • FIG. 2 is a schematic diagram of a side cross-sectional structure of an embodiment of a magnetic film inductor provided in the prior art
  • FIG. 3 is a schematic diagram of a side cross-sectional structure of an embodiment of a magnetic film inductor provided by this application;
  • FIG. 4 is a schematic diagram of a partial cross-sectional side view of an embodiment of the magnetic film inductor provided by this application;
  • FIG. 5 is a schematic partial cross-sectional side view of another embodiment of the magnetic film inductor provided by this application.
  • FIG. 6 is a schematic diagram of a partial cross-sectional side view of another embodiment of the magnetic film inductor provided by this application.
  • FIG. 7 is a schematic diagram of a side cross-sectional structure of another embodiment of the magnetic film inductor provided by this application.
  • FIG. 8 is a schematic diagram of the electrical connection structure of an embodiment of the die provided by this application.
  • the core device in the chip is the die.
  • a die usually consists of two parts, namely a wafer layer and a redistribution layer (RDL) disposed on the wafer layer.
  • the wafer layer is mainly composed of monocrystalline silicon, on which various semiconductor devices, such as various transistors, are arranged.
  • the wiring layer is provided with multiple dielectric layers composed of insulating oxide dielectric. Metal layers are arranged between the multi-layer dielectric layers, and these metal layers are arranged in various shapes by technological means, thereby forming metal lines between the dielectric layers.
  • the multilayer dielectric layer is further provided with a through hole, and the through hole is filled with a metal material, or the inner wall of the through hole is plated with a metal material.
  • the metal lines between the dielectric layers realize the electrical connection of the metal lines between different dielectric layers through the through holes, and the metal lines are also electrically connected to the semiconductor devices on the wafer layer through the through holes on these media. Connect, so that the metal circuit and the semiconductor device together constitute various functional circuits.
  • Metal pads (Pad) or metal bumps (Bump) are also provided on the surface of the dielectric layer away from the wafer layer. The metal pads and metal bumps are also electrically connected to the metal circuit and the semiconductor device through the through holes on the dielectric, and are used as external interfaces of the functional circuits in the die.
  • a magnetic film inductor can be provided in the chip.
  • the magnetic film inductor includes a metal coil arranged in a spiral form.
  • the metal coil can be formed in a spiral manner by RDL, and the metal coil can also be formed by the medium.
  • the metal lines between the layers are formed in a spiral manner.
  • the magnetic film inductor usually includes a magnetic film channel 100 surrounded by a magnetic film, and a metal coil 101 passing through the magnetic film channel 100.
  • the metal coil 101 may be formed by metal lines formed between dielectric layers, or may be formed by RDL on the wafer layer.
  • FIG. 2 is a cross-sectional view of the magnetic film channel 101.
  • the metal coil 101 is composed of a metal circuit
  • the magnetic film channel 101 is provided in the dielectric layer of the bare chip. If the metal coil 101 is composed of RDL, the magnetic film channel 101 It is arranged between the wafer layer and the dielectric layer.
  • the magnetic film channel 100 includes a lower magnetic film 202 and an upper magnetic film 204.
  • the upper magnetic film 204 is supported on the lower magnetic film 202 by the support 203, thereby forming a channel between the upper magnetic film 204 and the lower magnetic film 202, and the metal coil 101 extends from the Pass through the channel.
  • An insulating medium 206 is provided at the bottom of the channel.
  • the insulating medium 206 is disposed on the lower magnetic film 202, and the support 203 and the metal coil 101 are both disposed on the insulating medium 206.
  • the lower magnetic film 202 can be arranged in a certain dielectric layer of the die, or on the wafer layer.
  • the upper magnetic film 204 is arched; the middle of the upper magnetic film 204 is raised, Both sides are in contact with the lower magnetic film 202.
  • the dielectric layer is cut off by the upper magnetic film 204 and the lower magnetic film 202, and the part remaining in the channel constitutes the insulating medium 206.
  • the part where the upper magnetic film 204 and the lower magnetic film 202 are in contact has no dielectric material, which is equivalent to forming two rows of channels on the dielectric layer 206, and these two rows of channels are also called magnetic flux grooves 209 .
  • the supporting member 203 is used to support and fix the upper magnetic film 204 on the surface of the lower magnetic film 202, and the upper magnetic film 204 and the lower magnetic film 202, and the metal coil 101 disposed inside the support 203 is a metal conductor and forms a loop in a spiral manner, because the metal coil 101 is between the upper magnetic film 204 and the lower magnetic film 202
  • the metal coil 101 and the upper magnetic film 204 are separated by the support 203, and the metal coil 101 and the lower magnetic film 202 are separated by the insulating medium 206.
  • the support 203 and The specific material of the insulating medium 206 is not limited, as long as the support 203 and the insulating medium 206 are made of insulating materials.
  • the metal coil 101 can be electrically isolated by the support 203 and the insulating medium 206, which will significantly improve the inductance and quality factor of the magnetic film inductor 101.
  • the insulating medium 206 is disposed between the support 203 and the lower magnetic film 202.
  • the metal coil 101 is electrically connected to the semiconductor device on the die through solder joints or through holes passing through the insulating medium 206, so that the semiconductor devices on the die 100 can transmit current to all through the through holes of the insulating medium 206.
  • the metal coil 101 When current passes through the metal coil 101, the metal coil 101 generates a magnetic field to store energy in the structure of the magnetic film inductor 101.
  • the upper magnetic film 204 and the lower magnetic film 202 can effectively attract the magnetic flux lines of this magnetic field. Therefore, the energy storage of the magnetic film inductor 101 is stronger and the magnetic leakage is effectively reduced.
  • the specific arrangement of the magnetic flux groove 209 is to form the surface of the insulating medium 206 by dry etching or wet etching, so that the magnetic flux
  • the bottom of the groove 209 exposes the lower magnetic film 202, so that the upper magnetic film 204 and the lower magnetic film 202 are connected inside the magnetic flux groove 209, so that the current caused by the metal coil 101 is contained in the lower
  • the lines of magnetic force in the magnetic film 202 and the upper magnetic film 204 form a loop with the smallest path through the magnetic flux groove 209.
  • the side wall of the magnetic flux groove, or the side of the insulating medium 206 forms a connection angle 207 between the horizontal plane.
  • the thickness of the upper magnetic film 204 on the sidewall of the magnetic flux groove 206 often becomes thinner because the connecting corner 207 becomes thin, so that the width of the magnetic flux groove 209 suddenly changes at the position of the connecting corner 207. Small, thereby affecting the performance of the magnetic film inductor, resulting in low inductance.
  • the upper magnetic film 204 is a multilayer structure, which includes a multilayer magnetic film, and a dielectric layer is arranged between any two adjacent magnetic films, and the thickness of the dielectric layer is much smaller than that of the magnetic film. Since the coverage rate of the upper magnetic film 204 in the magnetic flux groove 209 is relatively low, the thickness of the magnetic film and the dielectric layer included in the portion of the upper magnetic film 204 located in the magnetic flux groove 209 are both If it is scaled down, it is very likely that the thickness of the part of the upper magnetic film 204 located in the magnetic flux groove 209 is too small, resulting in the medium being too thin, so that the magnetic film isolated by the too thin medium will be short-circuited, which will cause magnetic The loss of the film inductor is significantly increased, and the saturation current is reduced, which cannot meet the performance requirements for the use of the magnetic film inductor.
  • the upper magnetic film 204 is prone to breakage at the connecting corner 207, which reduces the yield of the magnetic film inductance, and the thickness of the magnetic film covered by the magnetic flux grooves 209 is discontinuous, resulting in a loss of yield. Due to the above-mentioned problems, the magnetic saturation characteristics of the magnetic film inductor 101 are also poor, so that it is difficult to achieve the mass production target of the magnetic film inductor with the existing technology.
  • FIG. 3 is a schematic side view cross-sectional structure diagram of an embodiment of the magnetic film inductor provided by this application.
  • the magnetic film inductor shown in this embodiment includes a magnetic film channel, and the magnetic film channel specifically includes a lower magnetic film 302, an upper magnetic film 303, and a metal coil 304 passing through the magnetic film channel.
  • the metal coil is formed in a spiral manner by RDL as an example for exemplification.
  • an insulating medium 305 is provided in the channel of the magnetic film channel.
  • the specific material of the insulating medium 305 is not limited in this embodiment, as long as the insulating medium 305 is made of an inorganic material. .
  • the insulating medium 305 is used to separate the metal coil 304 and the lower magnetic film 302. For a specific description of the insulating medium 305, please refer to FIG. 2 for details, and details will not be repeated in this embodiment.
  • the magnetic film inductor shown in this embodiment further includes a support 307 for fixing the upper magnetic film 303 on the surface of the lower magnetic film 302.
  • the metal coil can be separated by the support 307. 304 and the upper magnetic film 303, through the insulating medium 305 and the support 307 shown in this embodiment, the inductance and quality factor of the magnetic film inductor can be significantly improved.
  • FIG. 4 is a side view cross-sectional structure diagram of the magnetic film inductor provided by this application without the support 307, the upper magnetic film 303 and the magnetic flux groove 306, and FIG. 5 is provided by the application The side view cross-sectional structure diagram of the magnetic film inductor when the support 307 and the upper magnetic film 303 are not provided
  • FIG. 6 is a side view cross-sectional structure diagram of the magnetic film inductor provided by this application without the upper magnetic film 303.
  • an insulating layer 300 can be first provided on the surface of the lower magnetic film 302, and the provided insulating layer 300 is planarized toward the surface of the upper magnetic film 303.
  • the planarization process The specific method is not limited, as long as the insulating layer 300 is planarized and the end surface of the insulating layer 300 facing the upper magnetic film 303 has a planar structure.
  • the planarization shown in this embodiment can be Chemical mechanical planarization (chemical mechanical planarization, CMP), also known as chemical mechanical polishing, is a technology in the manufacturing process of semiconductor devices, which uses chemical etching and mechanical force to face the upper magnetic film on the insulating layer 300 during processing.
  • CMP chemical mechanical planarization
  • the end surface of 303 is planarized, and the metal coil 304 is formed on the insulating layer 300 by the CMP;
  • the CMP is a typical semiconductor manufacturing technology and also a so-called damascene process.
  • the damascene process includes the following steps: forming patterns on the surface of the insulating layer 300 facing the upper magnetic film 303, filling the patterns with interconnection metal, and removing excess metal by polishing and leaving the damascene interconnection metal components.
  • the component is the metal coil 304 in this embodiment.
  • the end surface of the insulating layer 300 facing the upper magnetic film 303 can be recessed by an etching process.
  • the part of the insulating layer 300 located at the bottom of the channel of the magnetic film inductor is the insulating medium 305.
  • the bottom surface of the magnetic flux groove 306 is the lower magnetic film 302.
  • the etching process may be dry etching and wet etching. Dry etching mainly uses reactive gas and plasma for etching; wet etching mainly uses chemical reagents to react with the etched material for etching.
  • two magnetic flux grooves 306 can be provided on both sides of the insulating medium 305 and at the position where the upper magnetic film 303 and the lower magnetic film 302 are connected, so that In the case that both ends of the upper magnetic film 303 are connected to the lower magnetic film 302 through the magnetic flux grooves 306, the metal coil 304 may be located between the upper magnetic film 303 and the lower magnetic film 302 Within the formed area.
  • a connecting angle 308 is formed between the side wall of the magnetic flux groove 306 and the horizontal plane, or the connecting angle 308 is the included angle formed between the side of the insulating medium 305 and the horizontal plane.
  • the angle of the connection angle 308 is relatively steep, generally above 45 degrees, and the specific angle of the connection angle 308 is not limited in this embodiment.
  • the magnetic flux groove 306 Opposite to the end of the support 307, that is, along the vertical direction of the magnetic film inductor, the magnetic flux groove 306 is partially overlapped with the end of the support 307, so that the support 307 The end of the support member 307 can be extended into the magnetic flux slot 306.
  • the specific structure of the support 307 inside the magnetic flux slot 306 is not limited in this embodiment. As long as it is inside the magnetic flux slot 306, The area of the outer surface 601 of the support 307 is larger than the area of the target side wall 602 of the magnetic flux groove 306.
  • the target side wall 602 is the magnetic flux groove 306 and the support 307 Connected side walls so that as shown in FIG. 3, when the upper magnetic film 303 is supported and fixed on the support 307, the upper magnetic film 303 is attached to the inside of the magnetic flux groove 306 It is arranged on the surface of the support 307 away from the target side wall 602.
  • the support 203 and the magnetic flux groove 209 are in a discontinuous state, that is, the support 203 and the There is a transition area between the insulating medium 206, and the transition area is located at the slot of the magnetic flux groove 209.
  • the transition area generally cannot achieve a smooth transition, that is, between the support 203 and the insulating medium 206 If it is an obtuse angle structure, the upper magnetic film 204 supported by the support 203 sequentially passes through the transition area between the support 203, the support 203 and the insulating medium 206 to extend to the magnetic flux groove 209, and the upper magnetic film 204 extending into the magnetic flux groove 209 is covered and arranged on the side wall of the magnetic flux groove 209. It can be seen that the upper magnetic film 204 needs to cover the supporting member The transition area between 203 and the insulating medium 206.
  • transition area with an obtuse angle structure cannot guarantee that the upper magnetic film 204 can be evenly covered, and the outer peripheral wall of the magnetic flux groove 209 and the insulating medium 206 A connecting angle 207 is formed, which cannot guarantee the coverage of the upper magnetic film 204 on the sidewall of the magnetic flux groove 209;
  • the upper magnetic film 303 since the end of the support 307 can extend into the magnetic flux groove 306, the upper magnetic film 303 only needs to cover the support 307. It does not need to cover the transition area between the support 307 and the insulating medium 305, which avoids the disadvantage that the upper magnetic film 303 cannot guarantee uniform coverage in the transition area, and inside the magnetic flux groove 306,
  • the area of the outer surface 601 of the support 307 is greater than the area of the target side wall 602 of the magnetic flux groove 306.
  • this embodiment can effectively Increase the coverage of the upper magnetic film 303 in the magnetic flux groove 306, thereby increasing the inductance of the magnetic film inductor, so that the magnetic film inductor has a higher magnetic saturation characteristic of the inductance, and the amount of the magnetic film inductance can be achieved Production goals.
  • the upper magnetic film 303 of the magnetic film inductor shown in this embodiment has a high coverage rate in the magnetic flux groove 306, and the magnetic film included in the portion of the upper magnetic film 303 located in the magnetic flux groove 306
  • the thickness of the upper magnetic film 303 and the dielectric layer will not be reduced, so that the upper magnetic film 303 is located at the outer and inner parts of the magnetic flux groove 306, and the thicknesses of the included magnetic film and the dielectric layer are uniform and equal, so that the upper magnetic film 303 is located at
  • the part of the magnetic flux groove 306 is continuous and uniform, which effectively guarantees the thickness of the medium included in the upper magnetic film 303, thereby effectively avoiding the short circuit of the magnetic film included in the upper magnetic film 303, which will not cause
  • the loss of the magnetic film inductor is significantly increased, and the saturation current is increased, which can meet the performance requirements for the use of the magnetic film inductor, and because the upper magnetic film 303 does not break at the slot of the magnetic flux groove 306, it is effective Improved the yield of
  • a transition angle 309 is formed between the side wall of the support 307 away from the insulating medium 305 and the horizontal plane, in order to improve the upper magnetic film 303 in the magnetic field.
  • the coverage rate in the through groove 306 needs to be guaranteed inside the magnetic flux groove 306, and the area of the outer surface 601 of the support 307 is greater than the area of the target side wall 602, then in this embodiment, Inside the magnetic flux slot 306, the angle of the transition angle 309 is smaller than the angle of the connection angle 308.
  • connection angle 308 Since the transition angle 309 is relatively steep with respect to the connection angle 308, and the transition angle 309 is relatively gentle, compared with the prior art, the connection angle 308 is covered with magnetic
  • the film solution shown in this embodiment can cover the upper magnetic film 303 on the surface of the transition angle 309 that is more gentle with respect to the connection angle 308, so that the upper magnetic film 303 covers the support member In the case of the outer wall of 307, the coverage rate and coverage uniformity of the upper magnetic film 303 in the magnetic flux groove 306 are effectively improved.
  • the angle of the transition angle 309 is completely determined by the topography of the surface of the support 307.
  • the angle of the transition angle 309 shown in this embodiment is less than or equal to 50 degrees as an example to improve
  • the coverage rate of the upper magnetic film 303 in the magnetic flux groove 306 should be clarified that the specific angle of the transition angle 309 is not limited in this embodiment, as long as the angle of the transition angle 309 is smaller than the The angle of the connecting angle 308 is sufficient.
  • the sidewall of the insulating medium 305 has a first step structure, and the upper surface 3051 of the first step structure and the side wall 3052 of the first step structure are both covered with the support 307.
  • the supporting member 307 has a second stepped structure facing the side wall of the insulating medium 305, so The second step structure and the first step structure are attached to each other.
  • the upper surface 3071 of the second step structure and the upper surface 3051 of the first step structure are attached to each other.
  • the side wall 3072 of the second stepped structure and the side wall 3052 of the first stepped structure are attached to each other. It can be seen that the structure shown in this embodiment can make the side wall of the magnetic flux groove 306 covered with The support 307.
  • the cross section of the insulating medium 305 may have a rectangular structure, which effectively improves the efficiency and accuracy of making the support 307.
  • the upper magnetic film 303 can be uniformly and gently covered on the surface of the support 307 so as to be arranged in the magnetic flux groove 306.
  • the end of the support 307 can be extended to the end through the upper surface 3051 of the first step structure and the side wall 3052 of the first step structure.
  • the inside of the magnetic flux groove 306 effectively guarantees that the support 307 located in the magnetic flux groove 306 has a smooth structure, so that the upper magnetic film 303 can evenly cover the surface of the support 307.
  • this embodiment does not limit the specific material of the metal coil 304, as long as the metal coil 304 can flow current to generate a magnetic field.
  • the metal coil 304 may include one of the following Or multiple materials;
  • Tungsten W
  • aluminum Al
  • copper Cu
  • gold Au
  • silver Au
  • platinum Pt
  • this embodiment does not limit the specific materials of the lower magnetic film 302 and the upper magnetic film 303, as long as the lower magnetic film 302 and the upper magnetic film 303 are made of magnetic thin film (MTF) materials. It only needs to be completed.
  • the magnetic thin film material may be a polycrystalline layer or a single crystal layer of ferromagnetic metal, alloy, or magnetic oxide.
  • the first sub-layer is deposited after the lower magnetic film 302 of the magnetic film inductor is formed.
  • the specific material of the first sub-layer is not limited in this embodiment, as long as the first sub-layer is made of inorganic material. It is sufficient to be deposited.
  • the first sub-layer may be deposited from silicon dioxide (SiO2) or nitride (N3-).
  • the first sub-layer deposited on the surface of the lower magnetic film 302 serves as a protective dielectric layer (PDL).
  • the magnetic flux inductance can be set in advance according to the inductance requirements of the designed magnetic flux inductance. The thickness of the first sublayer.
  • the first sub-layer of the PDL can be formed by chemical vapor deposition (CVD), the thickness of the first sub-layer can be precisely controlled as required and the thickness of the first sub-layer can be effectively guaranteed. Evenly.
  • CVD chemical vapor deposition
  • a second sublayer can be deposited on the surface of the first sublayer.
  • the specific material of the second sublayer is not limited in this embodiment, as long as the second sublayer is deposited from an inorganic material.
  • the second sub-layer may be oxide (Oxide), tetraethyl orthosilicate (TEOS), or phosphosilicate glass (PSG), etc.; in this embodiment, the first sub-layer and the second sub-layer
  • the description of the material of the sub-layer is an optional example and is not limited, as long as the material of the first sub-layer and the material of the second sub-layer are inorganic materials.
  • the surface of the second sub-layer facing the upper magnetic film 303 is subjected to chemical mechanical polishing CMP treatment until the insulating medium 305 located between the upper magnetic film 303 and the lower magnetic film 302 is completely removed.
  • the first sub-layer is formed, and then the surface of the upper magnetic film 303 is processed by etching until the bottom of the magnetic flux groove 306 is the lower magnetic film 302 as shown in FIG. 5.
  • the etching method may be dry etching or wet etching, which is not specifically limited in this embodiment, as long as the bottom of the magnetic flux groove 306 is the lower magnetic film 302.
  • the insulating medium 305 between the upper magnetic film 303 and the lower magnetic film 302 is composed of the first sublayer, and the first sublayer
  • the layer is deposited by chemical vapor deposition, so that the thickness of the insulating medium 305 is precisely controllable.
  • the magnetic film inductor as shown in FIG. 7 includes a lower magnetic film 702, an upper magnetic film 703, a support 704, an insulating medium 709, and a metal coil 705.
  • the difference between this embodiment and the magnetic film inductor shown in the foregoing embodiment is that, inside the magnetic flux groove 706, there is an air gap 707 between the upper magnetic film 703 and the lower magnetic film 702, and the The bottom of the magnetic flux groove 706 is the air gap 707, and the air gap 707 is made of an insulating material located inside the magnetic flux groove 706.
  • the air gaps 707 with different thicknesses have different energy storage capabilities, that is, the thicker the air gap 707, the greater the energy that can be stored in the air gap 707 , The greater the sense of quantity.
  • the thickness of the air gap 707 at the bottom of the magnetic flux groove 706 is smaller than the thickness of the insulating medium under the metal coil 705 to effectively Improve the inductance of the magnetic film inductor.
  • the transition angle 708 is the angle formed between the side wall of the support 704 away from the insulating medium 709 and the horizontal plane, and the transition The angle of the angle 708 is smaller than the angle of the connecting angle 710.
  • the connecting angle 710 please refer to the above-mentioned embodiment for details, and details are not repeated.
  • the surface of the transition corner 708 shown in this embodiment covers the upper magnetic film 703, and the upper magnetic film 703 is covered on the surface of the transition corner 708 for specific instructions, please refer to the above embodiment for details. Details will not be repeated in this embodiment.
  • a first sub-layer is deposited after the lower magnetic film 702 of the magnetic film inductor is formed.
  • the specific material of the first sub-layer is not limited in this embodiment, as long as the first sub-layer is made of inorganic material. It is sufficient to be deposited.
  • the first sub-layer may be deposited by oxide (Oxide), tetraethyl orthosilicate (TEOS), or phosphosilicate glass (PSG);
  • the first sub-layer can be deposited by chemical vapor deposition (CVD), which effectively guarantees the precise control of the thickness of the first sub-layer, that is, before the magnetic film inductor is manufactured
  • CVD chemical vapor deposition
  • the thickness of the first sub-layer can be preset according to the electrical requirements of the magnetic film inductor, and then the thickness of the first sub-layer can be accurately made to meet the requirements by means of CVD.
  • CMP processing is performed on the surface of the first sub-layer until the bottom of the magnetic flux groove 306 exposes the lower magnetic film 702;
  • a second sublayer is deposited on the surface of the first sublayer, and the metal coil 705 is formed on the surface of the second sublayer by etching.
  • the etching method can be dry etching or wet etching.
  • This embodiment does not limit the specific material of the second sub-layer, as long as the second sub-layer is deposited from inorganic materials, for example, the second sub-layer can be made of silicon dioxide (SiO2) or nitrogen.
  • At least one of the nitrides (N3-) is deposited, wherein the nitride (N3-) may be silicon nitride.
  • the deposited second sublayer may form the air gap 707 in the magnetic flux groove 706;
  • the second sub-layer deposited on the surface of the first sub-layer is used as a protective dielectric layer (PDL).
  • the second sub-layer can be set in advance according to the inductance requirements of the designed magnetic flux inductance.
  • the thickness of the sublayer Since the second sub-layer as the PDL can be deposited and formed by CVD, the thickness of the second sub-layer can be accurately controlled as required and the uniformity of the second sub-layer can be effectively guaranteed.
  • the insulating layer located between the upper and lower magnetic films is formed by one-time deposition and CMP. Due to the CMP processing, the uniformity of the bottom surface of the magnetic flux groove is not well controlled, which makes the magnetic flux The bottom surface of the groove is not uniform, and the magnetic flux inductance has poor magnetic saturation characteristics due to poor uniformity of the bottom surface of the magnetic flux groove.
  • the CMP process is performed immediately until the bottom surface of the magnetic flux groove exposes the lower magnetic film, and then The second sub-layer is deposited on the surface of the first sub-layer. Because the second sub-layer is deposited on the surface of the first sub-layer by CVD, the uniformity of the second sub-layer surface is effectively guaranteed, and the magnetic The uniformity of the air gap surface included in the bottom surface of the through slot improves the magnetic saturation characteristic of the magnetic flux inductance. In addition, the second sub-layer is deposited in the magnetic flux groove by CVD, which effectively guarantees the purpose of accurately controlling the thickness of the medium deposited in the magnetic flux groove.
  • the bare chip 800 includes at least one power supply module. This embodiment does not limit the specific number of power supply modules included in the bare chip 800. This embodiment uses the example shown in FIG. 800 includes a power supply module 801 and a power supply module 806 as an example;
  • the electrical connection relationship and specific structure of the power supply module 801 are described below.
  • the power supply module 801 includes a magnetic film inductor and a voltage conversion circuit electrically connected to the magnetic film inductor.
  • a magnetic film inductor please refer to the above-mentioned embodiment for details. It is not repeated in the embodiment, and the voltage conversion circuit is a device arranged on the wafer layer of the die.
  • the power supply module 801 shown in this embodiment is at least one processor 802 electrically connected through a communication bus 804 and a memory 803 electrically connected to the processor 802.
  • the processor 802 may be a general-purpose central processing unit (central processing unit, CPU), microprocessor, or application-specific integrated circuit (ASIC).
  • CPU central processing unit
  • ASIC application-specific integrated circuit
  • the communication bus 804 may include a path for transferring information between the above-mentioned components.
  • the memory 803 may be read-only memory (ROM) or other types of static storage devices that can store static information and instructions, random access memory (RAM), or other types that can store information and instructions
  • ROM read-only memory
  • RAM random access memory
  • EEPROM electrically erasable programmable read-only memory
  • the memory can exist independently and is connected to the processor through a bus. The memory can also be integrated with the processor.
  • the processor 802 may include one or more CPUs, such as CPU0 and CPU1 in FIG. 8.
  • the die 800 may include multiple processors, such as the processor 802 and the processor 805 in FIG. 8. Each of these processors can be a single-CPU (single-CPU) processor or a multi-core (multi-CPU) processor.
  • the processor here may refer to one or more devices, circuits, and/or processing cores for processing data (for example, computer program instructions).
  • the die 800 may be a power management chip for power management.
  • the power supply module 801 supplies power to the processor 802, the processor 805, and the memory 803.
  • the communication bus 804 is used for control between the processor 802, the processor 805, and the memory 803, for example, different
  • the power supply voltage required by the CPU is different, and the voltage required by the memory 803 is also different from that of the CPU.
  • the power supply module shown in this embodiment learns the required voltage value through the communication bus 804.
  • the bare chip 800 includes multiple power supply modules as an example, and the different power supply modules shown in this embodiment are used to output respective required voltages for multiple CPUs and memories.
  • This application also provides an electronic device, which includes a die as shown in FIG. 8.
  • the electronic device may be a desktop computer, a portable computer, Network servers, personal digital assistants (PDAs), mobile phones, tablet computers, wireless terminal devices, communication devices, embedded devices, etc.
  • PDAs personal digital assistants
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the functional units in the various embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated unit can be implemented in the form of hardware or software functional unit.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of the present invention essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , Including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method described in each embodiment of the present invention.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code .

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Abstract

一种磁膜电感、裸片以及电子设备，该磁膜电感包括下磁膜（302）、上磁膜（303）、支撑件（307）、绝缘介质（305）以及至少一个金属线圈（304），绝缘介质（305）背离下磁膜（302）的表面上还设置有支撑件（307），支撑件（307）用于将上磁膜（303）支撑固定于下磁膜（302）的表面上；绝缘介质（305）朝向上磁膜（303）的端面凹设有磁通槽（306），支撑件（307）端部延伸至磁通槽（306）内设置，且位于磁通槽（306）内部的支撑件（307）的外表面（601）的面积大于磁通槽（306）的目标侧壁（602）的面积，目标侧壁（602）为磁通槽（306）与支撑件（307）相连的侧壁。因支撑件（307）的端部够延伸至磁通槽（306）内设置，则使得上磁膜（303）只需要覆盖支撑件（307）的表面即可，无需覆盖支撑件（307）和绝缘介质（305）之间的过渡区域，则避免了上磁膜（303）无法保障在该过渡区域均匀覆盖的弊端。

Description

一种磁膜电感、裸片以及电子设备 技术领域
本申请涉及电感技术领域，尤其涉及一种磁膜电感、裸片以及电子设备。
背景技术
现有技术提供了一种裸片，该裸片可集成有磁膜电感，以实现大幅度的提高裸片效率和降低功耗的目的。
在现有的磁膜电感与裸片的整合集成的方案中，一块裸片上可集成有多个磁膜电感，磁膜电感包括有磁通槽，磁通槽的侧壁的角度比较陡，导致磁膜电感所包括的上磁膜在磁通槽侧壁所覆盖的厚度不均匀，因在制成磁膜电感的过程中，无法保障不同的磁膜电感的上磁膜在磁通槽侧壁的覆盖率，进而使得同一裸片内不同的磁膜电感的电感感量的均匀性很差，且电感饱和特性变化也比较大，从而造成良率损失。
发明内容
本申请提供了一种磁膜电感、裸片以及电子设备，其用于有效的提升了磁膜电感的良率以及满足对磁膜电感使用的性能需求。
本申请实施例第一方面提供了一种磁膜电感，该磁膜电感设置于裸片上，包括下磁膜、上磁膜、支撑件、绝缘介质以及至少一个金属线圈，所述金属线圈与设置在裸片上的半导体器件电连接；所述下磁膜的表面上设置有所述绝缘介质，所述绝缘介质背离所述下磁膜的表面上设置有所述金属线圈，所述绝缘介质用于电性隔离所述金属线圈和所述下磁膜，所述绝缘介质背离所述下磁膜的表面上还设置有所述支撑件，所述支撑件用于将所述上磁膜支撑固定于所述下磁膜的表面上；所述绝缘介质朝向所述上磁膜的端面凹设有磁通槽，所述支撑件端部延伸至所述磁通槽内设置，且位于所述磁通槽内部的所述支撑件的外表面的面积大于所述磁通槽的目标侧壁的面积，所述目标侧壁为所述磁通槽与所述支撑件相连的侧壁。
采用本方面所示的磁膜电感，因所述支撑件的端部够延伸至所述磁通槽内设置，则使得所述上磁膜只需要覆盖所述支撑件的表面即可，无需覆盖支撑件和所述绝缘介质之间的过渡区域，则避免了上磁膜无法保障在该过渡区域均匀覆盖的弊端，而且在所述磁通槽内部，所述支撑件的外表面的面积大于所述磁通槽的目标侧壁的面积，则相对于现有技术在磁通槽的侧壁上直接覆盖所述上磁膜的方案，本方面所示能够有效的提高上磁膜在所述磁通槽内部的覆盖率，从而提高了磁膜电感的电感感量，以使磁膜电感具有较高的电感的磁饱和特性。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，在所述磁通槽的内部，过渡角的角度小于连接角的角度，所述过渡角为所述支撑件背离所述绝缘介质的侧壁与水平面之间所形成的夹角，所述连接角为所述磁通槽的侧壁与水平面之间所形成的夹角。
因所述过渡角相对于所述连接角而言，所述连接角比较陡，而所述过渡角相对平缓，则使得在所述上磁膜覆盖在所述支撑件的外壁的情况下，有效的提高了所述上磁膜在所述 支撑件表面的覆盖率以及覆盖的均匀性。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，所述过渡角的表面覆盖设置有所述支撑件。
因在所述过渡角的表面覆盖设置有所述支撑件，则上磁膜通过覆盖所述支撑件的外表面以延伸至所述磁通槽内部设置，提高了磁膜电感的所述上磁膜在所述磁通槽内的覆盖率，且因过渡角相对平缓，则使得上磁膜位于所述磁通槽内的部分所包括的磁膜和介质层都不会缩小，则不会出现上磁膜位于所述磁通槽内的部分连续且均匀，有效的保障了上磁膜所包括的介质的厚度，从而有效的避免了上磁膜所包括的磁膜短路的情况，这样不会引起磁膜电感的损耗显著增加的情况，增加了饱和电流，能够满足对磁膜电感使用的性能需求，且因所述上磁膜在磁通槽处不会出现断裂，则有效的提升了磁膜电感的良率。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，所述磁通槽的底部为气隙，所述气隙为位于所述磁通槽内部的绝缘材质构成，沿所述磁膜电感的竖向方向，所述气隙的厚度小于所述绝缘介质的厚度。
采用本方面所示，与所述磁通槽相对的位置处，所述上磁膜和所述下磁膜之间具有气隙，所述气隙的厚度为沉积在所述磁通槽的底部的所述绝缘介质的厚度，可见，沿所述磁膜电感的竖向方向，具有不同厚度的所述气隙，具有不同的储能能力，即所述气隙越长，则该气隙内所能够存储的能量越大，感量也就越大。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，沿所述磁膜电感的竖向方向，所述磁通槽的侧壁呈第一台阶结构，所述第一台阶结构的上表面以及所述第一台阶结构的侧壁均覆盖设置有所述支撑件。
采用本方面所示的磁膜电感，通过横截面呈第一台阶结构的磁通槽，则可使得支撑件均匀设置在所述磁通槽内，可保障位于所述磁通槽内部的所述支撑件的外表面的面积大于所述磁通槽的目标侧壁的面积，以有效的保障上磁膜在所述磁通槽内的覆盖率。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，所述第一台阶结构的侧壁与所述上磁膜之间具有过渡间隙，所述支撑件的端部沿所述过渡间隙的导向延伸至所述磁通槽内部。
采用本方面所示，支撑件可沿过渡间隙的导向延伸至所述磁通槽内部，则有效的保障了支撑件延伸至所述磁通槽内部时厚度的均匀，则使得上磁膜位于所述磁通槽内的部分所包括的磁膜和介质层都不会缩小，则不会出现上磁膜位于所述磁通槽内的部分连续且均匀，有效的保障了上磁膜所包括的介质的厚度。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，沿所述磁膜电感的竖向方向，所述支撑件朝向所述绝缘介质的侧壁呈第二台阶结构，所述第二台阶结构与所述第一台阶结构相贴合设置。
通过第一台阶结构和第二台阶结构相贴合设置的方案，则使得上磁膜位于所述磁通槽内的部分所包括的磁膜和介质层都不会缩小，则使得上磁膜位于所述磁通槽内的部分连续且均匀，有效的保障了上磁膜所包括的介质的厚度，从而有效的避免了上磁膜所包括的磁膜短路的情况，这样不会引起磁膜电感的损耗显著增加的情况，增加了饱和电流，能够满 足对磁膜电感使用的性能需求，且因所述上磁膜在磁通槽处不会出现断裂，则有效的提升了磁膜电感的良率。
基于本申请实施例第一方面所示，本申请实施例第一方面的一种可选的实现方式中，所述绝缘介质包括第一子层和第二子层，所述第一子层和所述第二子层均由无机材料沉积而成，其中，所述第一子层沉积于所述下磁膜的表面上，所述第二子层沉积于所述第一子层的表面；所述磁通槽由在化学机械抛光CMP处理后的所述第一子层的表面进行刻蚀形成，且所述磁通槽内的所述气隙为所述第二子层沉积而成。
采用本方面所示，在下磁膜的表面上沉积有所述第一子层的情况下，即可进行CMP处理，并在CMP处理后的所述第一子层的表面进行刻蚀处理直至所述磁通槽的底面露出所述下磁膜，随后在对第一子层的表面沉积第二子层，因对第一子层统一通过CVD的方式进行第二子层的沉积，从而有效的保障了第二子层表面的均匀，进而保障了磁通槽的底面的气隙的均匀性，提高了磁通电感的磁饱和特性。又因通过CVD的方式在所述磁通槽内沉积所述第二子层，有效的保障了沉积在所述磁通槽内部的气隙的厚度精确可控的目的。
本申请实施例第二方面提供了一种裸片，包括裸片和设置在所述裸片上的磁膜电感，所述磁膜电感如上述本申请实施例第一方面所示。
本申请实施例第三方面提供了一种电子设备，包括裸片和设置在所述裸片上的磁膜电感，所述磁膜电感如上述本申请实施例第一方面所示。
附图说明
图1为现有技术所提供的磁膜电感的一种实施例整体结构示意图；
图2为现有技术所提供的磁膜电感的一种实施例侧视剖面结构示意图；
图3为本申请所提供的磁膜电感的一种实施例侧视剖面结构示意图；
图4为本申请所提供的磁膜电感的一种实施例侧视局部剖面结构示意图；
图5为本申请所提供的磁膜电感的另一种实施例侧视局部剖面结构示意图；
图6为本申请所提供的磁膜电感的另一种实施例侧视局部剖面结构示意图；
图7为本申请所提供的磁膜电感的另一种实施例侧视剖面结构示意图；
图8为本申请所提供的裸片的一种实施例电连接结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请中出现的术语“和/或”，可以是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本申请中字符“/”，一般表示前后关联对象是一种“或”的关系。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情 况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或模块的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或模块，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或模块。
为更好的理解本申请所提供的磁膜电感，以下首先对芯片的结构进行说明：
芯片中的核心器件是裸片(Die)。裸片通常由两部分组成，分别是晶圆层(wafer)以及设置在晶圆层上的再分布层(redistribution layer，RDL)。所述晶圆层主要是由单晶硅组成，其上排布有各种各样的半导体器件，比如各种晶体管。所述布线层上设置有多层由绝缘的氧化物介质构成的介质层。在所述多层介质层之间布设有金属层，这些金属层被工艺手段设置成各种形状，从而在介质层之间形成了金属线路。所述多层介质层上还设置有通孔，所述通孔中填充有金属材料，或者通孔的内壁镀有金属材料。介质层之间的金属线路通过所述通孔实现了处于不同介质层之间的金属线路的电性连接，以及，金属线路还通过这些介质上的通孔与晶圆层上的半导体器件电性连接，从而所述金属线路和半导体器件就一起构成了各种功能电路。在介质层远离所述晶圆层的表面上还设置有金属接垫(Pad)，或者金属凸点(Bump)。所述金属接垫和金属凸点也通过介质上的通孔与所述金属线路和所述半导体器件电性连接，用于作为裸片内的功能电路的对外接口。
为了实现各种复杂的电路需求，可在芯片中设置磁膜电感，该磁膜电感包括有呈螺旋形式设置的金属线圈，该金属线圈可由RDL以螺旋方式形成，该金属线圈还可由所述介质层之间的金属线路以螺旋的方式形成。
请参照图1，所述磁膜电感通常包括由磁膜围成的磁膜通道100，以及穿过所述磁膜通道100的金属线圈101。
如上文所述，所述金属线圈101可以通过形成于介质层之间的金属线路构成，也可以通过位于晶圆层上的RDL构成。
所述磁膜通道100的结构可以参照图2。如图2所示的为磁膜通道101的横截面视图。
如图2所示，若所述金属线圈101由金属线路构成，则所述磁膜通道101设置在裸片的介质层中，若所述金属线圈101由RDL构成，则所述磁膜通道101设置在晶圆层和所述介质层之间。
所述磁膜通道100包括下磁膜202和上磁膜204。所述上磁膜204被支撑件203支撑于所述下磁膜202上，从而在所述上磁膜204和所述下磁膜202之间形成了一个通道，所述金属线圈101自所述通道中穿过。
在所述通道的底部设置有绝缘介质206。所述绝缘介质206设置在所述下磁膜202上，所述支撑件203和所述金属线圈101均设置在所述绝缘介质206上。
在实际产品中，所述下磁膜202可设置在裸片的某一个介质层中，还可设置在晶圆层上，所述上磁膜204呈拱形；上磁膜204的中部突起，两侧与所述下磁膜202接触。从而，所述介质层被所述上磁膜204和下磁膜202截断，留在所述通道中的部分构成了所述绝缘介质206。
进一步的，所述上磁膜204和下磁膜202相接触的部分没有介质材料，这相当于在介质层206上形成了两排沟道，这两排沟道又被称为磁通槽209。
图2中所示的磁膜通道的结构中，所述支撑件203用于将上磁膜204支撑固定于所述下磁膜202的表面上，所述上磁膜204和所述下磁膜202之间，且位于所述支撑件203内部设置的所述金属线圈101为金属导体并以螺旋方式形成回路，因所述金属线圈101至于所述上磁膜204和所述下磁膜202之间，且金属线圈101与所述上磁膜204之间用所述支撑件203分开，所述金属线圈101和所述下磁膜202之间用绝缘介质206分开，对所述支撑件203和所述绝缘介质206的具体材质不做限定，只要所述支撑件203和所述绝缘介质206均由绝缘材质制成即可。本实施例可通过所述支撑件203和所述绝缘介质206对所述金属线圈101的电性隔离，将显著提高磁膜电感101的电感量和品质因子。
所述绝缘介质206设置于所述支撑件203和所述下磁膜202之间。其中，金属线圈101通过焊点或穿过所述绝缘介质206的通孔与裸片上的半导体器件电连接，以使裸片100上的半导体器件能够通过绝缘介质206的通孔将电流传输至所述金属线圈101。当电流走过金属线圈101，所述金属线圈101产生磁场，以在磁膜电感101结构内存储能量，所述上磁膜204和所述下磁膜202可有效地吸引此磁场的磁通量线，以使所述磁膜电感101的储能更强且有效的减少磁泄漏。
现有技术所示的磁膜电感101中，所述磁通槽209的具体设置方式为在所述绝缘介质206的表面通过干法刻蚀或湿法刻蚀的方式形成，以使该磁通槽209底部露出所述下磁膜202，使得在所述磁通槽209内部实现所述上磁膜204和所述下磁膜202的连接，使得所述金属线圈101中的电流引起的包含在下磁膜202和上磁膜204中磁力线，在经过磁通槽209处形成最小路径的回路。
以下对现有技术所提供的磁膜电感的缺陷进行说明：
由上文所述，所述磁通槽的侧壁，或者说，所述绝缘介质206的侧部与水平面之间形成连接角207。在工艺实现中，经常会出现上磁膜204在所述磁通槽206侧壁的厚度因为所述连接角207变薄，从而使得磁通槽209的宽度在连接角207所处的位置突然变小，从而影响磁膜电感的性能，造成感量低。
又因，所述上磁膜204是多层结构，该多层结构包括多层磁膜，且任意相邻的两层磁膜之间还设置有介质层，且介质层的厚度远小于磁膜的厚度，因所述上磁膜204在所述磁通槽209内的覆盖率较低，则上磁膜204位于所述磁通槽209内的部分所包括的磁膜和介质层的厚度都将按比例缩小，则极有可能出现上磁膜204位于所述磁通槽209内的部分厚度过少，导致介质过薄，从而使得通过过薄的介质隔离的磁膜短路，这样会引起磁膜电感的损耗显著增加，饱和电流减小，无法满足对磁膜电感使用的性能需求。
所述上磁膜204在连接角207处容易出现断裂，降低了磁膜电感的良率，且所述磁通槽209所覆盖的磁膜的厚度出现不连续的问题，造成良率的损失，因上述问题也导致磁膜电感101的磁饱和特性差，以致现有工艺很难实现磁膜电感的量产目标。
为解决如图1和图2所示的现有技术所提供的磁膜电感的技术缺陷，以下首先结合图 3所示对本实施例所提供的磁膜电感的具体结构进行示例性说明，其中，图3为本申请所提供的磁膜电感的一种实施例侧视剖面结构示意图。
如图3所示，本实施例所示的磁膜电感包括有磁膜通道，所述磁膜通道具体包括下磁膜302和上磁膜303以及穿过所述磁膜通道的金属线圈304，对所述下磁膜302、所述上磁膜303以及所述金属线圈304的具体说明，请详见图1和图2所示的说明，具体在本实施例中不做赘述。本申请各实施例中，以所述金属线圈由RDL以螺旋的方式形成为例进行示例性说明。
继续参见图3所示，所述磁膜通道的通道内设置有绝缘介质305，本实施例对所述绝缘介质305的具体材质不做限定，只要所述绝缘介质305为无机材料制成即可。所述绝缘介质305用于分开所述金属线圈304和所述下磁膜302，对所述绝缘介质305的具体说明，请详见图2所示，具体在本实施例中不做赘述。
本实施例所示的磁膜电感还包括用于将所述上磁膜303固定于所述下磁膜302表面上的支撑件307，本实施例可通过所述支撑件307分开所述金属线圈304和所述上磁膜303，通过本实施例所示的所述绝缘介质305以及所述支撑件307可显著提高磁膜电感的电感量和品质因子。
所述绝缘介质305朝向所述上磁膜303的端面凹设有磁通槽306，为更好的理解本实施例所示的所述磁通槽306的具体结构，以下参见图4至图6所示为例，其中，图4为本申请所提供的磁膜电感尚未设置支撑件307、所述上磁膜303以及磁通槽306时的侧视剖面结构示意图，图5为本申请所提供的磁膜电感尚未设置支撑件307以及所述上磁膜303时的侧视剖面结构示意图，而图6为本申请所提供的磁膜电感尚未设置上磁膜303时的侧视剖面结构示意图。
首先参见图4所示，可首先在下磁膜302的表面上设置绝缘层300，所设置的所述绝缘层300朝向所述上磁膜303表面进行平坦化处理，本实施例对平坦化处理的具体手段不做限定，只要所述绝缘层300经过平坦化处理后，所述绝缘层300朝向所述上磁膜303的端面呈平面结构即可，例如，本实施例所示的平坦化处理可为化学机械平坦化(chemical mechanical planarization，CMP)，又称化学机械研磨，是半导体器件制造工艺中的一种技术，使用化学腐蚀及机械力对加工过程中的绝缘层300朝向所述上磁膜303的端面进行平坦化处理，并通过该CMP在所述绝缘层300上形成有所述金属线圈304；
所述CMP是典型半导体制造技术，也是所谓的镶嵌工艺。镶嵌工艺包括以下步骤：在所述绝缘层300朝向所述上磁膜303表面形成图案，用互连金属填充这些图案，通过抛光除去多余金属并留下镶嵌的互连金属部件，该互连金属部件在本实施例即为所述金属线圈304。
参见图5所示，在绝缘层300朝向所述上磁膜303的端面呈平面结构的情况下，可通过刻蚀工艺在所述绝缘层300朝向所述上磁膜303的端面凹设有所述磁通槽306，其中，所述绝缘层300位于该磁膜电感的通道底部内的部分为所述绝缘介质305。在本实施例中，所述磁通槽306的底面为所述下磁膜302。
本实施例对所述刻蚀工艺的具体工艺不做限定，只要通过所述刻蚀工艺能够在所述绝 缘层300朝向所述上磁膜303的端面凹设有所述磁通槽306即可。例如，所述刻蚀工艺可为干法刻蚀与湿法刻蚀。干法刻蚀主要利用反应气体与等离子体进行刻蚀；湿法刻蚀主要利用化学试剂与被刻蚀材料发生化学反应进行刻蚀。为实现上磁膜303和所述下磁膜302包裹所述金属线圈304，以使所述上磁膜303和所述下磁膜302能够有效的吸引所述金属线圈304所产生的磁场的目的，则本实施例所示可在所述绝缘介质305上的两侧且在所述上磁膜303和所述下磁膜302相连接的位置设置有两个所述磁通槽306，以使所述上磁膜303的两端通过所述磁通槽306与所述下磁膜302连接的情况下，所述金属线圈304可位于所述上磁膜303和所述下磁膜302之间所形成的区域内。
通过图5所示可知，所述磁通槽306侧壁与水平面之间形成有连接角308，或者说该连接角308为所述绝缘介质305的侧部与水平面之间所形成的夹角，在图5所示的示例中，由上述现有技术部分的说明可知，该连接角308的角度比较陡，一般为45度以上，本实施例对所述连接角308的具体角度不做限定。
本实施例中，为提高所述上磁膜303在该磁通槽306侧壁的覆盖率，则继续如图6所示，沿所述磁膜电感的竖向方向，所述磁通槽306与所述支撑件307的端部相对设置，即沿所述磁膜电感的竖向方向，所述磁通槽306与所述支撑件307的端部部分重合设置，以使所述支撑件307的端部能够延伸至所述磁通槽306内设置，本实施例对所述支撑件307位于所述磁通槽306内部的具体结构不做限定，只要在所述磁通槽306内部，所述支撑件307的外表面601的面积大于所述磁通槽306目标侧壁602的面积，由图6所示可知，所述目标侧壁602为所述磁通槽306与所述支撑件307相连的侧壁，以使如图3所示，将所述上磁膜303支撑固定于所述支撑件307上的情况下，在所述磁通槽306内部，所述上磁膜303贴合设置于所述支撑件307背离所述目标侧壁602的表面。
为更好的理解本实施例所示的磁膜电感，则以下结合现有技术所示的磁膜电感和本实施例所示的磁膜电感进行对比说明：
结合图2和图6所示可知，在图2所示的磁膜电感的结构中，因所述支撑件203和所述磁通槽209之间处于不连续的状态，即支撑件203和所述绝缘介质206之间有过渡区域，该过渡区域位于所述磁通槽209的槽口处，该过渡区域一般是不能实现平滑过渡的，即所述支撑件203和所述绝缘介质206之间会呈钝角结构，则通过所述支撑件203所支撑的所述上磁膜204依次经过所述支撑件203、支撑件203和所述绝缘介质206之间的过渡区域延伸至所述磁通槽209内，且延伸至所述磁通槽209内的所述上磁膜204覆盖设置在所述磁通槽209侧壁上，由此可见，因所述上磁膜204需要覆盖所述支撑件203和所述绝缘介质206之间的过渡区域，该呈钝角结构的过渡区域无法保障所述上磁膜204能够均匀覆盖，而且所述磁通槽209的外周壁与所述绝缘介质206之间形成有连接角207，无法保障所述上磁膜204在该磁通槽209侧壁的覆盖率；
而本实施例所示的磁膜电感中，因所述支撑件307的端部能够延伸至所述磁通槽306内设置，则使得所述上磁膜303只需要覆盖所述支撑件307的表面即可，无需覆盖支撑件307和所述绝缘介质305之间的过渡区域，则避免了上磁膜303无法保障在该过渡区域均匀覆盖的弊端，而且在所述磁通槽306内部，所述支撑件307的外表面601的面积大于所 述磁通槽306目标侧壁602的面积，则相对于现有技术在目标侧壁602设置所述上磁膜的方案，本实施例能够有效的提高上磁膜303在所述磁通槽306内部的覆盖率，从而提高了磁膜电感的电感感量，以使磁膜电感具有较高的电感的磁饱和特性，可实现磁膜电感的量产目标。
而且本实施例所示的磁膜电感的所述上磁膜303在所述磁通槽306内的覆盖率高，则上磁膜303位于所述磁通槽306内的部分所包括的磁膜和介质层的厚度都不会缩小，使得所述上磁膜303位于所述磁通槽306外部和内部的部分，所包括的磁膜和介质层的厚度均匀相等，进而使得上磁膜303位于所述磁通槽306内的部分连续且均匀，有效的保障了上磁膜303所包括的介质的厚度，从而有效的避免了上磁膜303所包括的磁膜短路的情况，这样不会引起磁膜电感的损耗显著增加的情况，增加了饱和电流，能够满足对磁膜电感使用的性能需求，且因所述上磁膜303在磁通槽306的槽口处不会出现断裂，则有效的提升了磁膜电感的良率。
以下结合图3所示对本实施例所示的磁膜电感具体是如何提高上磁膜303在所述磁通槽306内的覆盖均匀性以及覆盖率的进行说明：
本实施例所示在所述磁通槽306内部，所述支撑件307背离所述绝缘介质305的侧壁与水平面之间形成有过渡角309，为提高所述上磁膜303在所述磁通槽306内的覆盖率，则需要保障在所述磁通槽306内部，所述支撑件307的外表面601的面积大于所述目标侧壁602的面积，则本实施例中，在所述磁通槽306的内部，所述过渡角309的角度小于连接角308的角度。
因所述过渡角309相对于所述连接角308而言，所述连接角308比较陡，而所述过渡角309相对平缓，相对于现有技术所示在所述连接角308上覆盖上磁膜的方案，本实施例所示可在相对于连接角308更为平缓的所述过渡角309的表面覆盖所述上磁膜303，则使得在所述上磁膜303覆盖在所述支撑件307的外壁的情况下，有效的提高了所述上磁膜303在所述磁通槽306内的覆盖率以及覆盖的均匀性。
本实施例中，所述过渡角309的角度完全由支撑件307的表面的形貌决定，可选的，本实施例所示的所述过渡角309的角度小于等于50度为例，以提高所述上磁膜303在所述磁通槽306内的覆盖率，需明确的是，本实施例对所述过渡角309的具体角度不做限定，只要所述过渡角309的角度小于所述连接角308的角度即可。
为实现所述上磁膜303能够平滑的过渡至所述磁通槽306内，以有效的保障本实施例所示的磁膜电感的磁饱和特性，则如图5所示，本实施例所示，所述绝缘介质305的侧壁呈第一台阶结构，所述第一台阶结构的上表面3051以及所述第一台阶结构的侧壁3052均覆盖设置有所述支撑件307。
为实现所述支撑件307的端部延伸至所述磁通槽306内部的目的，则本实施例所示，所述支撑件307朝向所述绝缘介质305的侧壁呈第二台阶结构，所述第二台阶结构与所述第一台阶结构相贴合设置，结合图5和图6所示，所述第二台阶结构的上表面3071与所述第一台阶结构的上表面3051相互贴合，所述第二台阶结构的侧壁3072与所述第一台阶结构的侧壁3052相互贴合，可见，采用本实施例所示的结构，可使得所述磁通槽306侧壁覆 盖设置有所述支撑件307。
可选的，沿所述磁膜电感的竖向方向，所述绝缘介质305的横截面可呈矩形结构，则有效的提高了制成所述支撑件307的效率和准确率。
采用本实施例所示的结构，可使所述上磁膜303均匀且平缓的覆盖在所述支撑件307的表面以设置在所述磁通槽306内。采用本实施例所示的磁膜电感的具体结构，可使得所述支撑件307的端部能够经由所述第一台阶结构的上表面3051以及所述第一台阶结构的侧壁3052延伸至所述磁通槽306内部，以有效的保障位于所述磁通槽306内的支撑件307呈平滑结构，进而使得所述上磁膜303能够均匀覆盖所述支撑件307的表面。
可选的，本实施例对所述金属线圈304的具体材质不做限定，只要所述金属线圈304能够流通电流以产生磁场即可，例如，所述金属线圈304可包括如下所示的一种或多种材质；
钨(W)、铝(Al)、铜(Cu)、金(Au)、银(Ag)或铂(Pt)。
可选的，本实施例对所述下磁膜302以及所述上磁膜303的具体材质不做限定，只要所述下磁膜302以及所述上磁膜303由磁性薄膜(MTF)材料制成即可，例如，所述磁性薄膜材料可为铁磁金属、合金、或磁性氧化物的多晶层或单晶层等。
以下结合图5所示对本实施例所示的具体是如何在所述绝缘介质305朝向所述上磁膜303的端面设置所述磁通槽306的第一种工艺流程进行示例性说明：
首先，在所述磁膜电感的所述下磁膜302形成后沉积第一子层，本实施例对所述第一子层的具体材质不做限定，只要所述第一子层由无机材料沉积而成即可，例如，所述第一子层可由二氧化硅(SiO2)或氮化物(N3-)沉积而成。本实施例通过沉积在所述下磁膜302的表面上的第一子层作为保护介质层(protective dielectric layer，PDL)，本实施例可预先根据所设计的磁通电感的电感需求设置所述第一子层的厚度。
因可通过化学气相沉积(chemical vapor deposition，CVD)的方式形成作为PDL的第一子层，则可根据需要精确的控制所述第一子层的厚度且能够有效的保障第一子层厚度的均匀。
随后，可在所述第一子层的表面沉积第二子层，本实施例对所述第二子层的具体材质不做限定，只要所述第二子层由无机材料沉积而成即可。例如，所述第二子层可为氧化物(Oxide)、正硅酸乙酯(TEOS)或磷硅玻璃(phospho silicate glass，PSG)等；本实施例对所述第一子层和第二子层材质的说明为可选的示例，不做限定，只要所述第一子层的材质与所述第二子层的材质为无机材料即可。
最后，对所述第二子层朝向所述上磁膜303的表面进行化学机械抛光CMP处理，直至位于所述上磁膜303和所述下磁膜302之间的所述绝缘介质305由所述第一子层构成，随后通过刻蚀的方法对所述上磁膜303的表面进行处理，直至所述磁通槽306的底部为如图5所示的所述下磁膜302即可。其中，所述刻蚀的方法可为干法刻蚀或湿法刻蚀的方法，具体在本实施例中不做限定，只要使得磁通槽306的底部为所述下磁膜302即可。
采用本种设置所述磁通槽306的方式，因所述上磁膜303和所述下磁膜302之间的所述绝缘介质305由所述第一子层构成，而所述第一子层是通过化学气相沉积的方式沉积而 成，从而使得所述绝缘介质305的厚度精确可控。
以下结合图7所示对本实施例所提供的另一种磁膜电感的具体结构进行示例性说明：
如图7所示的磁膜电感包括下磁膜702、上磁膜703、支撑件704、绝缘介质709、以及金属线圈705，对所述下磁膜702、所述上磁膜703、所述支撑件704、磁通槽706以及所述金属线圈705的具体说明，可参见上述实施例所示，具体在本实施例中不做赘述。
本实施例相对于上述实施例所示的磁膜电感的区别在于，在所述磁通槽706内部，所述上磁膜703和所述下磁膜702之间具有气隙707，且所述磁通槽706的底部为所述气隙707，所述气隙707为位于所述磁通槽706内部的绝缘材质构成。
沿所述磁膜电感的竖向方向，具有不同厚度的所述气隙707，具有不同的储能能力，即所述气隙707越厚，则该气隙707内所能够存储的能量越大，感量也就越大。
可选的，本实施例所示沿所述磁膜电感的竖向方向，所述磁通槽706底部的所述气隙707的厚度小于所述金属线圈705下方的绝缘介质的厚度，以有效的提高磁膜电感的电感感量。
在图7所示的实施例中，在所述磁通槽706内部，过渡角708为所述支撑件704背离所述绝缘介质709的侧壁与水平面之间形成的夹角，且所述过渡角708的角度小于连接角710的角度，对所述连接角710的具体说明，请详见上述实施例所示，具体不做赘述。
本实施例所示的所述过渡角708的表面覆盖所述上磁膜703，在所述过渡角708的表面覆盖设置所述上磁膜703的具体说明，请详见上述实施例所示，具体在本实施例中不做赘述。
以下对如何形成如图7所示的磁通槽706的具体过程进行示例性说明：
首先，在所述磁膜电感的所述下磁膜702形成后沉积第一子层，本实施例对所述第一子层的具体材质不做限定，只要所述第一子层由无机材料沉积而成即可，例如，所述第一子层可由氧化物(Oxide)、正硅酸乙酯(TEOS)或磷硅玻璃(phospho silicate glass，PSG)等沉积而成；
本实施例可通过化学气相沉积(chemical vapor deposition，CVD)的方式沉积所述第一子层，则有效的保障了第一子层厚度的精确控制，即在制成所述磁膜电感的之前，可根据对磁膜电感的电性需求，预先设置所述第一子层的厚度，则通过CVD的方式，可精确的使得所述第一子层的厚度满足需求。
随后，在第一子层沉积完成后，对所述第一子层的表面进行CMP处理，直至所述磁通槽306的底部露出所述下磁膜702；
最后，在对所述磁通槽306清洗完毕后，在所述第一子层的表面沉积第二子层，并在所述第二子层的表面通过刻蚀方法形成所述金属线圈705，所述刻蚀方法可采用干法刻蚀或湿法刻蚀的方法。本实施例对所述第二子层的具体材质不做限定，只要所述第二子层由无机材料沉积而成即可，例如，所述第二子层可由二氧化硅(SiO2)或氮化物(N3-)中的至少一种沉积而成，其中，该氮化物(N3-)可为氮化硅。
本实施例通过在所述第一子层的表面沉积第二子层，则所沉积的第二子层可在所述磁通槽706内形成有所述气隙707；
本实施例通过沉积在所述第一子层表面的第二子层作为保护介质层(protective dielectric layer，PDL)，本实施例可预先根据所设计的磁通电感的电感需求设置所述第二子层的厚度。因可通过CVD的方式沉积形成作为PDL的第二子层，则可根据需要精确的控制所述第二子层的厚度且能够有效的保障第二子层厚度的均匀。
为更好的理解本实施例所示的形成磁通槽的有益效果，以下首先对现有技术在磁膜电感形成用于隔离上磁膜和下磁膜之间的绝缘层的具体过程进行说明：
在现有的工艺制造中，位于上下磁膜之间的绝缘层是一次沉积加CMP形成的，因通过CMP进行处理，则使得磁通槽的底面均匀性不好控制，则使得所述磁通槽的底面不均匀，因磁通槽的底面的均匀性差，导致磁通电感的磁饱和特性差。
而采用上述所示的工艺所示可知，在下磁膜的表面上沉积有所述第一子层的情况下，随即进行CMP处理，直至所述磁通槽的底面露出所述下磁膜，随后在对第一子层的表面沉积第二子层，因对第一子层表面通过CVD的方式进行第二子层的沉积，从而有效的保障了第二子层表面的均匀，进而保障了磁通槽的底面所包括的气隙表面的均匀性，提高了磁通电感的磁饱和特性。又因通过CVD的方式在所述磁通槽内沉积所述第二子层，有效的保障了沉积在所述磁通槽内部的介质的厚度精确可控的目的。
以下结合图8所示对本申请所提供的裸片的电连接结构进行示例说明，具体的实体结构请详见上述实施例所示：
如图8所示，该裸片800包括至少一个供电模块，本实施例对裸片800所包括的供电模块的具体数量不做限定，本实施例以图8所示为例，所述裸片800包括供电模块801和供电模块806为例；
以下对供电模块801的电连接关系以及具体结构进行说明，对供电模块806的具体电连接关系和具体结构的说明，请参见供电模块801所示，具体不做赘述。
如图8所示，所述供电模块801包括磁膜电感和与磁膜电感电连接的电压转换电路，其中，所述磁膜电感的具体说明，请详见上述实施例所示，具体在本实施例中不做赘述，所述电压转换电路为设置在裸片的晶圆层上的器件。
本实施例所示的供电模块801通过通信总线804电连接的至少一个处理器802以及与该处理器802电连接的存储器803。
处理器802可以是一个通用中央处理器(central processing unit，CPU)，微处理器，特定应用集成电路(application-specific integrated circuit，ASIC)。
所述通信总线804可包括一通路，在上述组件之间传送信息。
存储器803可以是只读存储器(read-only memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，RAM)或者可存储信息和指令的其他类型的动态存储设备，也可以是电可擦可编程只读存储器(electrically erasable programmable read-only memory，EEPROM)。存储器可以是独立存在，通过总线与处理器相连接。存储器也可以和处理器集成在一起。
在具体实现中，作为一种实施例，处理器802可以包括一个或多个CPU，例如图8中的CPU0和CPU1。
在具体实现中，作为一种实施例，裸片800可以包括多个处理器，例如图8中的处理器802和处理器805。这些处理器中的每一个可以是一个单核(single-CPU)处理器，也可以是一个多核(multi-CPU)处理器。这里的处理器可以指一个或多个设备、电路、和/或用于处理数据(例如计算机程序指令)的处理核。
本申请对所述裸片800所实现的功能不做限定，例如，所述裸片800可为用于进行电源管理的电源管理芯片。
本实施例中，所述供电模块801，给处理器802、处理器805和存储器803供电，所述通信总线804是用于处理器802、处理器805和存储器803之间控制的，如，不同的CPU所需的供电电压不一样，所述存储器803所需的电压也不同于CPU，则本实施例所示的供电模块通过通信总线804获知所需提供的电压值。
本实施例以所述裸片800包括多个供电模块为例，则本实施例所示的不同的供电模块用于为多个CPU以及存储器输出各自需求的电压。
本申请还提供一种电子设备，该电子设备包括如图8所示的裸片，本实施例对所述电子设备的具体设备类型不做限定，如该电子设备可为台式机、便携式电脑、网络服务器、掌上电脑(personal digital assistant，PDA)、移动手机、平板电脑、无线终端设备、通信设备、嵌入式设备等。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存 储程序代码的介质。
以上所述，以上实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims (10)

  1. 一种磁膜电感，设置在裸片上，其特征在于，包括下磁膜、上磁膜、支撑件、绝缘介质以及至少一个金属线圈，所述金属线圈与设置在裸片上的半导体器件电连接；
    所述下磁膜的表面上设置有所述绝缘介质，所述绝缘介质背离所述下磁膜的表面上设置有所述金属线圈，所述绝缘介质用于电性隔离所述金属线圈和所述下磁膜，所述绝缘介质背离所述下磁膜的表面上还设置有所述支撑件，所述支撑件用于将所述上磁膜支撑固定于所述下磁膜的表面上；
    所述绝缘介质朝向所述上磁膜的端面凹设有磁通槽，所述支撑件端部延伸至所述磁通槽内设置，且位于所述磁通槽内部的所述支撑件的外表面的面积大于所述磁通槽的目标侧壁的面积，所述目标侧壁为所述磁通槽与所述支撑件相连的侧壁。
  2. 根据权利要求1所述的磁膜电感，其特征在于，在所述磁通槽的内部，过渡角的角度小于连接角的角度，所述过渡角为所述支撑件背离所述绝缘介质的侧壁与水平面之间所形成的夹角，所述连接角为所述磁通槽的侧壁与水平面之间所形成的夹角。
  3. 根据权利要求2所述的磁膜电感，其特征在于，所述过渡角的表面覆盖设置有所述支撑件。
  4. 根据权利要求1至3任一项所述的磁膜电感，其特征在于，所述磁通槽的底部为气隙，所述气隙为位于所述磁通槽内部的绝缘材质构成，沿所述磁膜电感的竖向方向，所述气隙的厚度小于所述绝缘介质的厚度。
  5. 根据权利要求1至4任一项所述的磁膜电感，其特征在于，沿所述磁膜电感的竖向方向，所述磁通槽的侧壁呈第一台阶结构，所述第一台阶结构的上表面以及所述第一台阶结构的侧壁均覆盖设置有所述支撑件。
  6. 根据权利要求5所述的磁膜电感，其特征在于，所述第一台阶结构的侧壁与所述上磁膜之间具有过渡间隙，所述支撑件的端部沿所述过渡间隙的导向延伸至所述磁通槽内部。
  7. 根据权利要求5或6所述的磁膜电感，其特征在于，沿所述磁膜电感的竖向方向，所述支撑件朝向所述绝缘介质的侧壁呈第二台阶结构，所述第二台阶结构与所述第一台阶结构相贴合设置。
  8. 根据权利要求4所述的磁膜电感，其特征在于，所述绝缘介质包括第一子层和第二子层，所述第一子层和所述第二子层均由无机材料沉积而成，其中，所述第一子层沉积于所述下磁膜的表面上，所述第二子层沉积于所述第一子层的表面；
    所述磁通槽由在化学机械抛光CMP处理后的所述第一子层的表面进行刻蚀形成，且所述磁通槽内的所述气隙为所述第二子层沉积而成。
  9. 一种裸片，其特征在于，包括裸片和设置在所述裸片上的磁膜电感，所述磁膜电感如权利要求1至8任一项所示。
  10. 一种电子设备，其特征在于，包括裸片和设置在所述裸片上的磁膜电感，所述磁膜电感如权利要求1至8任一项所示。
PCT/CN2019/082793 2019-04-16 2019-04-16 一种磁膜电感、裸片以及电子设备 WO2020210966A1 (zh)

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