WO2020196735A1 - Dispositif à del infrarouge - Google Patents

Dispositif à del infrarouge Download PDF

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Publication number
WO2020196735A1
WO2020196735A1 PCT/JP2020/013622 JP2020013622W WO2020196735A1 WO 2020196735 A1 WO2020196735 A1 WO 2020196735A1 JP 2020013622 W JP2020013622 W JP 2020013622W WO 2020196735 A1 WO2020196735 A1 WO 2020196735A1
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substrate
semiconductor layer
electrode
layer
infrared led
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PCT/JP2020/013622
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English (en)
Japanese (ja)
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杉山　徹
聡文 喜根井
飯塚　和幸
中村　薫
真二 佐々木
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ウシオオプトセミコンダクター株式会社
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Priority to CN202080020594.6A priority Critical patent/CN113632248A/zh
Publication of WO2020196735A1 publication Critical patent/WO2020196735A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies

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  • the present invention relates to an infrared LED element, particularly an infrared LED element having an emission wavelength of 1000 nm or more.
  • a GaAs-based light emitting device can generate light having a wavelength of 0.7 to 0.8 ⁇ m (700 to 800 nm), but has a longer wavelength of about 1.3 ⁇ m (1300 nm). It is disclosed that an InP-based light emitting device is required to generate light.
  • a p-type InP substrate is used as a growth substrate, and an electrode is formed after epitaxially growing a p-type clad layer, an active layer, and an n-type clad layer lattice-matched with an InP crystal. It is disclosed.
  • the present invention is an infrared LED element having an emission wavelength of more than 1000 nm, and an object of the present invention is to improve the light extraction efficiency as compared with the conventional one.
  • the development of a laser element has been mainly promoted.
  • a method for injecting a large current has been studied in order to increase the luminous intensity in the active layer.
  • the resistivity of the substrate has been lowered by increasing the dopant concentration of InP, and the current density that can be injected into the active layer has been increased.
  • the present invention is: Infrared LED element A substrate containing InP and having an n-type dopant concentration of 1 ⁇ 10 17 / cm 3 or more and less than 3 ⁇ 10 18 / cm 3 A first semiconductor layer formed on the upper layer of the substrate and showing an n-type, The active layer formed on the upper layer of the first semiconductor layer and A second semiconductor layer formed on the upper layer of the active layer and showing a p-type, Of the surface of the substrate, the first electrode formed on the first surface opposite to the side on which the first semiconductor layer is formed, It has a second electrode formed on the upper layer of the second semiconductor layer and formed only in a part of the surface of the second semiconductor layer when viewed from the first direction orthogonal to the surface of the substrate. And It is characterized in that the main emission wavelength is 1000 nm or more.
  • the absorption coefficient of the p-type semiconductor layer is large, so that the p-type semiconductor layer needs to be grown as thin as possible. is there. Therefore, when a p-side electrode is provided on the upper surface of the p-type semiconductor layer, an n-side electrode is provided on the surface (back surface) opposite to the semiconductor layer of the InP substrate, and a voltage is applied between the two electrodes, the p-side electrode is applied. It becomes easy for the current to concentrate directly under.
  • the light emission in the active layer located immediately below the p-side electrode is strengthened, the region contributing to the light emission in the active layer is narrowed, and the emitted light is easily absorbed by the p-side electrode, resulting in light extraction efficiency. Will decrease.
  • Patent Document 2 discloses a technique of forming a semiconductor layer transparent to the generated light with a thick film at the position of the upper layer of the active layer.
  • Patent Document 3 discloses a method of forming a transparent electrode between the active layer and the upper electrode.
  • Patent Document 3 the technique of dispersing the current in the horizontal direction using a transparent electrode such as ITO is widely used in a semiconductor light emitting device whose emission wavelength indicates a visible light region.
  • ITO which is generally used as a transparent electrode, absorbs infrared light having an emission wavelength of more than 1000 nm. Therefore, even if the method described in Patent Document 3 is applied as it is to an infrared LED element having an emission wavelength of more than 1000 nm, the effect of improving the light extraction efficiency cannot be obtained.
  • the present inventors have doped the n-type dopant concentration of the substrate containing InP in an infrared LED element whose main emission wavelength is 1000 nm or more in order to reduce the resistance.
  • lowering the concentration below the concentration has the effect of dispersing the current in the lateral direction (direction parallel to the surface of the substrate). That is, according to the infrared LED element according to the present invention described above, the n-type dopant concentration of the substrate is set to a slightly low value of 1 ⁇ 10 17 / cm 3 or more and less than 3 ⁇ 10 18 / cm 3 .
  • the resistivity of the substrate relatively increasing with respect to the second semiconductor layer showing the p-type, electrons tend to move laterally in the substrate, and the current flowing in the active layer can be expanded in the lateral direction.
  • the resistivity in the semiconductor layer is determined by the carrier concentration, and the carrier concentration largely depends on the dopant concentration.
  • the p-type second semiconductor layer generally has a dopant concentration increased to near the upper limit of injection.
  • the concentration is 5 ⁇ 10 17 / Cm 3 or more and 3 ⁇ 10 18 / cm 3 or less.
  • the n-type dopant concentration of the substrate is 1 ⁇ 10 17 / cm 3 or more and less than 3 ⁇ 10 18 / cm 3 as described above, which is equal to or less than the p-type dopant concentration of the second semiconductor layer. is there.
  • the resistivity of the substrate, that is, the n side is relatively higher than the resistivity of the second semiconductor layer, that is, the p side.
  • the thickness of the substrate may be 10 times or more the thickness of the second semiconductor layer.
  • the film thickness of the p-type semiconductor layer As described above, in an infrared LED element having an emission wavelength exceeding 1000 nm, if the film thickness of the p-type semiconductor layer (second semiconductor layer) is increased, the absorption coefficient is large and the light extraction efficiency is lowered. Therefore, it is preferable to make the film thickness as thin as possible, and it is usually set to about several ⁇ m. On the other hand, since InP has extremely high cleavage property, it is necessary to make the thickness of the substrate at least 50 ⁇ m or more, preferably 150 ⁇ m or more, and more preferably 200 ⁇ m or more from the viewpoint of ensuring independence.
  • the thickness of the substrate is 10 times or more the thickness of the second semiconductor layer, the thickness of the substrate is thick, so that the current is generated in the substrate by intentionally reducing the n-type dopant concentration of the substrate.
  • the effect of lateral spread when flowing becomes remarkable.
  • the effect of laterally expanding the current flowing in the active layer is further exerted, and the light extraction efficiency is improved.
  • the thickness of the substrate is preferably 700 ⁇ m or less, and more preferably 400 ⁇ m or less.
  • the second electrode is formed only in a part of the surface of the second semiconductor layer. With respect to the first direction, at least a part of the region where the second electrode is not formed and at least a part of the region where the first electrode is formed may face each other.
  • the first electrode formed on the first surface side of the substrate and the second electrode formed on the opposite surface (referred to as “second surface”) side are the first. It is placed at a position that does not completely face the direction. As a result, the effect of laterally expanding the current flowing between the first electrode and the second electrode is further enhanced.
  • the second electrode By forming the second electrode in a part of the surface of the second semiconductor layer, not only the side surface of the substrate but also the surface of the second semiconductor layer can be used as the light extraction surface, and the light extraction efficiency. Is enhanced.
  • the first electrode arranged on the first surface side of the substrate may also be formed only on a part of the first surface of the substrate.
  • the first electrode and the non-formed region of the second electrode face each other in the first direction
  • the second electrode and the non-formed region of the first electrode face each other in the first direction. preferable.
  • the second electrode has a plurality of partial electrodes having a lattice shape or a comb shape extending in different directions on the surface of the second semiconductor layer.
  • the separation distance between the adjacent partial electrodes may be 100 ⁇ m or less.
  • the "dispersion length” refers to a lateral distance between a portion showing a brightness of 1/2 of the brightness in the vicinity of the second electrode and the second electrode.
  • the separation distance between the partial electrodes By setting the separation distance between the partial electrodes to 100 ⁇ m or less, the currents flowing from the plurality of partial electrodes arranged apart from each other overlap each other, and as a result, the current can flow in the active layer over a wide range in the lateral direction. ..
  • the dopant of the substrate may contain Sn.
  • Sn dopant concentration
  • a reflective layer made of a material having a reflectance higher than that of the first electrode for light generated by the active layer. It doesn't matter if it is.
  • the reflective layer may contain one or more materials included in the group consisting of Ag, Ag alloy, Au, and Al.
  • the infrared LED element has a dielectric layer made of a material having a refractive index smaller than that of the substrate by 0.2 or more in the region of the first surface of the substrate on which the first electrode is not formed. You may have it.
  • the dielectric layer may contain one or more materials included in the group consisting of SiO 2 , SiN, Al 2 O 3 , ZnO, and ITO.
  • the substrate may have an uneven portion on a side surface other than the first surface and the second surface opposite to the first surface. Since the refractive index of InP is as large as 3.0 or more, the difference in refractive index between the substrate and air becomes large, and it is difficult to extract light. Therefore, by providing the uneven portion on the side surface of the substrate, total reflection on the side surface is less likely to occur, and the light extraction efficiency is improved.
  • uneven portions are formed on the surface of the second semiconductor layer, there is a region where the thickness of the second semiconductor layer becomes thin, which may reduce the action of spreading the current in the lateral direction. From this point of view, it is preferable that uneven portions are not formed on the surface of the second semiconductor layer.
  • the substrate has a thickness of 10 times or more the thickness of the semiconductor layer
  • the surface area of the side surface becomes large, so that most of the light generated by the active layer is taken out from the side surface of the substrate. become. Therefore, in order to suppress total reflection on the side surface and improve the light extraction efficiency, it is preferable to provide an uneven portion on the side surface.
  • the light extraction efficiency is improved as compared with the conventional one in the region where the emission wavelength exceeds 1000 nm.
  • FIG. 1 shows typically the structure of 1st Embodiment of the infrared LED element of this invention.
  • This is an example of a schematic plan view of the infrared LED element shown in FIG. 1 when viewed from the + Z direction.
  • It is sectional drawing in one step for demonstrating the manufacturing method of the infrared LED element shown in FIG.
  • It is sectional drawing in one step for demonstrating the manufacturing method of the infrared LED element shown in FIG.
  • FIG. is sectional drawing in one step for demonstrating the manufacturing method of the infrared LED element shown in FIG.
  • FIG. is sectional drawing in one step for demonstrating the manufacturing method of the infrared LED element shown in FIG.
  • It is sectional drawing in one step for demonstrating the manufacturing method of the infrared LED element shown in FIG.
  • GaInAsP means that it is a mixed crystal of Ga, In, As and P, and the description of the composition ratio is simply omitted. The same applies to other descriptions such as "AlGaInAs".
  • the expression "the layer B is formed on the upper layer of the layer A” means that the thin film is formed on the surface of the layer A as well as the case where the layer B is directly formed on the surface of the layer A. It is intended to include the case where the layer B is formed through the layer B.
  • the term "thin film” as used herein may refer to a layer having a film thickness of 10 nm or less, preferably a layer having a film thickness of 5 nm or less.
  • FIG. 1 is a cross-sectional view schematically showing the structure of the infrared LED element of the present embodiment.
  • the infrared LED element 1 shown in FIG. 1 includes a substrate 3 and a semiconductor layer 10 formed on the upper layer of the substrate 3. Further, the infrared LED element 1 includes electrodes (21, 22, 23) for injecting a current.
  • FIG. 1 corresponds to a schematic cross-sectional view when the infrared LED element 1 is cut along the XZ plane at a predetermined position.
  • the XYZ coordinate system attached to FIG. 1 will be referred to as appropriate.
  • the Z direction corresponds to the "first direction”.
  • FIG. 2 is an example of a schematic plan view when the infrared LED element 1 is viewed from the + Z direction.
  • the electrode 23 is not shown in FIG.
  • the substrate 3 is made of InP doped with n-type impurities.
  • the n-type corresponds to the "first conductive type”.
  • Sn, Si, S, Ge, Se and the like can be used, and Sn is particularly preferable.
  • the thickness of the substrate 3 (length in the Z direction) is 50 ⁇ m or more and 700 ⁇ m or less. Since InP has extremely high cleavage, it is necessary to make the thickness of the substrate 3 at least 50 ⁇ m or more from the viewpoint of ensuring independence. Further, from the viewpoint of accommodating the infrared LED element 1 in a general package, the thickness of the substrate 3 needs to be 700 ⁇ m or less.
  • the thickness of the substrate 3 is preferably 150 ⁇ m or more, more preferably 200 ⁇ m or more.
  • the thickness of the substrate 3 is preferably 400 ⁇ m or less.
  • the dopant concentration of the n-type impurity in the substrate 3 is 1 ⁇ 10 17 / cm 3 or more and less than 3 ⁇ 10 18 / cm 3 , more preferably 3 ⁇ 10 17 / cm 3 or more and 3 ⁇ 10 18 /. It is cm 3 or less, and particularly preferably 5 ⁇ 10 17 / cm 3 or more and 3 ⁇ 10 18 / cm 3 or less.
  • Sn is used as the dopant, the quality of the InP crystals constituting the substrate 3 can be maintained in a particularly good state while impurities are injected at the dopant concentration in the above numerical range.
  • the thickness of the substrate 3 is preferably 700 ⁇ m or less from the viewpoint of suppressing the resistance of the substrate 3 itself from becoming too high.
  • the current density is 150 A / cm 2
  • a potential difference of 0.1 V or more is generated due to the internal resistance according to the substrate 3 having a thickness of 700 ⁇ m or more.
  • the driving voltage of the infrared LED element 1 is, for example, about 1.0 V
  • a potential difference of 10% or more is generated in the substrate 3. , Not very desirable.
  • the potential difference due to the internal resistance is 0.06 V, which is suppressed to less than 0.1 V.
  • the substrate 3 is composed of InP crystals doped with the above n-type impurities, it is also possible that other impurities are mixed in a trace amount (for example, less than 1%).
  • the semiconductor layer 10 is formed on the surface 3b of the substrate 3.
  • the surface 3b corresponds to the "second surface”.
  • the semiconductor layer 10 includes a first semiconductor layer 11, an active layer 12, and a second semiconductor layer (13, 14), and these layers are laminated.
  • the first semiconductor layer 11 is formed on the second surface 3b of the substrate 3.
  • the first semiconductor layer 11 is an InP layer doped with n-type impurities, and constitutes an n-type clad layer in the infrared LED element 1.
  • the n-type dopant concentration of the first semiconductor layer 11 is preferably 1 ⁇ 10 17 / cm 3 or more and 5 ⁇ 10 18 / cm 3 or less, and more preferably 5 ⁇ 10 17 / cm 3 or more and 4 ⁇ 10 It is 18 / cm 3 or less.
  • the active layer 12 produces infrared light having a main emission wavelength of 1000 nm or more and less than 1800 nm.
  • the first semiconductor layer 11 is appropriately selected from a material that does not absorb light in such a wavelength band and is capable of epitaxial growth in lattice matching with the substrate 3 made of InP.
  • the first semiconductor layer 11 in addition to InP, materials such as GaInAsP and AlGaInAs can also be used.
  • the film thickness of the first semiconductor layer 11 is 0.1 ⁇ m or more and 10 ⁇ m or less, preferably 0.5 ⁇ m or more and 5 ⁇ m or less.
  • the active layer 12 is formed on the upper layer (position in the + Z direction) of the first semiconductor layer 11.
  • the active layer 12 is composed of a material that produces infrared light having a main emission wavelength of 1000 nm or more and less than 1800 nm.
  • the active layer 12 is appropriately selected from materials capable of generating light having a target wavelength and capable of epitaxial growth in lattice matching with the substrate 3 made of InP.
  • the active layer 12 may have a single layer structure of GaInAsP, InGaAs or AlGaInAs, from a well layer composed of GaInAsP, InGaAs or AlGaInAs, and from GaInAsP, InGaAs, AlGaInAs or InP having a bandgap energy larger than that of the well layer.
  • An MQW (Multiple Quantum Well) structure including a barrier layer may be used.
  • the active layer 12 may be doped in n-type or p-type, or may be undoped. When doped into an n-type, for example, Si can be used as the dopant.
  • the film thickness of the active layer 12 is 100 nm or more and 2000 nm or less, preferably 500 nm or more and 1500 nm or less.
  • a well layer having a film thickness of 5 nm or more and 20 nm or less and a barrier layer are laminated in a range of 2 cycles or more and 50 cycles or less.
  • the second semiconductor layer (13, 14) is formed on the upper layer (position in the + Z direction) of the active layer 12.
  • the second semiconductor layers (13, 14) are all doped with p-type impurities.
  • the second semiconductor layer 13 constitutes the p-type clad layer in the infrared LED element 1
  • the second semiconductor layer 14 constitutes the p-type contact layer in the infrared LED element 1.
  • the second semiconductor layer 14 is a layer heavily doped in order to secure an electrical connection with the second electrode 21, which will be described later. However, if sufficient electrical connection can be secured, the second semiconductor layer 14 may be omitted and the second electrode 21 may be brought into direct contact with the second semiconductor layer 13 constituting the p-type clad layer. ..
  • the second semiconductor layer 13 constituting the p-type clad layer is made of Zn-doped InP
  • the second semiconductor layer 14 constituting the p-type contact layer is made of Zn-doped GaInAsP.
  • the p-type dopant concentration of the second semiconductor layer 13 constituting the p-type clad layer is preferably 8 ⁇ 10 17 / cm 3 or more and 3 ⁇ 10 18 / cm 3 or less, and more preferably 1 ⁇ 10 18 / cm 3. It is cm 3 or more and 3 ⁇ 10 18 / cm 3 or less.
  • the p-type dopant concentration of the second semiconductor layer 14 constituting the p-type contact layer is preferably 5 ⁇ 10 17 / cm 3 or more and 3 ⁇ 10 18 / cm 3 or less, and more preferably 1 ⁇ 10 18 / cm 3 or more and 3 ⁇ 10 18 / cm 3 or less.
  • a diffusion prevention layer of Zn doped in the second semiconductor layer (13, 14) a layer having a low p-type dopant concentration is interposed between the active layer 12 and the second semiconductor layer (13, 14). It doesn't matter.
  • the p-type impurity material doped in the second semiconductor layer (13, 14) Zn, Mg, Be and the like can be used, and Zn or Mg is preferable, and Zn is particularly preferable.
  • the materials of the p-type dopant of the second semiconductor layer 13 forming the p-type clad layer and the p-type dopant of the second semiconductor layer 14 forming the p-type contact layer may be the same or different. Absent.
  • the infrared LED element 1 has electrodes (21, 22, 23).
  • the first electrode 22 is formed on the first surface 3a of the substrate 3.
  • the first electrode 22 realizes ohmic contact with the first surface 3a of the substrate 3.
  • the first electrode 22 is made of materials such as AuGe / Ni / Au, Pt / Ti, and Ge / Pt, and a plurality of these materials may be provided.
  • the notation "X1 / X2" used when describing a material means that a layer made of X1 and a layer made of X2 are laminated.
  • a second electrode 21 is formed on the surface of the second semiconductor layer 14.
  • the second electrode 21 realizes ohmic contact with the surface of the second semiconductor layer 14.
  • the second electrode 21 is made of a material such as Au / Zn / Au, AuZn, AuBe, and may include a plurality of these materials.
  • a pad electrode 23 is formed on the surface of the second electrode 21.
  • the pad electrode 23 forms a region for connecting the bonding wires.
  • the pad electrode 23 is composed of, for example, Ti / Au, Ti / Pt / Au, or the like.
  • the second electrode 21 has an electrode region 21b in which the pad electrode 23 is arranged and an electrode region 21a extending linearly from the electrode region 21b.
  • the electrode region 21a is provided for the purpose of spreading the current in the direction parallel to the XY plane.
  • the uneven portion 41 is formed on the side surface of the substrate 3.
  • the side surface of the substrate 3 refers to a surface of the substrate 3 other than the two surfaces (3a, 3b) parallel to the XY plane.
  • the substrate 3 has a substantially rectangular parallelepiped shape, the substrate 3 has four side surfaces, and uneven portions 41 are formed on each of these side surfaces.
  • the uneven portion 41 is configured such that the maximum value of the height difference is 0.5 times or more the emission wavelength, and the distance between the convex and concave portions is 0.7 times or more the emission wavelength.
  • the maximum value of the height difference of the uneven portion is preferably 0.5 ⁇ m or more and 3 ⁇ m or less, and more preferably 0.8 ⁇ m or more and 2 ⁇ m or less.
  • the distance between the convex and concave portions, that is, the pitch of the concave and convex portions 41 is preferably 0.8 ⁇ m or more and 4 ⁇ m or less, and more preferably 1.4 ⁇ m or more and 3 ⁇ m or less.
  • FIGS. 3A to 3I are cross-sectional views of one step in the manufacturing process.
  • Step S1 As shown in FIG. 3A, 1 ⁇ 10 17 / cm 3 or more, n-type impurity at a dopant concentration of less than 3 ⁇ 10 18 / cm 3 to prepare a substrate 3 made of doped InP.
  • Step S2 As shown in FIG. 3A, the substrate 3 is conveyed into the MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and the first semiconductor layer 11, the active layer 12, and the second semiconductor layer (13) are placed on the second surface 3b side of the substrate 3. , 14) are sequentially epitaxially grown in the semiconductor layer 10.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • the type and flow rate of the raw material gas, the treatment time, the environmental temperature, and the like are appropriately adjusted according to the material and film thickness of the layer to be grown.
  • each semiconductor layer 10 is as described above.
  • the first semiconductor layer 11 made of Si-doped InP, the active layer 12 made of GaInAsP, the second semiconductor layer 13 made of Zn-doped InP, and Zn are doped.
  • a semiconductor layer 10 including a second semiconductor layer 14 made of GaInAsP is formed.
  • Step S3 The epitaxial wafer is taken out from the MOCVD apparatus, and a resist mask patterned by a photolithography method is formed on the surface of the second semiconductor layer 14. Then, a material for forming the second electrode 21 (for example, Au / Zn / Au) is formed by using a vacuum vapor deposition apparatus, and then the resist mask is peeled off by a lift-off method. After that, for example, an alloy treatment (annealing treatment) is performed by heat treatment at 450 ° C. for 10 minutes to form a second electrode 21 on the upper surface of the second semiconductor layer 14, as shown in FIG. 3B.
  • annealing treatment annealing treatment
  • Step S4 Of the surfaces of the substrate 3, the surface on which the semiconductor layer 10 is formed is protected by applying a resist, and then the surface opposite to that surface, that is, the first surface 3a, is subjected to grinding and polishing treatment. Wet etching treatment with hydrochloric acid-based etchant is performed. As a result, the thickness of the substrate 3 is adjusted (see FIG. 3C). The thickness of the substrate 3 is set to 50 ⁇ m or more and 700 ⁇ m or less as described above, and is set to 250 ⁇ m as an example. After that, the resist as a protective film is removed by an organic solvent.
  • Step S5 As shown in FIG. 3D, after a film forming material (for example, AuGe / Ni / Au) for the first electrode 22 is formed on the first surface 3a side of the substrate 3 using a vacuum vapor deposition apparatus, for example, 450 ° C., 10
  • the first electrode 22 is formed by performing an alloy treatment (annealing treatment) by heat treatment for a minute.
  • Step S6 As shown in FIG. 3E, a pad electrode 23 made of, for example, Ti / Au is formed on the upper surface of the second electrode 21 by using a photolithography method, a vacuum deposition method, and a lift-off method.
  • Step S7 mesa etching is performed to separate each element. Specifically, the non-etched region of the surface of the second semiconductor layer 14 is masked with a resist patterned by a photolithography method, and a wet etching treatment is performed with a mixed solution of bromine and methanol. As a result, a part of the second semiconductor layer (13, 14), the active layer 12, and the first semiconductor layer 11 located in the unmasked region is removed.
  • Step S8 As shown in FIG. 3G, after the wafer subjected to the mesa etching treatment is attached to the dicing sheet 31, element division is performed along the dicing line using a blade dicing device. Further, the dicing sheet 31 to which the infrared LED element 1 is attached is expanded by using the expansion device, and a gap is provided between the adjacent infrared LED elements 1.
  • Step S9 As shown in FIG. 3H, the dicing sheet 31 to which the infrared LED element 1 is attached is dip-treated with an acidic etching solution containing hydrochloric acid to form an uneven shape on the side surface of the infrared LED element 1.
  • the uneven portion 41 is formed on the side surface of the substrate 3, and the uneven portion 42 is formed on the side surface of the semiconductor layer 10.
  • the uneven portion is formed on the upper surface of the second semiconductor layer 14 by this step S9.
  • Step S10 The infrared LED element 1 is removed from the dicing sheet 31. As a result, the state shown in FIG. 1 is obtained.
  • Step S11 As shown in FIG. 3I, for example, the first electrode 22 side of the infrared LED element 1 is die-bonded on the TO-18 type stem 35 via the silver paste 34, and after thermosetting, the pad electrode 23 and the wire 36 are formed. Bond and electrically connect.
  • solder may be used instead of the silver paste 34.
  • materials such as AuSn and SnAgSu can be adopted.
  • the uneven portion 41 is formed on the side surface of the substrate 3, the amount of light that is totally reflected by the side surface of the substrate 3 and returned to the inside of the substrate 3 is suppressed.
  • the dopant concentration of the substrate 3 is 1 ⁇ 10 17 / cm 3 or more and less than 3 ⁇ 10 18 / cm 3, which is lower than the concentration doped for the purpose of reducing the resistivity of the substrate in the field of semiconductor laser.
  • the concentration By setting the dopant concentration to a value within such a range, the current flowing in the substrate 3 is expanded in the lateral direction (direction parallel to the XY plane), and as a result, the current flows in a wide range in the active layer 12.
  • the light emission area is expanded by the flow, and the light extraction efficiency is improved.
  • FIG. 4A and 4B show the respective values of the emission intensity and the dispersion length shown by the plurality of infrared LED elements 1 manufactured through the steps S1 to S11 in a state where the dopant concentrations of the substrates 3 are different. , The relationship with the dopant concentration is graphed.
  • FIG. 4A is a graph showing the relationship between the dopant concentration and the emission intensity.
  • FIG. 4B is a graph showing the relationship between the dopant concentration and the dispersion length.
  • FIG. 4A shows the results of evaluating the light emission intensity when a current of 50 mA is injected into the infrared LED element 1 manufactured with different dopant concentrations of the substrate 3 by the integrating sphere system. It is a graph for each dopant concentration.
  • FIG. 4B shows the distance between the portion having the highest brightness and the portion where the brightness is reduced to 1/2 in a state where each of the infrared LED elements 1 manufactured with different dopant concentrations of the substrate 3 is made to emit light.
  • the result of measuring the defined "dispersion length" is graphed for each dopant concentration.
  • the dispersion length is determined by imaging the surface of the infrared LED element 1 with each infrared LED element 1 actually emitting light, converting the brightness according to the surface position into a numerical value based on the imaging result, and depending on the position. The value derived from the comparison result of the above numerical values was adopted.
  • the dopant concentration of the substrate 3 is set within the range of 1 ⁇ 10 17 / cm 3 or more and 3 ⁇ 10 18 / cm 3 or less. As a result, it is considered that the current flowing in the substrate 3 is expanded in the lateral direction, and the current flowing in the active layer 12 is also expanded in the lateral direction, so that the luminous efficiency is improved.
  • the shape of the second electrode 21 shown in FIG. 2 is just an example, and in the present embodiment, the shape of the second electrode 21 included in the infrared LED element 1 is arbitrary.
  • the second electrode 21 has an electrode region 21b in which the pad electrode 23 is arranged and an electrode region 21a that is connected to the electrode region 21b and extends linearly.
  • the region 21a may have a lattice shape. Also in this case, it is preferable that the separation distance d1 between the electrode regions 21a constituting the lattice is, for example, 100 ⁇ m or less.
  • the first electrode 22 may be formed in a partial region of the first surface 3a of the substrate 3.
  • the current is spread in the lateral direction (direction parallel to the XY plane), the current flows in a wide range in the active layer 12, and the emission intensity is enhanced.
  • the difference in refractive index becomes extremely large at the boundary surface between the substrate 3 and the region B2.
  • the light traveling in the ⁇ Z direction in the substrate 3 is easily totally reflected on the ⁇ Z side surface (first surface 3a) of the substrate 3, and the amount of light extracted from the light extraction surface such as the side surface of the substrate 3. Is increased.
  • the first electrode 22 may be patterned when the above-mentioned step S5 is executed. More specifically, after forming a resist mask patterned by a photolithography method, a material for forming the first electrode 22 (for example, AuGe / Ni / Au) is formed using a vacuum vapor deposition apparatus, and the resist mask is lifted off. Peel off. After that, the first electrode 22 is formed by performing an alloy treatment (annealing treatment) by heat treatment at 450 ° C. for 10 minutes. Since the subsequent steps are the same as those in the above embodiment, the description thereof will be omitted.
  • a material for forming the first electrode 22 for example, AuGe / Ni / Au
  • the first electrode 22 is formed by performing an alloy treatment (annealing treatment) by heat treatment at 450 ° C. for 10 minutes. Since the subsequent steps are the same as those in the above embodiment, the description thereof will be omitted.
  • the silver paste 34 enters the void B2 shown in FIG. become.
  • the large difference in refractive index between the substrate 3 and the void B2 as described above cannot be obtained.
  • the silver particles contained in the silver paste 34 that has entered the void B2 have a high reflectance with respect to infrared light, it also has a function of reflecting light traveling in the ⁇ Z direction in the substrate 3 in the + Z direction. Can be realized.
  • the first electrode 22 and the package substrate may be solder-connected at the time of mounting. Absent.
  • solder materials such as AuSn and SnAgSu can be adopted.
  • the void B2 still remains, as described above, a large difference in refractive index can be provided between the substrate 3 and the void B2, so that the light traveling in the substrate 3 in the ⁇ Z direction is emitted. It becomes easy to totally reflect on the first surface 3a.
  • the reflective layer 25 may be formed in the region B2 in which the first electrode 22 is not formed (see FIG. 7).
  • the reflective layer 25 may be any material that exhibits high reflectance for infrared light of 1000 nm or more and less than 1800 nm, and is made of, for example, a material such as Ag, Ag alloy, Au, or Al. All of these materials have higher reflectance to infrared light than the material of the first electrode 22.
  • the reflectance of the reflective layer 25 with respect to infrared light is preferably 50% or more, and more preferably 70% or more.
  • the patterned first electrode 22 and the patterned reflective layer 25 may be formed at the time of executing the above-mentioned step S5, respectively.
  • the dielectric layer 26 may be formed in the region B2 in which the first electrode 22 is not formed (see FIG. 8).
  • the dielectric layer 26 may be made of a material having a refractive index lower than that of the substrate 3 made of InP, and is made of, for example, a material such as SiO 2 , SiN, Al 2 O 3 , ITO, or ZnO. Since all of these materials exhibit a refractive index smaller than the refractive index of InP by 0.2 or more, a difference in refractive index that tends to cause total reflection at the interface between the substrate 3 and the dielectric layer 26 is realized.
  • the patterned first electrode 22 and the patterned dielectric layer 26 may be formed at the time of executing step S5 described above. For example, after forming a dielectric layer 26 made of SiO 2 on the entire surface by a plasma CVD method, a wet etching process with a BHF solution is performed using a resist mask patterned by a photolithography method to pattern the dielectric layer 26. Processing is done. After that, the first electrode 22 is formed in the opening region of the dielectric layer 26.
  • the infrared LED element 1 shown in FIG. 8 can be mounted by the method of step S11 as described above.
  • the silver paste 34 is interposed in the lower layer of the dielectric layer 26, the Ag particles contained in the silver paste 34 function as a reflective member.
  • the reflective layer 25 may be formed so as to cover the surfaces of the dielectric layer 26 and the first electrode 22.
  • the uneven portion 41 is formed on the side surface of the substrate 3 included in the infrared LED element 1.
  • the substrate 3 does not necessarily have to have the uneven portion 41 on the side surface (see FIG. 10).
  • the uneven portion 42 may not be formed on the side surface of the semiconductor layer 10.
  • the second semiconductor layer 14 as the p-type contact layer is formed on the upper surface of the second semiconductor layer 13 as the p-type clad layer, and the second semiconductor layer 14 is formed on the surface of the second semiconductor layer 14.
  • the electrode 21 is formed has been described.
  • the conductive type of the contact layer may be n type as long as the contact can be made with respect to the second electrode 21.
  • the second electrode 21 is formed on the upper layer of the second semiconductor layer 13 via the n-type contact of the thin film.
  • Infrared LED element 3 Substrate 3a: First surface of the substrate 3b: Second surface of the substrate 10: Semiconductor layer 11: First semiconductor layer 12: Active layer 13, 14: Second semiconductor layer 21: Second electrode 22: First electrode 23: Pad electrode 24: Pad electrode 25: Reflective layer 26: Dielectric layer 28: Passion film 31: Dicing sheet 34: Silver paste 35: Stem 41: Concavo-convex part 42: Concavo-convex part

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

Dans la présente invention, un dispositif à DEL infrarouge est obtenu qui a une longueur d'onde d'émission de lumière dépassant 1000 nm et a une efficacité d'extraction de lumière améliorée par rapport à l'état de la technique associé.　Le dispositif à DEL à infrarouge comprend : un substrat qui comprend de l'InP et a une concentration de dopant de type n qui n'est pas inférieure à 1×1017/cm3 et inférieure à 3×1018/cm3 ; une première couche semi-conductrice qui est formée sur une couche supérieure du substrat et présente un type n ; une couche active qui est formée sur une couche supérieure de la première couche semi-conductrice ; une seconde couche semi-conductrice qui est formée sur une couche supérieure de la couche active et présente un type p ; une première électrode qui est formée sur une première surface, parmi les surfaces du substrat, sur un côté opposé à un côté sur lequel la première couche semi-conductrice est formée ; et une seconde électrode qui est formée sur une couche supérieure de la seconde couche semi-conductrice et qui est formée uniquement dans une région partielle de la surface de la seconde couche semi-conductrice lorsqu'elle est vue depuis une première direction orthogonale à la surface du substrat, le dispositif à DEL Infrarouge ayant une longueur d'onde d'émission de lumière principale de 1000 nm ou plus.
PCT/JP2020/013622 2019-03-28 2020-03-26 Dispositif à del infrarouge WO2020196735A1 (fr)

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CN117153958A (zh) * 2023-09-12 2023-12-01 深圳市同和光电科技有限公司 一种提升红外led芯片辐射功率处理方法

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JPS59225580A (ja) * 1983-06-06 1984-12-18 Hitachi Ltd 半導体発光ダイオ−ドおよびその製造方法
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CN117153958A (zh) * 2023-09-12 2023-12-01 深圳市同和光电科技有限公司 一种提升红外led芯片辐射功率处理方法

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TWI721841B (zh) 2021-03-11

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