WO2020164249A1 - Tft面板及测试方法 - Google Patents

Tft面板及测试方法 Download PDF

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Publication number
WO2020164249A1
WO2020164249A1 PCT/CN2019/111829 CN2019111829W WO2020164249A1 WO 2020164249 A1 WO2020164249 A1 WO 2020164249A1 CN 2019111829 W CN2019111829 W CN 2019111829W WO 2020164249 A1 WO2020164249 A1 WO 2020164249A1
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Prior art keywords
tft
test
pads
pad
tft panel
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PCT/CN2019/111829
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English (en)
French (fr)
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朱翀煜
金利波
岳欢
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上海奕瑞光电子科技股份有限公司
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Priority to US17/430,716 priority Critical patent/US20220146565A1/en
Publication of WO2020164249A1 publication Critical patent/WO2020164249A1/zh

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2607Circuits therefor
    • G01R31/2621Circuits therefor for testing field effect transistors, i.e. FET's
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2829Testing of circuits in sensor or actuator systems
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2844Fault-finding or characterising using test interfaces, e.g. adapters, test boxes, switches, PIN drivers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the invention belongs to the field of flat panel detectors, and relates to a TFT panel and a testing method.
  • Digital X-ray photography (Digital Radio Graphy, DR for short) is a new X-ray photography technology developed in the 1990s. With its significant advantages such as faster imaging speed, more convenient operation, and higher imaging resolution, It has become the leading direction of digital X-ray photography technology and has been recognized by clinical institutions and imaging experts all over the world.
  • a flat-panel detector is a detector that uses semiconductor technology to convert X-ray energy into electrical signals to generate X-ray images.
  • X-ray flat panel detectors play an extremely important position in the field of medical imaging and industrial flaw detection.
  • One of the core components of X-ray flat panel detectors is the TFT panel.
  • TFT panels need to be tested before going online to avoid waste of materials and production capacity in the subsequent manufacturing process caused by defective TFT panels.
  • the test method of the thin film probe is usually adopted, that is, the thin film probe and the bonding pad on the TFT panel are pressed to realize the electrical sexual connection, test under the driving and reading of external circuit.
  • the test process itself has high requirements on the accuracy of the test equipment, the accuracy of the test fixture, and the cleanliness of the test environment.
  • the material cost of the related test equipment It is also higher, and the test success rate is low, which will increase the material cost of the test equipment and the production cost caused by the low test success rate.
  • the purpose of the present invention is to provide a TFT panel and a test method, which are used to solve the prior art TFT panel test before going online, which requires high test equipment and test fixtures. Problems with low test success rate, high material cost and high production cost.
  • the present invention provides a TFT panel, the TFT panel including:
  • m ⁇ n bonding pads where m and n are both natural numbers greater than or equal to 1, and m ⁇ n bonding pads are correspondingly arranged and electrically connected to the TFT unit in the TFT active area;
  • the TFT test area includes m driving pads, n test pads and m ⁇ n TFT devices, wherein the m ⁇ n TFT devices are divided into n groups, and each group includes m
  • the m TFT devices in each group are respectively electrically connected to the m drive pads and the m bonding pads, and the m TFT devices in each group are connected to n
  • One of the test pads is electrically connected to the same test pad.
  • the bonding pad includes one or a combination of a read-side bonding pad located in the TFT panel and a driving-side bonding pad located in the TFT panel.
  • m and n include natural numbers such that m+n is less than m ⁇ n.
  • the ratio of the distance between the adjacent driving pads to the distance between the adjacent bonding pads includes 5-20; the distance between the adjacent test pads The ratio of the distance between the adjacent bonding pads includes 5-20.
  • the drive pad includes a millimeter-level drive pad; the test pad includes a millimeter-level test pad.
  • the TFT device and the TFT unit have the same material.
  • the driving pad, the test pad and the bonding pad have the same material.
  • the present invention also provides a TFT panel testing method, including the following steps:
  • n TFT devices that are electrically connected to the pads are turned on, and the n test pads are used to obtain information about the n bonding pads that are electrically connected to the n TFT devices that are turned on.
  • the test fixture used in the test method of the TFT panel includes one or a combination of a thin film probe and a point probe.
  • the bonding pad includes one or a combination of a read-side bonding pad located in the TFT panel and a driving-side bonding pad located in the TFT panel.
  • the TFT panel and the test method of the present invention integrate a TFT test area including m driving pads, n test pads, and m ⁇ n TFT devices on the TFT panel, so that the required pads are tested.
  • the number m+n is less than the number of bonding pads in the TFT panel m ⁇ n, so that the pad pitch required for the test is greater than the bonding pad pitch in the TFT panel; when testing the TFT panel, the original The m ⁇ n bonding pads that are pressed once are tested in m times, thereby dividing the high-precision test into m times of low-precision test, reducing the requirements for test equipment and test fixtures, and improving the test success rate , Reduce material costs and production costs.
  • FIG. 1 shows a schematic diagram of the structure of a TFT panel in the first embodiment.
  • FIG. 2 is a schematic diagram showing the structure of a TFT panel in the second embodiment.
  • FIG. 3 shows a schematic flow chart of the TFT panel testing method in the third embodiment.
  • This embodiment provides a TFT panel, and the TFT panel includes:
  • m ⁇ n bonding pads where m and n are both natural numbers greater than or equal to 1, and m ⁇ n bonding pads are correspondingly arranged and electrically connected to the TFT unit in the TFT active area;
  • the TFT test area includes m driving pads, n test pads and m ⁇ n TFT devices, wherein the m ⁇ n TFT devices are divided into n groups, and each group includes m
  • the m TFT devices in each group are respectively electrically connected to the m drive pads and the m bonding pads, and the m TFT devices in each group are connected to n
  • One of the test pads is electrically connected to the same test pad.
  • the pad spacing required for testing is increased, thereby Reduce requirements for test equipment and test fixtures, improve test success rate, reduce material costs and production costs.
  • this embodiment provides a TFT panel.
  • the TFT panel includes m ⁇ n bonding pads 100 and a TFT test area 200.
  • m and n are both natural numbers greater than or equal to 1
  • the m ⁇ n bonding pads 100 are read-side bonding pads located in the TFT panel, that is, the bonding pads 100 include n R1 ⁇ Rm are arranged corresponding to the TFT unit (not shown) in the TFT effective area;
  • the TFT test area 200 includes m drive pads 201, namely G1 ⁇ Gm, and n test pads 202, namely T1 ⁇ Tn and m ⁇ n TFT devices 203, wherein m ⁇ n TFT devices 203 are divided into n groups, each group includes m TFT devices 203, and m TFT devices 203 in each group are respectively It is electrically connected to the m drive pads 201 and the m bonding pads 100, and the m TFT devices 203 in each group are the same as the n test pads 202.
  • the function of the n bonding pads 100 of R1 to Rm is to bond subsequent required circuit boards (such as FPC), functional devices (such as IC), etc., on the TFT panel to realize the TFT panel.
  • the driving and information reading of the TFT panel can also be used for the test before the TFT panel goes online.
  • the pre-online test is performed through the bonding pad 100, since the bonding pad 100 has a higher accuracy, a larger number, and a smaller spacing, this affects the accuracy of the test equipment and the accuracy of the test fixture. Putting forward higher requirements will increase material costs and lower the test success rate.
  • additional driving pads 201 of G1 to Gm, additional test pads 202 of T1 to Tn, and m ⁇ n additional TFT devices 203 are designed on the TFT panel.
  • M and n are both much smaller than the number of bonding pads 100 m ⁇ n. Therefore, when the TFT panel is tested before going online, the traditional solution requires pressing m ⁇ n high-precision probes to On the bonding pad 100, in this embodiment, only m+n low-precision probes need to be pressed to the G1-Gm low-precision drive pad 201 and T1-Tn low-precision drive pads 201 All information of the TFT panel can be obtained on the test pad 202.
  • This structure reduces the accuracy of the test pads in the drive pad 201 and the test pad 202, reduces the total number of test pads, and the distance between the test pads. Increase, therefore, can greatly reduce the requirements for test equipment and test fixtures, and can increase the test success rate and reduce costs.
  • m and n include natural numbers such that m+n is less than m ⁇ n, and the number of m and n may include natural numbers greater than or equal to 3.
  • the value of m and n is greater, the greater is to reflect the advantages of this embodiment, the specific numbers of m and n are not limited here.
  • the ratio of the distance between the adjacent driving pads 201 to the distance between the adjacent bonding pads 100 includes 5-20;
  • the ratio of the distance between the test pads 202 to the distance between the adjacent bonding pads 100 includes 5-20.
  • the ratio range of the distance between the adjacent driving pads 201 and the distance between the adjacent bonding pads 100 may include 5, 10, 15, and 20; in the same way, the adjacent test
  • the range of the ratio of the pitch between the pads 202 to the pitch between the adjacent bonding pads 100 may include 5, 10, 15, 20, but is not limited thereto.
  • the drive pad 201 includes a millimeter-level drive pad; the test pad 202 includes a millimeter-level test pad.
  • the distance between adjacent bonding pads 100 is usually 50 ⁇ m to 100 ⁇ m, such as 60 ⁇ m.
  • the number n of the test pads 202 is much smaller than the number m ⁇ n of the bonding pads 100, so the size of the drive pad 201 and the test pad 202 can be dozens of times larger than all.
  • the number of the bonding pads 100 can be reduced by several tens of times when reaching the millimeter level, thereby further reducing the requirements for test equipment and test fixtures, increasing the test success rate and reducing costs.
  • the TFT device 203 and the TFT unit have the same material; the driving pad 201, the test pad 202 and the bonding pad 100 have the same material.
  • the preparation of the TFT device 203 can be carried out at the same time as the preparation of the TFT unit to reduce the process steps and costs.
  • the driving The pad 201, the test pad 202, and the bonding pad 100 can also be made of the same material, but not limited to this.
  • the TFT device 203, the TFT unit, the driving pad 201, the test pad 202 and the bonding pad The specific type and material of 100 can be selected according to needs, and there is no restriction here.
  • this embodiment also provides another TFT panel. Compared with Embodiment 1, the difference is that the bonding pad 110 in this embodiment is located in the TFT panel.
  • the driving-side bonding pads of the first embodiment only need to be converted into the driving-side bonding pads in the TFT panel.
  • the bonding pads The function is changed from reading to driving, and is still controlled by the low-precision driving pad 211.
  • the TFT panel includes m ⁇ n bonding pads 110 and a TFT test area 210.
  • m and n are both natural numbers greater than or equal to 1
  • the m ⁇ n bonding pads 110 are driving-side bonding pads located in the TFT panel, that is, the bonding pads 110 include n g1 ⁇ gm, and set corresponding to the TFT unit (not shown) in the TFT active area
  • the TFT test area 210 includes m drive pads 211, namely G1 ⁇ Gm, and n test pads 212, namely T1 ⁇ Tn And m ⁇ n TFT devices 213, wherein m ⁇ n TFT devices 213 are divided into n groups, each group includes m TFT devices 213, and m TFT devices 213 in each group are connected to
  • the m driving pads 211 and the m bonding pads 110 are electrically connected correspondingly, and the m TFT devices 213 in each group are the same as the n test pads 212.
  • the pad 212 is electrically connected
  • the bonding pad may further include a combination of a reading side bonding pad located in the TFT panel and a driving side bonding pad located in the TFT panel.
  • Figure 1 and Figure 2 can be combined, that is, some of the bonding pads can be read side bonding pads in the TFT panel, and the remaining bonding pads can be The combination of the driving-side bonding pads in the TFT panel can further expand the convenience of testing the TFT panel, and the distribution ratio can be freely selected, and there is no limitation here.
  • this embodiment provides a TFT panel testing method, including the following steps:
  • n TFT devices that are electrically connected to the pads are turned on, and the n test pads are used to obtain information about the n bonding pads that are electrically connected to the n TFT devices that are turned on.
  • this embodiment integrates a TFT test area including m driving pads, n test pads, and m ⁇ n TFT devices on the TFT panel, so that the number of pads m+n required for testing is smaller than that of the TFT panel.
  • the number of bonding pads in the TFT panel is m ⁇ n, so that the pad pitch required for testing is greater than the pitch of the bonding pads in the TFT panel; when testing the TFT panel, the original m ⁇ n bonding pads are tested in m times, so that high-precision tests are divided into m-times low-precision tests, which reduces the requirements for test equipment and test fixtures, improves test success rate, and reduces material costs and production costs .
  • the test fixture used in the test method of the TFT panel includes one or a combination of a thin film probe and a point probe.
  • the requirements for test equipment and test fixtures can be greatly reduced, so that thin film probes and point probes can be used One or a combination of them can be tested, and the test success rate can be improved and the cost can be reduced.
  • a thin film probe is used, only one press of the thin film probe and the drive pad and the test pad is required, and then all the information of the TFT panel can be obtained only through program control; and when the point is used When using a type probe, the test cost can be further reduced.
  • a combination of thin film probes and point probes can also be used for testing.
  • the bonding pad includes one or a combination of a reading-side bonding pad located in the TFT panel and a driving-side bonding pad located in the TFT panel .
  • the bonding pad adopts the reading-side bonding pad in the TFT panel
  • the function of the bonding pad is to read the information in the TFT panel
  • the bonding When the pad adopts the driving side bonding pad in the TFT panel, the function of the bonding pad is to drive the TFT unit in the TFT panel, but the reading side bonding pad and the driving The side bonding pads are all controlled by the driving pads.
  • the bonding pads may also include read-side bonding pads located in the TFT panel and driving-side keys located in the TFT panel. Combination of bond pads.
  • test process is as follows:
  • G1 provides a high level, so that all the TFT devices connected to G1 are turned on, while the remaining low-precision test pads provide a low level, and all corresponding TFT devices remain closed;
  • S3 Read the signals on T1 to Tn to obtain the first n-column high-precision bonding pad information corresponding to the TFT device turned on by G1;
  • G2 provides a high level, so that all the TFT devices connected to G2 are turned on, while the remaining low-precision test pads provide a low level, and all the corresponding TFT devices remain closed;
  • S5 Read the signals on T1 to Tn, and obtain the information of the second n-column high-precision bonding pad corresponding to the TFT device turned on by G2;
  • steps S4 and S5 can also be located before steps S2 and S3, which are not limited here.
  • the m ⁇ n high-precision bonding pads that were originally pressed for one time are tested in m times, so that the high-precision test is divided into m-times low-precision tests, and There is no need to re-compress between these m-times of low-precision tests, just program control. After the test, the TFT test area can be removed or retained, and there is no restriction here.
  • the TFT panel and the test method of the present invention integrate a TFT test area including m driving pads, n test pads, and m ⁇ n TFT devices on the TFT panel, so that the welding required for testing is The number of disks m+n is less than the number of bonding pads in the TFT panel m ⁇ n, so that the pad pitch required for the test is greater than the pitch of the bonding pads in the TFT panel; when testing the TFT panel, The original m ⁇ n bonding pads that were pressed once were tested in m times, thereby dividing the high-precision tests into m-times low-precision tests, reducing the requirements for test equipment, improving the test success rate, and reducing materials Cost and production cost. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial value.

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Abstract

一种TFT面板及测试方法,TFT面板包括:m×n个键合焊盘(100、110),其中m及n均为大于等于1的自然数,m×n个键合焊盘(100、110)与TFT有效区中的TFT单元对应设置并电连接;TFT测试区(200、210),TFT测试区(200、210)包括m个驱动焊盘(201、211)、n个测试焊盘(202、212)及m×n个TFT器件(203、213),其中,m×n个TFT器件(203、213)划分为n组,每组中包括m个TFT器件(203、213),每组中的m个TFT器件(203、213)分别与m个驱动焊盘(201、211)及m个键合焊盘(100、110)对应电连接,且每组中的m个TFT器件(203、213)与n个测试焊盘(202、212)中的同一个测试焊盘(202、212)电连接。将原本进行1次压合的m×n个键合焊盘(100、110)分m次进行测试,从而将高精度的测试分为m次低精度的测试,降低对测试设备的要求、提高测试成功率、降低物料成本及产能成本。

Description

TFT面板及测试方法 技术领域
本发明属于平板探测器领域,涉及一种TFT面板及测试方法。
背景技术
数字化X射线摄影(Digital Radio Graphy,简称DR),是上世纪90年代发展起来的X射线摄影新技术,以其更快的成像速度、更便捷的操作、更高的成像分辨率等显著优点,成为数字化X射线摄影技术的主导方向,并得到世界各国的临床机构和影像学专家的认可。
平板探测器概括的说是一种采用半导体技术将X射线能量转换为电信号,产生X射线图像的检测器。随着社会的发展和科学技术的进步,X射线平板探测器在医学影像领域、工业探伤领域都有着极其重要的地位,而X射线平板探测器的核心部件之一即TFT面板。在平板探测器的制造过程中,TFT面板在上线前需要经过测试,以避免由TFT面板的不良所造成的在后续制造过程中的物料及产能的浪费。
现有的,针对X射线平板探测器中的TFT面板的上线前的测试,通常会采用薄膜探针的测试方法,即通过薄膜探针与TFT面板上的键合焊盘进行压合,实现电性连接,在外部电路的驱动和读取下进行测试。然而由于TFT面板上的键合焊盘通常数量较多并且间距较小,从而测试过程本身对测试设备的精度、测试治具的精度、测试环境洁净度等要求较高,相关测试设备的物料成本也较高,并且测试成功率较低,从而会增加测试设备的物料成本和由测试成功率低所带来的产能成本。
因此,提供一种新型的TFT面板及测试方法,降低测试所需的物料成本并提高测试成功率,以减少产能损失,降低成本,实属必要。
发明内容
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种TFT面板及测试方法,用于解决现有技术中TFT面板在上线前的测试中,对测试设备、测试治具要求高、测试成功率低、物料成本及产能成本高的问题。
为实现上述目的及其他相关目的,本发明提供一种TFT面板,所述TFT面板包括:
m×n个键合焊盘,其中m及n均为大于等于1的自然数,m×n个所述键合焊盘与TFT有效区中的TFT单元对应设置并电连接;
TFT测试区,所述TFT测试区包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件, 其中,m×n个所述TFT器件划分为n组,每组中包括m个所述TFT器件,每组中的m个所述TFT器件分别与m个所述驱动焊盘及m个所述键合焊盘对应电连接,且每组中的m个所述TFT器件与n个所述测试焊盘中的同一个所述测试焊盘电连接。
可选的,所述键合焊盘包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘中的一种或组合。
可选的,m及n包括使m+n小于m×n的自然数。
可选的,相邻的所述驱动焊盘之间的间距与相邻的所述键合焊盘之间的间距的比值范围包括5~20;相邻的所述测试焊盘之间的间距与相邻的所述键合焊盘之间的间距的比值范围包括5~20。
可选的,所述驱动焊盘包括毫米级驱动焊盘;所述测试焊盘包括毫米级测试焊盘。
可选的,所述TFT器件与所述TFT单元具有相同材质。
可选的,所述驱动焊盘、测试焊盘及键合焊盘具有相同材质。
本发明还提供一种TFT面板的测试方法,包括以下步骤:
提供任一上述TFT面板;
通过m个所述驱动焊盘及n个所述测试焊盘,分别进行m次测试,以获得m×n个所述键合焊盘的信息;其中,每次测试均将与一个所述驱动焊盘电连接的n个所述TFT器件导通,通过n个所述测试焊盘,获得与被导通的n个所述TFT器件电连接的n个所述键合焊盘的信息。
可选的,所述TFT面板的测试方法中采用的测试治具包括薄膜探针及点式探针中的一种或组合。
可选的,所述键合焊盘包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘中的一种或组合。
如上所述,本发明的TFT面板及测试方法,通过在TFT面板上集成包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件的TFT测试区,使得测试所需的焊盘数量m+n小于TFT面板中的键合焊盘的数量m×n,从而使得测试所需的焊盘间距大于TFT面板中的键合焊盘的间距;在对TFT面板进行测试时,将原本进行1次压合的m×n个键合焊盘分m次进行测试,从而将高精度的测试分为m次低精度的测试,降低对测试设备、测试治具的要求、提高测试成功率、降低物料成本及产能成本。
附图说明
图1显示为实施例一中的一种TFT面板的结构示意图。
图2显示为实施例二中的一种TFT面板的结构示意图。
图3显示为实施例三中的TFT面板的测试方法的流程示意图。
元件标号说明
100、110               键合焊盘
200、210               TFT测试区
201、211               驱动焊盘
202、212               测试焊盘
203、213               TFT器件
具体实施方式
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。
请参阅图1~图3。需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,且其组件布局型态也可能更为复杂。
实施例一
本实施例提供一种TFT面板,所述TFT面板包括:
m×n个键合焊盘,其中m及n均为大于等于1的自然数,m×n个所述键合焊盘与TFT有效区中的TFT单元对应设置并电连接;
TFT测试区,所述TFT测试区包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件,其中,m×n个所述TFT器件划分为n组,每组中包括m个所述TFT器件,每组中的m个所述TFT器件分别与m个所述驱动焊盘及m个所述键合焊盘对应电连接,且每组中的m个所述TFT器件与n个所述测试焊盘中的同一个所述测试焊盘电连接。
本实施例中的TFT面板,通过在TFT面板上集成包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件的TFT测试区,使得测试所需的焊盘间距增大,从而降低对测试设备、测试治具的要求、提高测试成功率、降低物料成本及产能成本。
如图1所示,本实施例提供一种TFT面板,所述TFT面板包括:m×n个键合焊盘100及TFT测试区200。其中,其中m及n均为大于等于1的自然数,m×n个所述键合焊盘100为位于所述TFT面板中的读取侧键合焊盘,即所述键合焊盘100包括n个R1~Rm,并与TFT有效区中的TFT单元(未图示)对应设置;所述TFT测试区200包括m个驱动焊盘201即G1~Gm、n个测试焊盘202即T1~Tn及m×n个TFT器件203,其中,m×n个所述TFT器件203划分为n组,每组中包括m个所述TFT器件203,每组中的m个所述TFT器件203分别与m个所述驱动焊盘201及m个所述键合焊盘100对应电连接,且每组中的m个所述TFT器件203与n个所述测试焊盘202中的同一个所述测试焊盘202电连接。
具体的,n个R1~Rm的所述键合焊盘100的作用为在所述TFT面板上键合后续所需的电路板(如FPC)、功能器件(如IC)等,以实现所述TFT面板的驱动与信息读取,还可用于所述TFT面板上线前的测试。当通过所述键合焊盘100进行上线前的测试时,由于所述键合焊盘100精度较高、数量较多、间距较小,这就对测试设备的精度、测试治具的精度都提出了较高的要求,会增加物料成本,且测试成功率较低。因此本实施例在所述TFT面板上设计额外的G1~Gm的所述驱动焊盘201、额外的T1~Tn的所述测试焊盘202,以及m×n个额外的所述TFT器件203,使得m及n都远小于所述键合焊盘100的数量m×n,因此,在对所述TFT面板进行上线前的测试时,传统方案需要压合m×n个高精度的探针至所述键合焊盘100上,而本实施例中,仅需要压合m+n个低精度的探针到G1~Gm低精度的所述驱动焊盘201及T1~Tn低精度的所述测试焊盘202上即可获得所述TFT面板的全部信息,该结构使得所述驱动焊盘201及所述测试焊盘202中的测试焊盘精度降低、测试焊盘总数减少、测试焊盘间距增大,因此可大大降低对测试设备及测试治具的要求,且可提高测试成功率,降低成本。
作为该实施例的进一步实施例,m及n包括使m+n小于m×n的自然数,m及n的个数可包括大于等于3的自然数,当m及n的取值越大时,越能体现本实施例的优越性,m及n的具体个数此处不作限制。
作为该实施例的进一步实施例,相邻的所述驱动焊盘201之间的间距与相邻的所述键合焊盘100之间的间距的比值范围包括5~20;相邻的所述测试焊盘202之间的间距与相邻的所述键合焊盘100之间的间距的比值范围包括5~20。
具体的,由于所述驱动焊盘201的个数m及所述测试焊盘202的个数n都远小于所述键合焊盘100的数量m×n,因此,在同样面积下,所述驱动焊盘201及所述测试焊盘202的总数减少,间距增大,可大大降低对测试设备及测试治具的要求,且可提高测试成功率,降低 成本。相邻的所述驱动焊盘201之间的间距与相邻的所述键合焊盘100之间的间距的比值范围可包括5、10、15、20;同理,相邻的所述测试焊盘202之间的间距与相邻的所述键合焊盘100之间的间距的比值范围可包括5、10、15、20,但并不局限于此。
作为该实施例的进一步实施例,所述驱动焊盘201包括毫米级驱动焊盘;所述测试焊盘202包括毫米级测试焊盘。
具体的,在现有技术中,相邻的所述键合焊盘100之间的间距通常在50μm~100μm,如60μm,本实施例中,由于所述驱动焊盘201的个数m及所述测试焊盘202的个数n都远小于所述键合焊盘100的数量m×n,因此可以将所述驱动焊盘201及所述测试焊盘202的尺寸做到数十倍于所述键合焊盘100,即达到毫米级,数量也可相应减少数十倍,从而进一步降低对测试设备及测试治具的要求,提高测试成功率,降低成本。
作为该实施例的进一步实施例,所述TFT器件203与所述TFT单元具有相同材质;所述驱动焊盘201、测试焊盘202及键合焊盘100具有相同材质。
具体的,当所述TFT器件203与所述TFT单元采用相同材质时,所述TFT器件203的制备可与所述TFT单元的制备同时进行,以减少工艺步骤及成本,同理,所述驱动焊盘201、测试焊盘202及键合焊盘100也可采用相同材质,但并不局限于此,所述TFT器件203、TFT单元、驱动焊盘201、测试焊盘202及键合焊盘100的具体种类及材质,可根据需要进行选择,此处不作限制。
实施例二
如图2所示,为进一步解释说明本发明的方案,本实施例还提供另一种TFT面板,相较于实施例一,区别在于本实施例中的键合焊盘110为位于TFT面板中的驱动侧键合焊盘,只需将实施例一中的高精度的所述读取侧键合焊盘转换为TFT面板中的驱动侧键合焊盘即可,其中,键合焊盘的功能则由读取变为驱动,依然受低精度的驱动焊盘211的控制。
具体的,本实施例中,所述TFT面板包括:m×n个所述键合焊盘110及TFT测试区210。其中m及n均为大于等于1的自然数,m×n个所述键合焊盘110为位于所述TFT面板中的驱动侧键合焊盘,即所述键合焊盘110包括n个g1~gm,并与TFT有效区中的TFT单元(未图示)对应设置;所述TFT测试区210包括m个所述驱动焊盘211即G1~Gm、n个测试焊盘212即T1~Tn及m×n个TFT器件213,其中,m×n个所述TFT器件213划分为n组,每组中包括m个所述TFT器件213,每组中的m个所述TFT器件213分别与m个所述驱动焊盘211及m个所述键合焊盘110对应电连接,且每组中的m个所述TFT器件213与n个所述测试焊盘212中的同一个所述测试焊盘212电连接。所述驱动焊盘211、测试焊盘212、TFT器 件213的材质、分布等同实施例一,此处不再赘述。
作为该实施例的进一步实施例,所述键合焊盘还可包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘的组合。
具体的,可将图1及图2进行结合,即使得部分所述键合焊盘可采用位于所述TFT面板中的读取侧键合焊盘,剩余的所述键合焊盘可采用位于所述TFT面板中的驱动侧键合焊盘的组合,以进一步扩大所述TFT面板测试的便捷性,分配比例可自由选择,此处不作限制。
实施例三
如图3,本实施例提供一种TFT面板的测试方法,包括以下步骤:
提供上述任一所述TFT面板;
通过m个所述驱动焊盘及n个所述测试焊盘,分别进行m次测试,以获得m×n个所述键合焊盘的信息;其中,每次测试均将与一个所述驱动焊盘电连接的n个所述TFT器件导通,通过n个所述测试焊盘,获得与被导通的n个所述TFT器件电连接的n个所述键合焊盘的信息。
具体的,本实施例通过在TFT面板上集成包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件的TFT测试区,使得测试所需的焊盘数量m+n小于TFT面板中的键合焊盘的数量m×n,从而使得测试所需的焊盘间距大于TFT面板中的键合焊盘的间距;在对TFT面板进行测试时,将原本进行1次压合的m×n个键合焊盘分m次进行测试,从而将高精度的测试分为m次低精度的测试,降低对测试设备、测试治具的要求、提高测试成功率、降低物料成本及产能成本。
作为该实施例的进一步实施例,所述TFT面板的测试方法中采用的测试治具包括薄膜探针及点式探针中的一种或组合。
具体的,由于m个驱动焊盘及n个测试焊盘的精度低、总数少、间距大,因此可大大降低对测试设备及测试治具的要求,从而可采用薄膜探针及点式探针中的一种或组合进行测试,且可提高测试成功率,降低成本。当采用薄膜探针时,只需进行薄膜探针与所述驱动焊盘及测试焊盘进行1次压合,而后只需通过程序控制即可获得所述TFT面板的全部信息;而当采用点式探针时,可进一步的降低测试成本。当然也可根据需要采用薄膜探针及点式探针相结合的测试方法进行测试。
作为该实施例的进一步实施例,所述键合焊盘包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘中的一种或组合。
具体的,当所述键合焊盘采用所述TFT面板中的读取侧键合焊盘时,所述键合焊盘的功 能为读取所述TFT面板中的信息,当所述键合焊盘采用所述TFT面板中的驱动侧键合焊盘时,所述键合焊盘的功能为驱动所述TFT面板中的所述TFT单元,但所述读取侧键合焊盘及驱动侧键合焊盘均受所述驱动焊盘的控制,当然所述键合焊盘还可包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘的组合。
以下提供一具体测试流程示例,需要说明的是本发明中所述TFT器件及TFT单元均为高电平导通,测试治具采用薄膜探针,但并不局限于此,具体测试流程如下:
S1:探针下压,与低精度的所述驱动焊盘和低精度的所述测试焊盘实现电性连接,共计m+n个接触点;
S2:G1提供高电平,使G1上连接的所述TFT器件全部导通,同时剩余低精度的所述测试焊盘提供低电平,对应的所述TFT器件全部保持关闭;
S3:读取T1~Tn上的信号,得到与被G1导通的所述TFT器件相对应的第1个n列高精度的所述键合焊盘的信息;
S4:G2提供高电平,使G2上连接的所述TFT器件全部导通,同时剩余低精度的所述测试焊盘提供低电平,对应的所述TFT器件全部保持关闭;
S5:读取T1~Tn上的信号,得到与被G2导通的所述TFT器件相对应的第2个n列高精度的所述键合焊盘的信息;
S6:按照此步骤,逐步打开G3~Gm,获得所述键合焊盘全部m个n列的信息,即m×n个高精度的所述键合焊盘所对应的全部信息。
需要说明的是上述步骤并不局限于此,如步骤S4及S5也可位于步骤S2及S3之前,此处不作限制。本实施例中测试时,将原本1次压合的m×n个高精度的所述键合焊盘分m次进行测试,这样就把高精度的测试分为了m次低精度的测试,并且这m次低精度的测试之间无需重新压合,只需程序控制即可实现。测试结束后,可将所述TFT测试区去除或保留,此处不作限制。
综上所述,本发明的TFT面板及测试方法,通过在TFT面板上集成包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件的TFT测试区,使得测试所需的焊盘数量m+n小于TFT面板中的键合焊盘的数量m×n,从而使得测试所需的焊盘间距大于TFT面板中的键合焊盘的间距;在对TFT面板进行测试时,将原本进行1次压合的m×n个键合焊盘分m次进行测试,从而将高精度的测试分为m次低精度的测试,降低对测试设备的要求、提高测试成功率、降低物料成本及产能成本。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。

Claims (10)

  1. 一种TFT面板,其特征在于,所述TFT面板包括:
    m×n个键合焊盘,其中m及n均为大于等于1的自然数,m×n个所述键合焊盘与TFT有效区中的TFT单元对应设置并电连接;
    TFT测试区,所述TFT测试区包括m个驱动焊盘、n个测试焊盘及m×n个TFT器件,其中,m×n个所述TFT器件划分为n组,每组中包括m个所述TFT器件,每组中的m个所述TFT器件分别与m个所述驱动焊盘及m个所述键合焊盘对应电连接,且每组中的m个所述TFT器件与n个所述测试焊盘中的同一个所述测试焊盘电连接。
  2. 根据权利要求1所述的TFT面板,其特征在于:所述键合焊盘包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘中的一种或组合。
  3. 根据权利要求1所述的TFT面板,其特征在于:m及n包括使m+n小于m×n的自然数。
  4. 根据权利要求1所述的TFT面板,其特征在于:相邻的所述驱动焊盘之间的间距与相邻的所述键合焊盘之间的间距的比值范围包括5~20;相邻的所述测试焊盘之间的间距与相邻的所述键合焊盘之间的间距的比值范围包括5~20。
  5. 根据权利要求1所述的TFT面板,其特征在于:所述驱动焊盘包括毫米级驱动焊盘;所述测试焊盘包括毫米级测试焊盘。
  6. 根据权利要求1所述的TFT面板,其特征在于:所述TFT器件与所述TFT单元具有相同材质。
  7. 根据权利要求1所述的TFT面板,其特征在于:所述驱动焊盘、测试焊盘及键合焊盘具有相同材质。
  8. 一种TFT面板的测试方法,其特征在于,包括以下步骤:
    提供权利要求1~7中任一所述TFT面板;
    通过m个所述驱动焊盘及n个所述测试焊盘,分别进行m次测试,以获得m×n个所述键合焊盘的信息;其中,每次测试均将与一个所述驱动焊盘电连接的n个所述TFT器件导通,通过n个所述测试焊盘,获得与被导通的n个所述TFT器件电连接的n个所述键合 焊盘的信息。
  9. 根据权利要求8所述的TFT面板的测试方法,其特征在于:所述TFT面板的测试方法中采用的测试治具包括薄膜探针及点式探针中的一种或组合。
  10. 根据权利要求8所述的TFT面板的测试方法,其特征在于:所述键合焊盘包括位于所述TFT面板中的读取侧键合焊盘及位于所述TFT面板中的驱动侧键合焊盘中的一种或组合。
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