WO2020134537A1 - 光电芯片、制备方法和安装方法 - Google Patents

光电芯片、制备方法和安装方法 Download PDF

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Publication number
WO2020134537A1
WO2020134537A1 PCT/CN2019/114636 CN2019114636W WO2020134537A1 WO 2020134537 A1 WO2020134537 A1 WO 2020134537A1 CN 2019114636 W CN2019114636 W CN 2019114636W WO 2020134537 A1 WO2020134537 A1 WO 2020134537A1
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Prior art keywords
chip
light
electrode
absorption layer
groove
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PCT/CN2019/114636
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English (en)
French (fr)
Inventor
杨彦伟
李莹
刘宏亮
刘格
邹颜
Original Assignee
芯思杰技术(深圳)股份有限公司
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Priority claimed from CN201811587822.9A external-priority patent/CN109801984A/zh
Priority claimed from CN201811587824.8A external-priority patent/CN109671795A/zh
Application filed by 芯思杰技术(深圳)股份有限公司 filed Critical 芯思杰技术(深圳)股份有限公司
Priority to JP2021537799A priority Critical patent/JP7296150B2/ja
Priority to EP19902041.3A priority patent/EP3890033A4/en
Publication of WO2020134537A1 publication Critical patent/WO2020134537A1/zh
Priority to US17/358,029 priority patent/US11894471B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0322—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells

Definitions

  • the invention relates to the technical field of optical communication transmission, in particular to a photoelectric chip, a preparation method and an installation method.
  • an optical splitter is usually required to separate part (for example, 5%) of the optical signal to another optical power monitoring and receiving chip. Power monitoring. The remaining (eg 95%) optical signal is coupled to the optical waveguide through the optical fiber and transmitted.
  • the optical splitter and the optical power monitoring and receiving chip because two independent devices need to be installed on the optical link—the optical splitter and the optical power monitoring and receiving chip, an optical fiber and two optical fiber connector structures are also required between the two, and the optical splitter and the optical power monitoring and receiving Chips generally also need their own fixed bits.
  • the current laser system is generally a composite optical path, and the method of the prior art causes problems such as large system structure, difficulty in operation, and high cost.
  • the main object of the present invention is to provide a photoelectric chip, a preparation method and a mounting method, which can realize both splitting and monitoring of optical power.
  • an embodiment of the present invention provides a photoelectric chip, which is a back-incident photoelectric chip, and a light splitting groove is opened on the chip, and the light splitting groove penetrates the absorption layer of the chip;
  • the back side of the chip is the light entrance side; the beam splitter is used to transmit and separate part of the incident light, and the other part of the incident light enters the absorption layer for photoelectric conversion.
  • the photoelectric chip provided by the invention is provided with a light splitting groove, and the light splitting groove penetrates the absorption layer of the chip.
  • the incident light enters the chip from the back side of the chip, part of the light exits through the beam splitter. This part of the light can pass through the chip without passing through the absorption layer without loss through the chip, and high-efficiency optical signal transmission can continue; and Another part of the light will undergo photoelectric conversion through the absorption layer, generating photo-generated carriers, thereby effectively monitoring the optical power of the incident light. Therefore, the photoelectric chip provided by the present invention can both split light and monitor the optical power of incident light.
  • the top layer is located on the side of the front surface of the absorption layer; the light splitting groove opens away from the back surface of the chip and penetrates the top layer, and the photosensitive region of the chip is formed in the The top layer; the inner end of the photosensitive area is connected to the absorption layer, and the outer end of the photosensitive area is connected to the first electrode of the chip; the photosensitive area corresponds to the photoelectric conversion area in the absorption layer; the first An electrode is located on the front side of the chip.
  • the substrate is located on the back side of the absorption layer; the back of the chip is also provided with a second electrode, the second electrode is provided on the surface of the back side of the substrate outer.
  • a buffer layer is further provided between the substrate and the absorption layer, and the inner end of the beam splitter is located on the buffer layer.
  • the back surface of the chip is provided with a light-increasing anti-reflection film, and the light-increasing anti-reflection film is used to increase the incidence rate.
  • the area of the light-increasing anti-reflection film is larger than that of the beam splitting groove parallel to the chip surface Cross-sectional area.
  • a light-transmitting antireflection film is provided on the inner end of the light-splitting groove, and the light-transmitting antireflection film is used to increase the outgoing light transmittance.
  • cross-sections of the first electrode and the photosensitive region along the direction parallel to the surface of the chip are both circular, and the light splitting groove and the light-increasing antireflection film are both circular;
  • the beam splitter, the first electrode, the photosensitive area and the light-increasing antireflection film are all concentric circles, and the alignment error of the center of the circle is less than 20um;
  • the diameter of the beam splitter is 50um-250um
  • the inner diameter of the first electrode is not smaller than the diameter of the beam splitter, and the outer diameter of the first electrode is larger than the diameter of the beam splitter and is 60um to 1000um;
  • the inner diameter of the photosensitive area is not less than the diameter of the beam splitter, and the outer diameter of the photosensitive area is not more than the diameter of the light-increasing antireflection film.
  • the beam splitting groove penetrates part or all of the chip.
  • An embodiment of the present invention also provides a method for manufacturing a photoelectric chip, which is used to prepare the photoelectric chip as described in any one of the foregoing embodiments.
  • the method includes:
  • a dichroic groove is formed on the chip, and the dichroic groove penetrates the absorption layer.
  • An embodiment of the present invention also provides a method for mounting a photoelectric chip, which is used to install the photoelectric chip as described in any one of the foregoing embodiments.
  • the method includes:
  • the chip and the light source are fixedly installed
  • An embodiment of the present invention also provides a photoelectric chip, which is a back-incidence array photoelectric chip.
  • the chip includes a plurality of light splitting monitoring units, and each light splitting monitoring unit includes a light-transmitting groove and a light-sensitive area;
  • the optical groove opens in the direction of any surface of the chip and penetrates the absorption layer of the chip, the photosensitive region is formed on the top layer of the chip and one end is connected to the absorption layer of the chip;
  • the area of the photosensitive area is the photoelectric conversion area;
  • each incident light is directed toward the chip; a part of each incident light is transmitted through the corresponding light-transmitting groove of the spectroscopic monitoring unit, and another part of each incident light is transmitted Enter into the photoelectric conversion area of the corresponding spectroscopic monitoring unit to perform photoelectric conversion.
  • the photoelectric chip provided by the embodiment of the present invention is provided with a plurality of spectroscopic monitoring units, and each of the spectroscopic monitoring units further includes a light-transmitting groove and a photosensitive area. Multiple beams of incident light are directed toward the chip, and a portion of each beam of incident light is transmitted and separated from the light-transmitting groove of the corresponding spectroscopic monitoring unit. This part of light can pass through the chip without damaging through the light-transmitting groove without absorbing layer, and can continue Signal transmission. The other part of each incident light enters the photoelectric conversion area of the corresponding spectroscopic monitoring unit for photoelectric conversion, so that the chip can separately perform beam splitting and optical power monitoring on multiple incident lights. Therefore, the optical path system using the chip does not need to use a large number of optical splitters, thereby greatly reducing the volume and cost of the optical path system.
  • each of the spectroscopic monitoring units further includes a first electrode, which is provided on the front of the chip and connected to the other end of the corresponding photosensitive area;
  • the first electrodes of the multiple spectroscopic monitoring units are insulated from each other;
  • At least one second electrode is provided on the back of the chip, and the second electrode is connected to the substrate of the chip.
  • a plurality of electrode pads corresponding to the spectroscopic monitoring unit are provided on the edge of the front surface of the chip, and the first electrode of each spectroscopic monitoring unit is electrically connected to the corresponding electrode through a corresponding electrode connection line Of the electrode pad;
  • a plurality of the electrode connecting wires are insulated from each other;
  • a plurality of the electrode pads are insulated from each other.
  • a buffer layer is further provided between the substrate and the absorption layer, the light-transmitting groove is opened in the direction of the front surface of the chip, the light-transmitting groove also penetrates the top layer and the inner end is located at the The buffer layer.
  • center distance between the two adjacent spectroscopic monitoring units is greater than 100um and less than 5000um.
  • center distance between two adjacent electrode pads is greater than 30um and less than 1000um; the distance between two adjacent electrode connection lines is greater than 5um.
  • the light-transmitting groove penetrates part or all of the chip.
  • the back of the chip is provided with a plurality of light-increasing antireflective films corresponding to the light-dividing monitoring units one by one, and the area of each light-increasing antireflective film is greater than the light transmission of the corresponding light-dividing monitoring units The sum of the cross-sectional areas of the grooves and the photosensitive regions along the direction parallel to the surface of the chip.
  • the inner end of the light-transmitting groove is provided with a light-increasing film.
  • An embodiment of the present invention also provides a method for preparing a photoelectric chip, which is used to prepare the photoelectric chip as described in any one of the foregoing embodiments.
  • the method includes:
  • P-type materials are doped at multiple places on the top layer, and the P-type materials at each place diffuse to the absorption layer to form a plurality of photosensitive regions;
  • a plurality of light-transmitting grooves are formed in the chip, and the plurality of light-transmitting grooves all penetrate the absorption layer.
  • FIG. 1 is a front view of a photoelectric chip provided by an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of the chip shown in FIG. 1 along A-A';
  • Figure 3 is a rear view of the chip shown in Figure 1;
  • FIG. 4 is a cross-sectional view of a photoelectric chip provided by another embodiment of the present invention.
  • FIG. 5 is a schematic diagram of the growth, substrate, buffer layer, absorber layer, top layer and passivation film provided by an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a photolithography etching window of a photosensitive region provided by an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of forming a photosensitive region by diffusion provided by an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of manufacturing a first electrode provided by an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of opening a beam splitter provided by an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of growing a light-transmitting antireflection film provided by an embodiment of the present invention.
  • FIG. 11 is a schematic diagram of a light-increasing AR coating provided by an embodiment of the present invention.
  • FIG. 12 is a schematic diagram of preparing a second electrode provided by an embodiment of the present invention.
  • FIG. 13 is a front view of a photoelectric chip provided by an embodiment of the present invention.
  • FIG. 14 is a rear view of a photoelectric chip provided by an embodiment of the present invention.
  • FIG. 16 is a partial cross-sectional view of FIG. 15 along the B-B' direction;
  • FIG. 17 is a partial cross-sectional view of another embodiment of the photoelectric chip provided by the present invention.
  • FIG. 18 is a schematic diagram of another embodiment of electrode pad distribution of a photovoltaic chip provided by the present invention.
  • 19 is a schematic diagram of another embodiment of the electrode pad distribution of the optoelectronic chip provided by the present invention.
  • FIG. 20 is a schematic diagram of yet another embodiment of electrode pad distribution of a photovoltaic chip provided by the present invention.
  • 21 is a schematic diagram of a growth substrate, a buffer layer, an absorption layer, a top layer, and a passivation film provided by embodiments of the present invention
  • FIG. 22 is a schematic diagram of a photolithographic etching window of a photosensitive region provided by an embodiment of the present invention.
  • FIG. 23 is a schematic diagram of forming a photosensitive region by diffusion provided by an embodiment of the present invention.
  • FIG. 24 is a schematic diagram of manufacturing a first electrode provided by an embodiment of the present invention.
  • 25 is a schematic diagram of opening a light transmission groove provided by an embodiment of the present invention.
  • FIG. 26 is a schematic diagram of the growth of an antireflection film provided by an embodiment of the present invention.
  • FIG. 27 is a schematic diagram of a light-increasing AR coating provided by an embodiment of the present invention.
  • FIG. 28 is a schematic diagram of preparing a second electrode provided by an embodiment of the present invention.
  • Buffer layer 2. Absorption layer, 3. Beam splitter, 4. Light-increasing antireflection film, 5, Top layer, 6, Photosensitive area, 7, First electrode, 8, Substrate, 9, Second electrode, 10 , Second electrode through hole, 11, passivation film, 12, first electrode through hole, 13, light-transmitting antireflection film, 14, photosensitive area window, 15, incident light, 151, part of light, 152, another part of light , 16, electrode pad; 17, substrate, 18, buffer layer, 19, absorption layer, 20, top layer, 21, light transmission groove, 22, photosensitive area, 23, first electrode, 24, electrode pad, 25 , Electrode connecting wire, 26, second electrode, 27, light-increasing AR coating, 28, light-emitting AR coating, 29, passivation film, 30, incident light, 31, part of incident light, 32, another part of incident light Part 33, the window of the photosensitive area.
  • the present invention provides a photoelectric chip, which is a back-incident photoelectric chip, and the chip is provided with a beam splitter 3.
  • the spectroscopic groove 3 penetrates the absorption layer 2 of the chip.
  • the absorber layer 2 may be made of InGaAs material. Those skilled in the art know that the absorber layer 2 can have multiple options for different incident light, which is not specifically limited herein.
  • the beam splitter 3 is used to transmit and split a part of the incident light, and another part of the incident light enters the absorption layer 2 for photoelectric conversion.
  • the back side of the chip is used as the light incident side.
  • a light-increasing antireflection film 4 is provided on the back of the chip.
  • the light-increasing antireflection film 4 is used to reduce the reflection of light, thereby increasing the incidence rate.
  • the orthographic projection of the beam splitter 3 on the back of the chip has an overlapping area with the light-increasing antireflection film 4, that is to say, incident light can be incident from the light-increasing antireflection film 4 into the chip , A part of the light can be emitted from the beam splitter 3.
  • the orthographic projection of the beam splitter 3 on the back of the chip is in the light-increasing antireflective film 4, that is, the area of the light-increasing antireflective film 4 is larger than that of the beam splitter 3 along the parallel to the chip
  • the cross-sectional area of the surface allows more light to be transmitted from the inner end of the beam splitter 3 to reduce optical power loss.
  • the optoelectronic chip further includes a top layer 5, which is located on one side of the front surface of the absorption layer 2, that is, the top layer 5 is closer to the front surface of the chip relative to the absorption layer 2.
  • the photosensitive area 6 of the chip is formed on the top layer 5.
  • the inner end of the photosensitive region 6 is connected to the absorption layer 2, and the outer end of the photosensitive region 6 is connected to the first electrode 7 of the chip.
  • the photosensitive area 6 corresponds to an area of the absorption layer 2 where photoelectric conversion is performed, that is, an orthographic projection of the photosensitive area 6 on the back of the chip overlaps the light-increasing antireflection film 4, so that incident light After the incident light antireflection film 4 enters the chip, a part of the light can be photoelectrically converted in the absorption layer 2.
  • the beam splitter 3 penetrates part or all of the chip.
  • the beam splitter 3 opens away from the back of the chip and penetrates the top layer 5. Since the top layer 5 is relatively thin, the process of opening the beam splitter 3 is simple and it is easy to prepare chips.
  • the beam splitter 3 may be opened toward the back of the chip.
  • the beam splitting groove 3 is only opened in the absorption layer 2 and does not open toward any surface of the chip.
  • the orthographic projection of the photosensitive region 6 on the back of the chip is in the light-increasing antireflection film 4, and the photoelectric conversion effect is good, and the effect of monitoring the incident light optical power is good.
  • the first electrode 7 is located on the front side of the chip, that is, on the surface of the top layer 5 opposite to the absorption layer 2.
  • an electrode pad 16 is further provided on the front surface of the chip, and the electrode pad 16 is electrically connected to the first electrode 7.
  • the top layer 5 is made of indium phosphide (InP) material.
  • the optoelectronic chip further includes a substrate 8, the substrate 8 is located on the back side of the absorption layer, that is, the substrate 8 is located on the absorption layer 2 and the top layer 5 phase Back side.
  • a second electrode 9 is also provided on the back of the chip, and the second electrode 9 is provided outside the surface on the back side of the substrate 8, that is, the second electrode 9 is provided on the substrate 8 and the absorption A surface opposite to layer 2.
  • the light-increasing antireflection film 4 is located on a surface of the substrate 8 opposite to the absorption layer 2.
  • the first electrode 7 of the chip provided by the present invention is located on the front of the chip, and the second electrode 9 is provided on the back of the chip.
  • the electrode pad 16 is electrically connected to the first circuit board through a bonding wire.
  • a transparent second circuit board is provided on the back of the chip (to prevent the incident light from entering the chip).
  • the second circuit board is provided with circuit traces, and the second electrode 9 is in phase with the circuit traces on the second circuit board Electrical connection. Then, the first circuit board and the second circuit board are electrically connected to the two poles of the power supply, thereby realizing the power supply to the chip.
  • the substrate 8 is made of sulfur (S)-doped indium phosphide (InP) material.
  • the second electrode 9 is further provided with a second electrode through hole 10 for setting the light incident antireflection film 4.
  • a buffer layer 1 may be optionally provided between the substrate 8 and the absorption layer 2, and the inner end of the beam splitter 3 may be located on the buffer layer 1. Since the top layer 5 and the absorption layer 2 are relatively thin, the depth of the opening of the light splitting groove 3 is shallow, the process is difficult, and it is easy to manufacture.
  • the beam splitter 3 may penetrate the entire chip, that is, the beam splitter 3 penetrates the top layer 5, the absorption layer 2, the buffer layer 1, and the The substrate 8 and the light-increasing antireflection film 4 become light splitting through holes.
  • the buffer layer 1 is made of indium phosphide (InP) material.
  • the optoelectronic chip further includes a passivation film 11 disposed on the front surface of the chip, that is, the passivation film 11 is located on a surface of the top layer 5 opposite to the absorption layer 2.
  • the passivation film 11 is provided with a first electrode through hole 12 for setting the first electrode 7.
  • the inner end of the dichroic groove 3 is provided with a light-transmitting anti-reflection film 13.
  • the light-transmitting anti-reflection film 13 is used to reduce the reflection of light, thereby increasing the outgoing light transmittance.
  • the photosensitive area 6 and the first electrode 7 both have a ring shape and surround the beam splitter 3, and the orthographic projection of the photosensitive area 6 on the first electrode 7 is in the first electrode 7, and the first An orthographic projection of an electrode 7 on the back of the chip is in the light-increasing antireflection film 4.
  • the cross-sections of the first electrode 7 and the photosensitive region 6 in a direction parallel to the surface of the chip are all circular, and the beam splitter 3 and the light-increasing antireflection film All 4 are circular; the beam splitter 3, the first electrode 7, the photosensitive region 6 and the light incident AR coating 4 are all concentric circles, and the alignment error of the center of the circle is less than 20um.
  • the diameter of the beam splitter 3 is 50um-250um; the inner diameter of the first electrode 7 is not smaller than the diameter of the beam splitter 3, and the outer diameter of the first electrode 7 is larger than the diameter of the beam splitter 3 and is 60um ⁇ 1000um; the outer diameter of the first electrode 7 is not greater than the diameter of the light-increasing AR coating 4; the inner diameter of the photosensitive region 6 is not greater than the inner diameter of the first electrode 7, the outer portion of the photosensitive region 6 The diameter is not larger than the outer diameter of the first electrode 7.
  • the inner diameter of the photosensitive region 6 is not smaller than the diameter of the beam splitter 3, and the outer diameter of the photosensitive region 6 is not larger than the diameter of the light-increasing antireflection film 4.
  • the invention also provides a method for installing a photoelectric chip, including;
  • the chip and light source are fixedly installed
  • the working principle of the photoelectric chip provided by the present invention is:
  • the first electrode 7 and the second electrode 9 apply a reverse bias to the chip, and the chip operates.
  • the incident light 15 enters the chip from the light-increasing AR coating 4 on the back of the chip, and a part of the light 151 passes through the substrate 8 and the buffer layer 1 and exits from the light-transmitting AR coating 13. It can pass through the chip while maintaining a high transmittance, and can continue high-efficiency optical signal transmission.
  • the other part of the light 152 passes through the substrate 8 and the buffer layer 1 and enters the absorption layer 2 for photoelectric conversion to form a photocurrent, and then calculates the corresponding optical power through other series of external circuits and devices. And display, so as to realize the monitoring of incident optical power.
  • the light intensity of the incident light 15 generally has a Gaussian distribution, that is, the light intensity is strong in the middle and weak on both sides, and most of the light can be emitted through the inner end of the beam splitter 3, and most of the light can continue to transmit optical signals. Only a small part of the light enters the absorption layer 2 for photoelectric conversion, thereby monitoring the optical power.
  • the proportion of light that needs to be separated from incident light is determined according to specific actual needs. For example, in this embodiment, the proportion of light that needs to be separated from incident light is 10%.
  • the detection element can be used to detect the optical power of the light split through the splitter groove, because the total optical power of the incident light is known (the total optical power output by the light source is known, or the total optical power Measure separately) to determine whether the proportion of the split light meets the demand.
  • the relevant components on the optical link can be fixed.
  • the ratio of the split light can be adjusted by adjusting the distance between the incident light source and the chip.
  • the remaining light can be used to enter the chip absorption layer for photoelectric conversion to generate a photocurrent, and the optical power of the remaining light can be calculated according to the generated photocurrent, so that the incident light
  • the optical power of the light is monitored. It can be considered that the split ratio after installation has been determined.
  • the optical power of the part of the light that enters the chip to generate photocurrent can directly characterize the rate of change of the optical power of the light source. If the total optical power of the incident light needs to be changed in real time, you can choose The optical power calculated based on the photocurrent in the embodiment is converted according to the split ratio.
  • the invention also provides an embodiment of a method for preparing a photoelectric chip, including:
  • a buffer layer 1, an absorption layer 2 and a top layer 5 are sequentially grown on the substrate 8; in this embodiment, a metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) method or other methods may be used; A process may be used in the art to grow the buffer layer 1, the absorption layer 2 and the top layer 5 on the substrate 8 in sequence.
  • MOCVD Metal-organic Chemical Vapor Deposition
  • a growth dielectric film process or other optional processes in the art may be used to grow a passivation film 11 on the front side of the chip, that is, the passivation film 11 is located on the top layer 5 and the absorption layer 2 opposite surfaces.
  • the growth dielectric film process is plasma-enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD), and the passivation film 11 is silicon dioxide (SiO2) with a thickness greater than 5000A or with a thickness greater than 2000A. Silicon nitride (Si3N4).
  • a photolithographic etching process is used to form a photosensitive region window 14 on the passivation film 11 by photolithographic etching.
  • the chip is doped with P-type material from the photosensitive region window 14 to form a photosensitive region 6 and a high-temperature diffusion process is used to form a PN junction; specifically, the photosensitive region 6 is formed on the top layer 5.
  • the inner end of the photosensitive region 6 is connected to the absorption layer 2; the chip is doped with a P-type material using a diffusion process, and the diffusion source is zinc phosphide (Zn3P2).
  • the first electrode 7 is fabricated on the front surface of the chip; specifically, the first electrode 7 is fabricated using an electron beam evaporation process, and the first electrode 7 is a titanium platinum (TiPtAu) metal electrode.
  • a beam splitter 3 is formed on the chip, the beam splitter 3 is opened away from the back of the chip; the beam splitter 3 penetrates the absorption layer 2, and the inner end of the beam splitter 3 Located in the buffer layer 1; specifically, the light splitting groove 3 is etched by a wet etching process or a dry etching process.
  • a light-transmitting antireflection film 13 is grown on the inner end of the beam splitter 3; specifically, a plasma-enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition, PECVD) is grown on the front side of the chip
  • PECVD plasma-enhanced chemical vapor deposition method
  • the antireflection film is etched by photolithography to retain the antireflection film at the inner end of the beam splitter 3 to form the light transmission antireflection film 13.
  • an antireflection coating 4 is grown on the back of the chip; specifically, an antireflection coating is grown on the back of the chip, and photolithography is performed to form the antireflection coating 4.
  • a second electrode 9 is made on the back of the chip, and a second electrode through-hole 10 for setting the light-increasing AR film 4 is formed on the second electrode 9; specifically
  • the second electrode 9 is made by an electron beam evaporation process.
  • the second electrode 9 is a nickel-gold (NiAu) metal electrode, and the second electrode through hole 10 is formed by photolithography.
  • the contact resistance of the chip is reduced by a high-temperature alloy process.
  • the photoelectric chip provided by the present invention is provided with a light splitting groove 3, and the light splitting groove 3 penetrates the absorption layer 2 of the chip.
  • the incident light enters the chip from the back side of the chip, part of the light exits from the beam splitter 3, and this part of the light passes through the chip without passing through the absorption layer without loss and passes through the chip, which can continue the transmission of high-efficiency optical signals .
  • the other part of the light will undergo photoelectric conversion through the absorption layer 2 to generate photo-generated carriers, thereby effectively monitoring the optical power of the incident light. Therefore, the photoelectric chip provided by the present invention can both split light and monitor the optical power of incident light.
  • the optical path system using the photoelectric chip provided by the present invention does not need to use an optical splitter and other corresponding components, thereby reducing the structure, volume and cost of the optical path system. Since fewer components are installed, the operation difficulty is reduced.
  • the present invention provides a photoelectric chip, which is a back-incidence array photoelectric chip, the chip includes a substrate 17, a buffer layer 18, an absorption layer 19 and a top layer 20 stacked in this order, lined The bottom 17 is closer to the back of the chip than the top 20.
  • the substrate 17 is made of sulfur-doped (S) indium phosphide (InP) material
  • the buffer layer 18 is made of indium phosphide (InP) material
  • the absorber layer 19 is made of indium gallium arsenide (InGaAs)
  • the top layer 20 is made of indium phosphide (InP) material.
  • An embodiment of a back-incidence array chip provided by the present invention further includes multiple spectroscopic monitoring units. Specifically, the center distance between two adjacent spectroscopic monitoring units is greater than 100um and less than 5000um.
  • Each spectroscopic monitoring unit includes a light-transmitting groove 21, a photosensitive region 22, and a first electrode 23.
  • the light-transmitting groove 21 opens in the direction of any surface of the chip and penetrates the absorption layer 19 of the chip, and the light-transmitting groove 21 penetrates part or all of the chip. In this embodiment, the light-transmitting groove 21 is opened toward the front side of the chip. The light-transmitting groove 21 also penetrates the top layer 20 and the inner end is located in the buffer layer 18. Since the top layer 20 and the absorption layer 19 are relatively thin, the light-transmitting groove 21 is opened The process is simple and easy to prepare and produce.
  • the light-transmitting groove 21 may also open in the direction of the back surface of the chip, for example, through the substrate 17, the buffer layer 18 and the absorption layer 19.
  • the light-transmitting groove 21 becomes a through hole throughout the entire chip.
  • the photosensitive region 22 is formed on the top layer 20 of the chip and one end is connected to the absorption layer 19 of the chip.
  • the region of the absorption layer 19 corresponding to the photosensitive region 22 is a photoelectric conversion region.
  • the incident light enters the chip for photoelectric conversion in the photoelectric conversion region , Thereby generating photo-generated current, and then monitoring the optical power.
  • the photosensitive regions 22 of the multiple spectroscopic monitoring units are spaced apart, that is, the photoelectric conversion regions of the multiple spectroscopic monitoring units are spaced apart, so that each beam of incident light enters the photoelectric conversion region of the corresponding spectroscopic monitoring unit for individual photoelectric conversion.
  • a split monitoring unit monitors the optical power of each incident light separately without disturbing each other.
  • the first electrode 23 is provided on the front surface of the chip and connected to the other end of the corresponding photosensitive region 22, and the first electrodes 23 of the plurality of spectroscopic monitoring units are insulated from each other.
  • a plurality of electrode pads 24 corresponding to the spectroscopic monitoring units are also provided on the edge of the front surface of the chip.
  • the first electrode 23 of each spectroscopic monitoring unit is electrically connected to the corresponding electrode pad 24 through a corresponding electrode connection line 25.
  • the plurality of electrode connection wires 25 are insulated from each other, and the plurality of electrode pads 24 are insulated from each other. Specifically, the center distance between two adjacent electrode pads 24 is greater than 30um and less than 1000um, and the distance between adjacent two electrode connection lines 25 is greater than 5um.
  • each electrode pad 24 is circular.
  • the electrode pad 24 is used to electrically connect with other components (such as a circuit board) through a bonding wire to power up the chip.
  • the electrode pad 24 is distributed on the edge of the chip, and it is convenient to bond wires.
  • a plurality of electrode pads 24 are distributed on the four edges of the chip, and the electrode pads 24 on each edge are distributed in a single row (a row parallel to the edge of the chip) for easy maintenance.
  • a plurality of electrode pads 24 are distributed on two opposite edges of the chip position.
  • the electrode pads 24 are connected to other components by wire bonding, the connection of this structure Convenience.
  • a plurality of electrode pads 24 are distributed on two adjacent edges of the chip.
  • a plurality of electrode pads 24 are distributed on one edge of the chip.
  • At least one second electrode 26 is provided on the back of the chip, and the second electrode 26 is connected to the substrate 17 of the chip.
  • the first electrode 23 and the second electrode 26 are used to connect with the two poles of the power source to power the chip.
  • the first electrode 23 is provided on the front surface of the chip, and the second electrode 26 is provided on the rear surface of the chip.
  • each electrode pad 24 is electrically connected to the first circuit board through a bonding wire.
  • a transparent second circuit board (to avoid affecting the incident light from entering the chip) is provided on the back of the chip.
  • the second circuit board is provided with circuit traces, and the second electrode 26 is in phase with the circuit traces on the second circuit board Electrical connection. Then, the first circuit board and the second circuit board are electrically connected to the two poles of the power supply, thereby realizing the power supply to the chip.
  • each light-increasing antireflection film 27 is larger than the sum of the cross-sectional areas of the light-transmitting grooves 21 and the photosensitive regions 22 of the corresponding spectroscopic monitoring unit along the direction parallel to the surface of the chip, so that each incident light beam After the AR film 27 is injected into the chip, it can be split by the light-transmitting groove 21 of the corresponding spectroscopic monitoring unit and enter the corresponding photoelectric conversion area for photoelectric conversion.
  • first second electrode 26 is provided on the back of the chip, and the second electrode 26 is provided with a plurality of second electrode through holes corresponding to the light-increasing AR film 27, each The AR coating 27 is located in the corresponding second electrode through hole.
  • the inner end of the light transmission groove 21 is provided with a light-increasing film 12 to reduce the reflection of light to increase the light-emitting rate.
  • the cross-sections of the first electrode 23 and the photosensitive region 22 of each spectroscopic monitoring unit along the direction parallel to the surface of the chip are circular, and the light-transmitting groove 21 and the incident light of each spectroscopic monitoring unit
  • the antireflection films 27 are all circular.
  • the light-transmitting groove 21, the first electrode 23, the photosensitive region 22 and the light-increasing antireflection film 27 of each spectroscopic monitoring unit are all concentric circles, and the alignment error of the center of the circle is less than 20um.
  • the diameter of the light transmitting groove 21 is 50um to 250um
  • the inner diameter of the first electrode 23 is not smaller than the diameter of the light transmitting groove 21, and the outer diameter of the first electrode 23 is larger than the diameter of the light transmitting groove 21 and is 60um to 1000um.
  • the outer diameter of the first electrode 23 is not greater than the diameter of the light-increasing antireflection film 27
  • the inner diameter of the photosensitive region 22 is not greater than the inner diameter of the first electrode 23, and the outer diameter of the photosensitive region 22 is not greater than the outer diameter of the first electrode 23.
  • the inner diameter of the photosensitive region 22 is not smaller than the diameter of the light transmitting groove 21, and the outer diameter of the photosensitive region 22 is not larger than the diameter of the light-increasing antireflection film 27.
  • the photoelectric chip provided by the present invention is further provided with a passivation film 29 on the surface of the top layer 20 opposite to the absorption layer 19.
  • a plurality of first electrode through holes corresponding to the first electrodes 23 of the spectroscopic monitoring unit are formed in the passivation film 29, and the first electrodes 23 of each spectroscopic monitoring unit are located in the corresponding first electrode through holes.
  • the working principle of the photoelectric chip provided by the present invention is that the chip is reverse-biased through the second electrode 26 and the first electrode 23 of each spectroscopic monitoring unit, thereby making the chip work.
  • Multiple beams of incident light enter the chip from the corresponding incident light-increasing film 27 on the back of the chip, and a portion 31 of each beam of incident light 30 passes through the substrate 17 and the buffer layer 18 and then transmits from the corresponding light-transmitting groove 21 of the spectroscopic monitoring unit Splitting, this part of the light can pass through the chip while maintaining a high transmittance, and the optical signal transmission can be continued.
  • each incident light 30 passes through the substrate 17 and the buffer layer 18 and enters the photoelectric conversion area of the corresponding spectroscopic monitoring unit for photoelectric conversion, thereby generating photo-generated current, and then calculated by a series of other external circuits and devices.
  • the corresponding optical power is displayed and displayed, so as to monitor the incident optical power.
  • the light intensity of each incident light generally has a Gaussian distribution, that is, the light intensity is strong in the middle and weak on both sides, and most of the light of each incident light can be emitted through the inner end of the light-transmitting groove 21, and most of the light can continue to proceed. Signal transmission. Only a small part of each incident light enters the absorption layer 19 for photoelectric conversion.
  • the proportion of light to be split for each incident light is determined according to specific actual needs. For example, in this embodiment, the proportion of light to be split for each incident light is 10%.
  • the detection element can be used to detect the optical power of the light split through the light-transmitting groove 21 of the corresponding spectroscopic monitoring unit, because the total optical power of each incident light is known (the total output of the light source The optical power is known, or the total optical power is measured separately) to determine whether the proportion of the split light meets the demand.
  • the relevant components on the optical link can be fixed.
  • the ratio of the light split by each incident light can be adjusted by adjusting the distance between the light source of each incident light and the chip.
  • the remaining light of each light can be used to enter the chip absorption layer 19 for photoelectric conversion to generate photocurrent, and the remaining light of each light can be calculated according to the generated photocurrent To monitor the optical power of each incident light. It can be considered that the split ratio of each beam after installation has been determined.
  • the optical power of each part of the light that enters the chip to generate photocurrent can directly characterize the rate of change of the optical power of each light source.
  • the real-time change value of the total optical power of the light can be selected and converted according to the split ratio according to the optical power of each beam calculated according to the photocurrent in the embodiment.
  • the present invention also provides an embodiment of a method for manufacturing a photoelectric chip, which is used to prepare a back-incident array photoelectric chip according to any one of the foregoing embodiments.
  • the method includes:
  • a buffer layer 18, an absorption layer 19, and a top layer 20 are sequentially grown on the substrate 17; in this embodiment, a metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) method or Other techniques can be used in this field.
  • MOCVD Metal-organic Chemical Vapor Deposition
  • a growth dielectric film process or other optional processes in the art may be used to grow a passivation film 29 on the front side of the chip, that is, the passivation film 29 is located on a surface of the top layer 20 opposite to the absorption layer 19.
  • the growth dielectric film process is plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD), and the passivation film 29 is silicon dioxide (SiO2) with a thickness greater than 5000A or silicon nitride with a thickness greater than 2000A ( Si3N4).
  • a photolithographic etching process is used to form a plurality of photosensitive region windows 33 on the passivation film 29 by photolithographic etching.
  • each P-type material diffuses to the absorption layer 19, forming a plurality of photosensitive regions 22, and using a high temperature diffusion process to form PN Junction; specifically, the top layer 20 is doped with a P-type material using a diffusion process, the diffusion source is zinc phosphide (Zn3P2).
  • a plurality of first electrodes 23 are fabricated on the front of the chip, and each first electrode 23 is connected to a corresponding photosensitive region 22; specifically, the first electrode 23 and the first electrode 23 are fabricated using an electron beam evaporation process It is a titanium platinum (TiPtAu) metal electrode.
  • a plurality of light-transmitting grooves 21 are formed on the chip, and the light-transmitting grooves 21 are opened toward the front side of the chip.
  • the plurality of light-transmitting grooves 21 all penetrate the absorption layer 19 and the top layer 20.
  • the buffer layer 18; specifically, the light-transmitting groove 21 is etched by a wet etching process or a dry etching process.
  • a light-reflective coating 28 is grown on the inner end of each light-transmitting groove 21; specifically, a plasma-enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition (PECVD)) is used to grow the AR coating on the front of the chip , And photolithographic etching is performed to retain the anti-reflection film at the inner end of the light-transmitting groove 21 to form the optical anti-reflection film 28.
  • PECVD Plasma-enhanced chemical vapor deposition
  • each light-increasing antireflection film 27 corresponds to a spectroscopic monitoring unit; specifically, an antireflection film is grown on the back of the chip and lithography is performed A plurality of light incident antireflection films 27 are formed.
  • a second electrode 26 is made on the back of the chip, and a plurality of second electrode through holes for setting the light-increasing AR film 27 are formed on the second electrode 26; specifically, it is made by an electron beam evaporation process
  • the second electrode 26 is a nickel-gold (NiAu) metal electrode, and a plurality of second electrode through holes are formed by photolithography.
  • the photoelectric chip provided by the present invention is provided with a plurality of spectroscopic monitoring units, and each of the spectroscopic monitoring units further includes a light-transmitting groove 21 and a photosensitive area 22. Multiple beams of incident light are directed toward the chip, and a portion 31 of each beam of incident light is transmitted and separated from the light-transmitting groove 21 of the corresponding spectroscopic monitoring unit. This part of light can pass through the chip through the light-transmitting groove 21 without passing through the absorption layer 19 without loss. Optical signal transmission can continue. The other part 32 of each incident light enters the photoelectric conversion area of the corresponding spectroscopic monitoring unit for photoelectric conversion, so that the chip can separately perform beam splitting and optical power monitoring on multiple incident lights. Therefore, the optical path system using the chip does not need to use a large number of optical splitters, thereby greatly reducing the volume and cost of the optical path system.

Abstract

一种光电芯片、制备方法和安装方法，涉及光通信传输技术领域。所述芯片上开设有分光槽（3），分光槽（3）贯穿芯片的吸收层（2）；芯片的背面为入光侧；分光槽（3）用于将入射光（15）的一部分光（151）透射分出，入射光（15）的另一部分光（152）进入到吸收层（2）内进行光电转换。上述光电芯片既能够分光，又能够对入射光的光功率进行监控。

Description

光电芯片、制备方法和安装方法 技术领域
本发明涉及光通信传输技术领域，具体涉及一种光电芯片、制备方法和安装方法。
背景技术
激光器发射的光信号经光纤传输进入无源光波导(PLC)之前，通常需要光分路器分出部分(例如5％)光信号到另外的光功率监控接收芯片上，对进入光波导的光功率进行监控。剩余(例如95％)的光信号通过光纤耦合到光波导，进行传输。
可以理解的是，由于光链路上需要安装两个独立器件——光分路器和光功率监控接收芯片，两者之间还需要光纤和两个光纤接头结构，光分路器和光功率监控接收芯片一般还需要各自的固定位。且目前的激光系统一般是复合光路，按现有技术的作法便造成了系统结构体积大、操作难度大且成本高的问题。
发明内容
为解决现有技术中的上述技术问题，本发明的主要目的是提供一种光电芯片、制备方法和安装方法，该芯片既能够实现分光，又能够实现光功率的监控。
为了实现上述技术问题，本发明实施例提供了一种光电芯片，为一种背入射式光电芯片，所述芯片上开设有分光槽，所述分光槽贯穿所述芯片的吸收层；
所述芯片的背面为入光侧；所述分光槽用于将入射光的一部分透射分出，入射光的另一部分光进入到所述吸收层内进行光电转换。
本发明提供的光电芯片设置了分光槽，分光槽贯穿芯片的吸收层。当入射光从芯片背面一侧射入到芯片内时，一部分光通过分光槽出射，这部分光可通过分光槽未经过吸收层而无损穿过芯片，可继续进行高效率的光信号传输；而另一部分光就会经过吸收层而进行光电转换，产生光生载流子，从而对入射光的光功率进行有效监控。故使用本发明提供的光电芯片既能够分光，又能够对入射光的光功率进行监控。
进一步地，还包括顶层，所述顶层位于所述吸收层的正面的一侧； 所述分光槽向远离所述芯片背面的方向开口并贯穿所述顶层，所述芯片的光敏区形成于所述顶层；所述光敏区内端连接于所述吸收层，所述光敏区外端连接至所述芯片的第一电极；所述光敏区对应所述吸收层内进行光电转换的区域；所述第一电极位于所述芯片的正面。
进一步地，还包括衬底，所述衬底位于所述吸收层的背面的一侧；所述芯片的背面还设有第二电极，所述第二电极设于所述衬底背面侧的表面外。
进一步地，所述衬底和所述吸收层之间还设有缓冲层，所述分光槽的内端位于所述缓冲层。
进一步地，所述芯片的背面设有入光增透膜，以所述入光增透膜增加入射率，所述入光增透膜的面积大于所述分光槽沿平行于所述芯片表面的横截面积。
进一步地，所述分光槽的内端设有透光增透膜，以所述透光增透膜增加出射透光率。
进一步地，所述第一电极和所述光敏区沿平行于所述芯片表面的方向上的横截面均呈圆环形，所述分光槽和所述入光增透膜均呈圆形；
所述分光槽、所述第一电极、所述光敏区和所述入光增透膜均为同心圆，并且圆心对准误差小于20um；
所述分光槽的直径为50um～250um；
所述第一电极的内径不小于所述分光槽的直径，所述第一电极的外径大于所述分光槽的直径并为60um～1000um；
所述光敏区的内径不小于所述分光槽的直径，所述光敏区的外径不大于所述入光增透膜的直径。
进一步地，所述分光槽贯穿所述芯片的部分或全部。
本发明实施例还提供一种光电芯片的制备方法，用于制备如上述任一实施例所述的光电芯片，所述方法包括：
形成包括吸收层的芯片；
在所述芯片上开设出分光槽，所述分光槽贯穿所述吸收层。
本发明实施例还提供一种光电芯片的安装方法，用于安装如上述任一实施例所述的光电芯片，所述方法包括：
将所述光电芯片相对光源进行预定位；
检测经所述分光槽透射出的分光光功率，以此校正预定位后的所述芯片的分光比；
若所述分光比符合预设值，则固定安装所述芯片和所述光源；
若所述分光比与预设值不符合，则通过调整所述光源与所述芯片之间的距离，以将所述分光比调整至预设值。
本发明实施例还提供了一种光电芯片，为一种背入射式阵列光电芯片，所述芯片包括多个分光监控单元，每个所述分光监控单元包括透光槽和光敏区；所述透光槽向所述芯片任一表面的方向开口并贯穿所述芯片的吸收层，所述光敏区形成于所述芯片的顶层并一端连接至所述芯片的吸收层；所述吸收层内对应所述光敏区的区域为光电转换区；
以所述芯片的背面为入光侧，多束入射光射向所述芯片；每束入射光的一部分从对应的所述分光监控单元的透光槽透射分出，每束入射光的另一部分进入到对应的所述分光监控单元的光电转换区内进行光电转换。
本发明实施例提供的光电芯片设置了多个分光监控单元，每个分光监控单元又包括透光槽和光敏区。多束入射光射向芯片，每束入射光的一部分从对应的分光监控单元的透光槽透射分出，这部分光可通过透光槽未经过吸收层而无损穿过芯片，可继续进行光信号传输。每束入射光的另一部分进入到对应的分光监控单元的光电转换区内进行光电转换，从而使得该芯片能够对多束入射光分别进行分光和光功率监控。进而使得使用该芯片的光路系统无需使用大量的光分路器，进而大大减小了光路系统的体积和成本。
进一步地，每个所述分光监控单元还包括第一电极，所述第一电极设于所述芯片的正面并与对应的所述光敏区的另一端相连接；
多个所述分光监控单元的第一电极相互绝缘设置；
所述芯片的背面上设有至少一个第二电极，所述第二电极与所述芯片的衬底相连接。
进一步地，所述芯片正面的边缘上还设有多个与所述分光监控单元一一对应的电极焊盘，每个所述分光监控单元的第一电极通过对应一个电极连接线电连接至对应的所述电极焊盘；
多个所述电极连接线之间相互绝缘设置；
多个所述电极焊盘之间相互绝缘设置。
进一步地，所述衬底与所述吸收层之间还设有缓冲层，所述透光槽向所述芯片正面的方向开口，所述透光槽还贯穿所述顶层并内端位于所述缓冲层。
进一步地，相邻两个所述分光监控单元的中心间距大于100um且小于5000um。
进一步地，相邻两个所述电极焊盘的中心间距大于30um且小于1000um；相邻两个所述电极连接线的间距大于5um。
进一步地，所述透光槽贯穿所述芯片的部分或全部。
进一步地，所述芯片的背面设有多个与所述分光监控单元一一对应的入光增透膜，每个所述入光增透膜的面积大于对应的所述分光监控单元的透光槽和光敏区分别沿平行于所述芯片表面方向的横截面积的总和。
进一步地，所述透光槽的内端设有出光增投膜。
本发明实施例还提供了一种光电芯片的制备方法，用于制备如上述任一实施例所述的光电芯片，所述方法包括：
形成吸收层和顶层；
在所述顶层的多处掺杂P型材料，每处的所述P型材料扩散至所述吸收层，形成多个光敏区；
在所述芯片上开出多个透光槽，多个所述透光槽均贯穿所述吸收层。
附图说明
本发明上述和/或附加方面的优点从结合下面附图对实施例的描述中将变得明显和容易理解，其中：
图1是本发明实施例提供的光电芯片的主视图；
图2是图1所示的芯片沿A-A’的剖视图；
图3是图1所示的芯片的后视图；
图4是本发明另一实施例提供的光电芯片的剖视图；
图5是本发明实施例提供的生长、衬底、缓冲层、吸收层、顶层和钝化膜的示意图；
图6是本发明实施例提供的光刻腐蚀光敏区窗口的示意图；
图7是本发明实施例提供的扩散形成光敏区的示意图；
图8是本发明实施例提供的制作第一电极的示意图；
图9是本发明实施例提供的开设分光槽的示意图；
图10是本发明实施例提供的生长透光增透膜的示意图；
图11是本发明实施例提供的生长入光增透膜的示意图；
图12是本发明实施例提供的制备第二电极的示意图；
图13是本发明实施例提供的光电芯片的主视图；
图14是本发明实施例提供的光电芯片的后视图；
图15是图13所示的主视图区域A的放大图；
图16是图15沿B-B’方向的部分剖视图；
图17是本发明提供的光电芯片的另一实施例的部分剖视图；
图18是本发明提供的光电芯片的电极焊盘分布的另一实施例的示意图；
图19是本发明提供的光电芯片的电极焊盘分布的又一实施例的示意图；
图20是本发明提供的光电芯片的电极焊盘分布的再一实施例的示意图；
图21是本发明实施例提供的生长衬底、缓冲层、吸收层、顶层和钝化膜的示意图；
图22是本发明实施例提供的光刻腐蚀光敏区窗口的示意图；
图23是本发明实施例提供的扩散形成光敏区的示意图；
图24是本发明实施例提供的制作第一电极的示意图；
图25是本发明实施例提供的开设透光槽的示意图；
图26是本发明实施例提供的生长出光增透膜的示意图；
图27是本发明实施例提供的生长入光增透膜的示意图；
图28是本发明实施例提供的制备第二电极的示意图。
其中图1至图28中附图标记与部件名称之间的对应关系为：
1、缓冲层，2、吸收层，3、分光槽，4、入光增透膜，5、顶层，6、光敏区，7、第一电极，8、衬底，9、第二电极，10、第二电极通孔，11、钝化膜，12、第一电极通孔，13、透光增透膜，14、光敏区窗口，15、入射光，151、一部分光，152、另一部分光，16、电极焊盘；17、衬底，18、缓冲层，19、吸收层，20、顶层，21、透光槽，22、光敏区，23、第一电极，24、电极焊盘，25、电极连接线，26、第二电极，27、入光增透膜，28、出光增透膜，29、钝化膜，30、入射光，31、入射光的一部分，32、入射光的另一部分，33、光敏区窗口。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请的一部分实施例，而不是全部 的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参考图1和图2，本发明提供一种光电芯片，为一种背入射式光电芯片，芯片开设有分光槽3。分光槽3贯穿芯片的吸收层2。吸收层2可选择由铟镓砷(InGaAs)材料制成，本领域技术人员知晓，吸收层2针对不同的入射光可以有多种选择，在此不做具体限定。
所述分光槽3用于将入射光的一部分透射分出，入射光的另一部分光进入到所述吸收层2内进行光电转换。
本实施例，以芯片的背面为入光侧。具体地，所述芯片的背面设有入光增透膜4。所述入光增透膜4用于减少光的反射，从而增加入射率。所述分光槽3在所述芯片背面的正投影与所述入光增透膜4有重叠区域，也就是说，可以使得入射光从所述入光增透膜4射入所述芯片内后，能够有一部分光从所述分光槽3射出。进一步地，所述分光槽3在所述芯片背面的正投影在所述入光增透膜4内，即所述入光增透膜4的面积大于所述分光槽3沿平行于所述芯片表面的横截面积，使从所述分光槽3的内端透射分出的光多，减少光功率损耗。
所述光电芯片还包括顶层5，所述顶层5位于所述吸收层2的正面的一侧，即所述顶层5相对所述吸收层2更靠近所述芯片的正面。所述芯片的光敏区6形成于所述顶层5。所述光敏区6内端连接于所述吸收层2，所述光敏区6外端连接至所述芯片的第一电极7。所述光敏区6对应所述吸收层2内进行光电转换的区域，即所述光敏区6在所述芯片背面的正投影与所述入光增透膜4有重叠区域，使得入射光从所述入光增透膜4射入所述芯片后，有一部分光能够在所述吸收层2内进行光电转换。
所述分光槽3贯穿所述芯片的部分或全部。
在本实施例中，分光槽3向远离芯片背面的方向开口并贯穿顶层5，由于顶层5比较薄，所以开设分光槽3的工艺简单，易于制备芯片。
在另一个实施例中，分光槽3可向芯片的背面方向开口。
在又一个实施例中，分光槽3只开设于吸收层2内并不向芯片的任何一个表面方向开口。
在本实施例中，所述光敏区6在所述芯片背面的正投影在所述入光增透膜4内，光电转换效果好，进而监控入射光光功率的效果好。
在本实施例中，所述第一电极7位于所述芯片的正面，即位于所述 顶层5与所述吸收层2相背的一表面上。
请参考图1，芯片的正面上还设有电极焊盘16，电极焊盘16与第一电极7相电连接。
具体地，所述顶层5由磷化铟(InP)材料制成。
请同时参考图3，所述光电芯片还包括衬底8，所述衬底8位于所述吸收层的背面的一侧，即所述衬底8位于所述吸收层2与所述顶层5相背的一侧。所述芯片的背面还设有第二电极9，所述第二电极9设于所述衬底8背面侧的表面外，即所述第二电极9设于所述衬底8与所述吸收层2相背的一表面。所述入光增透膜4位于所述衬底8与所述吸收层2相背的一表面。
本发明提供的芯片的第一电极7位于芯片的正面，第二电极9设于芯片的背面。在实际使用中，给芯片加电时，电极焊盘16通过焊线与第一电路板电连接。在芯片的背面设一个透明(避免影响入射光射入到芯片内)的第二电路板，第二电路板上设有电路走线，第二电极9与第二电路板上的电路走线相电连接。再将第一电路板和第二电路板电连接至电源的两极，从而实现给芯片加电。
具体地，所述衬底8由掺硫(S)的磷化铟(InP)材料制成。
在本实施例中，如图3所示，所述第二电极9上还开设有用于设置所述入光增透膜4的第二电极通孔10。
在本实施例中，如图2所示，所述衬底8和所述吸收层2之间还可选择设有缓冲层1，所述分光槽3的内端选择位于所述缓冲层1。由于所述顶层5和所述吸收层2都比较薄，故开设所述分光槽3的深度浅，工艺难度小，便于生产制造。
在另一实施例中，请参考图4，所述分光槽3可以贯穿整个所述芯片，即所述分光槽3贯穿所述顶层5、所述吸收层2、所述缓冲层1、所述衬底8和所述入光增透膜4变为分光通孔。
具体地，所述缓冲层1由磷化铟(InP)材料制成。
所述光电芯片还包括钝化膜11，所述钝化膜11设于所述芯片的正面，即所述钝化膜11位于所述顶层5与所述吸收层2相背的一表面上。所述钝化膜11上开设有用于设置所述第一电极7的第一电极通孔12。
所述分光槽3的内端设有透光增透膜13，所述透光增透膜13用于减少光的反射，从而增加出射透光率。
所述光敏区6和所述第一电极7均呈环形并围绕所述分光槽3，所 述光敏区6在所述第一电极7的正投影在所述第一电极7内，所述第一电极7在所述芯片背面的正投影在所述入光增透膜4内。
在本实施例中，所述第一电极7和所述光敏区6沿平行于所述芯片表面的方向上的横截面均呈圆环形，所述分光槽3和所述入光增透膜4均呈圆形；所述分光槽3、所述第一电极7、所述光敏区6和所述入光增透膜4均为同心圆，并且圆心对准误差小于20um。所述分光槽3的直径为50um～250um；所述第一电极7的内径不小于所述分光槽3的直径，所述第一电极7的外径大于所述分光槽3的直径并为60um～1000um；所述第一电极7的外径不大于所述入光增透膜4的直径；所述光敏区6的内径不大于所述第一电极7的内径，所述光敏区6的外径不大于所述第一电极7的外径。所述光敏区6的内径不小于所述分光槽3的直径，所述光敏区6的外径不大于所述入光增透膜4的直径。
本发明还提供一种光电芯片的安装方法，包括；
将光电芯片相对光源进行预定位，光源用于发设光到背入射光电芯片；
检测经光电芯片的分光槽3透射出的分光光功率，以此校正预定位后的芯片的分光比；
若分光比符合预设值，则固定安装芯片和光源；
若分光比与预设值不符合，则通过调整光源与芯片之间的距离，以将分光比调整至预设值。
请同时参考图2，本发明提供的光电芯片的工作原理为：
通过所述第一电极7和所述第二电极9对所述芯片加反向偏压，所述芯片工作。入射光15从芯片背面的入光增透膜4射入所述芯片内，一部分光151经过所述衬底8和所述缓冲层1后从所述透光增透膜13射出，这部分光可在保持高透过率的情况下穿过芯片，可继续进行高效率的光信号传输。而另一部分光152经过所述衬底8和所述缓冲层1后进入到所述吸收层2内进行光电转换，形成光电流，再经过其他一系列的外部电路和装置计算出相应的光功率并进行显示，从而实现对入射光光功率的监控。
入射光15的光强一般呈高斯分布，即光强中间强、两侧弱，进而大部分光可通过所述分光槽3的内端射出，大部分的光可继续进行光信号的传输。小部分的光才会进入到所述吸收层2进行光电转换，从而进行光功率的监控。
入射光需要分出的光的比例根据具体实际需要确定，比如在本实施例中，入射光需要分出的光的比例为10％。在光链路安装时，可以利用检测元件检测通过分光槽分出去的光的光功率，由于入射光的总的光功率是已知的(光源输出的总光功率已知，或者对总光功率单独进行测定)，从而确定分出去的光的比例是否满足需求。
如果满足需求，便可对光链路上的相关元器件进行固定。
如果不满足需求，可通过调整入射光源与所述芯片的距离，从而调整分出去的光的比例。
入射光分出去的光的比例确定后，便可以利用剩余的光射入到所述芯片吸收层内进行光电转换，产生光电流，根据产生的光电流计算出剩余光的光功率，从而对入射光的光功率进行监控。可以认为，安装后的分光比已经确定，进入到芯片内产生光电流的部分光的光功率可以直接表征出光源光功率的变化率，若后续需要入射光的总光功率实时变化值，可以选择根据实施例中的光电流计算出的光功率按分光比例换算得出。
本发明还提供一种光电芯片的制备方法的实施例，包括：
请参考图5，在衬底8上依次生长缓冲层1、吸收层2和顶层5；在本实施例中，可采用金属有机化合物化学气相沉积(Metal-organic Chemical Vapor Deposition，MOCVD)法或其他本领域可选用工艺，在所述衬底8上依次生长所述缓冲层1、所述吸收层2和所述顶层5。
请参考图5，可选择采用生长介质膜工艺或其他本领域可选用工艺，在所述芯片的正面上生长钝化膜11，即所述钝化膜11位于所述顶层5与所述吸收层2相背的一表面。具体地，所述生长介质膜工艺为等离子体增强化学的气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)，所述钝化膜11为厚度大于5000A的二氧化硅(SiO2)或厚度大于2000A的氮化硅(Si3N4)。
请参考图6，采用光刻腐蚀工艺，在所述钝化膜11上光刻腐蚀形成光敏区窗口14。
请参考图7，从所述光敏区窗口14对所述芯片进行P型材料掺杂，形成光敏区6，并采用高温扩散工艺形成PN结；具体地，所述光敏区6形成于所述顶层5，所述光敏区6内端连接于所述吸收层2；对所述芯片进行P型材料掺杂采用扩散工艺，扩散源为磷化锌(Zn3P2)。
请参考图8，在所述芯片的正面制作第一电极7；具体地，采用电子束蒸发工艺制作所述第一电极7，所述第一电极7为钛铂金(TiPtAu) 金属电极。
请参考图9，在所述芯片上开设出分光槽3，所述分光槽3向远离所述芯片背面的方向开口；所述分光槽3贯穿所述吸收层2，所述分光槽3内端位于所述缓冲层1；具体地，采用湿法腐蚀工艺或者干法刻蚀工艺腐蚀出所述分光槽3。
请参考图10，在所述分光槽3的内端生长透光增透膜13；具体地，采用等离子体增强化学的气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)在所述芯片的正面生长增透膜，并进行光刻腐蚀，保留所述分光槽3内端的增透膜，形成所述透光增透膜13。
对所述芯片的背面进行减薄抛光。
请参考图11，在所述芯片的背面生长入光增透膜4；具体地，在所述芯片的背面生长增透膜，并光刻，形成所述入光增透膜4。
请参考图3和图12，在所述芯片的背面制作第二电极9，并在所述第二电极9上开设用于设置所述入光增透膜4的第二电极通孔10；具体地，采用电子束蒸发工艺制作所述第二电极9，所述第二电极9为镍金(NiAu)金属电极，并光刻形成所述第二电极通孔10。
通过高温合金工艺降低所述芯片的接触电阻。
本发明提供的光电芯片设置了分光槽3，分光槽3贯穿芯片的吸收层2。当入射光从芯片背面一侧射入到芯片内时，一部分光从分光槽3内射出，这部分光通过分光槽未经过吸收层而无损穿过芯片，可继续进行高效率的光信号的传输。而另一部分光就会经过吸收层2而进行光电转换，产生光生载流子，从而对入射光的光功率进行有效监控。故使用本发明提供的光电芯片既能够分光，又能够对入射光的光功率进行监控。使用本发明提供的光电芯片的光路系统，无须使用光分路器及其他相应的元器件，从而减少了光路系统的结构、体积和成本，由于安装元器件少了，进而降低了操作难度。
请参考图13至图16，本发明提供一种光电芯片，为一种背入射式阵列光电芯片，所述芯片包括依次层叠设置的衬底17、缓冲层18、吸收层19和顶层20，衬底17相对顶层20更靠近芯片的背面。在本实施例中，衬底17由掺硫(S)的磷化铟(InP)材料制成,缓冲层18由磷化铟(InP)材料制成，吸收层19由铟镓砷(InGaAs)材料制成，顶层20由磷化铟(InP)材料制成。
本发明提供的一种背入射式阵列芯片的实施例还包括多个分光监控单元。具体地，相邻两个分光监控单元的中心间距大于100um且小于5000um。
每个分光监控单元包括透光槽21、光敏区22和第一电极23。
透光槽21向芯片任一表面的方向开口并贯穿芯片的吸收层19，透光槽21贯穿芯片的部分或全部。在本实施例中，透光槽21向芯片正面的方向开口，透光槽21还贯穿顶层20并内端位于缓冲层18，由于顶层20和吸收层19都比较薄，故开设透光槽21的工艺简单，易于制备和生产。
在另一个实施例中，透光槽21也可以向芯片背面的方向开口，例如贯穿衬底17、缓冲层18和吸收层19。
在又一个实施例中，请参考图17，透光槽21贯穿整个芯片变为通孔。
光敏区22形成于芯片的顶层20并一端连接至芯片的吸收层19，吸收层19内对应光敏区22的区域为光电转换区，入射光射入到芯片内是在光电转换区进行光电转换的，从而产生光生电流，进而对光功率监控。
多个分光监控单元的光敏区22间隔设置，即多个分光监控单元的光电转换区间隔设置，以使得每束入射光进入到对应的分光监控单元的光电转换区能够进行单独的光电转换，每个分光监控单元对每束入射光分别进行光功率监控，互不干扰。
第一电极23设于芯片的正面并与对应的光敏区22的另一端相连接，多个分光监控单元的第一电极23相互绝缘设置。
芯片正面的边缘上还设有多个与分光监控单元一一对应的电极焊盘24，每个分光监控单元的第一电极23通过对应一个电极连接线25电连接至对应的电极焊盘24。多个电极连接线25之间相互绝缘设置，多个电极焊盘24之间相互绝缘设置。具体地，相邻两个电极焊盘24的中心间距大于30um且小于1000um，相邻两个电极连接线25的间距大于5um。
在本实施例中，每个电极焊盘24均为圆形。
电极焊盘24用于通过焊线与其他元器件(例如电路板)电连接，从而给芯片加电，电极焊盘24分布于芯片的边缘，打焊线方便。
在本实施例中，多个电极焊盘24分布于芯片的四个边缘，且每个边缘处的电极焊盘24呈单排(平行于芯片边缘的方向为排)分布，便于维修。
在另一个实施例中，请参考图18，多个电极焊盘24分布于芯片位置相对的两个边缘，在电极焊盘24与其他元器件通过焊线的方式连接时，这种结构的连接方便。
在又一个实施例中，请参考图19，多个电极焊盘24分布于芯片相邻的两个边缘。
在再一个实施例中，请参考图20，多个电极焊盘24分布于芯片的一个边缘上。
芯片的背面上设有至少一个第二电极26，第二电极26与芯片的衬底17相连接。
第一电极23和第二电极26用于与电源的两极相连接，以给芯片加电。
本发明提供的芯片的实施例的第一电极23设于芯片的正面，第二电极26设于芯片的背面。在实际使用中，给芯片加电时，每个电极焊盘24通过焊线与第一电路板电连接。在芯片的背面设一个透明(避免影响入射光射入到芯片内)的第二电路板，第二电路板上设有电路走线，第二电极26与第二电路板上的电路走线相电连接。再将第一电路板和第二电路板电连接至电源的两极，从而实现给芯片加电。
以芯片的背面为入光侧。在本实施例中，芯片的背面设有多个与分光监控单元一一对应的入光增透膜27，减少光的反射，以增加入光率。每个入光增透膜27的面积大于对应的分光监控单元的透光槽21和光敏区22分别沿平行于芯片表面方向的横截面积的总和，以使得每束入射光从对应的入光增透膜27射入芯片内后，都能够被对应的分光监控单元的透光槽21分光和进入对应的光电转换区进行光电转换。
在本实施例中，芯片的背面上只设有第一个第二电极26，第二电极26上开设有多个与入光增透膜27一一对应的第二电极通孔，每个入光增透膜27位于对应的第二电极通孔内。
透光槽21的内端设有出光增投膜12，减少光的反射，以增加出光率。
在本实施例中，每个分光监控单元的第一电极23和光敏区22沿平行于芯片表面的方向上的横截面均呈圆环形，每个分光监控单元的透光槽21和入光增透膜27均呈圆形。每个分光监控单元的透光槽21、第一电极23、光敏区22和入光增透膜27均为同心圆，并且圆心对准误差小于20um。透光槽21的直径为50um～250um，第一电极23的内径不小于透 光槽21的直径，第一电极23的外径大于透光槽21的直径并为60um～1000um。第一电极23的外径不大于入光增透膜27的直径，光敏区22的内径不大于第一电极23的内径，光敏区22的外径不大于第一电极23的外径。光敏区22的内径不小于透光槽21的直径，光敏区22的外径不大于入光增透膜27的直径。
本发明提供的光电芯片的正面上还设有钝化膜29，钝化膜29位于顶层20与吸收层19相背的一表面。钝化膜29上开设有多个与分光监控单元的第一电极23一一对应的第一电极通孔，每个分光监控单元的第一电极23位于对应的第一电极通孔内。
本发明提供的光电芯片的工作原理为：通过第二电极26和每个分光监控单元的第一电极23给芯片加反向偏压，从而使得芯片工作。多束入射光从芯片背面的对应的入光增透膜27射入芯片内，每束入射光30的一部分31经过衬底17和缓冲层18后从对应的分光监控单元的透光槽21透射分出，这部分光可在保持高透过率的情况下穿过芯片，可继续进行光信号传输。每束入射光30的另一部分32经过衬底17和缓冲层18后进入到对应的分光监控单元的光电转换区内进行光电转换，从而产生光生电流，再经过其他一系列的外部电路和装置计算出相应的光功率并进行显示，从而实现对入射光光功率的监控。
每束入射光的光强一般呈高斯分布，即光强中间强、两侧弱，进而每束入射光的大部分光可通过透光槽21的内端射出，大部分的光可继续进行光信号的传输。每束入射光的小部分光才会进入到吸收层19进行光电转换。
每束入射光需要分出的光的比例根据具体实际需要确定，比如在本实施例中，每束入射光需要分出的光的比例为10％。在光链路安装时，可以利用检测元件检测通过对应的分光监控单元的透光槽21分出去的光的光功率，由于每束入射光的总的光功率是已知的(光源输出的总光功率已知，或者对总光功率单独进行测定)，从而确定分出去的光的比例是否满足需求。
如果满足需求，便可对光链路上的相关元器件进行固定。
如果不满足需求，可通过调整每束入射光的光源与芯片的距离，从而调整每束入射光分出去的光的比例。
每束入射光分出去的光的比例确定后，便可以利用每束光剩余的光射入到芯片吸收层19内进行光电转换，产生光电流，根据产生的光电流 计算出每束光剩余光的光功率，从而对每束入射光的光功率进行监控。可以认为，安装后的每束光的分光比已经确定，每束光进入到芯片内产生光电流的部分光的光功率可以直接表征出每个光源光功率的变化率，若后续需要每束入射光的总光功率实时变化值，可以选择根据实施例中的光电流计算出的每束光的光功率按分光比例换算得出。
本发明还提供一种光电芯片的制备方法的实施例，该制备方法用于制备上述任一实施例所述的背入射式阵列光电芯片，所述方法包括：
请参考图21，在衬底17上依次生长形成缓冲层18、吸收层19和顶层20；在本实施例中，可采用金属有机化合物化学气相沉积(Metal-organic Chemical Vapor Deposition，MOCVD)法或其他本领域可选用工艺。
可选择采用生长介质膜工艺或其他本领域可选用工艺，在芯片的正面上生长钝化膜29，即钝化膜29位于所述顶层20与所述吸收层19相背的一表面。具体地，生长介质膜工艺为等离子体增强化学的气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)，钝化膜29为厚度大于5000A的二氧化硅(SiO2)或厚度大于2000A的氮化硅(Si3N4)。
请参考图22，采用光刻腐蚀工艺，在钝化膜29上光刻腐蚀形成多个光敏区窗口33。
请参考图23，从每个光敏区窗口33在顶层20的多处掺杂P型材料，每处的P型材料扩散至吸收层19，形成多个光敏区22，并采用高温扩散工艺形成PN结；具体地，对顶层20进行P型材料掺杂采用扩散工艺，扩散源为磷化锌(Zn3P2)。
请参考图24，在芯片的正面制作多个第一电极23，每个第一电极23与对应的光敏区22相连接；具体地，采用电子束蒸发工艺制作第一电极23，第一电极23为钛铂金(TiPtAu)金属电极。
请参考图25，在芯片上开设出多个透光槽21，透光槽21向芯片正面的方向开口，多个透光槽21均贯穿吸收层19和顶层20，透光槽21内端位于缓冲层18；具体地，采用湿法腐蚀工艺或者干法刻蚀工艺腐蚀出透光槽21。
请参考图26，在每个透光槽21的内端生长出光增透膜28；具体地，采用等离子体增强化学的气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)芯片的正面生长增透膜，并进行光刻腐蚀，保留透 光槽21内端的增透膜，形成出光增透膜28。
对芯片的背面进行减薄抛光。
请参考图27，在芯片的背面生长多个入光增透膜27，每个入光增透膜27与一个分光监控单元相对应；具体地，在芯片的背面生长增透膜，并光刻形成多个入光增透膜27。
请参考图28，在芯片的背面制作第二电极26，并在第二电极26上开设多个用于设置入光增透膜27的第二电极通孔；具体地，采用电子束蒸发工艺制作第二电极26，第二电极26为镍金(NiAu)金属电极，并光刻形成多个第二电极通孔。
通过高温合金工艺降低芯片的接触电阻。
本发明提供的光电芯片设置了多个分光监控单元，每个分光监控单元又包括透光槽21和光敏区22。多束入射光射向芯片，每束入射光的一部分31从对应的分光监控单元的透光槽21透射分出，这部分光可通过透光槽21未经过吸收层19而无损穿过芯片，可继续进行光信号传输。每束入射光的另一部分32进入到对应的分光监控单元的光电转换区内进行光电转换，从而使得该芯片能够对多束入射光分别进行分光和光功率监控。进而使得使用该芯片的光路系统无需使用大量的光分路器，进而大大减小了光路系统的体积和成本。
需要说明的是，在本文中，诸如“第一”和“第二”等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上在说明书、附图以及权利要求中所提及的特征，只要在本发明内是有意义的，均可任意相互组合。针对按照本发明的样本分析系统所描述的特征和优点以相应的方式适用于按照本发明的样本分析方法，反之亦然。
以上所述仅是本发明的具体实施方式，使本领域技术人员能够理解或实现本发明。对这些实施例的多种修改对本领域的技术人员来说将是 显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下，在其它实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所申请的原理和新颖特点相一致的最宽的范围。

Claims (20)

  1. 一种光电芯片，为一种背入射式光电芯片，其特征在于，所述芯片上开设有分光槽，所述分光槽贯穿所述芯片的吸收层；
    所述芯片的背面为入光侧；所述分光槽用于将入射光的一部分透射分出，入射光的另一部分光进入到所述吸收层内进行光电转换。
  2. 根据权利要求1所述的芯片，其特征在于，还包括顶层，所述顶层位于所述吸收层的正面的一侧；所述分光槽向远离所述芯片背面的方向开口并贯穿所述顶层，所述芯片的光敏区形成于所述顶层；所述光敏区内端连接于所述吸收层，所述光敏区外端连接至所述芯片的第一电极；所述光敏区对应所述吸收层内进行光电转换的区域；所述第一电极位于所述芯片的正面。
  3. 根据权利要求2所述的芯片，其特征在于，还包括衬底，所述衬底位于所述吸收层的背面的一侧；所述芯片的背面还设有第二电极，所述第二电极设于所述衬底背面侧的表面外。
  4. 根据权利要求3所述的芯片，其特征在于，所述衬底和所述吸收层之间还设有缓冲层，所述分光槽的内端位于所述缓冲层。
  5. 根据权利要求2所述的芯片，其特征在于，所述芯片的背面设有入光增透膜，以所述入光增透膜增加入射率，所述入光增透膜的面积大于所述分光槽沿平行于所述芯片表面的横截面积。
  6. 根据权利要求4所述的芯片，其特征在于，所述分光槽的内端设有透光增透膜，以所述透光增透膜增加出射透光率。
  7. 根据权利要求5所述的芯片，其特征在于，所述第一电极和所述光敏区沿平行于所述芯片表面的方向上的横截面均呈圆环形，所述分光槽和所述入光增透膜均呈圆形；
    所述分光槽、所述第一电极、所述光敏区和所述入光增透膜均为同心圆，并且圆心对准误差小于20um；
    所述分光槽的直径为50um～250um；
    所述第一电极的内径不小于所述分光槽的直径，所述第一电极的外径大于所述分光槽的直径并为60um～1000um；
    所述光敏区的内径不小于所述分光槽的直径，所述光敏区的外径不大于所述入光增透膜的直径。
  8. 根据权利要求1所述的芯片，其特征在于，所述分光槽贯穿所述芯片的部分或全部。
  9. 一种光电芯片的制备方法，其特征在于，用于制备如权利要求1至8中任一项所述的芯片，所述方法包括：
    形成包括吸收层的芯片；
    在所述芯片上开设出分光槽，所述分光槽贯穿所述吸收层。
  10. 一种光电芯片的安装方法，用于安装如权利要求1至8中任一项所述的光电芯片，其特征在于，所述方法包括：
    将所述光电芯片相对光源进行预定位；
    检测经所述分光槽透射出的分光光功率，以此校正预定位后的所述芯片的分光比；
    若所述分光比符合预设值，则固定安装所述芯片和所述光源；
    若所述分光比与预设值不符合，则通过调整所述光源与所述芯片之间的距离，以将所述分光比调整至预设值。
  11. 一种光电芯片，为一种背入射式阵列光电芯片，其特征在于，所述芯片包括多个分光监控单元，每个所述分光监控单元包括透光槽和光敏区；所述透光槽向所述芯片任一表面的方向开口并贯穿所述芯片的吸收层，所述光敏区形成于所述芯片的顶层并一端连接至所述芯片的吸收层；所述吸收层内对应所述光敏区的区域为光电转换区；
    以所述芯片的背面为入光侧，多束入射光射向所述芯片；每束入射光的一部分从对应的所述分光监控单元的透光槽透射分出，每束入射光的另一部分进入到对应的所述分光监控单元的光电转换区内进行光电转换。
  12. 根据权利要求11所述的芯片，其特征在于，每个所述分光监控单元还包括第一电极，所述第一电极设于所述芯片的正面并与对应的所述光敏区的另一端相连接；
    多个所述分光监控单元的第一电极相互绝缘设置；
    所述芯片的背面上设有至少一个第二电极，所述第二电极与所述芯片的衬底相连接。
  13. 根据权利要求12所述的芯片，其特征在于，所述芯片正面的边缘上还设有多个与所述分光监控单元一一对应的电极焊盘，每个所述分光监控单元的第一电极通过对应一个电极连接线电连接至对应的所述电极焊盘；
    多个所述电极连接线之间相互绝缘设置；
    多个所述电极焊盘之间相互绝缘设置。
  14. 根据权利要求12所述的芯片，其特征在于，所述衬底与所述吸收层之间还设有缓冲层，所述透光槽向所述芯片正面的方向开口，所述透光槽还贯穿所述顶层并内端位于所述缓冲层。
  15. 根据权利要求11所述的芯片，其特征在于，相邻两个所述分光监控单元的中心间距大于100um且小于5000um。
  16. 根据权利要求13所述的芯片，其特征在于，相邻两个所述电极焊盘的中心间距大于30um且小于1000um；相邻两个所述电极连接线的间距大于5um。
  17. 根据权利要求11所述的芯片，其特征在于，所述透光槽贯穿所述芯片的部分或全部。
  18. 根据权利要求11所述的芯片，其特征在于，所述芯片的背面设有多个与所述分光监控单元一一对应的入光增透膜，每个所述入光增透膜的面积大于对应的所述分光监控单元的透光槽和光敏区分别沿平行于所述芯片表面方向的横截面积的总和。
  19. 根据权利要求14所述的芯片，其特征在于，所述透光槽的内端设有出光增透膜。
  20. 一种光电芯片的制备方法，其特征在于，用于制备如权利要求11至19中任一项所述的光电芯片，所述方法包括：
    形成吸收层和顶层；
    在所述顶层的多处掺杂P型材料，每处的所述P型材料扩散至所述吸收层，形成多个光敏区；
    在所述芯片上开出多个透光槽，多个所述透光槽均贯穿所述吸收层。
PCT/CN2019/114636 2018-12-25 2019-10-31 光电芯片、制备方法和安装方法 WO2020134537A1 (zh)

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