WO2020119200A1 - 单光子雪崩二极管及制作方法、探测器阵列、图像传感器 - Google Patents

单光子雪崩二极管及制作方法、探测器阵列、图像传感器 Download PDF

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WO2020119200A1
WO2020119200A1 PCT/CN2019/105778 CN2019105778W WO2020119200A1 WO 2020119200 A1 WO2020119200 A1 WO 2020119200A1 CN 2019105778 W CN2019105778 W CN 2019105778W WO 2020119200 A1 WO2020119200 A1 WO 2020119200A1
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photon avalanche
avalanche diode
type doped
doped region
illuminated
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PCT/CN2019/105778
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English (en)
French (fr)
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臧凯
李爽
马志洁
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深圳市灵明光子科技有限公司
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Priority to EP19895071.9A priority Critical patent/EP3896746B1/en
Publication of WO2020119200A1 publication Critical patent/WO2020119200A1/zh
Priority to US17/346,132 priority patent/US20210305440A1/en

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Definitions

  • the invention relates to the field of optoelectronics, in particular to a single-photon avalanche diode and its manufacturing method, detector array, and image sensor.
  • Image sensors are widely used in various electronic devices, such as digital cameras, mobile phones, medical imaging equipment, security inspection equipment, ranging cameras and so on. With the continuous advancement of semiconductor technology for manufacturing image sensors, image sensors are further developing towards low power consumption, miniaturization, and high integration.
  • the image sensor usually consists of a photodetector array.
  • Single photon avalanche diode (SPAD) is a photodetector that can be used in image sensors.
  • Single photon avalanche diodes can be used in a variety of industrial and academic applications, depth detection (including lidar), medical sensing, machine vision, gesture recognition, quantum science, and more. Its application forms include a single SPAD, silicon photomultiplier tube (SiPM) and SPAD array. SPAD, because its single single photon detector (SPAD) is a binary device, has only two states of "with output signal” and "without output signal”. In order to measure the intensity signal of light, it is actually used in depth detection fields such as lidar. The following are two typical manifestations:
  • Silicon photomultiplier tube which includes multiple SPAD subunits, the output terminals of all SPAD subunits are connected in parallel to output signals as a whole, but because there are multiple SPAD subunits, so Can realize the recognition of the signal light intensity.
  • SPAD array SPAD array
  • Each SPAD in the SPAD array is output as a single pixel, so that the image can be directly generated, which is suitable for flash lidar (Flash Lidar).
  • flash Lidar is an application scenario where the single photon detector has great potential. Its use scenario is shown in Figure 1.
  • the pulse signal F or modulated signal emitted by the laser source C passes through the lens D and is reflected by the object being measured.
  • SPAD detection array B receives, and the time control circuit A can accurately calculate the distance of the measured object according to the time interval between the transmission and the received signal.
  • FIG. 2 The schematic diagram of the cross-sectional structure of the front-illuminated image sensor is shown in FIG. 2.
  • the processing circuit since the processing circuit is located above the silicon detection layer, the incident light needs to pass through the metal wire before reaching the silicon detection layer (ie the photodiode 205) 202 and the circuit layer of dielectric material, incident light will be absorbed or scattered, resulting in low light detection efficiency.
  • the quenching circuit and the charging circuit of each SPAD unit occupy a large area, the fill factor of the SPAD unit is very low.
  • the problem of low fill factor will be more serious; and the low fill factor causes the detection efficiency of the silicon photomultiplier tube (SiPM) or SPAD array to decrease .
  • the cross-sectional structure of the back-illuminated image sensor is shown in Figure 3.
  • the back-side illumination (BSI) image sensor is a design that places the circuit layer under the detection layer, that is, the photodiode 205 is located in the circuit layer.
  • the schematic diagram of the specific cross-sectional structure of the back-illuminated SPAD is shown in FIG. 4, the left half of FIG. 4 illustrates the specific structure of the back-illuminated SPAD, and the right half of FIG.
  • FIG. 4 is an equivalent schematic diagram of the SPAD, where the top wafer G contains The backside illuminated SPAD array, the external circuit 410 is located in the bottom wafer H, the external circuit 410 includes a bias supply circuit or a signal processing circuit, the top wafer G and the bottom wafer H are connected by the oxide bonding layer 45, and the metal wires 47 is precisely aligned and connected through the through hole 46.
  • the front-illuminated SPAD it has the following advantages: 1.
  • the incident light directly reaches the detection layer, so that the absorption efficiency can be improved; 2.
  • the deep groove isolation structure 41 between the units can reduce the occurrence of crosstalk; 3. Since the circuit is provided in the lower layer, The fill factor of the photosensitive area of the SPAD is improved, and it can support complex circuits; 4.
  • the smaller pixel unit area makes the number of pixels per unit area higher, Improving imaging resolution, making a megapixel SPAD array possible; 6. Because the distance between the detection layer and the microlens (generally set on the surface of the SPAD) is closer, microlenses with a larger numerical aperture can be used in BSI SPAD, Improve the collection of incident light at large angles.
  • SPAD has the following deficiencies:
  • the silicon material has a low light absorption rate at a wavelength of 800-1000nm.
  • the current SPAD uses a planar structure, and photons enter the device layer vertically and propagate vertically.
  • the absorption efficiency of the photon is directly related to the thickness of the device layer (specifically follow 1-e - ⁇ L law, where ⁇ is the absorption efficiency and L is the absorption distance), the light absorption rate can be increased by increasing the thickness.
  • the excessively thick device layer requires a corresponding increase in the area of the SPAD, which reduces the number of cells per unit area, and the excessively thick device layer is difficult to process, has low yield, is not easily compatible with the CMOS process, and increases costs.
  • the use of thick silicon will increase the jitter time of SPAD, and a larger jitter time will reduce the accuracy of distance detection in lidar or other time-of-flight applications.
  • the angle of incident light received by the unit located at the edge of the array and converged by the lens is large, which may cause a decrease in absorption efficiency.
  • the silicon layer can be used as a resonant cavity, so that its absorption efficiency reaches a high value at a specific wavelength.
  • this method has many disadvantages: 1) when the actual processing thickness of the silicon layer deviates slightly from the design, the resonance frequency will shift; 2) it is very sensitive to the wavelength of the incident light, and absorption efficiency for light that deviates from the resonance frequency Large drop; 3) When the temperature changes, the slight change in the refractive index of the material will also cause the resonance frequency to shift; 4) Very sensitive to changes in the angle of incident light.
  • an object of the present invention is to provide a back-illuminated single-photon avalanche diode and a manufacturing method thereof to improve light absorption efficiency.
  • the second object of the present invention is to provide a photodetector array and an image sensor to improve the light absorption efficiency of the array and the sensor.
  • the present invention provides a back-illuminated single-photon avalanche diode.
  • the back-illuminated single-photon avalanche diode is provided with a substrate, a circuit layer, a silicon oxide layer, and a silicon detection layer in sequence from bottom to top.
  • the layer includes a first type doped region, a second type doped region, a third type doped region, and a sidewall reflective wall, the second type doped region or the third type doped region and the first A type doped region forms a multiplied junction, the third type doped region is a doped region with a varying doping concentration, and a light trapping structure is provided in the back-illuminated single-photon avalanche diode.
  • the upper surface of the back-illuminated single-photon avalanche diode is provided with an antireflection structure.
  • the antireflection structure is a film structure disposed above the silicon detection layer, and the film structure includes at least two thin films with different refractive indexes.
  • the light trapping structure and/or the antireflection structure is an inverted pyramid structure.
  • the light trapping structure is provided on the upper surface of the back-illuminated single photon avalanche diode and/or above the silicon oxide layer and/or below the silicon oxide layer.
  • the first type doped region is disposed above the silicon oxide layer, and the light trapping structure is provided in the first type doped region.
  • the back-illuminated single-photon avalanche diode further includes a microlens, and the microlens is disposed above the silicon detection layer.
  • the second type doped region is disposed above the first type doped region
  • the third type doped region includes the second type doped region
  • the third type doped region The doping concentration increases from bottom to top.
  • the first type doped region is an n-type doped region
  • the second type doped region and the third type doped region are p-type doped regions; or, the first type doped region It is a p-type doped region, and the second and third type doped regions are n-type doped regions.
  • the light trapping structure is a nano-level or micro-level concave-convex structure.
  • the distribution method of the concave-convex structure includes a square close-packed distribution, a hexagonal close-packed distribution, or an irregular distribution.
  • the side wall reflecting wall is a deep trench isolation structure
  • the deep trench isolation structure penetrates the silicon detection layer in a thickness direction
  • the deep trench isolation structure reflects the incident light back and forth.
  • the deep trench isolation structure is filled with silicon oxide, amorphous silicon, polycrystalline silicon, or metal.
  • the back-illuminated single photon avalanche diode further includes at least two external electrodes.
  • the external electrodes are used to read signals and/or apply voltage, and the external electrodes are connected to the silicon detection layer.
  • the back-illuminated single-photon avalanche diode includes a first external electrode, a second external electrode, and a quenching resistor, and the first external electrode is electrically connected to the first-type doped region through the quenching resistor ,
  • the second external electrode is electrically connected to the third type doped region; or, the first external electrode is electrically connected to the third type doped region through the quenching resistance, and the second externally applied electrode The electrode is electrically connected to the first type doped region.
  • the back-illuminated single-photon avalanche diode includes a first external electrode, a second external electrode and a quenching resistor, the first external electrode is electrically connected to the first type doped region, and the second external The electrode is electrically connected to the third type doped region through the quenching resistance; or, the first external electrode is electrically connected to the third type doped region, and the second external electrode passes through the quenching The resistor is electrically connected to the first type doped region.
  • the back-illuminated single photon avalanche diode includes a first external electrode, a second external electrode and a quenching resistor, the deep trench isolation structure is filled with amorphous silicon, polycrystalline silicon or metal, and the first external electrode Electrically connected to the first type doped region through the quenching resistance, the second external electrode is electrically connected to the deep trench isolation structure; or, the first external electrode is connected to the The deep trench isolation structure is electrically connected, and the second external electrode is electrically connected to the first type doped region.
  • the back-illuminated single photon avalanche diode includes a first external electrode, a second external electrode and a quenching resistor, the deep trench isolation structure is filled with amorphous silicon, polycrystalline silicon or metal, and the first external electrode Electrically connected to the first type doped region, the second external electrode is electrically connected to the deep trench isolation structure through the quenching resistor; or, the first external electrode is electrically connected to the deep trench isolation structure Connected, the second external electrode is electrically connected to the first type doped region through the quenching resistance.
  • the present invention provides a photodetector array including a plurality of back-illuminated single-photon avalanche diodes distributed in an array.
  • the present invention provides an image sensor, including a control circuit, a readout circuit, and a plurality of the back-illuminated single-photon avalanche diodes, the output terminal of the control circuit and the back-illuminated single-photon avalanche diode The input of the back-illuminated single-photon avalanche diode is connected to the input of the readout circuit.
  • the present invention provides a method for manufacturing a back-illuminated single-photon avalanche diode, which is applied to the back-illuminated single-photon avalanche diode and includes the following steps:
  • a photodiode is fabricated on a silicon wafer to obtain a first wafer, and a first light trapping structure is provided on one surface of the photodiode;
  • a second light trapping structure is fabricated on the silicon wafer.
  • the back-illuminated single-photon avalanche diode of the present invention is provided with a light trapping structure and a side wall reflecting wall. After incident light is reflected, scattered, and refracted by the light trapping structure, it is dispersed to various angles.
  • a method for manufacturing a back-illuminated single-photon avalanche diode realizes the manufacture of a back-illuminated single-photon avalanche diode, wherein the back-illuminated single-photon avalanche diode has a first light-trapping structure and a first The two light trapping structure can improve the light absorption efficiency of the back-illuminated single photon avalanche diode.
  • the photodetector array and the image sensor including the back-illuminated single-photon avalanche diode improve the light absorption efficiency of the photodetector array and the image sensor due to the back-illuminated single-photon avalanche diode.
  • the present invention is also provided with an antireflection structure on the upper surface of the back-illuminated single-photon avalanche diode to increase the transmittance of light, reduce the refractive index of light, and increase the amount of light entering the back-illuminated single-photon avalanche diode. Improve its light absorption efficiency.
  • Figure 1 is a schematic diagram of lidar ranging
  • FIG. 2 is a schematic diagram of a cross-sectional structure of a front-illuminated image sensor
  • FIG. 3 is a schematic diagram of a cross-sectional structure of a back-illuminated image sensor
  • FIG. 4 is a schematic diagram of a specific cross-sectional structure of a back-illuminated SPAD
  • FIG. 5 is a schematic cross-sectional structure diagram of a first embodiment of a back-illuminated single-photon avalanche diode of the present invention
  • FIG. 6 is a schematic diagram of the working principle of the back-illuminated single photon avalanche diode of FIG. 5;
  • FIG. 7 is a schematic diagram of photon detection efficiency with or without a light trapping structure
  • FIG. 8 is a schematic cross-sectional structure diagram of a second embodiment of a back-illuminated single-photon avalanche diode in the present invention.
  • FIG. 9 is a schematic cross-sectional structure diagram of a specific embodiment of a deep trench isolation structure of an image sensor in the present invention.
  • FIG. 10 is a schematic cross-sectional view of a third embodiment of a back-illuminated single-photon avalanche diode of the present invention.
  • FIG. 11 is a schematic diagram of photon detection efficiency of a specific embodiment of a back-illuminated single-photon avalanche diode in the present invention.
  • FIG. 12 is a schematic cross-sectional structure diagram of a specific embodiment of a back-illuminated single-photon avalanche diode in the present invention.
  • 13a, 13b, and 13c are schematic diagrams of a specific embodiment of the shape and arrangement of the light trapping structure of a back-illuminated single-photon avalanche diode in the present invention.
  • FIG. 14 is a schematic cross-sectional structural view of a specific embodiment of the antireflection structure of a back-illuminated single-photon avalanche diode in the present invention.
  • FIG. 15 is a schematic diagram of the transmittance of the anti-reflection structure of FIG. 14 to light incident perpendicularly;
  • FIG. 16 is a schematic diagram of the transmittance of the antireflection structure of FIG. 14 to light rays with different incidence angles;
  • FIG. 17 is a schematic diagram of the photon detection efficiency of the antireflection structure of FIG. 14;
  • FIG. 18 is a schematic cross-sectional structure diagram of a fourth embodiment of a back-illuminated single-photon avalanche diode of the present invention.
  • 19 is a schematic cross-sectional structure diagram of a fifth embodiment of a back-illuminated single-photon avalanche diode of the present invention.
  • FIG. 20 is a schematic structural view of a specific embodiment of an image sensor in the present invention.
  • 21 is a schematic flowchart of a specific embodiment of a method for manufacturing a back-illuminated single-photon avalanche diode in the present invention.
  • a back-illuminated single-photon avalanche diode is provided with a substrate, a circuit layer, a silicon oxide layer and a silicon detection layer in sequence from bottom to top.
  • the silicon detection layer includes a first type doped region and a second A type doped region, a third type doped region and a sidewall reflection wall, the second type doped region or the third type doped region forms a multiplied junction with the first type doped region, and the third type doped region is In a doped region with a varying doping concentration, a light trapping structure is provided in the back-illuminated single-photon avalanche diode. Further, the upper surface of the back-illuminated single-photon avalanche diode is also provided with an antireflection structure.
  • the back-illuminated single-photon avalanche diode is provided with a light trapping structure and a side wall reflecting wall, the incident light is dispersed, scattered, and reflected at various angles after being reflected, scattered, and refracted by the light trapping structure.
  • the effective optical path of light in back-illuminated single-photon avalanche diodes can significantly increase the absorption efficiency of near-infrared light without increasing the thickness of the silicon layer, overcoming the low light absorption efficiency of SPAD in the prior art Technical problem; it does not need to depend on the increase of the thickness of the silicon layer to improve the light absorption efficiency, so it will not cause the increase of the jitter time, nor will it increase the difficulty, cost and defective rate of the processing of the detector silicon.
  • the first type doped region is an n-type doped region
  • the second type doped region and the third type doped region are p-type doped regions, or the first type doped region is p
  • the type doped region, the second type doped region and the third type doped region are n-type doped regions.
  • FIG. 5 is a schematic cross-sectional structure diagram of a first embodiment of a back-illuminated single-photon avalanche diode in the present invention.
  • the substrate is a carrier silicon substrate 10, and the first type doped region 6 is provided.
  • the second type doped region 7 is disposed above the first type doped region 6 and forms a multiplied junction 12 (ie, an avalanche region) therewith, and the third type doped region 8 is disposed in the second Above the type doped region 7 and surrounding the first type doped region 6; this can inherit the advantages of the back-illuminated single photon avalanche diode and further improve its light absorption efficiency.
  • Example 2 Based on the further improvement of Example 1, Example 2, is obtained.
  • the light trapping structure is provided on the upper surface of the back-illuminated single photon avalanche diode and/or above the silicon oxide layer and/or below the silicon oxide layer, and the light trapping structure on the upper surface 3.
  • the light trapping structure above the silicon oxide layer or the light trapping structure below the silicon oxide layer can be individually arranged to improve the light absorption efficiency of the back-illuminated SPAD, and can also be used in combination.
  • the light-trapping structure is a nano- or micro-level concave-convex structure, for example, the light-trapping structure may be an inverted pyramid structure 1 (refer to FIG. 10) or a shallow trench structure 20 (as shown in FIG.
  • the shallow trench structure 20 It is set on the upper surface of SPAD), or the surface is a honeycomb surface, sinusoidal grating textured surface, dimple-shaped ordered surface, periodic pyramid structure surface or two-dimensional grating surface.
  • the material of the light trapping structure may be various insulating dielectric materials, which are made of silicon oxide in this embodiment. Referring to FIGS. 13a, 13b and 13c, the shape of the concave-convex structure may be square (as a small square in FIG. 13a), circular (as a circle in FIG. 13b) or polygonal (as a small octagon in FIG.
  • the arrangement of the concave-convex structure can be uniform or non-uniform (that is, irregular distribution), and the uniform arrangement can be divided into four-sided close-packed distribution (such as the square distribution in Figure 13a) or six-sided close-packed distribution (such as The hexagonal distribution shown in FIGS. 13b and 13c) can be a columnar array (nano-pillar array) (see FIGS. 13a and 13b) or a complementary nano-hole array (see FIG. 13c).
  • FIG. 5 is a schematic diagram of a cross-sectional structure of a first embodiment of a back-illuminated single-photon avalanche diode in the present invention
  • FIG. 6 is a schematic diagram of the working principle of the back-illuminated single-photon avalanche diode of FIG. 5
  • the sidewall reflecting wall is a deep trench isolation structure.
  • the deep trench isolation structure penetrates the silicon detection layer in the thickness direction.
  • the deep trench isolation structure reflects back and forth the incident light.
  • the deep trench isolation structure includes a sidewall insulation layer and a sidewall insulation layer In the formed filling cavity 3, the sidewall insulating layer is an oxide layer 2.
  • the filling cavity 3 is filled with silicon oxide, amorphous silicon, polycrystalline silicon, or metal, preferably a metal with better conductivity.
  • the light trapping structure above the silicon oxide layer 11 is a diffraction grating light trapping structure 9, specifically, the diffraction grating light trapping structure 9 is a shallow trench structure; in addition, the first type doped region 6 is provided in silicon oxide Above the layer 11, the diffraction grating light trapping structure 9 is arranged in the first type doped region 6.
  • the back-illuminated SPAD also contains a light trapping structure on the upper surface (ie, inverted pyramid structure 1).
  • the light trapping structure on the upper surface and the light trapping structure above the silicon oxide layer 11 form a composite light trapping structure.
  • the inverted pyramid structure 1 placed on the upper surface of the SPAD can form a gently gradual change in the refractive index between the air and the silicon layer, greatly reducing the high reflectivity caused by the sudden change in the refractive index at the interface, so as to make more More light enters the back-illuminated single-photon avalanche diode, which improves the transmittance of incident light and enhances the transmission.
  • This feature is broadband and does not target a specific wavelength.
  • the incident light passes through the inverted pyramid structure 1 on the upper surface, the incident light will be dispersed to various angles by reflection, scattering, refraction, etc., increasing the effective optical path of the light in the detector and acting as a trapped light , Thereby improving the absorption efficiency of light in the back-illuminated single-photon avalanche diode.
  • the bottom surface of the back-illuminated SPAD is structured as a light trapping structure of the diffraction grating, that is, the light trapping structure 9 of the diffraction grating, which can diffract vertically incident light to a certain angle, combined with the reflection effect of the deep groove isolation structure, so that the light is in The back and forth reflection in the silicon layer further improves the light absorption efficiency of SPAD.
  • part of the incident light that vertically enters the back-illuminated single-photon avalanche diode interacts with the diffraction grating light trapping structure 9, and the resulting diffracted light has a horizontal component, which is reflected by the deep groove isolation structure to make The light is reflected back and forth in the silicon matrix of SPAD, which increases the effective optical path and improves the absorption rate.
  • the absorption rate of light in the silicon layer can approach its theoretical limit Yablonovitch limit.
  • the back-illuminated SPAD can effectively improve the light absorption efficiency by setting a composite light trapping structure. Referring to FIG. 7, FIG.
  • FIG. 7 is a schematic diagram of the photon detection efficiency with and without light trapping structure; through simulation, the absorption efficiency of the SPAD unit with and without light trapping structure can be calculated.
  • the absorption efficiency in the 850nm to 960nm band is in the range of 5% to 20%, and the absorption rate at the 905nm wavelength, which is the focus of the application, is about 15%, compared with
  • the back-illuminated single-photon avalanche diode with a compound light-trapping structure see Figure 5
  • its overall absorption efficiency for light from 850 to 960nm has been greatly improved.
  • the absorption efficiency has been greatly increased to 38% Compared with the SPAD without light trapping structure, the light absorption efficiency is significantly improved.
  • FIG. 8 is a schematic diagram of a cross-sectional structure of a second embodiment of a back-illuminated single-photon avalanche diode of the present invention
  • the light trapping structure (such as the diffraction grating trapping structure 9 in FIG. 8) can also be processed in oxidation Under the silicon layer 11, in principle, it can also play the role of trapping light to enhance the absorption efficiency.
  • an inverted pyramid structure 1 is also provided on the upper surface of the SPAD. The combination of the upper and lower light trapping structures makes the light trapping effect better.
  • the back-illuminated single-photon avalanche diode further includes at least two external electrodes.
  • the back-illuminated single-photon avalanche diode includes a first external electrode 17, a second external electrode 18 and a quenching resistor 5.
  • the first external electrode 17 is electrically connected to the first type doped region 6 through the quenching resistor 5
  • the second external electrode 18 is electrically connected to the third type doped region 8; or, the first external electrode 17 is electrically connected to the third type doped region 8 through the quenching resistor 5, and the second external electrode 18 is doped to the first type Miscellaneous area 6 is electrically connected.
  • the quenching resistor 5 can also be connected to the second external electrode 18, the first external electrode 17 is electrically connected to the first type doped region 6, and the second external electrode 18 passes through the quenching resistor 5 and the third type doped region 8 Or, the first applied electrode 17 is electrically connected to the third type doped region 8, and the second applied electrode 18 is electrically connected to the first type doped region 6 through the quenching resistor 5. Referring to FIG. 9, FIG.
  • FIG. 9 is a schematic sectional view of a specific embodiment of a deep trench isolation structure of an image sensor of the present invention; when the deep trench isolation structure is filled with conductive amorphous silicon, polysilicon, or metal, back-illuminated
  • the first external electrode 17 of the single-photon avalanche diode is electrically connected to the first type doped region 6 through the quenching resistor 5, and the second external electrode 18 is electrically connected to the deep trench isolation structure.
  • the first external electrode 17 is electrically connected to the deep trench isolation structure through the quenching resistor 5, and the second external electrode 18 is electrically connected to the first type doped region 6.
  • the quenching resistor 5 can also be connected to the second external electrode 18, the first external electrode 17 is electrically connected to the first type doped region 6, and the second external electrode 18 is electrically connected to the deep trench isolation structure through the quenching resistor 5 Or, the first external electrode 17 is electrically connected to the deep trench isolation structure, and the second external electrode 18 is electrically connected to the first type doped region 6 through the quenching resistor 5.
  • FIG. 10 is a schematic diagram of a cross-sectional structure of a third example of a back-illuminated single-photon avalanche diode in the present invention; light-trapping structure and/or antireflection structure
  • the inverted pyramid structure 1 has both light trapping and antireflection effects.
  • the inverted pyramid structure 1 is provided on the upper surface of the back-illuminated SPAD (that is, above the third type doped region 8),
  • the inverted pyramid structure 1 is obtained by etching silicon substrate and filling it with silicon oxide.
  • an insulating dielectric protection layer 13 is provided above the inverted pyramid structure 1 to protect the SPAD.
  • the inverted pyramid structure 1 provided on the upper surface of the SPAD can form a gently gradual refractive index change between the air and the silicon layer, greatly reducing the original high reflectivity at the interface due to the sudden change of the refractive index, so as to make more More light enters the back-illuminated single-photon avalanche diode, which improves the transmittance of incident light and enhances the transmission.
  • This feature is broadband and does not target a specific wavelength.
  • the incident light passes through the inverted pyramid structure 1 on the upper surface, the incident light will be dispersed to various angles by reflection, scattering, refraction, etc., increasing the effective optical path of the light in the detector and acting as a trapped light , Thereby improving the absorption efficiency of light in the back-illuminated single-photon avalanche diode.
  • FIG. 10 a schematic diagram of the photon detection efficiency of FIG. 11 is obtained through simulation. According to the simulation results, the inverted pyramid structure 1 on the upper surface makes the SPAD have excellent light absorption efficiency and light absorption efficiency. Generally above 0.25.
  • Example 4 is obtained.
  • the antireflection structure is a film structure disposed above the silicon detection layer, and the film structure includes at least two thin films with different refractive indexes.
  • the anti-reflection coating is an anti-reflection coating (anti-reflection coating) with excellent anti-reflection effect obtained by coating multiple layers of materials with different refractive indexes on the upper surface of BSI SPAD. At 100% transmittance, it completely reflects incident light outside the selected wavelength band. Referring to FIG. 14, FIG.
  • the anti-reflection film 19 includes two film materials with different refractive indexes (ie, the first Membrane material 191 and second membrane material 192), the first membrane material 191 is silicon dioxide, and the second membrane material 192 is silicon nitride.
  • the light transmittance and photon detection efficiency of the anti-reflection film 19 are shown in Figure 15, Figure 16, and Figure 17, it can be seen that the antireflection structure of Figure 14 has a strong selectivity for the wavelength of incident light, as shown in Figure 15 As shown, in the 890nm to 910nm, the transmittance can be close to 1, for incident light outside this range, the transmittance is close to 0, this feature can effectively reduce the noise caused by ambient background light.
  • the anti-reflection film has different response characteristics to different wavelengths and incident angles. The simulation results are shown in FIG. 16.
  • the 14 also uses a combination of the antireflection structure on the upper surface (ie, the antireflection film 19) and the light trapping structure on the lower surface (ie, the diffraction grating trapping structure 9) to more effectively improve the BSI The light absorption efficiency of SPAD.
  • the antireflection structure provided on the upper surface of the SPAD can also be combined with the light trapping structure (such as an inverted pyramid structure) on the upper surface of the SPAD to achieve the improvement of the light absorption efficiency of the back-illuminated SPAD.
  • FIG. 18 is a schematic diagram of a cross-sectional structure of a fourth embodiment of a back-illuminated single-photon avalanche diode in the present invention; the back-illuminated single-photon avalanche diode further includes a microlens 21, and the microlens 21 is disposed on the silicon detection layer Above.
  • an insulating dielectric protection layer 13 is further provided on the silicon detection layer, and the microlens 21 is added on the insulating dielectric protection layer 13; in addition, in this embodiment, the microlens 21 is also combined with a diffraction grating on the lower surface to trap light Structure 9 to further improve light absorption efficiency.
  • FIG. 19 is a schematic diagram of a cross-sectional structure of a fifth embodiment of a back-illuminated single-photon avalanche diode of the present invention; it has both upper and lower light-trapping structures (ie, inverted pyramid structure 1 and diffraction grating light-trapping structure 9 ) Is covered with a micro lens 21 on the SPAD, which can further improve its collection efficiency for incident light at a large angle.
  • upper and lower light-trapping structures ie, inverted pyramid structure 1 and diffraction grating light-trapping structure 9
  • the second type doping region 7 is disposed above the first type doping region 6, and the third type doping region 8 includes the second type doping region 7, the third type doping
  • the doping concentration of the region 8 gradually increases from bottom to top. More specifically, the second type doping region 7 is disposed in the middle and lower part of the third type doping region 8, that is, the second type doping region 7 is located in the third type doping Below the center of the miscellaneous area 8.
  • the doping concentration of the third type doping region 8 near the multiplication junction 12 (multiplication region or avalanche region) of the SPAD (as shown by the dotted frame in FIG. 5) is low.
  • the miscellaneous distribution can reduce the width of the guard ring and collect the absorbed photo-generated carriers (photo-generated carriers) to the avalanche area, thereby improving the detection efficiency of the SPAD photosensitive area.
  • the protective ring refers to an area around the avalanche area in SPAD, which can prevent the avalanche from occurring at the edge (edge breakdown).
  • a too large guard ring will reduce the fill factor of SPAD.
  • the BSI SPAD of the present invention due to the antireflection structure, microlens, and light trapping structure on the upper and lower surfaces, has a high tolerance for the inevitable deviations in processing thickness, temperature, wavelength, and incident angle that are unavoidable in practice. It is more suitable for the working environment and actual use of SPAD-based systems (such as lidar).
  • a photodetector array which includes a plurality of back-illuminated single photon avalanche diodes distributed in an array, and the photodetector array includes a SiPM or SPAD array.
  • the back-illuminated SPAD is provided with a light trapping structure, an antireflection structure and a micro lens to improve the light absorption efficiency of the back-illuminated SPAD, and a deep groove isolation structure is also provided between the back-illuminated SPAD to avoid crosstalk, which can improve photoelectric detection
  • the receiving end of the lidar has low cost, high yield, and is easier to mass-produce; the subunits on the edge will respond better; the wavelength of the light source of the lidar has a phenomenon of thermal drift.
  • Back-illuminated SPAD can improve the absorption efficiency in a wider band, thereby reducing the impact of light source wavelength drift on lidar performance.
  • FIG. 20 is a schematic structural diagram of a specific embodiment of an image sensor in the present invention.
  • an image sensor includes a control circuit J, a readout circuit K, and is composed of multiple back-illuminated single-photon avalanche diodes.
  • the array namely the back-illuminated SPAD array I, the back-illuminated SPAD array I includes an array-distributed back-illuminated SPAD, and the back-illuminated SPAD includes a quenching resistance L.
  • the back-illuminated single photon avalanche diodes are separated by a sidewall reflective wall such as a deep trench isolation structure, and the output end of the control circuit J and the input of the back-illuminated single photon avalanche diode Is connected to the terminal, and the output terminal of the back-illuminated single photon avalanche diode is connected to the input terminal of the readout circuit K.
  • the back-illuminated single-photon avalanche diodes are separated by a deep trench isolation structure to ensure that cross-talk does not occur between the back-illuminated single-photon avalanche diodes; the back-illuminated single-photon avalanche diodes also include a fourth type doped region 4
  • the fourth type doped region 4 may be n++ type doped or p++ type doped.
  • the first type doped region 6 is an n type doped region
  • the fourth type doped region 4 is p++ type doped
  • the fourth type doped region 4 is an n++ type doped region.
  • the image sensor including the back-illuminated single-photon avalanche diode has an improved light absorption efficiency due to the back-illuminated single-photon avalanche diode.
  • a method for manufacturing a back-illuminated single-photon avalanche diode is applied to the back-illuminated single-photon avalanche diode.
  • the inverted pyramid structure with an upper surface and a diffraction grating with a lower surface are trapped.
  • the back-illuminated single-photon avalanche diode with a composite light-trap structure composed of light structures is described as an example.
  • FIG. 21 which is a schematic flow chart of a specific embodiment of a method for manufacturing a back-illuminated single-photon avalanche diode in the present invention. ; Includes the following steps:
  • a photodiode is fabricated on the epitaxially grown silicon wafer by the common process of SPAD to obtain the first wafer 16, and a first light-trapping structure is provided on one surface of the photodiode.
  • a first light-trapping structure is made, and the first light-trapping structure is a diffraction grating light-trapping structure 9.
  • the external circuit 14 is provided in the second wafer, and the external circuit 14 includes a bias supply circuit or The signal processing circuit can be aligned mechanically or optically, and bonded by a polymer adhesive or oxide. Turn the bonded wafer over so that the silicon wafer of the first wafer 16 is located above, as shown in the third picture in FIG. 21.
  • the silicon wafer of the first wafer 16 is polished and etched to reduce its thickness; specifically, the original silicon wafer with a thickness of about 1 mm is thinned to about 50 um by mechanical polishing, and then it is chemically etched. The thickness is reduced to 5um.
  • the second light trapping structure is an inverted pyramid structure 1.
  • an insulating dielectric protection layer 13 is plated on the inverted pyramid structure 1.
  • a method for manufacturing a back-illuminated single-photon avalanche diode realizes the manufacture of a back-illuminated single-photon avalanche diode.
  • the manufacturing method is simple, and there is no need to increase the thickness of the silicon layer, so the processing difficulty is not increased.
  • the back-illuminated single-photon avalanche The avalanche diode has a composite light-trapping structure composed of a first light-trapping structure and a second light-trapping structure, which can improve the light absorption efficiency of the back-illuminated single-photon avalanche diode.
  • the micro lens can be coated with an insulating dielectric protective layer on the back-illuminated single-photon avalanche diode. After that, it is sufficient to add a microlens on the insulating dielectric protection layer.

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Abstract

一种单光子雪崩二极管及制作方法、探测器阵列、图像传感器，其中，背照式单光子雪崩二极管设置有陷光结构（1,9,20）和侧壁反射墙（206），入射光经过陷光结构（1,9,20）反射、散射、折射后被分散到各个角度，加上侧壁反射墙（206）的反射作用，可以延长光在背照式单光子雪崩二极管中的有效光程，从而提高了光在背照式单光子雪崩二极管中的吸收效率；一种背照式单光子雪崩二极管的制作方法，实现了背照式单光子雪崩二极管的制作。而包含背照式单光子雪崩二极管的光电探测器阵列和图像传感器，由于具有背照式单光子雪崩二极管，有效提高了光电探测器阵列和图像传感器的光吸收效率。

Description

单光子雪崩二极管及制作方法、探测器阵列、图像传感器 技术领域
本发明涉及光电领域，尤其是一种单光子雪崩二极管及制作方法、探测器阵列、图像传感器。
背景技术
图像传感器被广泛应用于各种电子设备中，如数码相机，手机，医疗成像设备，安检设备，测距相机等等。随着制造图像传感器的半导体技术不断进步，图像传感器正在进一步向低功耗，小型化，高度集成的方向发展。图像传感器通常由光电探测器阵列组成。单光子雪崩二极管(SPAD)是在图像传感器中可以使用的一种光电探测器。
单光子雪崩二极管(SPAD)可用于多种工业界与学术界的应用，深度探测(包括激光雷达)，医疗感应，机器视觉，手势识别，量子科学等等。其应用形式包括单个SPAD，硅光倍增管(SiPM)以及SPAD阵列。SPAD由于其单个的单光子探测器(SPAD)是个二进制器件，只有“有输出信号”和“没有输出信号”两个状态，为了测量光的强度信号，所以实际在激光雷达等深度探测领域中使用的是如下两种典型的表现形式：
(1)硅光倍增管(SiPM)，其包括多个SPAD子单元，所有的SPAD子单元的输出端子(port)并联在一起，作为一个整体输出信号，但由于有多个SPAD子单元，所以可以实现对信号光强度的识别。
(2)SPAD阵列(SPAD array)。SPAD阵列中的每一个SPAD作为一个像素单独输出，从而可以直接生成影像，适用于快闪激光雷达(Flash Lidar)。激光雷达是单光子探测器具有极大潜力的一个应用场景，其使用场景如图1所示，由激光源C发射出的脉冲信号F或调制后的信号经过透镜D之后被测物体反射后被SPAD探测阵列B接收，时间控制电路A根据发射到接收到信号之间的时间间隔，可以准确计算出被测物体的距离。
前照式图像传感器的截面结构示意图如图2所示，在光学上，由于处理电路位于硅探测层的上方，入射光在到达硅探测层(即光电二极管205)前需要穿过布满金属导线202和介质材料的电路层，入射光会被吸收或散射，导致光探测效率低下。另外，由于每个SPAD单元的淬灭电路和充电电路占据较大面积，使得SPAD单元的填充因子很低。当尝试在SPAD单元的电路上引入其它功能，如计数，采样，压缩等时，低填充因子的问题会更加严重；而低填充因子导致了硅光倍增管(SiPM)或SPAD阵列的探测效率下降。
而背照式图像传感器的截面结构如图3所示，背侧照明式(back side illumination,BSI)图像传感器是一种将电路层置于探测层之下的设计，即光电二极管205位于电路层之上。背照式SPAD的具体截面结构示意图如图4所示，图4的左半部分示意了背照式SPAD的具体结构，图4的右半部分为SPAD的等效示意图，其中，顶部晶片G包含背侧照明式SPAD阵列，外 接电路410位于底部晶片H之中，外接电路410包括偏压提供电路或者信号处理电路，顶部晶片G和底部晶片H由氧化物键合层45实现连接，且金属线47精确对准并通过通孔46相连接。其相对于前照式SPAD具有以下优点：1.入射光直达探测层，使得吸收效率得以提高；2.单元之间的深槽隔离结构41可以减少串扰的发生；3.由于电路设置在下层，使得SPAD感光面积的填充因子得以提高，且可以支持复杂的电路；4.在加工流程中金属材料带来的污染得以避免；5.像素单元面积更小，使得单位面积内的像素数量更高，提高成像分辨率，使百万像素的SPAD阵列成为可能；6.由于探测层与微透镜(一般设置在SPAD表面)的距离更近，因此在BSI SPAD中可以使用数值孔径更大的微透镜，提高对大角度入射光的收集。
然而SPAD存在以下不足：
(1)硅材料对于波长在800-1000nm的光吸收率较低，目前的SPAD采用的是平面结构，光子垂直进入器件层并垂直传播，光子的吸收效率与器件层的厚度成正相关(具体遵循1-e -αL定律，其中α为吸收效率，L为吸收距离)，则可以通过增加厚度来提高光吸收率。然而过厚的器件层要求SPAD的面积也相应增大，降低了单位面积内的单元个数，且过厚器件层的加工难度大，成品率低，不易于与CMOS工艺兼容，提高了成本。另外，采用厚硅会增加SPAD的抖动时间，而更大的抖动时间会降低激光雷达或其它基于飞行时间的应用中距离探测的精确度。
(2)通过在SPAD的平面结构表面上增加抗反射膜来提高光的入射率，但其增透效果会随着入射角的增大而降低，导致入射光子的吸收效率降低。
(3)对于SPAD成像阵列，位于阵列边缘位置的单元所接收到的经过透镜会聚的入射光角度较大，可能导致吸收效率的降低。
(4)在平面的BSI SPAD中，对于某些特定波长，硅层可以作为一个共振腔，使其吸收效率在特定波长达到很高的数值。然而此种方法存在许多缺点：1)当硅层的实际加工厚度与设计有轻微偏差时，共振频率会发生偏移；2)对于入射光的波长非常敏感，对于偏离共振频率的光，吸收效率大幅下降；3)当温度变化时，由于材料折射率的细微变化也会导致共振频率的偏移；4)对于入射光角度的变化非常敏感。
发明内容
本发明旨在至少在一定程度上解决相关技术中的技术问题之一。为此，本发明的一个目的是提供一种背照式单光子雪崩二极管及其制作方法，提高光吸收效率。
为此，本发明的第二个目的是提供一种光电探测器阵列、图像传感器，提高阵列和传感器的光吸收效率。
本发明所采用的技术方案是：
第一方面，本发明提供一种背照式单光子雪崩二极管，所述背照式单光子雪崩二极管由下至上依次设置有衬底、电路层、氧化硅层和硅探测层，所述硅探测层包括第一类型掺杂区、第二类型掺杂区、第三类型掺杂区和侧壁反射墙，所述第二类型掺杂区或者所述第三类型掺 杂区与所述第一类型掺杂区形成倍增结，所述第三类型掺杂区为掺杂浓度变化的掺杂区，所述背照式单光子雪崩二极管中设置有陷光结构。
进一步地，所述背照式单光子雪崩二极管的上表面设置有增透结构。
进一步地，所述增透结构为设置在所述硅探测层上方的膜结构，所述膜结构包括至少两种折射率不同的薄膜。
进一步地，所述陷光结构和/或所述增透结构为倒金字塔结构。
进一步地，所述陷光结构设置在所述背照式单光子雪崩二极管的上表面和/或所述氧化硅层的上方和/或所述氧化硅层的下方。
进一步地，所述第一类型掺杂区设置在所述氧化硅层的上方，所述陷光结构设置在所述第一类型掺杂区中。
进一步地，所述背照式单光子雪崩二极管还包括微透镜，所述微透镜设置在所述硅探测层的上方。
进一步地，所述第二类型掺杂区设置在所述第一类型掺杂区的上方，所述第三类型掺杂区包含所述第二类型掺杂区，所述第三类型掺杂区的掺杂浓度由下至上升高。
进一步地，所述第一类型掺杂区为n型掺杂区，所述第二类型掺杂区和第三类型掺杂区为p型掺杂区；或者，所述第一类型掺杂区为p型掺杂区，所述第二类型掺杂区和第三类型掺杂区为n型掺杂区。
进一步地，所述陷光结构为纳米级或微米级的凹凸结构。
进一步地，所述凹凸结构的分布方式包括四方密排分布、六方密排分布或者无规则分布。
进一步地，所述侧壁反射墙为深槽隔离结构，所述深槽隔离结构沿厚度方向贯穿所述硅探测层，所述深槽隔离结构对射来的光线进行来回反射。
进一步地，所述深槽隔离结构中填充有氧化硅、无定形硅、多晶硅或金属。
进一步地，所述背照式单光子雪崩二极管还包括至少两个外加电极，所述外加电极用于读取信号和/或施加电压，所述外加电极与所述硅探测层连接。
进一步地，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述第一外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接，所述第二外加电极与所述第三类型掺杂区电连接；或者，所述第一外加电极通过所述淬灭电阻与所述第三类型掺杂区电连接，所述第二外加电极与所述第一类型掺杂区电连接。
进一步地，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述第一外加电极与所述第一类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述第三类型掺杂区电连接；或者，所述第一外加电极与所述第三类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接。
进一步地，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述深槽隔离结构中填充有无定形硅、多晶硅或金属，所述第一外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接，所述第二外加电极与所述深槽隔离结构电连接；或者，所述 第一外加电极通过所述淬灭电阻与所述深槽隔离结构电连接，所述第二外加电极与所述第一类型掺杂区电连接。
进一步地，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述深槽隔离结构中填充有无定形硅、多晶硅或金属，所述第一外加电极与所述第一类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述深槽隔离结构电连接；或者，所述第一外加电极与所述深槽隔离结构电连接，所述第二外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接。
第二方面，本发明提供一种光电探测器阵列，包括阵列式分布的多个所述的背照式单光子雪崩二极管。
第三方面，本发明提供一种图像传感器，包括控制电路、读出电路和多个所述的背照式单光子雪崩二极管，所述控制电路的输出端与所述背照式单光子雪崩二极管的输入端连接，所述背照式单光子雪崩二极管的输出端与所述读出电路的输入端连接。
第四方面，本发明提供一种背照式单光子雪崩二极管的制作方法，应用于所述的背照式单光子雪崩二极管，包括以下步骤：
在硅片上制作光电二极管得到第一晶片，所述光电二极管的一个表面上设置有第一陷光结构；
将所述第一晶片靠近所述光电二极管的表面和第二晶片靠近外接电路的表面进行对准键合，所述第二晶片中设置有所述外接电路；
对所述第一晶片的硅片进行打磨和刻蚀以降低厚度；
在所述硅片上制作第二陷光结构。
本发明的有益效果是：
本发明的背照式单光子雪崩二极管设置有陷光结构和侧壁反射墙，入射光经过陷光结构反射、散射、折射后被分散到各个角度，加上侧壁反射墙的反射作用，可以延长光在背照式单光子雪崩二极管中的有效光程，从而提高了光在背照式单光子雪崩二极管中的吸收效率，而不需增加器件厚度，克服现有技术中存在SPAD的光吸收效率低下的技术问题；另外，一种背照式单光子雪崩二极管的制作方法，实现了背照式单光子雪崩二极管的制作，其中，背照式单光子雪崩二极管具有第一陷光结构和第二陷光结构，可以提高背照式单光子雪崩二极管的光吸收效率。而包含背照式单光子雪崩二极管的光电探测器阵列和图像传感器，由于具有背照式单光子雪崩二极管，提高了光电探测器阵列和图像传感器的光吸收效率。
另外，本发明还在背照式单光子雪崩二极管的上表面设置有增透结构用于提高光线的透过率，降低光线的折射率，提高光线进入背照式单光子雪崩二极管的数量，进一步提高其光吸收效率。
附图说明
图1是激光雷达测距示意图；
图2是前照式图像传感器的截面结构示意图；
图3是背照式图像传感器的截面结构示意图；
图4是背照式SPAD的具体截面结构示意图；
图5是本发明中一种背照式单光子雪崩二极管的第一种实施例截面结构示意图；
图6是图5的背照式单光子雪崩二极管的工作原理示意图；
图7是有无陷光结构的光子探测效率示意图；
图8是本发明中一种背照式单光子雪崩二极管的第二种实施例截面结构示意图；
图9是本发明中一种图像传感器的深槽隔离结构的一具体实施例截面结构示意图；
图10是本发明中一种背照式单光子雪崩二极管的第三种实施例截面结构示意图；
图11是本发明中一种背照式单光子雪崩二极管的一具体实施例光子探测效率示意图；
图12是本发明中一种背照式单光子雪崩二极管的一具体实施例截面结构示意图；
图13a、图13b、图13c是本发明中一种背照式单光子雪崩二极管的陷光结构的形状和排布的一具体实施例示意图；
图14是本发明中一种背照式单光子雪崩二极管的增透结构的一具体实施例截面结构示意图；
图15是图14的增透结构对垂直入射的光线的透过率示意图；
图16是图14的增透结构对不同入射角的光线的透过率示意图；
图17是图14的增透结构的光子探测效率示意图；
图18是本发明中一种背照式单光子雪崩二极管的第四种实施例截面结构示意图；
图19是本发明中一种背照式单光子雪崩二极管的第五种实施例截面结构示意图；
图20是本发明中一种图像传感器的一具体实施例结构示意图；
图21是本发明中一种背照式单光子雪崩二极管的制作方法的一具体实施例流程示意图；
其中，A-时间控制电路；B-SPAD探测阵列；C-激光源；D-透镜；E-物体；F-脉冲信号；G-顶部晶片；H-底部晶片；I-背照式SPAD阵列；J-控制电路；K-读出电路；L-淬灭电阻；201-滤波片；202-金属导线；203-光接收层；204-衬底；205-光电二极管；206-深槽隔离结构；41-深槽隔离结构；42-p型掺杂；43-n型掺杂；44-淬灭电阻；45-氧化物键合层；46-通孔；47-金属线；48-浓度渐变的p型掺杂；49-绝缘介质保护层；410-外接电路；1-倒金字塔结构；2-氧化物层；3-填充腔；4-第四类型掺杂区；5-淬灭电阻；6-第一类型掺杂区；7-第二类型掺杂区；8-第三类型掺杂区；9-衍射光栅陷光结构；10-载体硅衬底；11-氧化硅层；12-倍增结；13-绝缘介质保护层；14-外接电路；15-金属线；16-第一晶片；17-第一外加电极；18-第二外加电极；19-抗反射膜；191-第一种膜材料；192-第二种膜材料；20-浅沟槽结构；21-微透镜。
具体实施方式
需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
实施例1
一种背照式单光子雪崩二极管，背照式单光子雪崩二极管由下至上依次设置有衬底、电路层、氧化硅层和硅探测层，硅探测层包括第一类型掺杂区、第二类型掺杂区、第三类型掺杂区和侧壁反射墙，第二类型掺杂区或者所述第三类型掺杂区与第一类型掺杂区形成倍增结，第三类型掺杂区为掺杂浓度变化的掺杂区，背照式单光子雪崩二极管中设置有陷光结构。进一步地，背照式单光子雪崩二极管的上表面还设置有增透结构。
由于背照式单光子雪崩二极管中设置有陷光结构和侧壁反射墙，入射光经过陷光结构反射、散射、折射后被分散到各个角度，再结合侧壁反射墙的反射作用，可以延长光在背照式单光子雪崩二极管中的有效光程，可以在不增加硅层厚度的条件下，显著提高其对近红外光的吸收效率，克服现有技术中存在SPAD的光吸收效率低下的技术问题；不需要依赖于硅层厚度的增加就可以提高光吸收效率，因此不会导致抖动时间的增加，也不会增加探测器硅片的加工难度、成本和坏品率。进一步地，本发明中，第一类型掺杂区为n型掺杂区，第二类型掺杂区和第三类型掺杂区为p型掺杂区，或者，第一类型掺杂区为p型掺杂区，第二类型掺杂区和第三类型掺杂区为n型掺杂区。参考图5，图5是本发明中一种背照式单光子雪崩二极管的第一种实施例截面结构示意图，更进一步地，衬底为载体硅衬底10，第一类型掺杂区6设置在氧化硅层11的上方，第二类型掺杂区7设置在第一类型掺杂区6的上方并与之形成倍增结12(即雪崩区域)，第三类型掺杂区8设置在第二类型掺杂区7的上方并包围第一类型掺杂区6；这样可以继承背照式单光子雪崩二极管的优点，并进一步提高其光吸收效率。
实施例2
基于实施例1的进一步改进得到实施例2，陷光结构设置在背照式单光子雪崩二极管的上表面和/或氧化硅层的上方和/或氧化硅层的下方，上表面的陷光结构、氧化硅层上方的陷光结构或者氧化硅层下方的陷光结构单独设置都可以提高背照式SPAD的光吸收效率，也可以结合使用。进一步地，陷光结构为纳米级或微米级的凹凸结构，例如，陷光结构可以是倒金字塔结构1(参考图10)或者浅沟槽结构20(如图12所示，浅沟槽结构20设置在SPAD的上表面)，或是表面为蜂窝状表面、正弦光栅织构化表面、酒窝状有序表面、周期性金字塔结构表面或二维光栅表面等的结构。陷光结构的材质可以是多种绝缘介质材料，在本实施例中是由氧化硅制成。参考图13a、图13b和图13c，凹凸结构的形状可以是方形(如图13a中的小正方形)，圆形(如图13b中的圆形)或多边形(如图13c中的小八边形)；凹凸结构的排布方式可以是均匀排布或非均匀排布(即无规则分布)，均匀排布可以分为四方密排分布(如图13a的正方形分布)或六方密排分布(如图13b和图13c示意的六方形分布)，可以是柱状阵列(nano-pillar array)(如图13a和图13b)或者是相互补的孔状阵列(nano-hole array)(如图13c)。
参考图5和图6，图5是本发明中一种背照式单光子雪崩二极管的第一种实施例截面结构示意图；图6是图5的背照式单光子雪崩二极管的工作原理示意图；侧壁反射墙为深槽隔离结构，深槽隔离结构沿厚度方向贯穿硅探测层，深槽隔离结构对射来的光线进行来回反射，深槽隔离结构包括侧壁绝缘层和由侧壁绝缘层形成的填充腔3，所述侧壁绝缘层为氧化物层 2，填充腔3中填充有氧化硅、无定形硅、多晶硅或金属，优选填充导电率较好的金属。本实施例中，氧化硅层11上方的陷光结构为衍射光栅陷光结构9，具体地，衍射光栅陷光结构9为浅沟槽结构；另外，第一类型掺杂区6设置在氧化硅层11的上方，衍射光栅陷光结构9设置在第一类型掺杂区6中。且背照式SPAD同时含有上表面的陷光结构(即倒金字塔结构1)，上表面的陷光结构和氧化硅层11上方的陷光结构(即衍射光栅陷光结构9)组成复合陷光结构。实际上，设置在SPAD上表面的倒金字塔结构1能够在空气和硅层之间形成一个平缓渐变的折射率变化，大大降低原来在界面处由于折射率突变而造成的高反射率，以使更多的光进入到背照式单光子雪崩二极管，提高入射光的透过率，起增透作用，此种特性是宽带的，并不针对某一特定波长。同时，入射光在穿过上表面的倒金字塔结构1时，通过反射，散射，折射等方式，入射光会被分散到各个角度，增加了光在探测器中的有效光程，起陷光作用，从而提高了光在背照式单光子雪崩二极管中的吸收效率。再在背照式SPAD的下表面构造实质为衍射光栅的陷光结构即衍射光栅陷光结构9，可将垂直入射的光衍射至一定角度，再结合深槽隔离结构的反射作用，使光线在硅层中来回反射，进一步提高SPAD的光吸收效率。具体地，本实施例中，部分垂直进入背照式单光子雪崩二极管的入射光在与衍射光栅陷光结构9作用后，产生的衍射光具有水平方向的分量，被深槽隔离结构反射以使光线在SPAD的硅基中来回反射，增加了有效光程，提高吸收率，理论上通过该种方式，光在硅层中的吸收率可以逼近其理论极限值Yablonovitch limit。背照式SPAD通过设置复合陷光结构可以有效地提高光吸收效率。参考图7，图7是有无陷光结构的光子探测效率示意图；通过仿真，可以计算得出有无陷光结构的SPAD单元的吸收效率，由图7可见，对于一个普通的没有制作复合陷光结构的背照式单光子雪崩二极管而言，其在850nm至960nm波段的吸收效率在5％到20％范围，对于应用中所注重的905nm波长处的吸收率约为15％，相比之下，对于有复合陷光结构的背照式单光子雪崩二极管(如图5)，其对于850至960nm的光的吸收效率整体得到了大幅提升，在905nm处，吸收效率被大幅提高到了38％，相比于无陷光结构的SPAD的光吸收效率显著提高。
参考图8，图8是本发明中一种背照式单光子雪崩二极管的第二种实施例截面结构示意图；陷光结构(如图8中的衍射光栅陷光结构9)也可以加工在氧化硅层11的下方，原理上同样可以起到陷光以增强吸收效率的作用。图8中，还在SPAD的上表面设置有倒金字塔结构1，上下的陷光结构结合使得陷光效果更佳。进一步地，参考图5和图8，背照式单光子雪崩二极管还包括至少两个外加电极，外加电极用于读取信号和/或施加电压，外加电极与硅探测层连接。本实施例中，背照式单光子雪崩二极管包括第一外加电极17、第二外加电极18和淬灭电阻5，第一外加电极17通过淬灭电阻5与第一类型掺杂区6电连接，第二外加电极18与第三类型掺杂区8电连接；或者，第一外加电极17通过淬灭电阻5与第三类型掺杂区8电连接，第二外加电极18与第一类型掺杂区6电连接。另外，淬灭电阻5也可以与第二外加电极18连接，第一外加电极17与第一类型掺杂区6电连接，第二外加电极18通过淬灭电阻5与第三类型掺杂区8电连接；或者，第一外加电极17与第三类型掺杂区8电连接，第二外 加电极18通过淬灭电阻5与第一类型掺杂区6电连接。参考图9，图9是本发明中一种图像传感器的深槽隔离结构的一具体实施例截面结构示意图；当深槽隔离结构中填充有导电的无定形硅、多晶硅或金属时，背照式单光子雪崩二极管的第一外加电极17通过淬灭电阻5与第一类型掺杂区6电连接，第二外加电极18与深槽隔离结构电连接。或者，第一外加电极17通过淬灭电阻5与深槽隔离结构电连接，第二外加电极18与第一类型掺杂区6电连接。同理，淬灭电阻5也可以与第二外加电极18连接，第一外加电极17与第一类型掺杂区6电连接，第二外加电极18通过淬灭电阻5与深槽隔离结构电连接；或者，第一外加电极17与深槽隔离结构电连接，第二外加电极18通过淬灭电阻5与第一类型掺杂区6电连接。
实施例3
基于实施例1的进一步改进得到实施例3，参考图10，图10是本发明中一种背照式单光子雪崩二极管的第三种实施例截面结构示意图；陷光结构和/或增透结构为倒金字塔结构1，倒金字塔结构1同时具备陷光和增透作用，具体地，倒金字塔结构1设置在背照式SPAD的上表面(即设在第三类型掺杂区8的上方)，倒金字塔结构1为在硅基上刻蚀后填充氧化硅而得到。本实施例中，在倒金字塔结构1的上方设置有绝缘介质保护层13用于保护SPAD。具体地，设置在SPAD上表面的倒金字塔结构1能够在空气和硅层之间形成一个平缓渐变的折射率变化，大大降低原来在界面处由于折射率突变而造成的高反射率，以使更多的光进入到背照式单光子雪崩二极管，提高入射光的透过率，起增透作用，此种特性是宽带的，并不针对某一特定波长。同时，入射光在穿过上表面的倒金字塔结构1时，通过反射，散射，折射等方式，入射光会被分散到各个角度，增加了光在探测器中的有效光程，起陷光作用，从而提高了光在背照式单光子雪崩二极管中的吸收效率。参考图10，通过仿真得到图11的光子探测效率示意图，光子探测效率(pde，photon detection efficiency)根据仿真结果可见，设置上表面的倒金字塔结构1使得SPAD具有优良的光吸收效率，光吸收效率普遍在0.25以上。
实施例4
基于实施例1的进一步改进得到实施例4，增透结构为设置在硅探测层上方的膜结构，膜结构包括至少两种折射率不同的薄膜。事实上，增透结构为通过在BSI SPAD的上表面镀多层具有不同折射率的材料而得到的具有优良增透效果的抗反射膜(anti-reflection coating)，抗反射膜对特定波段实现接近于100％的透过率，对选定波段之外的入射光完全反射。参考图14，图14是本发明中一种背照式单光子雪崩二极管的增透结构的一具体实施例截面结构示意图；抗反射膜19包括两种折射率不同的膜材料(即第一种膜材料191和第二种膜材料192)，第一种膜材料191为二氧化硅，第二种膜材料192为氮化硅。抗反射膜19的光线透过率和光子探测效率如图15、图16和图17所示，可以看出，图14的增透结构对入射光的波长有很强的选择性，如图15所示，在890nm至910nm内，透过率可接近于1，对于在此范围之外的入射光，透过率接近于0，此特性可以有效降低环境背景光带来的噪音。该抗反射膜对于不同波长和入射角的响应特性不同，仿真结果如图16所示，对于905nm附近波长的入射光，当入射角大于20度时，该抗反射膜的透过率从接近于100％的水平骤降至10％以下，可见其 对入射光的入射角度有很大的选择性。在SPAD中，对于经过底部陷光结构衍射而产生的具有水平方向分量的光，当从下方入射到上表面时，由于入射角度较大(>45°)，将会被反射回硅层中，从而提高光吸收效率。图14的背照式单光子雪崩二极管还采用上表面的增透结构(即抗反射膜19)与下表面的陷光结构(即衍射光栅陷光结构9)结合的方式来更有效地提高BSI SPAD的光吸收效率。设置在SPAD上表面的增透结构还可以与SPAD上表面的陷光结构(如倒金字塔结构)结合来实现提高背照式SPAD的光吸收效率。
实施例5
参考图18，图18是本发明中一种背照式单光子雪崩二极管的第四种实施例截面结构示意图；背照式单光子雪崩二极管还包括微透镜21，微透镜21设置在硅探测层的上方。本实施例中，在硅探测层上还设置有绝缘介质保护层13，微透镜21加在绝缘介质保护层13上；另外，本实施例中，微透镜21还结合下表面的衍射光栅陷光结构9以进一步提高光吸收效率。在SPAD的上表面，通过覆盖微透镜来提高对较大角度入射光的收集效率，等效于提高填充因子。参考图19，图19是本发明中一种背照式单光子雪崩二极管的第五种实施例截面结构示意图；在同时具有上、下陷光结构(即倒金字塔结构1和衍射光栅陷光结构9)的SPAD上覆盖微透镜21，可以进一步提高其对于大角度入射光的收集效率。
实施例6
参考图5、图8和图12，第二类型掺杂区7设置在第一类型掺杂区6的上方，第三类型掺杂区8包含第二类型掺杂区7，第三类型掺杂区8的掺杂浓度由下至上逐渐升高，更具体地，第二类型掺杂区7设置在第三类型掺杂区8的中下方，即第二类型掺杂区7位于第三类型掺杂区8的中心的下方。通过优化设计掺杂分布，可以使背照式SPAD的探测效率进一步提高。如图5所示，在SPAD的倍增结12(multiplication region or avalanche region)(如图5中的虚线框所示)附近的第三类型掺杂区8的掺杂浓度较低，通过这样的掺杂分布，可以使得保护环(guard ring)的宽度减小，并且将各处的吸收光生载流子(photo-generated carrier)收集至雪崩区域，从而提高SPAD感光区域的探测效率。其中，保护环是指在SPAD中围绕在雪崩区域附近的一块区域，可以防止雪崩在边缘发生(边缘击穿)。但是太大的保护环会降低SPAD的填充因子。
综上，本发明的BSI SPAD，由于设置有增透结构、微透镜、上下表面的陷光结构，对于实际中不可避免的加工厚度、温度、波长和入射角的偏差有很高的容忍度，更加适用于基于SPAD的系统(如激光雷达)的工作环境和实际使用情况。
实施例7
参考上述实施例，本实施例中，提供一种光电探测器阵列，其包括阵列式分布的多个上述的背照式单光子雪崩二极管，光电探测器阵列包括SiPM或SPAD阵列。由于背照式SPAD设置陷光结构、增透结构和微透镜等来提高背照式SPAD的光吸收效率，并且背照式SPAD之间还设置深槽隔离结构用于避免串扰，可以提高光电探测器阵列所在系统的性能，例如，对于基于SiPM/SPAD阵列的激光雷达来说，一方面，提高了信噪比(光吸收效率提高，信 号增强；串扰减弱，噪声降低)，增加了激光雷达探测距离，改善了探测质量。另一方面，保证了激光雷达的接收端成本低，成品率高，更易于大规模量产；在边缘上的子单元响应会更好；激光雷达的光源波长存在受热漂移的现象，本发明的背照式SPAD能在一个较宽波段上提升吸收效率，从而降低光源波长漂移对激光雷达性能的影响。
实施例8
参考图20，图20是本发明中一种图像传感器的一具体实施例结构示意图；一种图像传感器包括控制电路J、读出电路K和由多个所述的背照式单光子雪崩二极管组成的阵列，即背照式SPAD阵列I，背照式SPAD阵列I包括阵列式分布的背照式SPAD，背照式SPAD包括淬灭电阻L。参考图5，所述背照式单多个光子雪崩二极管之间通过侧壁反射墙如深槽隔离结构进行分离，所述控制电路J的输出端与所述背照式单光子雪崩二极管的输入端连接，所述背照式单光子雪崩二极管的输出端与所述读出电路K的输入端连接。其中，背照式单光子雪崩二极管之间通过深槽隔离结构实现隔离，保证背照式单光子雪崩二极管之间不会出现串扰；背照式单光子雪崩二极管还包括第四类型掺杂区4，相应地，第四类型掺杂区4可以是n++型掺杂或者p++型掺杂，当第一类型掺杂区6为n型掺杂区时，第四类型掺杂区4为p++型掺杂；而第一类型掺杂区6为p型掺杂区时，第四类型掺杂区4为n++型掺杂。包含背照式单光子雪崩二极管的图像传感器，由于具有背照式单光子雪崩二极管，光吸收效率得以提高。
实施例9
一种背照式单光子雪崩二极管的制作方法，应用于所述的背照式单光子雪崩二极管，本实施例中，参考图5，以具有上表面的倒金字塔结构和下表面的衍射光栅陷光结构构成的复合陷光结构的背照式单光子雪崩二极管为例进行说明，参考图21，图21是本发明中一种背照式单光子雪崩二极管的制作方法的一具体实施例流程示意图；包括以下步骤：
首先，以SPAD的常用工艺在外延生长的硅片上制作出光电二极管以得到第一晶片16，光电二极管的一个表面上设置有第一陷光结构，本实施例中，在光电二极管的上表面(即氧化硅层的上方)制作第一陷光结构，第一陷光结构为衍射光栅陷光结构9。
接着，在低温下将第一晶片16靠近光电二极管的表面和第二晶片靠近外接电路14的表面进行对准键合，第二晶片中设置有外接电路14，外接电路14包括偏压提供电路或者信号处理电路，可采用机械或光学的方式进行对准，通过聚合物粘合剂或氧化物进行键合。将键合后的晶片翻面，使第一晶片16的硅片位于上方，如图21中的第三张图片所示。
再对第一晶片16的硅片进行打磨和刻蚀以降低其厚度；具体地，通过机械打磨的方式将原来1mm厚左右的硅片磨薄至50um左右，再通过化学刻蚀的方式将其厚度减小至5um。
再在第一晶片16的硅片上制作出第二陷光结构，本实施例中，第二陷光结构为倒金字塔结构1。
最后，在倒金字塔结构1上镀上绝缘介质保护层13。
一种背照式单光子雪崩二极管的制作方法，实现了背照式单光子雪崩二极管的制作，制 作方法简单，不需要增加硅层厚度，因此不会增加加工难度，其中，背照式单光子雪崩二极管具有第一陷光结构和第二陷光结构组成的复合陷光结构，可以提高背照式单光子雪崩二极管的光吸收效率。
值得说明的是，带其他陷光结构的背照式单光子雪崩二极管的制作方法可参考本实施例描述的制作方法，例如微透镜，可在背照式单光子雪崩二极管镀上绝缘介质保护层之后，接着在绝缘介质保护层上加上微透镜即可。
以上是对本发明的较佳实施进行了具体说明，但本发明创造并不限于所述实施例，熟悉本领域的技术人员在不违背本发明精神的前提下还可做出种种的等同变形或替换，这些等同的变形或替换均包含在本申请权利要求所限定的范围内。

Claims (21)

  1. 一种背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管由下至上依次设置有衬底、电路层、氧化硅层和硅探测层，所述硅探测层包括第一类型掺杂区、第二类型掺杂区、第三类型掺杂区和侧壁反射墙，所述第二类型掺杂区或者所述第三类型掺杂区与所述第一类型掺杂区形成倍增结，所述第三类型掺杂区为掺杂浓度变化的掺杂区，所述背照式单光子雪崩二极管中设置有陷光结构。
  2. 根据权利要求1所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管的上表面设置有增透结构。
  3. 根据权利要求2所述的背照式单光子雪崩二极管，其特征在于，所述增透结构为设置在所述硅探测层上方的膜结构，所述膜结构包括至少两种折射率不同的薄膜。
  4. 根据权利要求2所述的背照式单光子雪崩二极管，其特征在于，所述陷光结构和/或所述增透结构为倒金字塔结构。
  5. 根据权利要求1所述的背照式单光子雪崩二极管，其特征在于，所述陷光结构设置在所述背照式单光子雪崩二极管的上表面和/或所述氧化硅层的上方和/或所述氧化硅层的下方。
  6. 根据权利要求1所述的背照式单光子雪崩二极管，其特征在于，所述第一类型掺杂区设置在所述氧化硅层的上方，所述陷光结构设置在所述第一类型掺杂区中。
  7. 根据权利要求1至6任一项所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管还包括微透镜，所述微透镜设置在所述硅探测层的上方。
  8. 根据权利要求1至6任一项所述的背照式单光子雪崩二极管，其特征在于，所述第二类型掺杂区设置在所述第一类型掺杂区的上方，所述第三类型掺杂区包含所述第二类型掺杂区，所述第三类型掺杂区的掺杂浓度由下至上升高。
  9. 根据权利要求1至6任一项所述的背照式单光子雪崩二极管，其特征在于，所述第一类型掺杂区为n型掺杂区，所述第二类型掺杂区和第三类型掺杂区为p型掺杂区；或者，所述第一类型掺杂区为p型掺杂区，所述第二类型掺杂区和第三类型掺杂区为n型掺杂区。
  10. 根据权利要求1至6任一项所述的背照式单光子雪崩二极管，其特征在于，所述陷光结构为纳米级或微米级的凹凸结构。
  11. 根据权利要求10所述的背照式单光子雪崩二极管，其特征在于，所述凹凸结构的分布方式包括四方密排分布、六方密排分布或者无规则分布。
  12. 根据权利要求1至6任一项所述的背照式单光子雪崩二极管，其特征在于，所述侧壁反射墙为深槽隔离结构，所述深槽隔离结构沿厚度方向贯穿所述硅探测层，所述深槽隔离结构对射来的光线进行来回反射。
  13. 根据权利要求12所述的背照式单光子雪崩二极管，其特征在于，所述深槽隔离结构中填充有氧化硅、无定形硅、多晶硅或金属。
  14. 根据权利要求12所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子 雪崩二极管还包括至少两个外加电极，所述外加电极用于读取信号和/或施加电压，所述外加电极与所述硅探测层连接。
  15. 根据权利要求14所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述第一外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接，所述第二外加电极与所述第三类型掺杂区电连接；或者，所述第一外加电极通过所述淬灭电阻与所述第三类型掺杂区电连接，所述第二外加电极与所述第一类型掺杂区电连接。
  16. 根据权利要求14所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述第一外加电极与所述第一类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述第三类型掺杂区电连接；或者，所述第一外加电极与所述第三类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接。
  17. 根据权利要求14所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述深槽隔离结构中填充有无定形硅、多晶硅或金属，所述第一外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接，所述第二外加电极与所述深槽隔离结构电连接；或者，所述第一外加电极通过所述淬灭电阻与所述深槽隔离结构电连接，所述第二外加电极与所述第一类型掺杂区电连接。
  18. 根据权利要求14所述的背照式单光子雪崩二极管，其特征在于，所述背照式单光子雪崩二极管包括第一外加电极、第二外加电极和淬灭电阻，所述深槽隔离结构中填充有无定形硅、多晶硅或金属，所述第一外加电极与所述第一类型掺杂区电连接，所述第二外加电极通过所述淬灭电阻与所述深槽隔离结构电连接；或者，所述第一外加电极与所述深槽隔离结构电连接，所述第二外加电极通过所述淬灭电阻与所述第一类型掺杂区电连接。
  19. 一种光电探测器阵列，其特征在于，包括阵列式分布的多个权利要求1至18任一项所述的背照式单光子雪崩二极管。
  20. 一种图像传感器，其特征在于，包括控制电路、读出电路和多个权利要求1至18任一项所述的背照式单光子雪崩二极管，所述控制电路的输出端与所述背照式单光子雪崩二极管的输入端连接，所述背照式单光子雪崩二极管的输出端与所述读出电路的输入端连接。
  21. 一种背照式单光子雪崩二极管的制作方法，其特征在于，应用于权利要求1至18任一项所述的背照式单光子雪崩二极管，包括以下步骤：
    在硅片上制作光电二极管得到第一晶片，所述光电二极管的一个表面上设置有第一陷光结构；
    将所述第一晶片靠近所述光电二极管的表面和第二晶片靠近外接电路的表面进行对准键合，所述第二晶片中设置有所述外接电路；
    对所述第一晶片的硅片进行打磨和刻蚀以降低厚度；
    在所述硅片上制作第二陷光结构。
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WO2022118602A1 (ja) * 2020-12-02 2022-06-09 ソニーセミコンダクタソリューションズ株式会社 受光素子、光検出装置及び測距システム

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