WO2020118823A1 - 显示面板及具有该显示面板的显示装置 - Google Patents

显示面板及具有该显示面板的显示装置 Download PDF

Info

Publication number
WO2020118823A1
WO2020118823A1 PCT/CN2019/070930 CN2019070930W WO2020118823A1 WO 2020118823 A1 WO2020118823 A1 WO 2020118823A1 CN 2019070930 W CN2019070930 W CN 2019070930W WO 2020118823 A1 WO2020118823 A1 WO 2020118823A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
display panel
gate insulating
display
panel according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/070930
Other languages
English (en)
French (fr)
Inventor
许欢
李武
毕炜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to US16/325,406 priority Critical patent/US11043547B2/en
Publication of WO2020118823A1 publication Critical patent/WO2020118823A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present invention relates to the field of display devices and the like, in particular to a display panel and a display device having the display panel.
  • OLED Organic Light-Emitting Diode
  • OLED Organic Light-Emitting Diode
  • the OLED display screen needs to bend the bending area (Pad bending) of the flexible screen when realizing the full screen and narrow bezel, when the bending occurs, the neutral layer of the existing flexible display device falls on In the flexible substrate, the metal traces distributed in the bending area will have problems of stress and strain due to bending. When the metal trace is bent multiple times or the stress on the metal trace is too large, it may break, Cracks and other undesirable phenomena affect the signal transmission, the performance of the display, and even cause the display to fail.
  • the invention provides a GOA circuit to solve the problems in the prior art that the total width of the CK signal line is wide, the required circuit layout space is large, and the circuit wiring is complicated.
  • the technical problem to be solved by the present invention is to provide a display panel and a display device having the display panel.
  • a stress adjustment layer is added on the display panel array substrate to display on the display panel and the display device having the display panel When the panel is bent, the neutral plane falls into the layer of the metal trace, or as close to the metal trace as possible to reduce the tensile stress of the metal trace.
  • the present invention provides a display panel including a display area for displaying a picture and a non-display area provided outside the display area, the non-display area includes a bending area; metal traces, from the The display area extends to the bending area; and the stress adjusting layer is disposed above the metal trace and corresponds to the bending area.
  • the metal trace is located above the flexible base layer, and the thickness of the stress adjustment layer is less than or equal to the thickness of the flexible base layer.
  • the material used for the stress adjustment layer is at least one of polyimide, polyetherimide, polyphenylene sulfide, and polyarylate;
  • the material used for the flexible base layer is poly At least one of imide, polyetherimide, polyphenylene sulfide, and polyarylate.
  • the thickness of the stress adjustment layer is 5-10 microns.
  • the display panel further includes a barrier layer covering the flexible base layer; a buffer layer covering the barrier layer; a first gate insulating layer covering the buffer layer A second gate insulating layer covering the first gate insulating layer; and a dielectric layer covering the second gate insulating layer; the metal traces covering the dielectric layer A flat layer covering the dielectric layer and the metal traces; a pixel defining layer covering the flat layer; and the stress adjusting layer covering the pixel defining layer.
  • a groove penetrating the barrier layer from the dielectric layer is provided in the bending region, the groove is filled with an organic layer, and the stress adjustment layer is correspondingly disposed on the On the organic layer.
  • the groove is a stepped structure, which includes a first groove body penetrating from the buffer layer to the barrier layer; a second groove body penetrating from the dielectric layer to the In the first gate insulating layer, the first groove body and the second groove body communicate with each other, and the width of the first groove body is smaller than the width of the second groove body.
  • the display area further includes a semiconductor layer provided on the buffer layer, and the first gate insulating layer is provided on the semiconductor layer; the first gate layer, Disposed on the first gate insulating layer, and the second gate insulating layer is disposed on the first gate layer; the second gate layer is disposed on the second gate insulating layer, and The dielectric layer is provided on the second gate layer; the source electrode and the drain electrode are respectively connected to the semiconductor layer, and the metal trace is provided in the same layer as the source electrode and the drain electrode; the opening is spaced
  • the pixel defining layer is provided; and the light emitting layer is provided in the opening; the anode is provided on a flat layer and the pixel defining layer overlies the anode; the opening corresponds to the anode.
  • the neutral plane when the bending area is bent, the neutral plane is located in the layer where the metal trace is located.
  • the invention also provides a display device, including the display panel.
  • the display panel and the display device with the display panel of the present invention by adding a flexible stress adjustment layer of the same or different material as the flexible base layer on the pixel defining layer of the array substrate, so that the display area of the display panel is bent when The sexual plane can be changed from the original flexible base layer to the layer of the metal trace in the bending zone to improve the stress distribution structure of the bending zone, especially the stress distribution structure of the layer where the metal trace is located; it effectively solves the problem of bending Problems such as performance degradation and failure caused by cracks and peeling of metal traces.
  • FIG. 1 is a schematic diagram of a display panel according to an embodiment of the present invention, which mainly reflects the corresponding positions of the stress adjustment layer.
  • FIG. 2 is a layered structure diagram of the display panel in the manufacturing process of the embodiment of the present invention, which mainly embodies the structure of the groove in the bending area.
  • FIG. 3 is a layered structure diagram of the display panel of the embodiment of the present invention after fabrication of the array substrate.
  • FIG. 4 is a structural diagram of a display area of a display panel in the prior art during a bending process, mainly reflecting the location of a neutral plane.
  • FIG. 5 is a structural diagram of a display area of a display panel according to an embodiment of the present invention during a bending process, mainly showing the location of a neutral plane.
  • FIG. 6 is a structural diagram of a display device according to an embodiment of the invention.
  • Second gate insulating layer 1205 dielectric layer
  • the display panel 10 of the present invention displays a display area 101 of a screen and a non-display area 102 provided outside the display area 101.
  • the non-display area 102 includes a bending area 1021.
  • the display panel 10 includes a flexible base layer 110, an array substrate 120, and a stress adjustment layer 130.
  • the array substrate 120 includes metal traces 1215 (see FIG. 3), the array substrate 120 is disposed on the flexible base layer 110; the stress adjustment layer 130 is disposed on the array substrate 120, and corresponds to the ⁇ 1021 ⁇ The bending zone 1021.
  • the array substrate 120 of this embodiment will be further described below.
  • the array substrate 120 includes a barrier layer 1201, a buffer layer 1202, a first gate insulating layer 1203, a second gate insulating layer 1204, a dielectric layer 1205, and a flat layer 1206 , And the pixel definition layer 1207.
  • the barrier layer 1201 is overlaid on the flexible base layer 110; the buffer layer 1202 is overlaid on the barrier layer 1201; the first gate insulating layer 1203 is overlaid on the buffer layer 1202; the The second gate insulating layer 1204 covers the first gate insulating layer 1203; the dielectric layer 1205 covers the second gate insulating layer 1204.
  • the flat layer 1206 overlies the dielectric layer 1205; the pixel definition layer 1207 overlies the flat layer 1206.
  • the array substrate 120 further includes a groove 1216 and an organic layer 1217.
  • the groove 1216 penetrates from the dielectric layer 1205 to the barrier layer 1201 .
  • the corresponding mask plate is etched or irradiated with laser to form the groove 1216. Then, the groove 1216 is filled with an organic layer 1217 and the metal trace 1215 is formed on the organic layer 1217.
  • the groove 1216 forms a stepped structure in the array substrate 120.
  • the groove 1216 is a stepped structure including a first groove body 12161 and a second groove body 12162.
  • the first groove body 12161 is buffered from the buffer
  • the layer 1202 penetrates to the barrier layer 1201; the second trench body 12162 penetrates from the dielectric layer 1205 to the first gate insulating layer 1203, the first trench body 12161 and the second trench body 12162 communicates, the width of the first groove body 12161 is smaller than the width of the second groove body 12162.
  • the organic layer 1217 is filled in the groove 1216.
  • the metal trace 1215 is a metal trace provided in the same layer as the source and drain, and covers the organic layer 1217.
  • the stress adjustment layer 130 is overlaid on the pixel definition layer 1207, and the metal trace 1215 corresponds to the stress adjustment layer 130.
  • the thickness of the functional layer from the metal trace 1215 to the flexible base layer 110 is D
  • the thickness of the functional layer is E.
  • D is greater than E. Therefore, if the stress adjustment layer 130 is not provided, when the bending zone 1021 is bent, the neutral plane 103 generally falls into the The flexible base layer 110 is shown in FIG. 4. At this time, the metal trace 1215 may undergo irreversible deformation due to tensile stress and compressive stress, and may even break.
  • the groove 1216 is provided at the corresponding position of the metal trace 1215, and the groove 1216 is filled with the organic layer 1217 to adjust the The tensile stress of the metal trace 1215 during bending can cooperate with the stress adjustment layer 130 to help the neutral plane 103 further shift from the flexible base layer 110 to the layer where the metal trace 1215 is located, as shown in FIG. 5 shows.
  • the thickness of the stress adjustment layer 130 is less than or equal to the thickness of the flexible base layer 110; The thickness can be set to 5-10 microns.
  • the material used for the flexible base layer 110 is at least one of polyimide, polyetherimide, polyphenylene sulfide, and polyarylate. Therefore, in order to simplify the process, reduce the difficulty of the process, and facilitate the setting and adjustment of the thickness of the stress adjustment layer 130, in this embodiment, the material used for the stress adjustment layer 130 is also polyimide, polyetherimide At least one of polyphenylene sulfide, polyarylate.
  • the material used for the stress adjusting layer 130 may be the same as the material used for the flexible base layer 110, or may be different.
  • the array substrate 120 is further provided with a semiconductor layer 1208, a first gate layer 1209, a second gate layer 1210, a source electrode 1211 and a drain electrode 1212, The opening 1213, the light emitting layer 1214, and the anode 1218.
  • the semiconductor layer 1208 is disposed on the buffer layer 1202, and the first gate insulating layer 1203 completely covers the semiconductor layer 1208.
  • the semiconductor layer 1208 includes an active layer, and the material used for the active layer is one of amorphous silicon, low-temperature polysilicon, and oxide semiconductor.
  • the first gate layer 1209 is disposed on the first gate insulating layer 1203, and the second gate insulating layer 1204 completely covers the first gate layer 1209; the second gate layer 1210 is provided on the second gate insulating layer 1204, and the dielectric layer 1205 is overlaid on the second gate layer 1210; the source electrode 1211 and the drain electrode 1212 are respectively connected to the semiconductor layer 1208 .
  • the metal trace 1215 is provided on the same layer as the source electrode 1211 and the drain electrode 1212.
  • the flat layer 1206 covers the source electrode 1211 and the drain electrode 1212; the opening 1213 penetrates the entire pixel definition layer 1207; and the light emitting layer 1214 fills the opening 1213.
  • the anode 1218 is connected to the drain 1212, and the pixel definition layer 1207 overlies the anode 1218; the opening 1213 corresponds to the anode 1218.
  • the semiconductor layer 1208 is fabricated on the buffer layer 1202, and then, the first gate is fabricated on the buffer layer 1202 and the semiconductor layer 1208 ⁇ insulating layer 1203.
  • the first gate insulating layer 1203 is fabricated, the first gate layer 1209 is formed on the first gate insulating layer 1203; when the first gate layer 1209 is fabricated, The second gate insulating layer 1204 is formed on the first gate insulating layer 1203 and the first gate layer 1209.
  • the second gate layer 1210 is fabricated on the second gate insulating layer 1204.
  • the dielectric layer 1205 is fabricated on the second gate layer 1210 and the second gate insulating layer 1204.
  • a corresponding mask plate is etched or laser irradiated to form a first hole groove of the source electrode 1211 and the gate electrode.
  • the first hole groove is formed from the dielectric layer 1205 Penetrate to the surface of the semiconductor layer 1208, and form the source electrode 1211 and the drain electrode 1212 in the first hole, so that the source electrode 1211 and the drain electrode 1212 are connected to the semiconductor layer correspondingly 1208.
  • a flat layer 1206 is formed on the surfaces of the dielectric layer 1205, the source electrode 1211, and the drain electrode 1212.
  • a second hole is formed in the flat layer 1206 through the corresponding mask, and the second hole penetrates from the surface of the flat layer 1206 to the surface of the drain 1212, and then in the second
  • the anode 1218 connected to the drain 1212 is formed in the hole and on the flat layer 1206.
  • the pixel definition layer 1207 is formed on the anode 1218 and the flat layer 1206 to complete subsequent manufacturing steps.
  • the present invention also provides a display device 1, including the display panel 10, the color filter substrate 20, the polarizer 30, and the touch screen 40.
  • the focus of the present invention is on the display panel 10, specifically, a stress adjustment layer 130 is provided on the array substrate 120, and the stress adjustment layer 130 corresponds to the bending region 1021. In this way, the neutral plane 103 falls on the metal trace 1215 corresponding to the bending zone 1021 as much as possible.
  • the display device 1 since the display device 1 also has a color filter substrate 20 and a polarizer 30 functional layer, and these functional layers are generally far from the flexible substrate, therefore, the actual display device 1 During the manufacturing process, the thickness of the stress adjustment layer 130 should be less than the thickness of the flexible base layer 110.
  • the other components of the display device 1, such as the color film substrate 20, the polarizer 30, the touch screen 40, the packaging frame, etc., will not be described one by one.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种显示面板（10）及具有显示面板（10）的显示装置（1），显示画面的显示区域（101）及设置在显示区域（101）外的非显示区域（102），非显示区域（102）包括弯折区（1021）；金属走线（1215），从显示区域（101）延伸至弯折区（1021）；以及应力调节层（130），设于金属走线（1215）上方且对应于弯折区（1021）。显示面板（10）及具有显示面板（10）的显示装置（1），通过在阵列基板（120）上增设一层与柔性基层（110）材质相同或不同的柔性的应力调节层（130），有效解决了弯折时金属走线（1215）出现的裂纹、剥离等现象而造成的性能劣化、失效等问题。

Description

显示面板及具有该显示面板的显示装置 技术领域
本发明涉及显示装置等领域，具体为一种显示面板及具有该显示面板的显示装置。
 背景技术
OLED（Organic Light-Emitting Diode）显示屏以其自发光，广视角、高对比度、响应速度快等特点成为当前显示主流趋势。当前，随着人们对极致显示体验的追求，全面屏、窄边框等成为当前显示领域中的开发热点。但是，由于OLED显示屏在实现全面屏、窄边框时，通常需要对柔性屏的弯折区（Pad bending）进行弯折，当发生弯折后，现有的柔性显示装置的中性层落在柔性基板内，而分布在该弯折区的金属走线会因为弯折反生应力应变的问题，当金属走线经过多次弯折或者金属走线所受的应力过大，可能出现断裂、裂纹等不良现象，从而影响信号的传送，显示屏的性能表现效果，甚至会导致显示屏显示失效。
 技术问题
本发明提供一种GOA电路，以解决现有技术中CK信号线总宽度宽，所需电路布线（Layout）空间大，电路布线复杂的问题。
 技术解决方案
本发明所要解决的技术问题是：提供一种显示面板及具有该显示面板的显示装置，在显示面板阵列基板上加设一层应力调节层，使在显示面板及具有该显示面板的显示装置显示面板在弯折时，中性面落入金属走线所在层中，或尽可能的接近金属走线，以降低金属走线的拉伸应力。
为解决上述技术问题：本发明提供一种显示面板，包括显示画面的显示区域及设置在所述显示区域外的非显示区域，所述非显示区域包括弯折区；金属走线，从所述显示区域延伸至所述弯折区；以及应力调节层，设于所述金属走线上方且对应于所述弯折区。
在本发明一实施例中，所述金属走线位于所述柔性基层的上方，所述应力调节层的厚度小于或等于所述柔性基层的厚度。
在本发明一实施例中，所述应力调节层所用的材料为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种；所述柔性基层所用材料为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种。
在本发明一实施例中，所述应力调节层的厚度为5-10微米。
在本发明一实施例中，所述的显示面板还包括阻隔层，覆于所述柔性基层上；缓冲层，覆于所述阻隔层上；第一栅极绝缘层，覆于所述缓冲层上；第二栅极绝缘层，覆于所述第一栅极绝缘层上；以及介电层，覆于所述第二栅极绝缘层上；所述金属走线覆于所述介电层上；平坦层，覆于所述介电层以及金属走线上；像素限定层，覆于所述平坦层上；所述应力调节层覆于所述像素限定层上。在本发明一实施例中，在所述弯折区设有从所述介电层贯穿所述阻隔层的凹槽，所述凹槽内填充有机层，所述应力调节层对应设置在所述有机层上。
在本发明一实施例中，所述凹槽为台阶结构，其包括第一槽体，从所述缓冲层贯穿至所述阻隔层；第二槽体，从所述介电层贯穿至所述第一栅极绝缘层，所述第一槽体和第二槽体连通，所述第一槽体的宽度小于所述第二槽体的宽度。
在本发明一实施例中，在所述显示区，还包括半导体层，设于所述缓冲层上，且所述第一栅极绝缘层设置在所述半导体层上；第一栅极层，设于所述第一栅极绝缘层上，且所述第二栅极绝缘层设置在所述第一栅极层；第二栅极层，设于所述第二栅极绝缘层上，且所述介电层设置在所述第二栅极层上；源极和漏极，分别连接至所述半导体层，所述金属走线与所述源极和漏极同层设置；开口，间隔设置在所述像素限定层；以及发光层，设置于所述开口中；阳极，设置在平坦层上且所述像素限定层覆于所述阳极上；所述开口对应于所述阳极。
在本发明一实施例中，当所述弯折区弯折时，中性平面位于所述金属走线所在层中。
本发明还提供了一种显示装置，包括所述的显示面板。
 有益效果
本发明的显示面板及具有该显示面板的显示装置，通过在阵列基板像素限定层上增设一层与柔性基层材质相同或不同的柔性的应力调节层，使得显示面板显示区在弯折时，中性面能够由原来的柔性基层变动至弯折区中的金属走线所在层上，以改善弯折区的应力分布结构，特别是金属走线所在层的应力分布结构；有效解决了弯折时金属走线出现的裂纹、剥离等现象而造成的性能劣化、失效等问题。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
下面结合附图和实施例对本发明作进一步解释。
图1是本发明实施例的显示面板的示意图，主要体现应力调节层的对应位置。
图2是本发明实施例的显示面板在制作过程中的一层状结构图，主要体现弯折区中凹槽的结构。
图3是本发明实施例的显示面板的阵列基板制作完成后的层状结构图。
图4是现有技术中显示面板的显示区，在弯折过程中的结构图，主要体现中性面所在位置。
图5是本发明实施例的显示面板的显示区，在弯折过程中的结构图，主要体现中性面所在位置。
图6是本发明实施例的显示装置结构图。
附图标记：
1显示装置；
10显示面板；                         20彩膜基板；
30偏光片；                           40触摸屏；
101显示区域；                  102非显示区域；
1021弯折区；
103中性面；
110柔性基层；                        120阵列基板；
130应力调节层；                      1201阻隔层；
1202缓冲层；                         1203第一栅极绝缘层；
1204第二栅极绝缘层；                  1205介电层；
1206平坦层；                          1207像素定义层；
1208半导体层；                        1209第一栅极层；
1210第二栅极层；                      1211源极；
1212漏极；                            1213开口；
1214发光层；                          1215金属走线；
1216凹槽；                            1217有机层；
1218阳极；                            12161第一槽体；
12162第二槽体。
 本发明的实施方式
下面详细描述本发明的实施方式，所述实施方式的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。
以下实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「顶」、「底」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
如图1所示，在一实施例中，本发明的显示面板10，显示画面的显示区域101及设置在所述显示区域101外的非显示区域102，所述非显示区域102包括弯折区1021。
所述显示面板10包括柔性基层110、阵列基板120以及应力调节层130。所述阵列基板120中包括金属走线1215（参见图3所示），所述阵列基板120设于柔性基层110上；所述应力调节层130设于所述阵列基板120上，且对应于所述弯折区1021。
如图2和图3所示，为了更清楚的理解本发明，下面对本实施例的阵列基板120作进一步说明。在所述显示区101和非显示区102；所述阵列基板120包括阻隔层1201、缓冲层1202、第一栅极绝缘层1203、第二栅极绝缘层1204、介电层1205、平坦层1206、以及像素定义层1207。其中，所述阻隔层1201覆于所述柔性基层110上；所述缓冲层1202覆于所述阻隔层1201上；所述第一栅极绝缘层1203覆于所述缓冲层1202上；所述第二栅极绝缘层1204覆于所述第一栅极绝缘层1203上；所述介电层1205覆于所述第二栅极绝缘层1204上。所述平坦层1206覆于所述介电层1205上；所述像素定义层1207覆于所述平坦层1206上。
如图2、图3所示，在所述弯折区1021，所述阵列基板120还包括凹槽1216以及有机层1217，该凹槽1216从所述介电层1205贯穿至所述阻隔层1201。
在制作过程中，当所述介电层1205制作完成后，通过对应的掩膜板进行刻蚀或激光照射，形成所述凹槽1216。之后再在所述凹槽1216中填充有机层1217以及在所述有机层1217上形成所述金属走线1215。
所述凹槽1216在所述阵列基板120内形成台阶结构，所述凹槽1216为台阶结构，其包括第一槽体12161和第二槽体12162，所述第一槽体12161从所述缓冲层1202贯穿至所述阻隔层1201；所述第二槽体12162从所述介电层1205贯穿至所述第一栅极绝缘层1203，所述第一槽体12161和所述第二槽体12162连通，所述第一槽体12161的宽度小于所述第二槽体12162的宽度。所述有机层1217填充于所述凹槽1216内。本实施例中，所述金属走线1215为与所述源漏极同层设置的金属走线，覆于所述有机层1217上。所述应力调节层130覆于所述像素定义层1207上，所述金属走线1215对应所述应力调节层130。
在所述弯折区1021中，由于从所述金属走线1215到所述柔性基层110之间的功能层的厚度若为D，从所述金属走线1215到所述应力调节层130之间的功能层的厚度为E，在实际制程中，D大于E，因此，若不设置所述应力调节层130，当所述弯折区1021弯折时，所述中性面103一般落入所述柔性基层110中，如图4所示。此时，所述金属走线1215 会因拉伸应力和压缩应力发生不可恢复的形变，有时甚至会断裂。而本实施例中，所述弯折区1021中，通过在所述金属走线1215对应位置设置所述凹槽1216，并在所述凹槽1216中填充所述有机层1217，以能够调节所述金属走线1215在弯曲时的拉伸应力，能够配合所述应力调节层130，有助于中性面103进一步从所述柔性基层110向所述金属走线1215所在层偏移，如图5所示。
同时，由于所述凹槽1216的存在，所述应力调节层130所需的厚度可以降低，在实际制作过程中，为了使得中性面103尽可能的落入所述弯折区1021所对应的金属走线1215上，一般情况下，根据各功能层的厚度设定，本实施例中，所述应力调节层130的厚度小于或等于所述柔性基层110的厚度；所述应力调节层130的厚度可设为5-10微米。
所述柔性基层110所用材料为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种。因此，为了简化制程，降低制程难度以及方便设定和调节所述应力调节层130的厚度，本实施例中，所述应力调节层130所用的材料也为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种。所述应力调节层130所用的材料可以与所述柔性基层110所用材料一致，也可以不一致。
如图2、图3所示，在所述显示区域101，所述阵列基板120还设有半导体层1208、第一栅极层1209、第二栅极层1210、源极1211和漏极1212、开口1213以及发光层1214以及阳极1218。其中，所述半导体层1208设于所述缓冲层1202上，且所述第一栅极绝缘层1203完全包覆所述半导体层1208。所述半导体层1208中包括有源层，该有源层所用材料为非晶硅、低温多晶硅、氧化物半导体中的一种。所述第一栅极层1209设于所述第一栅极绝缘层1203上，且所述第二栅极绝缘层1204完全包覆所述第一栅极层1209；所述第二栅极层1210设于所述第二栅极绝缘层1204上，且所述介电层1205覆于所述第二栅极层1210上；所述源极1211和漏极1212分别连接至所述半导体层1208。所述金属走线1215与所述源极1211和所述漏极1212同层设置。所述平坦层1206覆于所述源极1211和所述漏极1212上；所述开口1213贯穿于整个所述像素定义层1207；所述发光层1214填充于所述开口1213中。所述阳极1218连接至所述漏极1212，所述像素定义层1207覆于所述阳极1218上；所述开口1213对应于所述阳极1218。
在制作过程中，当所述缓冲层1202制作完成后，在所述缓冲层1202上制作所述半导体层1208，之后，在所述缓冲层1202以及所述半导体层1208上制作所述第一栅极绝缘层1203。当所述第一栅极绝缘层1203制作完成后，在所述第一栅极绝缘层1203上形成所述第一栅极层1209；当所述第一栅极层1209制作完成后，在所述第一栅极绝缘层1203和所述第一栅极层1209上制作所述第二栅极绝缘层1204。当所述第二栅极绝缘层1204制作完成后，在所述第二栅极绝缘层1204上制作所述第二栅极层1210。当所述第二栅极层1210制作完成后，在所述第二栅极层1210以及所述第二栅极绝缘层1204上制作所述介电层1205。当所述介电层1205制作完成后，通过对应的掩膜板进行刻蚀或激光照射形成所述源极1211和栅极的第一孔槽，该第一孔槽从所述介电层1205贯穿至所述半导体层1208的表面，并在该第一孔槽内形成所述源极1211和所述漏极1212，使得所述源极1211和所述漏极1212对应连接至所述半导体层1208。当所述源极1211和所述漏极1212制作完成后，在所述介电层1205、所述源极1211、所述漏极1212的表面形成平坦层1206，当所述平坦层1206制作完成后，通过对应的掩膜板在所述平坦层1206上形成第二孔槽，该第二孔槽从所述平坦层1206的表面贯穿至所述漏极1212的表面，之后在所述第二孔槽内以及所述平坦层1206上形成连接所述漏极1212的所述阳极1218。之后再在阳极1218以及平坦层1206上形成所述像素定义层1207，完成后续制作步骤。
如图6所示，本发明还提供一种显示装置1，包括所述的显示面板10、彩膜基板20、偏光片30、触摸屏40。本发明的重点在于显示面板10，具体在所述阵列基板120上设置应力调节层130，且所述应力调节层130对应于所述弯折区1021。使得中性面103尽可能的落入所述弯折区1021所对应的金属走线1215上。一般情况下，根据各功能层的厚度设定，由于所述显示装置1还具有彩膜基板20、偏光片30功能层，而且这些功能层一般远离柔性基底，因此，在所述显示装置1实际制作过程中，所述应力调节层130的厚度应小于所述柔性基层110的厚度。本实施例中，对于显示装置1其他构件，如彩膜基板20、偏光片30、触摸屏40、封装框架等不再一一赘述。
以上仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种显示面板，其包括
    显示画面的显示区域及设置在所述显示区域外的非显示区域，所述非显示区域包括弯折区；
    金属走线，从所述显示区域延伸至所述弯折区；以及
    应力调节层，设于所述金属走线上且对应于所述弯折区。
  2. 根据权利要求1所述的显示面板，其还包括柔性基层，所述金属走线位于所述柔性基层上，所述应力调节层的厚度小于或等于所述柔性基层的厚度。
  3. 根据权利要求2所述的显示面板，其特征在于，所述应力调节层所用的材料为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种；
    所述柔性基层所用材料为聚酰亚胺、聚醚酰亚胺、聚苯硫醚、聚芳酯中的至少一种。
  4. 根据权利要求1所述的显示面板，其中，所述应力调节层的厚度为5-10微米。
  5. 根据权利要求2所述的显示面板，其还包括在所述显示区和非显示区同层设置的：
    阻隔层，覆于所述柔性基层上；
    缓冲层，覆于所述阻隔层上；
    第一栅极绝缘层，覆于所述缓冲层上；
    第二栅极绝缘层，覆于所述第一栅极绝缘层上；以及
    介电层，覆于所述第二栅极绝缘层上；
    所述金属走线覆于所述介电层上；
    平坦层，覆于所述介电层以及金属走线上；
    像素限定层，覆于所述平坦层上；
    所述应力调节层覆于所述像素限定层上。
  6. 根据权利要求5所述的显示面板，其中，在所述弯折区设有从所述介电层贯穿所述阻隔层的凹槽，所述凹槽内填充有机层，所述应力调节层对应设置在所述有机层上。
  7. 根据权利要求6所述的显示面板，其中，所述凹槽为台阶结构，其包括
    第一槽体，从所述缓冲层贯穿至所述阻隔层；
    第二槽体，从所述介电层贯穿至所述第一栅极绝缘层，所述第一槽体和第二槽体连通，所述第一槽体的宽度小于所述第二槽体的宽度。
  8. 根据权利要求5所述的显示面板，其中，在所述显示区，所述显示面板还包括
    半导体层，设于所述缓冲层上，且所述第一栅极绝缘层设置在所述半导体层上；
    第一栅极层，设于所述第一栅极绝缘层上，且所述第二栅极绝缘层设置在所述第一栅极层上；
    第二栅极层，设于所述第二栅极绝缘层上，且所述介电层设置在所述第二栅极层上；
    源极和漏极，分别连接至所述半导体层，所述金属走线与所述源极和漏极同层设置；
    开口，间隔设置在所述像素限定层；以及
    发光层，设置于所述开口中；
    阳极，设置在平坦层上且所述像素限定层覆于所述阳极上；所述开口对应于所述阳极。
  9. 根据权利要求1所述的显示面板，其中，当所述弯折区弯折时，中性面位于所述金属走线所在层中。
  10. 一种显示装置，其包括如权利要求1所述的显示面板。
PCT/CN2019/070930 2018-12-12 2019-01-09 显示面板及具有该显示面板的显示装置 Ceased WO2020118823A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/325,406 US11043547B2 (en) 2018-12-12 2019-01-09 Display panel and display device having same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811515043.8A CN109585514A (zh) 2018-12-12 2018-12-12 显示面板及具有该显示面板的显示装置
CN201811515043.8 2018-12-12

Publications (1)

Publication Number Publication Date
WO2020118823A1 true WO2020118823A1 (zh) 2020-06-18

Family

ID=65929246

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/070930 Ceased WO2020118823A1 (zh) 2018-12-12 2019-01-09 显示面板及具有该显示面板的显示装置

Country Status (3)

Country Link
US (1) US11043547B2 (zh)
CN (1) CN109585514A (zh)
WO (1) WO2020118823A1 (zh)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110197845B (zh) * 2019-06-20 2021-06-25 武汉华星光电半导体显示技术有限公司 显示面板及其制备方法
CN110544710A (zh) 2019-08-08 2019-12-06 武汉华星光电半导体显示技术有限公司 柔性阵列基板及显示装置
WO2021088037A1 (zh) 2019-11-08 2021-05-14 京东方科技集团股份有限公司 阵列基板及其制造方法、显示面板、显示装置
CN110955090B (zh) * 2019-12-20 2022-12-02 京东方科技集团股份有限公司 一种显示面板、显示面板的制作方法及显示装置
CN111180609A (zh) * 2020-01-06 2020-05-19 武汉华星光电半导体显示技术有限公司 一种显示面板及其显示装置
US11271057B2 (en) * 2020-02-12 2022-03-08 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Array substrate, manufacturing method thereof, and display panel
CN113711290B (zh) 2020-03-23 2023-07-18 京东方科技集团股份有限公司 显示基板及其制备方法、显示母板和显示装置
CN111383535B (zh) 2020-03-25 2022-07-08 合肥维信诺科技有限公司 显示面板及显示装置
CN111430417B (zh) * 2020-03-31 2022-09-09 武汉华星光电半导体显示技术有限公司 一种显示面板及其制备方法
CN111627965A (zh) 2020-05-26 2020-09-04 武汉华星光电半导体显示技术有限公司 一种显示面板及显示装置
CN111682011B (zh) * 2020-06-22 2022-07-26 京东方科技集团股份有限公司 一种显示基板及其检测方法、制备方法、显示面板
CN111768701B (zh) * 2020-06-22 2022-04-08 武汉华星光电半导体显示技术有限公司 显示面板
CN112614873A (zh) * 2020-12-14 2021-04-06 深圳市华星光电半导体显示技术有限公司 显示面板
CN112669710A (zh) * 2020-12-30 2021-04-16 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
CN112951849B (zh) * 2021-02-10 2023-03-28 武汉华星光电半导体显示技术有限公司 显示面板及其制备方法
CN113096531B (zh) * 2021-03-24 2023-02-28 深圳市华星光电半导体显示技术有限公司 一种显示面板
CN113629113A (zh) * 2021-07-29 2021-11-09 武汉华星光电半导体显示技术有限公司 显示面板
CN113851520B (zh) * 2021-11-29 2022-04-22 荣耀终端有限公司 显示面板及其制作方法、终端设备
CN114420735A (zh) * 2022-01-14 2022-04-29 深圳市华星光电半导体显示技术有限公司 显示面板
CN114566506B (zh) * 2022-02-21 2025-01-03 深圳市华星光电半导体显示技术有限公司 柔性tft基板、柔性显示面板以及柔性显示装置
US20240063338A1 (en) * 2022-08-17 2024-02-22 Taiwan Semiconductor Manufacturing Company Ltd. Curved semiconductor chip and method for forming the same
KR20250174146A (ko) * 2024-06-04 2025-12-12 삼성디스플레이 주식회사 표시장치

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105826350A (zh) * 2015-01-28 2016-08-03 三星显示有限公司 显示装置
CN105845707A (zh) * 2015-02-02 2016-08-10 三星显示有限公司 显示装置
CN107634086A (zh) * 2017-09-15 2018-01-26 京东方科技集团股份有限公司 一种柔性阵列基板及制备方法、显示装置
CN107946317A (zh) * 2017-11-20 2018-04-20 京东方科技集团股份有限公司 一种柔性阵列基板及制备方法、显示基板、显示装置
KR20180060710A (ko) * 2016-11-29 2018-06-07 엘지디스플레이 주식회사 플렉서블 표시장치
CN108598135A (zh) * 2018-06-06 2018-09-28 武汉华星光电半导体显示技术有限公司 Oled显示面板及其制备方法
CN208208203U (zh) * 2018-06-06 2018-12-07 上海和辉光电有限公司 一种柔性显示面板及显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102222680B1 (ko) * 2013-02-01 2021-03-03 엘지디스플레이 주식회사 플렉서블 디스플레이 기판, 플렉서블 유기 발광 표시 장치 및 플렉서블 유기 발광 표시 장치 제조 방법
KR102463838B1 (ko) * 2015-08-24 2022-11-04 삼성디스플레이 주식회사 가요성 표시 장치와 이의 제조 방법
KR102373441B1 (ko) * 2017-03-31 2022-03-14 삼성디스플레이 주식회사 디스플레이 장치
CN107706220B (zh) * 2017-09-28 2020-04-21 上海天马微电子有限公司 柔性显示面板及其制作方法和显示装置
CN108288637B (zh) * 2018-01-24 2021-03-02 武汉华星光电半导体显示技术有限公司 柔性显示面板的制作方法及柔性显示面板
US11462700B2 (en) * 2018-02-28 2022-10-04 Sharp Kabushiki Kaisha Display device comprising flexible display panel
KR102687808B1 (ko) * 2018-09-21 2024-07-25 삼성디스플레이 주식회사 표시 장치

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105826350A (zh) * 2015-01-28 2016-08-03 三星显示有限公司 显示装置
CN105845707A (zh) * 2015-02-02 2016-08-10 三星显示有限公司 显示装置
KR20180060710A (ko) * 2016-11-29 2018-06-07 엘지디스플레이 주식회사 플렉서블 표시장치
CN107634086A (zh) * 2017-09-15 2018-01-26 京东方科技集团股份有限公司 一种柔性阵列基板及制备方法、显示装置
CN107946317A (zh) * 2017-11-20 2018-04-20 京东方科技集团股份有限公司 一种柔性阵列基板及制备方法、显示基板、显示装置
CN108598135A (zh) * 2018-06-06 2018-09-28 武汉华星光电半导体显示技术有限公司 Oled显示面板及其制备方法
CN208208203U (zh) * 2018-06-06 2018-12-07 上海和辉光电有限公司 一种柔性显示面板及显示装置

Also Published As

Publication number Publication date
US11043547B2 (en) 2021-06-22
US20210126073A1 (en) 2021-04-29
CN109585514A (zh) 2019-04-05

Similar Documents

Publication Publication Date Title
WO2020118823A1 (zh) 显示面板及具有该显示面板的显示装置
CN107634086B (zh) 一种柔性阵列基板及制备方法、显示装置
CN109786434B (zh) 阵列基板、其制备方法、显示面板、装置和像素驱动电路
US7221012B2 (en) Pixel array
US12096675B2 (en) Display panel
WO2018176740A1 (zh) 柔性显示面板、显示装置及柔性显示面板的制作方法
US11380628B2 (en) Mother substrate for display substrates, manufacture method thereof, display substrate and display device
US20130293595A1 (en) Liquid crystal display device and method of fabricating the same
US9478565B2 (en) Array substrate and method for fabricating the same, and display panel
CN109671748B (zh) 一种显示面板及其制作方法
CN104375347B (zh) 阵列基板、修补片、显示面板和修复阵列基板的方法
CN109148485B (zh) 阵列基板及其制作方法和显示装置
US10199397B2 (en) Electrical connection structure, array substrate and display device
US11133488B2 (en) Display substrate, display apparatus, and method of fabricating display substrate having enclosure ring in buffer area
WO2017049842A1 (zh) 阵列基板及其制作方法、显示装置
EP3657241B1 (en) Array substrate and manufacturing method thereof, and display device
CN111489647A (zh) 显示模组及其制造方法、显示装置
KR102350395B1 (ko) 평판 표시 패널 및 그의 제조 방법
WO2021031337A1 (zh) 显示装置及其制备方法
KR20210029882A (ko) 표시 장치 및 그 제조 방법
WO2020228231A1 (zh) 一种显示屏及电子装置
CN104090402A (zh) 一种阵列基板及其制作方法、显示装置
KR102796194B1 (ko) 표시 장치 및 이의 제조 방법
WO2022056789A1 (zh) 一种显示面板及显示装置
JP7397556B2 (ja) ディスプレイパネル及び表示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19895353

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19895353

Country of ref document: EP

Kind code of ref document: A1