WO2020118764A1 - 过流保护方法、显示面板及显示装置 - Google Patents

过流保护方法、显示面板及显示装置 Download PDF

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Publication number
WO2020118764A1
WO2020118764A1 PCT/CN2018/123253 CN2018123253W WO2020118764A1 WO 2020118764 A1 WO2020118764 A1 WO 2020118764A1 CN 2018123253 W CN2018123253 W CN 2018123253W WO 2020118764 A1 WO2020118764 A1 WO 2020118764A1
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Prior art keywords
voltage value
overcurrent protection
circuit
input
level conversion
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PCT/CN2018/123253
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English (en)
French (fr)
Inventor
邱彬
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HKC Co Ltd
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HKC Co Ltd
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Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to US17/043,058 priority Critical patent/US11398722B2/en
Publication of WO2020118764A1 publication Critical patent/WO2020118764A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/093—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means
    • H02H3/0935—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means the timing being determined by numerical means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/025—Reduction of instantaneous peaks of current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/093—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means

Definitions

  • the present application relates to the technical field of display devices, and in particular, to an overcurrent protection method, a display panel, and a display device.
  • GATE Driver on Array is a technology that uses the existing TFT-LCD array manufacturing process to fabricate the gate row driving circuit on the array substrate to realize the progressive scanning of the gate.
  • the gate drive circuit processes the power signal to drive the TFT-LCD array, the gate drive circuit will have an overcurrent phenomenon.
  • the overcurrent protection mechanism of the gate drive circuit in the display panel is to detect the instantaneous increase in the input current of the level shifter, that is, to cut off the power of the gate drive circuit to achieve overcurrent protection.
  • the overcurrent protection mechanism will be triggered by mistake, resulting in a black screen.
  • the main purpose of the present application is to provide an overcurrent protection method, a display panel and a display device, aiming to avoid the phenomenon that the overcurrent protection mechanism of the gate drive circuit is triggered by mistake.
  • the present application proposes an overcurrent protection method, which is applied to a display panel.
  • the display panel includes a power supply circuit, a timing controller, a level conversion circuit, and a gate drive circuit.
  • the overcurrent protection method includes:
  • the timing controller performs timing when the level conversion circuit outputs the initial clock signal to the gate driving circuit, and obtains the average value of the input current input from the power circuit to the level conversion circuit within the first timing time t0-t1;
  • the gate drive circuit When the average value of the input current is greater than or equal to the preset average value of the current, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the obtaining the average value of the input current input from t0 to t1 to the level conversion circuit within the first timing time includes:
  • the timing controller acquires at least two of the current values input by the power circuit to the level conversion circuit within the first timing time t0-t1;
  • An average value calculation is performed on at least two of the current values to obtain the average value of the input current.
  • the obtaining the average value of the input current input to the level conversion circuit within the first timing time t0-t1 includes:
  • the timing controller acquires all values in the current value input by the power supply circuit to the level conversion circuit within the first timing time t0-t1;
  • the current values of all values are averaged to obtain the average value of the input current.
  • the average value of the preset current is the overcurrent protection value of the gate driving circuit.
  • the overcurrent protection method further includes:
  • the gate drive circuit When the number of times that the input voltage value is greater than or equal to the preset voltage value is greater than or equal to the preset number of times, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the acquiring the input voltage value input from the power supply circuit to the level conversion circuit within the second timing time t2-tn includes:
  • the timing controller acquires the input voltage value input from the power supply circuit to the level conversion circuit once in each cycle of the clock signal output by the level conversion circuit.
  • the determination of the number of times that the input voltage value is greater than or equal to the preset voltage value specifically includes: determining the number of times that the absolute value of the input voltage value is greater than or equal to the preset voltage value;
  • controlling the gate drive circuit to enter an overcurrent protection state is specifically: when the absolute value of the input voltage value is greater than Or when the number of times equal to the preset voltage value exceeds the preset number, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the number of times that the absolute value of the input voltage value is greater than or equal to the preset voltage value is specifically:
  • controlling the gate drive circuit to enter an overcurrent protection state specifically includes: cutting off the power input from the power supply circuit to the level conversion circuit.
  • the first timing time t0-t1 is a preset time period.
  • the first timing time t0-t1 is less than or equal to the level time of the first clock signal output by the level conversion circuit.
  • the t0 refers to a time point when the level conversion circuit outputs a start clock signal to the gate driving circuit.
  • the preset current average value is an overcurrent protection value of the gate driving circuit.
  • the present application also proposes a display panel, the display panel includes a power supply circuit, a timing controller, a level conversion circuit and a gate drive circuit, the timing controller includes a memory, a processor and stored in the An overcurrent protection program that can run on the memory and the processor, and when the processor executes the overcurrent protection program, the following overcurrent protection method is implemented:
  • the timing controller performs timing when the level conversion circuit outputs the initial clock signal to the gate driving circuit, and obtains the average value of the input current input from the power circuit to the level conversion circuit within the first timing time t0-t1;
  • the gate drive circuit When the average value of the input current is greater than or equal to the preset average value of the current, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the timing controller is also set to:
  • the gate drive circuit When the number of times that the input voltage value is greater than or equal to the preset voltage value is greater than or equal to the preset number of times, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the timing controller is also set to:
  • the timing controller obtains the input voltage value input by the power supply circuit to the level conversion circuit once in each cycle of the clock signal output by the level conversion circuit.
  • the timing controller is further configured to determine the number of times that the absolute value of the input voltage value is greater than or equal to a preset voltage value
  • controlling the gate drive circuit to enter an overcurrent protection state is specifically: when the absolute value of the input voltage value is greater than Or when the number of times equal to the preset voltage value exceeds the preset number, the gate drive circuit is controlled to enter an overcurrent protection state.
  • the present application also proposes a display device, the display device includes the above display panel, specifically refer to the above, and will not be repeated here.
  • the timing controller in the display panel performs timing when outputting the initial clock signal from the level conversion circuit to the gate drive circuit, and obtains the average value of the input current input from the power circuit to the level conversion circuit within the first timing time , And compared with the preset average current value, when it is determined that the average input current of the level shift circuit exceeds the circuit's overcurrent protection threshold within the first timing time t0-t1, the circuit may be considered to have an excessively high transient current or It is the high current that lasts for a long time, which is enough to damage the circuit. At this time, the gate drive circuit is overcurrent protected to prevent the circuit from being damaged.
  • the circuit's overcurrent protection threshold When the input current value of the level conversion circuit within the first timing time t0-t1 does not exceed the circuit's overcurrent protection threshold, it can be considered that the circuit is only occasionally fluctuating high, and will not last very long (the longer it lasts, the average detected current Will be larger and larger), then no protection is needed, and protection is not triggered at this time. It can be seen that whether the average current of the level conversion circuit exceeds the overcurrent protection threshold of the circuit within the first timing time t0-t1 to determine whether the circuit is overcurrent, can accurately determine whether the circuit is really overcurrent, so To avoid the phenomenon that the over-current protection mechanism of the gate drive circuit is falsely triggered within the first timing time t0-t1, and improve the stability of the product.
  • FIG. 1 is a schematic diagram of a circuit function module of an embodiment of a display panel of the present application
  • FIG. 2 is a schematic flowchart of an embodiment of an overcurrent protection method according to this application.
  • FIG. 3 is a schematic flowchart of another embodiment of an overcurrent protection method according to this application.
  • FIG. 5 is a schematic structural diagram of an embodiment of a display device according to this application.
  • FIG. 6 is a schematic diagram of functional modules of an embodiment of a timing controller of the present application.
  • first, second, etc. in this application are for descriptive purposes only, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated.
  • the features defined with “first” and “second” may include at least one of the features either explicitly or implicitly.
  • the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary people in the art to achieve, when the combination of technical solutions conflicts with each other or cannot be realized, it should be considered that the combination of such technical solutions does not exist , Nor within the scope of protection required by this application.
  • the display device 100 includes a display panel 150.
  • the display panel 150 includes a power circuit 210, a timing controller 220, a level shift circuit 230, and a gate driving circuit 240.
  • the power input terminal of the level conversion circuit 230 is connected to the power circuit 210
  • the control input terminal of the level conversion circuit 230 is connected to the timing controller 220
  • the output terminal of the level conversion circuit 230 is connected to all
  • the gate drive circuit 240 is connected.
  • the timing controller 220 outputs a control signal to control the level conversion circuit 230 to perform level conversion on the power output by the power supply circuit 210 and then output to the gate driving circuit 240 to control the gate driving circuit 240 to drive the thin film transistor array to work.
  • the gate driving circuit 240 may have an overcurrent phenomenon.
  • One over-current protection mechanism is to cut off the power supply of the gate driving circuit 240 when the input current of the level shifter is detected to increase instantaneously, thereby realizing over-current protection.
  • the gate drive circuit 240 is just started, the input current of the level shifter is likely to increase instantaneously due to external interference (this is not a real overcurrent), then the overcurrent protection mechanism will be triggered by mistake, resulting in a black screen .
  • the overcurrent protection method includes the following steps:
  • step S101 the timing controller 220 performs timing when the level conversion circuit 230 outputs the start clock signal to the gate driving circuit 240, and obtains the input from the power circuit 210 to the level conversion circuit 230 within the first timing time t0-t1 Current mean
  • the average value of the input current is the average value of the input current of the level conversion circuit 230 in the first timing time t0-t1.
  • t0 refers to the time point when the level shift circuit 230 outputs the start clock signal to the gate driving circuit 240. If the timing is not performed when the level shift circuit 230 outputs the start clock signal, but the start clock is output The timing starts only at a time point after the signal. During this time interval, there may be an instantaneous large current, which will cause IC damage, and the gate driving circuit 240 cannot be truly protected.
  • the first timing time t0-t1 is a preset period of time, corresponding to a period of time when the gate driving circuit 240 has just started, and the length of this period of time is set according to the first clock signal output by the level conversion circuit 230 It may be less than or equal to the level time of the first clock signal.
  • the gate drive circuit 240 completes the start-up work and enters a stable working state.
  • the timing controller 220 detects that the average current is obtained during this time period Completed within.
  • the timing controller 220 may obtain all or at least two values of the current value input by the power circuit 210 to the level conversion circuit 230 within the first timing time t0-t1 for the calculation of the average input current .
  • the purpose of obtaining the average value of the input current input from the power supply circuit 210 to the level conversion circuit 230 is to truly determine whether the gate driving circuit 240 is in danger of overcurrent.
  • the circuit is only occasionally fluctuating high and will not last for a long time (the longer it lasts) , The average value of the detected current will become larger and larger), it is determined that the circuit does not appear to be a phenomenon, but the current is occasionally increased by other factors and will not damage the circuit.
  • the input current of the level conversion circuit 230 exceeds the overcurrent protection threshold of the circuit within the first timing time t0-t1, it is considered that the circuit may have an excessively high current or an excessively high current for a long time, which is sufficient to damage the circuit . Therefore, by calculating the average value of the input current of the level conversion circuit 230 in the first timing time t0-t1, it can be known whether the gate drive circuit 240 is in a true overcurrent in a period of time just after starting.
  • Step S102 When the average value of the input current is greater than or equal to the preset average value of the current, control the gate driving circuit 240 to enter an overcurrent protection state.
  • the preset average current value may be the upper limit of the normal fluctuation of the current when the gate driving circuit 240 operates normally.
  • the preset average current value may be the overcurrent protection value of the gate drive circuit 240, that is, the maximum current that the gate drive circuit 240 can withstand.
  • a comparison may be provided for the gate drive circuit 240.
  • the maximum value of the current that can be tolerated is smaller.
  • control gate driving circuit 240 entering the overcurrent protection state may specifically be: cut off the power input from the power circuit 210 in the display panel 150 to the level shift circuit 230.
  • control gate driving circuit 240 may directly turn off the power supply or use other methods to achieve overcurrent protection for the gate driving circuit 240.
  • the timing controller 220 in the display panel 150 outputs the start clock signal from the level conversion circuit 230 to the gate driving circuit 240, the timing is obtained, and the power circuit 210 is input to the level conversion within the first timing time.
  • the mean value of the input current of the circuit 230 is compared with the preset mean value. When it is determined that the mean value of the input current of the level shift circuit 230 exceeds the overcurrent protection threshold of the circuit within the first timing time t0-t1, it is considered that the circuit may appear An excessively high transient current or an excessively high current lasts for a long time, and the current is sufficient to damage the circuit. In this case, the gate drive circuit 240 is protected from overcurrent to prevent the circuit from being damaged.
  • the circuit's overcurrent protection threshold When the input current value of the level conversion circuit 230 within the first timing time t0-t1 does not exceed the circuit's overcurrent protection threshold, it can be considered that the circuit is only occasionally fluctuating and is not high for a long time (the longer the duration, the detected current The mean value will become larger and larger), then no protection is needed, and protection is not triggered at this time. It can be seen that whether the average current of the level conversion circuit 230 exceeds the overcurrent protection threshold of the circuit within the first timing time t0-t1 to determine whether the circuit is overcurrent, can accurately determine whether the circuit is really overcurrent, Therefore, the phenomenon that the overcurrent protection mechanism of the gate driving circuit 240 is erroneously triggered within the first timing time t0-t1 is avoided, and the stability of the product is improved.
  • obtaining the average value of the input current input from t0 to t1 to the level conversion circuit 230 within the first timing time includes:
  • the timing controller 220 acquires at least two of the current values input by the power circuit 210 to the level conversion circuit 230 within the first timing time t0-t1;
  • An average value calculation is performed on at least two of the current values to obtain the average value of the input current.
  • the power supply circuit 210 outputs current to the level conversion circuit 230, which is a continuous and unstable process.
  • the timing controller 220 needs to obtain the current within this period For the average value, at least two sampled current values within this time period must be obtained, such as 2, 5, 10, etc., and then the average value of the obtained multiple current values can be calculated by the timing controller 220, thereby The average value of the current in the first time t0-t1 is obtained.
  • the overcurrent protection method further includes:
  • Step S103 When the current average value is less than the preset current average value, obtain the input voltage value input by the power supply circuit 210 to the level conversion circuit 230 within the second timing time t2-tn, where tn>t2>t1;
  • Step S104 Determine the number of times that the input voltage value is greater than or equal to the preset voltage value
  • Step S105 When the number of times that the input voltage value is greater than or equal to the preset voltage value is greater than or equal to the preset number of times, control the gate driving circuit 240 to enter an overcurrent protection state.
  • the timing controller 220 pre-sets the preset voltage value and the preset number of times that the input voltage value is greater than or equal to the preset voltage value as a reference for judgment.
  • the timing controller 220 monitors the input voltage value of the power circuit 210 input to the level shift circuit 230 after monitoring is greater than or equal to the preset voltage value, a count is performed, and the number of counts is accumulated, when the accumulated count is greater than or equal to the preset number of times If it is considered that an overcurrent condition occurs, the gate driving circuit 240 is controlled to enter an overcurrent protection state. If it is less than a preset number of times, the gate driving circuit 240 of the display panel 150 continues to operate normally. Referring to FIG.
  • the input voltage value input from the power supply circuit 210 to the level conversion circuit 230 may be obtained once in each cycle of the clock signal output by the level conversion circuit 230, and of course, there may be a plurality. It can be understood that, during the second timing time t2-tn, the timing controller 220 only obtains the voltage value in each cycle of the clock signal output by the level conversion circuit 230 once, the purpose is to improve the calculation efficiency, and each cycle The voltage value of can reflect the overall situation of this cycle, and can ensure higher accuracy. Obtaining too many values for calculation will increase a lot of calculation costs.
  • CLK is the clock signal of the level conversion circuit 230
  • ICLK is the current value of the clock signal in the level conversion circuit 230
  • OCP is the overcurrent protection threshold value preset in the clock signal of the level conversion circuit 230.
  • the action of the input voltage value input by the power supply circuit 210 to the level conversion circuit 230 within the second timing time t2-tn is that after the first timing time t0-t1, there is no first timing time t0- In the process of t1, there is no subsequent action of the circuit operation in the display panel 150.
  • the second timing time t2-tn may be one frame time, which is convenient for overcurrent protection control.
  • whether the input voltage value input by the power supply circuit 210 to the level conversion circuit 230 within the second timing time t2-tn is The determination that the number of times is greater than or equal to the preset voltage value, and then determines whether the number of times is greater than or equal to the preset number of times, thereby achieving protection of the gate driving circuit 240 of the display panel 150 within the second timing time t2-tn.
  • the number of times that the input voltage value is determined to be greater than or equal to the preset voltage value may specifically be: first determine the positive input voltage within the positive level time of the clock signal output by the level conversion circuit 230 The value and the reverse input voltage value within the negative level time of the clock signal output by the level conversion circuit 230 are compared with the corresponding forward and reverse voltage reference values, and then the forward/reverse input voltage value is calculated to be greater than or equal to The total number of corresponding preset voltage values.
  • the determination of the number of times that the input voltage value is greater than or equal to the preset voltage value may specifically be: determining the number of times that the absolute value of the input voltage value is greater than or equal to the preset voltage value.
  • the positive input voltage value during the positive level time of the clock signal output by the level conversion circuit 230 and the reverse input voltage value during the negative level time of the clock signal output by the level conversion circuit 230 may be determined first, Performing an absolute value operation on the forward input voltage value and the reverse input voltage value to obtain the absolute value of the input voltage value, and then comparing the absolute value of the input voltage value with a preset voltage value, To obtain the number of input voltage values greater than or equal to the preset voltage value in the absolute value of the input voltage value. This method simplifies the calculation process and improves the calculation efficiency.
  • the absolute value calculation is performed by the input voltage value in the level conversion circuit 230, so that the timing controller 220 performs the number of times that the input voltage value is greater than or equal to the preset voltage value within the second timing time t2-tn Accurate counting will not miss the case where the reverse input voltage value during the negative level time of the clock signal output by the level conversion circuit 230 is greater than or equal to the preset voltage value. More effective overcurrent protection for the gate driving circuit 240 of the display panel 150 during the second timing time t2-tn.
  • the display panel 150 includes but is not limited to a liquid crystal display panel, an organic light emitting diode display panel, a field emission display panel, a plasma display panel, a curved panel, the liquid crystal panel includes a thin film transistor liquid crystal display panel, a TN panel, VA panel, IPS panel, etc.
  • the timing controller 220 includes a memory 2201, a processor 2202, and an overcurrent protection program stored on the memory 2201 and running on the processor 2202.
  • the processor When 2202 executes the overcurrent protection program, the steps of the overcurrent protection method in the foregoing embodiments are implemented. It can be understood that, since the above-mentioned overcurrent protection method is used in the display panel 150, the embodiments of the display panel 150 include all the technical solutions of all the embodiments of the above-mentioned overcurrent protection method in the display panel 150, and the achieved The technical effects are also the same, and will not be repeated here.
  • the display device 100 includes the above-mentioned display panel 150, and the display panel 150 includes the above-mentioned overcurrent protection method, therefore, it also has all the technical solutions of all the above-mentioned overcurrent protection methods embodiments, and the technical effects achieved are also the same And will not be repeated here.
  • the display device 100 may be a general display or a flat-screen TV, and of course, may also be a liquid crystal display or a liquid crystal TV.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种过流保护方法、显示面板(150)及显示装置(100)，过流保护方法应用于显示面板(150)，显示面板(150)包括电源电路(210)、时序控制器(220)、电平转换电路(230)及栅极驱动电路(240)，过流保护方法包括：时序控制器(220)在电平转换电路(230)输出起始时钟信号至栅极驱动电路(240)时进行计时，并获取第一计时时间t0-t1内电源电路(210)输入至电平转换电路(230)的输入电流均值；当输入电流均值大于或者等于预设电流均值时，控制栅极驱动电路(240)进入过流保护状态。

Description

过流保护方法、显示面板及显示装置
相关申请
本申请要求2018年12月12日申请的，申请号为201811514295.9，名称为“过流保护方法、显示面板及显示装置”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及显示装置技术领域，特别涉及一种过流保护方法、显示面板及显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
目前，在显示面板栅极驱动电路(Gate Driver on Array，GOA)，是利用现有TFT-LCD阵列制程将栅极行驱动电路制作在阵列基板上，实现对栅极逐行扫描的驱动方式的一项技术。但是，栅极驱动电路由于是将电源信号处理后驱动TFT-LCD阵列，因此，栅极驱动电路会出现过流现象。
目前，显示面板中的栅极驱动电路的过流保护机制是在侦测电平转换器的输入电流瞬时变大时，即将栅极驱动电路的电源切断，实现过流保护。但是，若因外部干扰导致电平转换器的输入电流瞬时变大，则该过流保护机制会被误触发，导致黑屏。
申请内容
本申请的主要目的是提供一种过流保护方法、显示面板及显示装置，旨在避免栅极驱动电路的过流保护机制被误触发的现象。
为实现上述目的，本申请提出一种过流保护方法，应用于显示面板，所述显示面板包括电源电路、时序控制器、电平转换电路及栅极驱动电路，所述过流保护方法包括:
时序控制器在电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，并获取第一计时时间t0-t1内电源电路输入至电平转换电路的输入电流均值；以及
当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路进入过流保护状态。
在一实施例中，所述获取第一计时时间内t0-t1输入至电平转换电路的输入电流均值包括：
时序控制器获取第一计时时间t0-t1内，电源电路输入至电平转换电路的电流值中的至少两个；
对至少两个所述电流值进行平均值计算，以获得所述输入电流均值。
在一实施例中，所述获取第一计时时间t0-t1内输入至电平转换电路的输入电流均值包括：
时序控制器获取第一计时时间t0-t1内，电源电路输入至电平转换电路的电流值中的全部数值；
对全部数值的所述电流值进行平均值计算，以获得所述输入电流均值。
在一实施例中，所述预设电流均值为所述栅极驱动电路的过流保护值。
在一实施例中，所述过流保护方法还包括：
当所述电流均值小于预设的电流均值时，获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值，所述tn＞t2＞t1；
确定所述输入电压值中大于或者等于预设电压值的次数；
当所述输入电压值中大于或者等于预设电压值的次数大于或者等于预设次数时，控制所述栅极驱动电路进入过流保护状态。
在一实施例中，所述获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值包括：
在第二计时时间t2-tn内，时序控制器在电平转换电路输出的时钟信号的每一周期内，获取一次电源电路输入至电平转换电路的输入电压值。
在一实施例中，所述确定所述输入电压值中大于或者等于预设电压值的次数具体为：确定所述输入电压值的绝对值中大于或者等于预设电压值的次数；
所述当所述输入电压值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态具体为：当所述输入电压值的绝对值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态。
在一实施例中，所述确定所述输入电压值的绝对值中大于或者等于预设电压值的次数具体为：
确定在电平转换电路输出的时钟信号的正电平时间内的正向输入电压值和在电平转换电路输出的时钟信号的负电平时间内的反向输入电压值，对所述正向输入电压值和所述反向输入电压值进行绝对值运算，以得到所述输入电压值的绝对值；
将所述输入电压值的绝对值与预设电压值进行比较，以获得所述输入电压值的绝对值中大于或者等于所述预设电压值的输入电压值的次数。
在一实施例中，所述控制所述栅极驱动电路进入过流保护状态具体为：切断所述电源电路输入至所述电平转换电路的电源。
在一实施例中，所述第一计时时间t0-t1为预先设定的一个时间段。
在一实施例中，所述第一计时时间t0-t1为小于或者是等于所述电平转换电路输出的第一个时钟信号的电平时间。
在一实施例中，所述t0是指电平转换电路输出起始时钟信号至栅极驱动电路时的开始的时间点。
在一实施例中，所述预设电流均值为栅极驱动电路的过流保护值。
为实现上述目的，本申请还提出一种显示面板，所述显示面板包括电源电路、时序控制器、电平转换电路及栅极驱动电路，所述时序控制器包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的过流保护程序，所述处理器执行所述过流保护程序时实现如下过流保护方法：
时序控制器在电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，并获取第一计时时间t0-t1内电源电路输入至电平转换电路的输入电流均值；以及
当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路进入过流保护状态。
在一实施例中，所述时序控制器还设置为：
当所述电流均值小于预设的电流均值时，获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值，所述tn＞t2＞t1；
确定所述输入电压值中大于或者等于预设电压值的次数；
当所述输入电压值中大于或者等于预设电压值的次数大于或者等于预设次数时，控制所述栅极驱动电路进入过流保护状态。
在一实施例中，所述时序控制器还设置为：
在第二计时时间t2-tn内，所述时序控制器在所述电平转换电路输出的时钟信号的每一周期内，获取一次电源电路输入至所述电平转换电路的输入电压值。
在一实施例中，所述时序控制器，还设置为确定所述输入电压值的绝对值中大于或者等于预设电压值的次数；
所述当所述输入电压值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态具体为：当所述输入电压值的绝对值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态。
为实现上述目的，本申请还提出一种显示装置，所述显示装置包括上述显示面板，具体参照上述，此处不再赘述。
本申请技术方案，通过显示面板中的时序控制器从电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，获取第一计时时间内电源电路输入至电平转换电路的输入电流均值，并与预设电流均值进行比较，当确定第一计时时间t0-t1内电平转换电路的输入电流均值超过电路的过流保护阀值时，则认为电路可能出现过高的瞬态电流或者是出现偏高的电流持续较久，该电流足以损坏电路，此时，对栅极驱动电路进行过流保护，避免了电路被损坏。当第一计时时间t0-t1内电平转换电路的输入电流值没有超过电路的过流保护阀值时，可以认为电路只是偶然性波动偏高，不会持续很久（持续越久，检测到的电流均值会越来越大），则不需要保护，此时不触发保护。由此可知，通过第一计时时间t0-t1内电平转换电路的输入电流均值是否超过电路的过流保护阀值来确定电路是否过流，可以很准确的判断出电路是否真正过流，因此，避免了第一计时时间t0-t1内栅极驱动电路的过流保护机制被误触发的现象，提升了产品的稳定性。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请显示面板一实施例的电路功能模块示意图；
图2为本申请过流保护方法一实施例的流程示意图；
图3为本申请过流保护方法另一实施例的流程示意图；
图4为本申请电平转换电路输出的时钟信号和输入电流的信号波形关系图；
图5为本申请显示装置一实施例的结构示意图；
图6为本申请时序控制器一实施例的功能模块示意图。
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，本申请实施例中所有方向性指示（诸如上、下、左、右、前、后……）仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，在本申请中涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
本申请提出一种显示装置，参照图1及图5，该显示装置100包括显示面板150，显示面板150包括电源电路210、时序控制器220、电平转换电路230及栅极驱动电路240，所述电平转换电路230的电源输入端与所述电源电路210连接，所述电平转换电路230的控制输入端与所述时序控制器220连接，所述电平转换电路230的输出端与所述栅极驱动电路240连接。其中，时序控制器220输出控制信号控制电平转换电路230对电源电路210输出的电源进行电平转换后输出至所述栅极驱动电路240，以控制栅极驱动电路240驱动薄膜晶体管阵列工作。需要说明的是，由于栅极驱动电路240是将电源信号处理后驱动薄膜晶体管阵列工作，因此，栅极驱动电路240会出现过流现象。一种过流保护机制是，在侦测电平转换器的输入电流瞬时变大时，即将栅极驱动电路240的电源切断，实现过流保护。但是，在栅极驱动电路240刚启动时，容易因外部干扰导致电平转换器的输入电流瞬时变大（此时不是真正的过流），则该过流保护机制会被误触发，导致黑屏。为避免此现象，申请人提出另一过流保护机制，在栅极驱动电路240刚启动的一段时间内，不侦测过流，之后再侦测过流，但是，又出现了新的现象，在栅极驱动电路240刚启动的那一段时间内，无法实现过流保护。
针对上述现象，本申请提出一种过流保护方法，参照图1和图2所示，所述过流保护方法包括以下步骤：
步骤S101，时序控制器220在电平转换电路230输出起始时钟信号至栅极驱动电路240时进行计时，并获取第一计时时间t0-t1内电源电路210输入至电平转换电路230的输入电流均值；
输入电流均值为第一计时时间t0-t1内电平转换电路230的输入电流的平均值。t0是指电平转换电路230输出起始时钟信号至栅极驱动电路240时的开始的时间点，如果不是在电平转换电路230输出起始时钟信号时进行计时，而是在输出起始时钟信号之后的一个时间点才开始计时，则在这个时间间隔期内就可能会存在瞬时大电流，就会造成IC损坏，而栅极驱动电路240就不能得到真正保护。其中，第一计时时间t0-t1为预先设定的一个时间段，对应栅极驱动电路240刚启动的一段时间，这段时间的长度根据电平转换电路230输出的第一个时钟信号进行设定，可以是小于或者是等于第一个时钟信号的电平时间，在这个时间内栅极驱动电路240完成启动工作并进入稳定工作状态，时序控制器220侦测获取电流均值就是在这个时间段内完成。
该步骤中，时序控制器220可以是获取第一计时时间t0-t1内，电源电路210输入至电平转换电路230的电流值中的全部数值或者至少两次数值，以供输入电流均值的计算。该步骤在第一计时时间t0-t1内，获取电源电路210输入至电平转换电路230的输入电流均值的目的是，为了真正确定栅极驱动电路240是否处于过流危险中。需要说明的是，当第一计时时间t0-t1内电平转换电路230的输入电流值没有超过电路的过流保护阀值时，可以认为电路只是偶然性波动偏高，不会持续很久（持续越久，检测到的电流均值会越来越大），判定为电路并没有出现现象，仅仅是受其他因素影响导致的电流偶然性变大，不会损坏电路。当第一计时时间t0-t1内电平转换电路230的输入电流超过电路的过流保护阀值时，则认为电路可能出现过高的电流或者偏高的电流持续较久，该电流足以损坏电路。因此，通过计算第一计时时间t0-t1内电平转换电路230的输入电流的平均值即可知道栅极驱动电路240在刚启动的一段时间内是否处于真正过流。
步骤S102，当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路240进入过流保护状态。
本实施例中，预设电流均值可以是栅极驱动电路240正常工作时，电流的正常波动上限值。在一实施例中，预设电流均值可为栅极驱动电路240的过流保护值，即是栅极驱动电路240所能承受的电流最大值，当然也可以设置的比较栅极驱动电路240所能承受的电流最大值小一点。当时序控制器220确定第一计时时间t0-t1内电平转换电路230的输入电流均值超过电路的过流保护阀值时，则认为电路可能出现过高的瞬态电流或者是出现偏高的电流持续较久，该电流足以损坏电路，因此，此时需要对栅极驱动电路240进行保护。
本实施例中，对于上述控制栅极驱动电路240进入过流保护状态具体可为：切断显示面板150中电源电路210输入至电平转换电路230的电源。当然也可以是直接关闭电源或者采用其他方式，都可以实现对栅极驱动电路240进行过流保护。
可以理解的是，通过显示面板150中的时序控制器220从电平转换电路230输出起始时钟信号至栅极驱动电路240时进行计时，获取第一计时时间内电源电路210输入至电平转换电路230的输入电流均值，并与预设电流均值进行比较，当确定第一计时时间t0-t1内电平转换电路230的输入电流均值超过电路的过流保护阀值时，则认为电路可能出现过高的瞬态电流或者是出现偏高的电流持续较久，该电流足以损坏电路，此时，对栅极驱动电路240进行过流保护，避免了电路被损坏。当第一计时时间t0-t1内电平转换电路230的输入电流值没有超过电路的过流保护阀值时，可以认为电路只是偶然性波动偏高，不会持续很久（持续越久，检测到的电流均值会越来越大），则不需要保护，此时不触发保护。由此可知，通过第一计时时间t0-t1内电平转换电路230的输入电流均值是否超过电路的过流保护阀值来确定电路是否过流，可以很准确的判断出电路是否真正过流，因此，避免了第一计时时间t0-t1内栅极驱动电路240的过流保护机制被误触发的现象，提升了产品的稳定性。
在一实施例中，为了减少计算量，提高过流保护效率，获取第一计时时间内t0-t1输入至电平转换电路230的输入电流均值包括：
时序控制器220获取第一计时时间t0-t1内，电源电路210输入至电平转换电路230的电流值中的至少两个；
对至少两个所述电流值进行平均值计算，以获得所述输入电流均值。
本实施例中，在第一计时时间t0-t1内，电源电路210输出电流到电平转换电路230中，是一个持续的不稳定的过程，时序控制器220要获取到这个时间段内的电流均值，先要获取这个时间段内的至少两个采样电流值，例如可以是2个、5个、10个等，然后再通过时序控制器220对获取的多个电流值进行平均值计算，从而获得第一计时时间t0-t1内的电流均值。由于在开机时显示面板150电路中发生大电流会损伤IC的的情况，侦测第一计时时间t0-t1这段时间的均值可以对显示面板150中电路做到有效的防护，同时这样也提高了检测的准确性，以防止过流保护机制误判断。其中，需要说明是，选取计算平均值的电流值次数越多，准确性越高，当然较少则计算量少，可以很快的得出结果，出现过流时，能够快速响应，提高过流保护效率。
在一实施例中，为了进一步提高过流保护效果，参照图3，所述过流保护方法还包括：
步骤S103，当所述电流均值小于预设的电流均值时，获取第二计时时间t2-tn内电源电路210输入至电平转换电路230的输入电压值，所述tn＞t2＞t1；
步骤S104，确定所述输入电压值中大于或者等于预设电压值的次数；
步骤S105，当所述输入电压值中大于或者等于预设电压值的次数大于或者等于预设次数时，控制所述栅极驱动电路240进入过流保护状态。
本实施例中，时序控制器220内预先设置了预设电压值及输入电压值中大于或者等于预设电压值的预设次数，以此作为参考进行判断。
当所述电流均值小于预设的电流均值时，则认为在第一计时时间t0-t1内没有出现过流，那么继续进行监控。当时序控制器220监控后电源电路210输入至电平转换电路230的输入电压值中大于或者等于预设电压值时进行一次计数，累加计数次数，当累加的计数次数大于或者等于预设次数时，认为出现过流情况，就控制栅极驱动电路240进入过流保护状态，如果小于预设次数，显示面板150的栅极驱动电路240就继续正常运行。参照图4，可以在电平转换电路230输出的时钟信号的每一周期内，获取一次电源电路210输入至电平转换电路230的输入电压值，当然也可以是多个。可以理解的是，在第二计时时间t2-tn内，时序控制器220只获取一次电平转换电路230输出的时钟信号的每一周期内的电压值，目的是提高计算效率，而每一个周期的电压值能够体现这一周期的整体情况，能够保证较高的准确性，获取太多的值进行计算则会增加大量的计算成本。其中，CLK为电平转换电路230的时钟信号，ICLK为在电平转换电路230的时钟信号的电流值，OCP为在电平转换电路230的时钟信号内预先设置的过流保护阀值。
本实施例中，第二计时时间t2-tn内电源电路210输入至电平转换电路230的输入电压值的动作是在第一计时时间t0-t1这个时间段之后，没有第一计时时间t0-t1的这个过程，就不存在显示面板150中电路工作后续动作。其中，对于t0、t1、t2、tn等时间点来说，按照时间轴tn＞t2＞t1＞t0。其中，第二计时时间t2-tn可为一帧时间，方便过流保护控制。
本实施例中，对于在电路工作过程中有时候存在电路或元器件损耗，导致的大电流，通过对第二计时时间t2-tn内电源电路210输入至电平转换电路230的输入电压值是否大于或者等于预设电压值次数的判断，然后判断次数是否大于或者等于预设次数，实现了对第二计时时间t2-tn内的显示面板150的栅极驱动电路240的保护。
该实施例中，所述确定所述输入电压值中大于或者等于预设电压值的次数具体可以是：先确定在电平转换电路230输出的时钟信号的正电平时间内的正向输入电压值和在电平转换电路230输出的时钟信号的负电平时间内的反向输入电压值，分别与对应的正反向电压参考值进行比较后，再计算正/反向输入电压值大于或者等于对应的预设电压值的总次数。
该实施例中，所述确定所述输入电压值中大于或者等于预设电压值的次数具体可以是：确定所述输入电压值的绝对值中大于或者等于预设电压值的次数。在电平转换电路230输出的时钟信号的各周期内，电平转换电路230存在正电平和负电平的切换，在正负电平切换都会存在输入电压值都存在大于或者等于预设电压值的现象。这里，可以先确定在电平转换电路230输出的时钟信号的正电平时间内的正向输入电压值和在电平转换电路230输出的时钟信号的负电平时间内的反向输入电压值，对所述正向输入电压值和所述反向输入电压值进行绝对值运算，以得到所述输入电压值的绝对值，然后将所述输入电压值的绝对值与预设电压值进行比较，以获得所述输入电压值的绝对值中大于或者等于所述预设电压值的输入电压值的次数。采用此方法，简化了运算过程，提高了运算效率。
该实施例中，通过电平转换电路230中输入电压值进行绝对值运算，实现时序控制器220在第二计时时间t2-tn内，对输入电压值中大于或者等于预设电压值的次数进行准确计数，不会遗漏掉在电平转换电路230输出的时钟信号的负电平时间内的反向输入电压值大于或者等于预设电压值的情况。更加有效的对第二计时时间t2-tn内显示面板150栅极驱动电路240过流保护。
上述各实施例中，显示面板150包括但不限于液晶显示面板、有机发光二极管显示面板、场发射显示面板、等离子显示面板、曲面型面板，所述液晶面板包括薄膜晶体管液晶显示面板、TN面板、VA类面板、IPS面板等。
需要说明的是，参照图6，上述时序控制器220包括存储器2201、处理,器2202及存储在所述存储器2201上并可在所述处理器2202上运行的过流保护程序，所述处理器2202执行所述过流保护程序时实现如上述各实施例的过流保护方法的步骤。可以理解的是，由于在显示面板150中使用了上述过流保护方法，因此，该显示面板150的实施例包括上述显示面板150中过流保护方法全部实施例的全部技术方案，且所达到的技术效果也完全相同，在此不再赘述。
此外，该显示装置100包括上述的显示面板150，而显示面板150包含上述过流保护方法，因此，也具有上述过流保护方法全部实施例的全部技术方案，且所达到的技术效果也完全相同，在此不再赘述。需要说明的是，该显示装置100可以是一般的显示器或者平板电视等，当然也可以是液晶显示器或者液晶电视。
以上所述仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是在本申请的申请构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (18)

  1. 一种过流保护方法，应用于显示面板，其中，所述显示面板包括电源电路、时序控制器、电平转换电路及栅极驱动电路，所述过流保护方法包括:
    时序控制器在电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，并获取第一计时时间t0-t1内电源电路输入至电平转换电路的输入电流均值；以及
    当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路进入过流保护状态。
  2. 如权利要求1所述的过流保护方法，其中，所述获取第一计时时间t0-t1内输入至电平转换电路的输入电流均值包括：
    时序控制器获取第一计时时间t0-t1内，电源电路输入至电平转换电路的电流值中的至少两个；
    对至少两个所述电流值进行平均值计算，以获得所述输入电流均值。
  3. 如权利要求1所述的过流保护方法，其中，所述获取第一计时时间t0-t1内输入至电平转换电路的输入电流均值包括：
    时序控制器获取第一计时时间t0-t1内，电源电路输入至电平转换电路的电流值中的全部数值；
    对全部数值的所述电流值进行平均值计算，以获得所述输入电流均值。
  4. 如权利要求1所述的过流保护方法，其中，所述预设电流均值为所述栅极驱动电路的过流保护值。
  5. 如权利要求1所述的过流保护方法，其中，所述过流保护方法还包括：
    当所述电流均值小于预设的电流均值时，获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值，所述tn＞t2＞t1；
    确定所述输入电压值中大于或者等于预设电压值的次数；
    当所述输入电压值中大于或者等于预设电压值的次数大于或者等于预设次数时，控制所述栅极驱动电路进入过流保护状态。
  6. 如权利要求5所述的过流保护方法，其中，所述获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值包括：
    在第二计时时间t2-tn内，时序控制器在电平转换电路输出的时钟信号的每一周期内，获取一次电源电路输入至电平转换电路的输入电压值。
  7. 如权利要求5所述的过流保护方法，其中，所述确定所述输入电压值中大于或者等于预设电压值的次数具体为：确定所述输入电压值的绝对值中大于或者等于预设电压值的次数；
    所述当所述输入电压值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态具体为：当所述输入电压值的绝对值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态。
  8. 如权利要求7所述的过流保护方法，其中，所述确定所述输入电压值的绝对值中大于或者等于预设电压值的次数具体为：
    确定在电平转换电路输出的时钟信号的正电平时间内的正向输入电压值和在电平转换电路输出的时钟信号的负电平时间内的反向输入电压值，对所述正向输入电压值和所述反向输入电压值进行绝对值运算，以得到所述输入电压值的绝对值；
    将所述输入电压值的绝对值与预设电压值进行比较，以获得所述输入电压值的绝对值中大于或者等于所述预设电压值的输入电压值的次数。
  9. 如权利要求1所述的过流保护方法，其中，所述控制所述栅极驱动电路进入过流保护状态具体为：切断所述电源电路输入至所述电平转换电路的电源。
  10. 如权利要求1所述的过流保护方法，其中，所述第一计时时间t0-t1为预先设定的一个时间段。
  11. 如权利要求9所述的过流保护方法，其中，所述第一计时时间t0-t1为小于或者是等于所述电平转换电路输出的第一个时钟信号的电平时间。
  12. 如权利要求1所述的过流保护方法，其中，所述t0是指电平转换电路输出起始时钟信号至栅极驱动电路时的开始的时间点。
  13. 如权利要求1所述的过流保护方法，其中，所述预设电流均值为栅极驱动电路的过流保护值。
  14. 一种显示面板，其中，所述显示面板包括电源电路、时序控制器、电平转换电路及栅极驱动电路，所述时序控制器包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的过流保护程序，所述处理器执行所述过流保护程序时实现如下过流保护方法：
    时序控制器在电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，并获取第一计时时间t0-t1内电源电路输入至电平转换电路的输入电流均值；以及
    当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路进入过流保护状态。
  15. 如权利要求14所述的显示面板，其中，所述时序控制器还设置为：
    当所述电流均值小于预设的电流均值时，获取第二计时时间t2-tn内电源电路输入至电平转换电路的输入电压值，所述tn＞t2＞t1；
    确定所述输入电压值中大于或者等于预设电压值的次数；
    当所述输入电压值中大于或者等于预设电压值的次数大于或者等于预设次数时，控制所述栅极驱动电路进入过流保护状态。
  16. 如权利要求15所述的显示面板，其中，所述时序控制器还设置为：
    在第二计时时间t2-tn内，所述时序控制器在所述电平转换电路输出的时钟信号的每一周期内，获取一次电源电路输入至所述电平转换电路的输入电压值。
  17. 如权利要求15所述的显示面板，其中，所述时序控制器还设置为确定所述输入电压值的绝对值中大于或者等于预设电压值的次数；
    所述当所述输入电压值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态具体为：当所述输入电压值的绝对值中大于或者等于预设电压值的次数超过预设次数时，控制所述栅极驱动电路进入过流保护状态。
  18. 一种显示装置，其中，所述显示装置包括显示面板；
    所述显示面板包括电源电路、时序控制器、电平转换电路及栅极驱动电路，所述时序控制器包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的过流保护程序，所述处理器执行所述过流保护程序时实现如下过流保护方法：
    时序控制器在电平转换电路输出起始时钟信号至栅极驱动电路时进行计时，并获取第一计时时间t0-t1内电源电路输入至电平转换电路的输入电流均值；以及
    当所述输入电流均值大于或者等于预设电流均值时，控制所述栅极驱动电路进入过流保护状态。
PCT/CN2018/123253 2018-12-12 2018-12-24 过流保护方法、显示面板及显示装置 Ceased WO2020118764A1 (zh)

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