WO2020107981A1 - 一种像素电路、显示装置和像素电路的驱动方法 - Google Patents

一种像素电路、显示装置和像素电路的驱动方法 Download PDF

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Publication number
WO2020107981A1
WO2020107981A1 PCT/CN2019/103807 CN2019103807W WO2020107981A1 WO 2020107981 A1 WO2020107981 A1 WO 2020107981A1 CN 2019103807 W CN2019103807 W CN 2019103807W WO 2020107981 A1 WO2020107981 A1 WO 2020107981A1
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Prior art keywords
transistor
pixel circuit
control
scan line
voltage signal
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PCT/CN2019/103807
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English (en)
French (fr)
Inventor
盖翠丽
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昆山工研院新型平板显示技术中心有限公司
昆山国显光电有限公司
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Publication of WO2020107981A1 publication Critical patent/WO2020107981A1/zh
Priority to US17/222,014 priority Critical patent/US11282436B2/en

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Definitions

  • Embodiments of the present application relate to the field of display technology, and in particular, to a pixel circuit, a display device, and a pixel circuit driving method.
  • Organic light-emitting diode Organic Light-Emitting Diode, OLED
  • OLED Organic Light-Emitting Diode
  • PMOLED Passive matrix light-emitting diode, passive matrix organic light-emitting diode
  • AMOLED Active-matrix organic light-emitting diode, active matrix organic led
  • the purpose of the embodiments of the present application is to provide a driving method for a pixel circuit, a display device, and a pixel circuit, so that when the storage capacitance of the pixel circuit is unchanged, the brightness of the light emitting device is controlled by the driving signal transmitted by the control line, which improves Control of the brightness of the pixel circuit.
  • a pixel circuit including: a first transistor, a second transistor, a third transistor, a memory device, and a light emitting device; the control terminal of the first transistor is connected to the first scan line , The first end of the first transistor is connected to the data line, the second end of the first transistor is connected to the output node; the first end of the storage device is connected to the output node, the second end of the storage device is connected to the control line; The control terminal is connected to the output node, the first terminal of the second transistor is connected to the power supply voltage, the second terminal of the second transistor is connected to the first terminal of the third transistor; the control terminal of the third transistor is connected to the second scan line, The second terminal of the three transistors is connected to the anode of the light emitting device, and the cathode of the light emitting device is grounded.
  • Embodiments of the present application also provide a display device, including the pixel circuit described above.
  • Embodiments of the present application also provide a driving method of a pixel circuit, which is applied to the above pixel circuit.
  • the driving method of the pixel circuit includes: the first transistor is turned on under the control of the first voltage signal output by the first scan line On state, the third transistor is in the off state under the control of the third voltage signal output from the second scan line; the first transistor transmits the data signal output from the data line to the memory device; the second voltage signal output on the first scan line The first transistor is off under the control of the second transistor, and the third transistor is on under the control of the fourth voltage signal output from the second scan line; the second transistor is on under the control of the first output voltage signal of the storage device In the state, the second transistor receives the driving signal through the memory device and drives the light emitting device through the third transistor; wherein the driving signal includes a driving current and/or a driving voltage.
  • the embodiments of the present application provide that the control terminal of the second transistor is connected to the output node, the storage device obtains the drive signal transmitted by the control line, and the control terminal of the second transistor receives the drive signal transmitted by the control line.
  • Three transistors control the brightness of the light-emitting device, so that the light-emitting device emits light under the control of the driving signal, so that the light-emitting brightness of the pixel circuit can be controlled, and the brightness of the light-emitting device can be adjusted when the storage capacity of the storage device in the pixel circuit is fixed
  • the third transistor is in the off state, so that the light emitting device does not emit light during the transmission of the data signal on the data line, which improves the uniformity of the brightness of the pixel circuit control.
  • the types of the first transistor and the third transistor are different, and the voltage signal transmitted by the first scan line is the same as the voltage signal transmitted by the second scan line.
  • first transistor and the third transistor are of the same type, and the voltage signal transmitted by the first scan line is opposite to the voltage signal transmitted by the second scan line.
  • the first transistor and the third transistor are switching tubes, and the second transistor is a driving tube.
  • the third transistor ensures that the light-emitting device does not emit light during the process of controlling the data line of the light-emitting device to output data signals, thereby improving the control of the brightness of the light-emitting device.
  • the second transistor is a P-type thin film transistor
  • the first end of the second transistor is the source
  • the second end of the second transistor is the drain.
  • the first transistor is a P-type thin film transistor
  • the third transistor is an N-type thin film transistor; the control terminal of the third transistor is connected to the control terminal of the first transistor.
  • the first transistor is a P-type thin film transistor
  • the third transistor is a P-type thin film transistor.
  • the second output voltage signal in the memory controls the second transistor to be in an off state.
  • the third voltage signal output by the second scan line controls the third transistor to be in an off state, and the light emitting device is in an off state.
  • the driving signal is used to control the brightness of the light emitting device.
  • the driving method of the pixel circuit further includes: the data signal controls the discharge of the storage device and determines that the control terminal of the second transistor is low After the voltage signal, the memory device stops discharging.
  • the driving method of the pixel circuit further includes: the data signal controls the charging of the storage device and determines that the control terminal of the second transistor is After the high voltage signal, the memory device stops charging.
  • FIG. 1 is a structural diagram of a pixel circuit in the first embodiment of the present application
  • FIG. 2 is a circuit diagram of the first pixel circuit in the second embodiment of the present application.
  • FIG. 3 is a circuit diagram of a second pixel circuit in the second embodiment of the present application.
  • FIG. 5 is a timing diagram of a pixel circuit in a sub-frame stage in the second embodiment of the present application.
  • FIG. 6 is a flowchart of a driving method of a pixel circuit in a third embodiment of the present application.
  • pixel drive circuits In high-end display products, pixel drive circuits generally use active arrays. However, mainstream active drive array circuits are driven by analog signals. There are high circuit power consumption, signals are easily interfered, and the consistency of the drive device or the height of the compensation circuit Dependency and other issues. Digitally driven pixel circuits have the advantages of low power consumption, signals are not susceptible to interference, and high tolerance for the consistency of driving devices. Due to the small pixel size in high-pixel density display products, the storage capacitance of the pixel design in the digital drive circuit is too small, and the luminous brightness of the light-emitting device cannot be accurately controlled and adjusted, resulting in the brightness of the pixel circuit. Uniform.
  • the first embodiment of the present application relates to a pixel circuit.
  • the structure shown in FIG. 1 includes: a first transistor 10, a second transistor 20, a third transistor 30, a memory device 40, and a light emitting device 50.
  • the control terminal of the first transistor 10 is connected to the first scan line, the first terminal of the first transistor 10 is connected to the data line, the second terminal of the first transistor 10 is connected to the output node; the first terminal of the memory device 40 is connected to the output node , The second end of the memory device 40 is connected to the control line; the control end of the second transistor 20 is connected to the output node, the first end of the second transistor 20 is connected to the power supply voltage, and the second end of the second transistor 20 is connected to the third transistor The first end of 30 is connected; the control end of the third transistor 30 is connected to the second scan line, the second end of the third transistor 30 is connected to the anode of the light emitting device 50, and the cathode of the light emitting device 50 is grounded.
  • the first transistor 10 and the third transistor 30 are different types of transistors.
  • the third transistor 30 is an N-type thin film transistor; or, the first transistor 10 is an N-type thin film transistor,
  • the third transistor 30 is a P-type thin film transistor.
  • the first transistor 10 and the third transistor 30 may also be the same type of transistor, for example, the first transistor 10 and the third transistor 30 are both P-type thin film transistors.
  • the first transistor 10 is a P-type thin film transistor
  • the third transistor 30 is an N-type thin film transistor.
  • the light-emitting device 50 in this embodiment may be a variety of current-driven light-emitting devices 50 including LEDs or OLEDs, or may be other types of light-emitting devices 50.
  • OLED is used as an example to illustrate the working principle of a pixel circuit. The details of the implementation can be adjusted according to the actual use of the light-emitting device 50, without limitation here.
  • the types of the first transistor 10 and the third transistor 30 are different, the voltage signal transmitted by the first scan line is the same as the voltage signal transmitted by the second scan line; in another embodiment, the first transistor 10 and The third transistor 30 has the same type, and the voltage signal transmitted by the first scan line is opposite to the voltage signal transmitted by the second scan line.
  • the first transistor 10 and the third transistor 30 are switching tubes, and the second transistor 20 is a driving tube.
  • the action line of the voltage signal transmitted by the switch tube on the scanning line is turned on or off.
  • the control terminal of the second transistor 20 is connected to the output node A, the source of the second transistor 20 is connected to the power supply voltage, and the drain is connected to the third
  • the first end of the transistor 30 is connected; the control line is connected to the first end of the storage device 40, the control line transmits the drive signal to the output node A through the storage device 40, and the control end of the second transistor 20 receives the control line transmission through the output node A
  • the driving signal is used to control the brightness of the light emitting device 50.
  • the switch is connected in such a way that the control terminal of the first transistor 10 is connected to the first scan line, and the control terminal of the third transistor 30 is connected to the second scan line.
  • the gate of the first transistor 10 is connected to the first scan line, and the source or drain is connected to the data line;
  • the gate of the second transistor 20 is connected to the output node A, and the source is connected to the power supply voltage;
  • the third transistor The gate of 30 is connected to the first scan line, and the source or drain may be connected to the light emitting device 50.
  • the pixel circuit is driven and includes a data writing phase and a light emitting phase during a light emitting period.
  • the control of the light emitting device 50 includes light emission and no light emission.
  • the digital signal "1" indicates that the light emitting device 50 emits light
  • the digital signal "0" indicates that the light emitting device 50 does not emit light.
  • the digital signal "1" or " "0" includes both the data writing stage and the light-emitting stage, the difference is that the light-emitting device 50 in the light-emitting stage in the digital signal "1" is in the light-emitting state, and the light-emitting device 50 in the light-emitting stage in the digital signal "0" is in the off state .
  • the first transistor 10 and the second transistor 20 are P-type thin film transistors
  • the third transistor 30 is an N-type thin film transistor
  • the voltage signals transmitted by the first scan line and the second scan line are the same. Therefore, the control terminal of the first transistor 10 and the control terminal of the third transistor 30 can be connected on the same scan line.
  • Digital signal "1" data writing stage: the voltage signal transmitted by the scan line is a low voltage signal, the first transistor 10 is in the on state, the data line transmits the data signal to the memory device 40, and the memory device 40 is discharged to the output node A The voltage is a low voltage, and the data signal is stored in the memory device 40.
  • the second transistor 20 is in an on state under the control of the low voltage of the output node A.
  • the first Three transistors 30 are in the off state; light-emitting stage: the voltage signal transmitted by the scan line is a high voltage signal, the first transistor 10 is in the off state, the third transistor 30 is in the on state, and the second transistor 20 receives the drive signal transmitted by the control line and The driving signal is transmitted to the light emitting device 50 through the third transistor 30, and the brightness of the light emitting device 50 is controlled.
  • the voltage signal output by the scan line is a low voltage signal
  • the first transistor 10 is in the on state
  • the data line transmits the data signal to the storage device 40
  • the storage device 40 is charged to the output node A
  • the voltage is a high voltage
  • the data information is stored in the storage device 40
  • the second transistor 20 is in an off state under the control of the high voltage of the output node A
  • light-emitting stage the output voltage signal of the scan line is a high voltage signal
  • the first transistor 10 is in the off state
  • the third transistor 30 is in the on state
  • the driving signal transmitted by the control line received by the second transistor 20 controls the light emitting device 50 not to emit light
  • the light emitting device 50 is in the off state.
  • the light emitting device OLED is in a state where it does not emit light.
  • the second transistor 20 is a driving transistor
  • the control terminal of the second transistor 20 is connected to the output node A, receives the driving signal transmitted by the control line through the storage device 40, and controls the brightness of the light-emitting device 50 during the light-emitting stage, so that the pixel circuit
  • the brightness uniformity of the light emitting device 50 is controlled. This way of controlling the brightness of the light emitting device 50 through the driving signal output from the control terminal improves the user experience.
  • the control terminal of the second transistor is connected to the output node, the storage device obtains the drive signal transmitted by the control line, the control terminal of the second transistor receives the drive signal transmitted by the control line, and the brightness of the light emitting device is controlled by the third transistor so that the light emitting device is in The light is emitted under the control of the driving signal, so that the brightness of the pixel circuit can be controlled.
  • the storage capacity of the storage device in the pixel circuit is fixed, the brightness of the light-emitting device can be adjusted to improve the user experience.
  • the first transistor and The type of the third transistor is different. In the pixel circuit, when the first transistor is in the on state, the third transistor is in the off state, so that the light emitting device does not emit light during the transmission of the data signal on the data line, which improves the brightness uniformity of the pixel circuit. control.
  • the second embodiment of the present application relates to a pixel circuit.
  • the second embodiment is substantially the same as the first embodiment.
  • the main difference is that the structure of a specific pixel circuit is given in the second embodiment of the present application, as shown in FIG. 2 and Figure 3.
  • the third transistor T3 is provided to control the light emitting device OLED not to emit light during the data writing stage.
  • the first transistor T1 and the third transistor T3 are both switch tubes, which may be the same type of switch tube or different types of switch tubes. Specifically, the first transistor T1 and the third transistor T3 are different types of pixel circuits shown in FIG. 2, and the first transistor T1 and the third transistor T3 are the same type of pixel circuits shown in FIG. 3.
  • the light-emitting device in order to achieve precise control of the light-emitting brightness of the light-emitting device and improve the display effect, the light-emitting device is controlled not to emit light during the data writing stage, and emit light according to the data information during the light-emitting stage to achieve the brightness gray scale of the display screen of the pixel circuit Strict control is performed, and the brightness of the light emitting device is controlled by the driving signal transmitted from the control terminal.
  • the third transistor T3 is connected in series with the light emitting device OLED, and the control terminal receives the control of the voltage signal transmitted by the second scan line.
  • the first scan line transmits The voltage signal is opposite to the voltage signal transmitted by the second scan line, as shown in FIG. 4 is a timing diagram of the voltage signal transmitted by the first scan line and the voltage signal transmitted by the second scan line.
  • the types of the first transistor T1 and the third transistor T3 are different, as shown in FIG. 2, the first transistor T1 is a P-type thin film transistor and the third transistor T3 is an N-type thin film transistor. Under the control of the same voltage signal, the first transistor The states of T1 and the third transistor T3 are different.
  • the first transistor T1 under the control of the low voltage signal, the first transistor T1 is in an on state and the third transistor T3 is in an off state. Therefore, the control terminal of the first transistor T1 and the third transistor The control terminals of T3 are all connected to the same scanning line, or the voltage signals transmitted by the first scanning line and the second scanning line are the same.
  • the first transistor T2 and the second transistor T2 are P-type thin-film transistors
  • the third transistor T3 is an N-type thin-film transistor. Since the voltage signals transmitted by the first scan line and the second scan line are the same, the The control terminal of the three transistor T3 is connected to the control terminal of the first transistor T1; in FIG. 3, the first transistor T1, the second transistor T2, and the third transistor T3 are all P-type thin film transistors.
  • the light-emitting devices in Figure 2 and Figure 3 are both OLEDs, and the storage devices are both capacitive elements C1.
  • the first transistor T1, the second transistor T2, and the third transistor T3 of the pixel circuit are all P-type thin film transistors, and therefore the pixel circuit can be regarded as a pure P-type pixel circuit.
  • the pure P-type pixel circuit can be manufactured using a low-temperature polysilicon technology (LTPS, Low-Temperature-Poly-silicon) process, which is beneficial to reduce the difficulty of the process, and thus is beneficial to the promotion and production of pixel circuits.
  • LTPS low-temperature polysilicon technology
  • a frame of picture is divided into multiple sub-frames in time, each sub-frame corresponds to its own scanning time, data is written in the scanning stage, and then the light-emitting device is controlled by the driving transistor The brightness.
  • the voltage change in a subframe period is shown.
  • SEL in Figure 5 represents the voltage signal output by the scan line
  • DATA represents the written data
  • the numbers in Figure 5 The driving process of the pixel circuit when the signal is "1".
  • the second transistor T2 works in the saturation region, and the voltage Vgs between the gate and source of the second transistor T2 is related to the power supply voltages VDD and Vctrl, where VDD is preset and Vctrl is used to control
  • VDD is preset
  • Vctrl is used to control
  • the brightness of the light-emitting device can ensure the uniformity of the brightness of the pixel circuit on the entire control panel.
  • the time of each subframe in the pixel circuit may be different.
  • the frame will be divided into multiple subframes in time, and the scanning time of each subframe is 1t, 1/2t, 1/4t, 1/8t..., t represents the total scan time of the frame picture.
  • t represents the total scan time of the frame picture.
  • the gray scale of the frame picture reaches 256, 8 subframes are needed, and the time of the eighth subframe is 1/128t.
  • the third embodiment of the present application relates to a method for driving a pixel circuit, which is applied to the above-mentioned first or second embodiment.
  • the flow of the method for driving a pixel circuit is shown in FIG. 6 and includes the following implementation steps:
  • Step 301 The first transistor is in an on state under the control of the first voltage signal output from the first scan line, and the third transistor is in the off state under the control of the third voltage signal output from the second scan line.
  • the third voltage signal output by the second scan line controls the third transistor to be in the off state, and the light emitting device is in the off state.
  • the first voltage needs to be set according to the type of the first transistor in the pixel circuit.
  • the first voltage signal controls the first transistor to be in a corresponding state.
  • the device setting in the pixel circuit no limitation is made here.
  • Step 302 The first transistor transmits the data signal output from the data line to the storage device.
  • the first transistor transmits the data signal output from the data line to the storage device
  • the data signal contains digital information
  • the data signal controls the storage device to be charged or discharged. After the charge or discharge is completed, the first transistor is controlled to be turned off.
  • the third transistor While the first transistor transmits the data signal output from the data line to the memory device, the third transistor is in an off state under the control of the third voltage signal output from the second scan line, and the light emitting device is in an off state. That is to say, in the data writing stage, the light emitting device does not emit light.
  • Step 303 The first transistor is in the off state under the control of the second voltage signal output from the first scan line, and the third transistor is in the on state under the control of the fourth voltage signal output from the second scan line.
  • Step 304 Determine whether the data signal controls the discharge of the storage device. If yes, perform step 305; otherwise, perform step 306.
  • Step 305 Under the control of the first output voltage signal of the storage device, the second transistor is in an on state, the second transistor receives the driving signal through the storage device, and drives the light emitting device through the third transistor.
  • the driving signal includes driving current and/or driving voltage.
  • the driving signal is used to control the brightness of the light emitting device.
  • the driving signal includes a driving current or a driving voltage, different driving signals are set according to the characteristics of the light emitting device, the current driving light emitting device sets the driving signal as the driving current, and the voltage driving light emitting device sets the driving signal as the driving voltage.
  • the drive signal includes the drive current and the drive voltage.
  • the data signal controls the discharge of the storage device, and after the first transistor transmits the data signal output from the data line to the storage device, the driving method further includes: the data signal controls the discharge of the storage device, and determines that the control terminal of the second transistor is low After the voltage signal, the memory device stops discharging.
  • the data signal controls the charging of the storage device, and after the data signal output from the data line is transmitted to the storage device through the first transistor, the driving method further includes: the data signal controls the charging of the storage device and determines the control terminal of the second transistor After the high voltage signal, the storage device stops charging.
  • Step 306 The second transistor is turned off under the control of the second output voltage signal of the memory device.
  • This embodiment is an example of a driving method corresponding to the first or second embodiment, and this embodiment can be implemented in cooperation with the first or second embodiment.
  • the relevant technical details mentioned in the first or second embodiment are still valid in this embodiment, and in order to reduce repetition, they are not repeated here.
  • the relevant technical details mentioned in this embodiment can also be applied in the first or second embodiment.
  • the fourth embodiment of the present application relates to a display device including the pixel circuit in the above-mentioned first or second embodiment.
  • the pixel circuits on the display device are all set on the control panel.
  • the specific arrangement of the pixel circuits is not specifically limited.
  • the display device includes at least one pixel circuit for the display device to display.
  • Vgs VDD-Vctrl
  • Vgs the driving voltage of the second transistor
  • VDD represents the power supply voltage
  • Vctrl represents the voltage value transmitted by the control terminal.
  • This embodiment is a device example corresponding to the first or second embodiment, and this embodiment can be implemented in cooperation with the first or second embodiment.
  • the relevant technical details mentioned in the first or second embodiment are still valid in this embodiment, and in order to reduce repetition, they are not repeated here.
  • the relevant technical details mentioned in this embodiment can also be applied in the first or second embodiment.

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Abstract

本申请部分实施例涉及显示技术领域，公开了一种像素电路、显示装置和像素电路的驱动方法。像素电路包括：第一晶体管(10)、第二晶体管(20)、第三晶体管(30)、存储器件(40)和发光器件(50)。第一晶体管(10)的控制端与第一扫描线连接，第一晶体管(10)的第一端与数据线连接，第一晶体管(10)的第二端连接输出节点A。存储器件(40)的第一端与输出节点连接。第二晶体管(20)的控制端与输出节点连接。第三晶体管(30)的控制端与第二扫描线连接，第三晶体管(30)的第二端与发光器件(50)的阳极连接，发光器件(50)的阴极接地。

Description

一种像素电路、显示装置和像素电路的驱动方法
交叉引用
本申请引用于2018年11月29日递交的名称为“一种像素电路、显示装置和像素电路的驱动方法”的第201811446175.X号中国专利申请，其通过引用被全部并入本申请。
技术领域
本申请实施例涉及显示技术领域，特别涉及一种像素电路、显示装置和像素电路的驱动方法。
背景技术
有机发光二极管(Organic Light-Emitting Diode，OLED)驱动方式可分为PMOLED(Passive matrix organic light-emitting diode，无源矩阵有机发光二极管)和AMOLED(Active-matrix organic light-emitting diode，有源矩阵有机发光二极管)。随着平板显示技术的迅猛发展，特别是AMOLED显示屏开始在高端手机、电视等电子显示产品中得到广泛的应用。Micro LED作为新一代显示技术，比现有的OLED技术亮度更高、发光效率更好、但功耗更低。Micro LED作为未来显示的一种解决方案也已成为显示领域研发的热点。
申请内容
本申请实施方式的目的在于提供一种像素电路、显示装置和像素电路的 驱动方法，使得在像素电路的存储电容不变的情况下，通过控制线传输的驱动信号控制发光器件的亮度，提高了像素电路的发光亮度的控制。
为解决上述技术问题，本申请的实施方式提供了一种像素电路，包括：第一晶体管、第二晶体管、第三晶体管、存储器件和发光器件；第一晶体管的控制端与第一扫描线连接，第一晶体管的第一端与数据线连接，第一晶体管的第二端连接输出节点；存储器件的第一端与输出节点连接，存储器件的第二端与控制线连接；第二晶体管的控制端与输出节点连接，第二晶体管的第一端与电源电压连接，第二晶体管的第二端与第三晶体管的第一端连接；第三晶体管的控制端与第二扫描线连接，第三晶体管的第二端与发光器件的阳极连接，发光器件的阴极接地。
本申请的实施方式还提供了一种显示装置，包括上述的像素电路。
本申请的实施方式还提供了一种像素电路的驱动方法，应用于上述的像素电路，该像素电路的驱动方法包括：在第一扫描线输出的第一电压信号的控制下第一晶体管处于导通状态，在第二扫描线输出的第三电压信号的控制下第三晶体管处于关闭状态；第一晶体管将数据线输出的数据信号传输至存储器件；在第一扫描线输出的第二电压信号的控制下第一晶体管处于关闭状态，在第二扫描线输出的第四电压信号的控制下第三晶体管处于导通状态；在存储器件的第一输出电压信号的控制下第二晶体管处于导通状态，第二晶体管通过存储器件接收驱动信号，通过第三晶体管驱动发光器件；其中，驱动信号包括驱动电流和/或驱动电压。
本申请实施方式相对于现有技术而言，设置第二晶体管的控制端与输出节点连接，存储器件获取控制线传输的驱动信号，第二晶体管的控制端接收控 制线传输的驱动信号，通过第三晶体管控制发光器件的亮度，使得发光器件在驱动信号的控制下进行发光，使得像素电路的发光亮度可控，在像素电路中存储器件的存储容量一定的情况下实现对发光器件的亮度的调节，提高用户体验，另外，在像素电路中第一晶体管处于导通状态时，第三晶体管处于关闭状态，使得在数据线传输数据信号的过程中发光器件不发光，提高了像素电路亮度均一性的控制。
另外，第一晶体管与第三晶体管的类型不同，第一扫描线传输的电压信号与第二扫描线传输的电压信号相同。
另外，第一晶体管与第三晶体管的类型相同，第一扫描线传输的电压信号与第二扫描线传输的电压信号相反。
另外，第一晶体管和第三晶体管为开关管，第二晶体管为驱动管。
该实施方式中，第三晶体管控制发光器件的数据线输出数据信号的过程中保证发光器件不发光，提高了对发光器件的亮度的控制。
另外，若第二晶体管为P型薄膜晶体管，第二晶体管的第一端为源极，第二晶体管的第二端为漏极。
另外，所述第一晶体管为P型薄膜晶体管，所述第三晶体管为N型薄膜晶体管；所述第三晶体管的控制端连接至所述第一晶体管的控制端。
另外，所述第一晶体管为P型薄膜晶体管；所述第三晶体管为P型薄膜晶体管。
另外，在存储器的第二输出电压信号控制第二晶体管处于关闭状态。
另外，第二扫描线输出的第三电压信号控制第三晶体管处于关闭状态，则发光器件处于熄灭状态。
另外，驱动信号用于控制发光器件的亮度。
另外，若数据信号控制存储器件放电；第一晶体管将数据线输出的数据信号传输至存储器件之后，像素电路的驱动方法还包括：数据信号控制存储器件放电，确定第二晶体管的控制端为低电压信号后存储器件停止放电。
另外，若数据信号控制存储器件充电；通过第一晶体管将数据线输出的数据信号传输至存储器件之后，像素电路的驱动方法还包括：数据信号控制存储器件充电，确定第二晶体管的控制端为高电压信号后存储器件停止充电。
附图说明
图1是本申请第一实施方式中像素电路的结构图；
图2是本申请第二实施方式中第一像素电路的电路图；
图3是本申请第二实施方式中第二像素电路的电路图；
图4是本申请第二实施方式中第二像素电路中扫描信号的电压时序图；
图5是本申请第二实施方式中像素电路在一个子帧阶段的时序图；
图6是本申请第三实施方式中像素电路的驱动方法的流程图。
具体实施方式
在高端的显示产品中像素驱动电路一般是采用主动阵列，然而主流的主动驱动阵列电路都是模拟信号驱动的，存在电路功耗高、信号容易受到干扰，对驱动器件一致性或者补偿电路的高度依赖等问题。数字驱动的像素电路具有功耗低，信号不易受干扰，对于驱动器件一致性的容忍度高等优点。由于高像素密度的显示产品中像素尺寸较小，因此，在数字驱动电路中像素设计时的存 储电容过小，发光器件的发光亮度不能被精准的控制和调整的问题，导致像素电路的亮度不均一。
本申请的第一实施方式涉及一种像素电路。其结构如图1所示，包括：第一晶体管10、第二晶体管20、第三晶体管30、存储器件40和发光器件50。
第一晶体管10的控制端与第一扫描线连接，第一晶体管10的第一端与数据线连接，第一晶体管10的第二端连接输出节点；存储器件40的第一端与输出节点连接，存储器件40的第二端与控制线连接；第二晶体管20的控制端与输出节点连接，第二晶体管20的第一端与电源电压连接，第二晶体管20的第二端与第三晶体管30的第一端连接；第三晶体管30的控制端与第二扫描线连接，第三晶体管30的第二端与发光器件50的阳极连接，发光器件50的阴极接地。
第一晶体管10和第三晶体管30为不同类型的晶体管，例如，第一晶体管10为P型薄膜晶体管，则第三晶体管30为N型薄膜晶体管；或者，第一晶体管10为N型薄膜晶体管，第三晶体管30为P型薄膜晶体管。第一晶体管10和第三晶体管30也可以为相同类型的晶体管，如，第一晶体管10和第三晶体管30均为P型薄膜晶体管。本实施方式中以第一晶体管10为P型薄膜晶体管，第三晶体管30为N型薄膜晶体管为例说明。本实施方式中发光器件50可以是包括LED或OLED在内的多种电流驱动发光器件50，也可为其他类型的发光器件50，本实施方式中以OLED为例说明像素电路的工作原理，具体的实施细节可根据实际使用的发光器件50适应性调整，此处不做限制。
在一实施例中，第一晶体管10与第三晶体管30的类型不同，第一扫描线传输的电压信号与第二扫描线传输的电压信号相同；在另一实施例中，第一 晶体管10与第三晶体管30的类型相同，第一扫描线传输的电压信号与第二扫描线传输的电压信号相反。
第一晶体管10和第三晶体管30为开关管，第二晶体管20为驱动管。
开关管在扫描线传输的电压信号的作用线处于导通或关闭的状态，第二晶体管20的控制端与输出节点A连接，第二晶体管20的源极与电源电压连接，漏极与第三晶体管30的第一端连接；控制线与存储器件40的第一端连接，控制线通过存储器件40将驱动信号传输至输出节点A，第二晶体管20的控制端通过输出节点A接收控制线传输的驱动信号，驱动信号用于控制发光器件50的亮度。如图1所示，开关管的连接方式为：第一晶体管10的控制端与第一扫描线连接，第三晶体管30的控制端与第二扫描线连接。
像素电路结构中，第一晶体管10的栅极连接第一扫描线，源极或漏极连接数据线均可；第二晶体管20的栅极连接输出节点A，源极连接电源电压；第三晶体管30的栅极与第一扫描线连接，源极或漏极连接发光器件50均可。上述的器件的具体连接为示例说明，不做具体限制。
该像素电路被驱动，在一个发光时间段，包括数据写入阶段和发光阶段。需要说明的是，对发光器件50的控制包括发光和不发光，例如，数字信号“1”表示发光器件50发光，数字信号“0”表示发光器件50不发光，对于数字信号“1”或“0”均包括数据写入阶段和发光阶段，区别之处在于，在数字信号“1”中发光阶段的发光器件50处于发光状态，在数字信号“0”中发光阶段的发光器件50处于熄灭状态。
一个具体实现中，以图1中的像素电路结构为例，若第一晶体管10和第二晶体管20为P型薄膜晶体管，第三晶体管30为N型薄膜晶体管，由于第一 晶体管10和第三晶体管30的类型不同，第一扫描线与第二扫描线传输的电压信号相同，因此，可将第一晶体管10的控制端与第三晶体管30的控制端连接在同一个扫描线上。数字信号“1”，数据写入阶段：扫描线传输的电压信号为低电压信号，第一晶体管10处于导通状态，数据线传输数据信号至存储器件40，存储器件40放电至输出节点A的电压为低电压，并将数据信号存储于存储器件40中，第二晶体管20在输出节点A的低电压的控制下处于导通状态，由于第一晶体管10和第三晶体管30的类型不同，第三晶体管30处于关闭状态；发光阶段：扫描线传输的电压信号为高电压信号，第一晶体管10处于关闭状态，第三晶体管30处于导通状态，第二晶体管20接收控制线传输的驱动信号并通过第三晶体管30将驱动信号传输至发光器件50，控制发光器件50的亮度。
数字信号“0”，数据写入阶段，扫描线输出的电压信号为低电压信号，第一晶体管10处于导通状态，数据线传输数据信号至存储器件40，存储器件40充电至输出节点A的电压为高电压，并将数据信息存储于存储器件40中，第二晶体管20在输出节点A的高电压的控制下处于关闭状态；发光阶段：扫描线输出电压信号为高电压信号，第一晶体管10处于关闭状态，第三晶体管30处于导通状态，第二晶体管20接收的控制线传输的驱动信号控制发光器件50不发光，发光器件50处于熄灭状态。
上述的控制过程中，数据写入阶段，由于第三晶体管30的作用，发光器件OLED处于不发光的状态。
本实施方式中第二晶体管20是驱动管，第二晶体管20的控制端与输出节点A连接，通过存储器件40接收控制线传输的驱动信号，在发光阶段控制发光器件50的亮度，使得像素电路在存储器件40的容量有限的情况下实现对 发光器件50亮度均一性的控制，这种通过控制端输出的驱动信号控制发光器件50的亮度的方式，提高用户体验。
以上仅为举例说明，并不对本申请的技术方案构成限定。
设置第二晶体管的控制端与输出节点连接，存储器件获取控制线传输的驱动信号，第二晶体管的控制端接收控制线传输的驱动信号，通过第三晶体管控制发光器件的亮度，使得发光器件在驱动信号的控制下进行发光，使得像素电路的发光亮度可控，在像素电路中存储器件的存储容量一定的情况下实现对发光器件的亮度的调节，提高用户体验，另外，由于第一晶体管和第三晶体管的类型不同，在像素电路中第一晶体管处于导通状态时，第三晶体管处于关闭状态，使得在数据线传输数据信号的过程中发光器件不发光，提高了像素电路亮度均一性的控制。
本申请的第二实施方式涉及一种像素电路，第二实施方式与第一实施方式大致相同，主要区别之处在于：本申请第二实施方式中给出了具体的像素电路的结构，如图2和图3所示。
设置第三晶体管T3用于在数据写入阶段控制发光器件OLED不发光，第一晶体管T1与第三晶体管T3均为开关管，可以是相同类型的开关管，也可以是不同类型的开关管，具体包括第一晶体管T1与第三晶体管T3为不同类型的图2所示像素电路，以及第一晶体管T1与第三晶体管T3为相同类型的图3所示的像素电路。
在像素电路为了实现对发光器件的发光亮度的精确控制，提高显示效果，控制发光器件在数据写入阶段不发光，在发光阶段根据数据信息进行发光，实现对像素电路的显示屏的亮度灰阶进行严格的控制，并且通过控制端传输的驱 动信号控制发光器件的亮度。第三晶体管T3与发光器件OLED串联连接，控制端接收第二扫描线传输的电压信号的控制。具体地说，若第一晶体管T1与第三晶体管T3的类型相同，为保证在数据写入阶段时，第一晶体管T1处于导通状态，第三晶体管T3处于关闭状态，第一扫描线传输的电压信号与第二扫描线传输的电压信号相反，如图4所示的第一扫描线传输的电压信号与第二扫描线传输的电压信号的时序图。若第一晶体管T1与第三晶体管T3的类型不同，如图2中第一晶体管T1为P型薄膜晶体管，第三晶体管T3为N型薄膜晶体管，在相同的电压信号的控制下，第一晶体管T1和第三晶体管T3的状态不同，如，在低电压信号的控制下，第一晶体管T1处于导通状态，第三晶体管T3处于关闭状态，因此，第一晶体管T1的控制端和第三晶体管T3的控制端均连接于同一扫描线，或者，第一扫描线与第二扫描线传输的电压信号相同。
图示2中，第一晶体管T2和第二晶体管T2为P型薄膜晶体管，第三晶体管T3为N型薄膜晶体管，由于第一扫描线与第二扫描线传输的电压信号相同，因此，将第三晶体管T3的控制端连接至第一晶体管T1的控制端；图示3中，第一晶体管T1、第二晶体管T2和第三晶体管T3均为P型薄膜晶体管。图示2和图示3中的发光器件均为OLED，存储器件均为电容元件C1。
在图3中像素电路的第一晶体管T1、第二晶体管T2和第三晶体管T3均为P型薄膜晶体管，因而可认为像素电路为纯P型的像素电路。该纯P型的像素电路可采用低温多晶硅技术(LTPS，Low Temperature Poly-silicon)工艺制作，有利于降低工艺难度，因而有利于像素电路的推广和生产。
一个具体实现中，在一个子帧时间段，具体为将一帧画面在时间上分成多个子帧，每个子帧对应各自的扫描时间，在扫描阶段先进行数据写入再通过 驱动晶体管控制发光器件的亮度。如图5所示一个子帧时间段中的电压变化示意，在一个子帧时间段中，图示5中的SEL表示扫描线输出的电压信号，DATA表示写入的数据，图5表示的数字信号为“1”时的像素电路的驱动过程。
图2所示的电路中第二晶体管T2工作在饱和区，且第二晶体管T2栅极和源极之间的电压Vgs与电源电压VDD和Vctrl相关，其中，VDD是预设置，Vctrl用于控制发光器件的亮度，可保证整个控制面板上的像素电路的亮度的均一性。
在像素电路中每个子帧的时间可以是不相同的，例如，像素电路在显示一帧画面时，该帧画面在时间上会被分成多个子帧，每个子帧完成扫描的时间分别是1t、1/2t、1/4t、1/8t…，t表示该帧画面的全部扫描时间，一个具体实现中，该帧画面的灰阶达到256时，需要8个子帧，第8个子帧的时间为1/128t。
以上仅为举例说明，并不对本申请的技术方案构成限定。
本申请的第三实施方式涉及一种像素电路的驱动方法，应用于上述第一或第二实施方式中，其像素电路的驱动方法的流程如图6所示，包括如下实施步骤：
步骤301：在第一扫描线输出的第一电压信号的控制下第一晶体管处于导通状态，在第二扫描线输出的第三电压信号的控制下第三晶体管处于关闭状态。
相应的，第二扫描线输出的第三电压信号控制第三晶体管处于关闭状态，则发光器件处于熄灭状态。
第一电压需要根据像素电路中的第一晶体管的类型设置，此处仅是说明第一电压信号控制第一晶体管处于对应的状态，具体根据像素电路中的器件设 置，此处不做限制。
步骤302：第一晶体管将数据线输出的数据信号传输至存储器件。
第一晶体管将数据线输出的数据信号传输至存储器件的过程中，数据信号包含数字信息，且数据信号控制存储器件进行充电或放电，在充电或放电执行完成之后，控制第一晶体管关闭。
第一晶体管将数据线输出的数据信号传输至存储器件的过程中，第三晶体管在第二扫描线输出的第三电压信号的控制下处于关闭状态，发光器件处于熄灭状态。也就是说在数据写入阶段，发光器件不发光。
步骤303：在第一扫描线输出的第二电压信号的控制下第一晶体管处于关闭状态，在第二扫描线输出的第四电压信号的控制下第三晶体管处于导通状态。
步骤304：判断数据信号是否控制存储器件放电，若为是，执行步骤305，否则，执行步骤306。
步骤305：在存储器件的第一输出电压信号的控制下第二晶体管处于导通状态，第二晶体管通过存储器件接收驱动信号，通过第三晶体管驱动发光器件。
驱动信号包括驱动电流和/或驱动电压。驱动信号用于控制发光器件的亮度。
驱动信号包括驱动电流或者驱动电压，根据发光器件的特性设置不同的驱动信号，电流驱动的发光器件设置驱动信号为驱动电流，电压驱动的发光器件设置驱动信号为驱动电压。当发光器件既包括电流驱动的发光器件又包括电压驱动的发光器件时，驱动信号包括驱动电流和驱动电压。
一个具体实现中，数据信号控制存储器件放电，且第一晶体管将数据线输出的数据信号传输至存储器件之后，驱动方法还包括：数据信号控制存储器件放电，确定第二晶体管的控制端为低电压信号后存储器件停止放电。
另一具体实现中，数据信号控制存储器件充电，且通过第一晶体管将数据线输出的数据信号传输至存储器件之后，驱动方法还包括：数据信号控制存储器件充电，确定第二晶体管的控制端为高电压信号后存储器件停止充电。
步骤306：在存储器件的第二输出电压信号控制下第二晶体管处于关闭状态。
上面各种方法的步骤划分，只是为了描述清楚，实现时可以合并为一个步骤或者对某些步骤进行拆分，分解为多个步骤，只要包括相同的逻辑关系，都在本专利的保护范围内；对算法中或者流程中添加无关紧要的修改或者引入无关紧要的设计，但不改变其算法和流程的核心设计都在该专利的保护范围内。
本实施方式为与第一或第二实施方式相对应的驱动方法实施例，本实施方式可与第一或第二实施方式互相配合实施。第一或第二实施方式中提到的相关技术细节在本实施方式中依然有效，为了减少重复，这里不再赘述。相应地，本实施方式中提到的相关技术细节也可应用在第一或第二实施方式中。
本申请第四实施方式涉及一种显示装置，包括上述第一或第二实施方式中的像素电路。
显示装置上的像素电路均设置在控制面板上，具体像素电路的排列设置方式不做具体限制，显示装置中包括至少一个的像素电路，用于显示装置进行 显示。
一个具体实现中，以图2中的像素电路为例，第二晶体管T2与电源电压VDD连接，则第二晶体管的栅极和源极之间的驱动电压表示为：Vgs＝VDD-Vctrl；其中，Vgs表示第二晶体管的驱动电压，VDD表示电源电压，Vctrl表示控制端传输的电压值。具体实现中，通过对像素电路中版图设计，将因版图设计中线路布局或像素电路结构布局对VDD和Vctrl的影响降低，保证在显示装置中的控制面板上的像素电路的亮度均一性。
本实施方式为与第一或第二实施方式相对应的装置实施例，本实施方式可与第一或第二实施方式互相配合实施。第一或第二实施方式中提到的相关技术细节在本实施方式中依然有效，为了减少重复，这里不再赘述。相应地，本实施方式中提到的相关技术细节也可应用在第一或第二实施方式中。

Claims (14)

  1. 一种像素电路，包括：第一晶体管、第二晶体管、第三晶体管、存储器件和发光器件；
    所述第一晶体管的控制端与第一扫描线连接，所述第一晶体管的第一端与数据线连接，所述第一晶体管的第二端连接输出节点；所述存储器件的第一端与所述输出节点连接，所述存储器件的第二端与控制线连接；
    所述第二晶体管的控制端与所述输出节点连接，所述第二晶体管的第一端与电源电压连接，所述第二晶体管的第二端与所述第三晶体管的第一端连接；
    所述第三晶体管的控制端与第二扫描线连接，所述第三晶体管的第二端与所述发光器件的阳极连接，所述发光器件的阴极接地。
  2. 根据权利要求1所述的像素电路，其中，所述第一晶体管与所述第三晶体管的类型不同，所述第一扫描线传输的电压信号与所述第二扫描线传输的电压信号相同。
  3. 根据权利要求1所述的像素电路，其中，所述第一晶体管与所述第三晶体管的类型相同，所述第一扫描线传输的电压信号与所述第二扫描线传输的电压信号相反。
  4. 根据权利要求1所述的像素电路，其中，所述第一晶体管和所述第三晶体管为开关管，所述第二晶体管为驱动管。
  5. 根据权利要求1-4任一项所述的像素电路，其中，所述第二晶体管为P型薄膜晶体管，所述第二晶体管的第一端为源极，所述第二晶体管的第二端为漏极。
  6. 根据权利要求5所述的像素电路，其中，所述第一晶体管为P型薄膜晶体管，所述第三晶体管为N型薄膜晶体管；所述第三晶体管的控制端连接至所述第一晶体管的控制端。
  7. 根据权利要求5所述的像素电路，其中，所述第一晶体管为P型薄膜晶体管；所述第三晶体管为P型薄膜晶体管。
  8. 一种显示装置，包括如上述权利要求1-7任一项所述的像素电路。
  9. 一种像素电路的驱动方法，应用于如权利要求1-7任一项所述的像素电路，所述像素电路的驱动方式包括：
    在所述第一扫描线输出的第一电压信号的控制下所述第一晶体管处于导通状态，在所述第二扫描线输出的第三电压信号控制下，所述第三晶体管处于关闭状态；
    所述第一晶体管将所述数据线输出的数据信号传输至所述存储器件；
    在所述第一扫描线输出的第二电压信号的控制下所述第一晶体管处于关闭状态，在所述第二扫描线输出的第四电压信号的控制下所述第三晶体管处于导通状态；
    在所述存储器件的第一输出电压信号的控制下所述第二晶体管处于导通状态，所述第二晶体管通过所述存储器件接收驱动信号，通过所述第三晶体管驱动所述发光器件；
    其中，所述驱动信号包括驱动电流和/或驱动电压。
  10. 根据权利要求9所述的像素电路的驱动方法，其中，在所述存储器件的第二输出电压信号控制下所述第二晶体管处于关闭状态。
  11. 根据权利要求9所述的像素电路的驱动方法，其中，所述第二扫描线输出的所述第三电压信号的控制下所述第三晶体管处于关闭状态，所述发光器件处于熄灭状态。
  12. 根据权利要求9所述的像素电路的驱动方法，其中，所述驱动信号用于控制所述发光器件的亮度。
  13. 根据权利要求9-12任一项所述的像素电路的驱动方法，其中，若所述数据信号控制所述存储器件放电；
    所述第一晶体管将数据线输出的数据信号传输至存储器件之后，所述像素电路的驱动方法还包括：
    所述数据信号控制所述存储器件放电，确定所述第二晶体管的控制端为低电压信号后所述存储器件停止放电。
  14. 根据权利要求9-12任一项所述的像素电路的驱动方法，其中，若所述数据信号控制所述存储器件充电；
    所述通过所述第一晶体管将数据线输出的数据信号传输至存储器件之后，所述像素电路的驱动方法还包括：
    所述数据信号控制所述存储器件充电，确定所述第二晶体管的控制端为高电压信号后所述存储器件停止充电。
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