WO2020099531A1 - Ensemble circuit pour une antenne haute fréquence, procédé pour former un ensemble circuit, support de substrat et utilisation d'un ensemble circuit - Google Patents

Ensemble circuit pour une antenne haute fréquence, procédé pour former un ensemble circuit, support de substrat et utilisation d'un ensemble circuit Download PDF

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Publication number
WO2020099531A1
WO2020099531A1 PCT/EP2019/081263 EP2019081263W WO2020099531A1 WO 2020099531 A1 WO2020099531 A1 WO 2020099531A1 EP 2019081263 W EP2019081263 W EP 2019081263W WO 2020099531 A1 WO2020099531 A1 WO 2020099531A1
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WO
WIPO (PCT)
Prior art keywords
substrate
circuit arrangement
antenna
circuit
carrier
Prior art date
Application number
PCT/EP2019/081263
Other languages
German (de)
English (en)
Inventor
Andreas Kugler
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO2020099531A1 publication Critical patent/WO2020099531A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/40—Radiating elements coated with or embedded in protective material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10098—Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers

Definitions

  • the invention relates to a circuit arrangement for a high-frequency antenna.
  • the invention further relates to a method for forming a
  • a circuit arrangement for a high-frequency antenna with the features of the preamble of claim 1 is known from DE 197 10 811 B4.
  • the known circuit arrangement has a metallic base plate on which an existing of dielectric material in the form of a quartz
  • Substrate element is arranged. On the side of the substrate element facing away from the base plate, an electronic component is connected to the upper side thereof, next to which antenna elements are likewise arranged on the surface of the substrate element.
  • the top of the base plate is covered in the area of the electronic component and the antenna elements by means of a cover made of dielectric material.
  • the cover represents an encapsulation which protects the substrate element or the components located on the substrate element, for example, against oxidation.
  • a disadvantage of such encapsulation is that assembly and, for example, evacuation or flooding of the interior of the
  • circuit arrangement according to the invention for a high-frequency antenna with the features of claim 1 has the advantage that it is in
  • Molded mass is encapsulated.
  • Such molding compounds have the particular advantage that they can be processed relatively easily in terms of process technology and enable reliable protection of the electronic component against external factors influencing the functionality of the component. It also allows the use of a
  • Molding compound, substrates with components arranged thereon can be produced in a particularly simple manner from a substrate carrier having a multiplicity of components, the substrate elements being separated or separated from the substrate carrier after the (full-surface) encapsulation of the components on the upper side of the latter.
  • a molding compound to protect the at least one electronic component in a particularly advantageous manner enables such circuit arrangements to be used
  • Circuit arrangements of this type can moreover be connected particularly easily to a larger electronic circuit or a circuit carrier in order to be part of an electronic assembly or the like.
  • the substrate element is made of glass or ceramic.
  • Circuit arrangement that it is additionally at least indirectly electrically connected to a circuit carrier.
  • a circuit carrier can For example, an electronic assembly or part of a control unit that serves as part of a driver assistance system for distance warning or the like in a vehicle.
  • Antenna elements are advantageous if the at least one antenna element is arranged on the substrate element on the side facing away from the circuit carrier, so that the circuit carrier does not provide any shielding for the
  • the at least one electronic component on the side opposite the at least one antenna element on the substrate element i.e. is arranged on the side facing the circuit carrier.
  • plated-through holes or electrically conductive coatings can be provided on the substrate.
  • the at least one electronic component is connected to the substrate element with the interposition of at least one HF prepreg element.
  • This HF prepreg element is typically a metallic one
  • Coating which is arranged on the side of the HF prepreg element facing away from the electronic component and is in turn electrically contacted with the substrate, is connected to the at least one antenna element.
  • a prepreg element has the advantage that one or more additional rewiring layers can be inserted on the substrate element, which enables a complex HF IC to be connected, for example as a flip chip element.
  • a prepreg element can be understood to mean a pre-impregnated fiber element. This includes, for example, textile fiber matrix pre-impregnated with reactive resins. Semi-finished products that are cured under temperature and pressure to produce components.
  • the substrate element or the HF prepreg element is connected via solder connections is connected to the circuit carrier, and that the substrate element in the area of the soldered connections is made free of molding compounds in order to make the contacting as simple and reliable as possible. This enables a direct connection between the circuit carrier and the substrate element.
  • Antenna element are arranged on the same side on the substrate element.
  • Such a design makes it possible, in particular, to simplify the electrical connection between the at least one antenna element and the at least one electronic component, or else to make the production more efficient. Furthermore, this reduces the overall height of the circuit arrangement, which can be advantageous in particular in connection with a circuit arrangement connected to the circuit carrier, since the distance between the circuit carrier and the substrate element is then relatively small, which reduces the formation of the electrical connection or
  • Receiving properties of the at least one antenna element is made possible, provides that the at least one antenna element is covered with molding compound, and that on the molding compound on the side facing away from the substrate element at least one beam shaping element, preferably in Form of a metallic layer, for which at least one antenna element is arranged.
  • Such a design also has the particular advantage that the transmission or
  • Reception properties of the at least one antenna element cannot be influenced or can only be influenced to a small extent or even improved.
  • At least the area in which the at least one antenna element is arranged on the substrate element is designed free of molding compound. This enables optimal transmission and reception properties without additional beam shaping elements.
  • the invention also relates to a method for forming a
  • Circuit arrangement which is preferably designed in the manner described above.
  • the method according to the invention comprises at least the following steps: First, a large number of
  • Antenna elements are formed on the surface of a substrate carrier that can be separated into individual substrate elements. This is followed by an at least indirect arrangement of a multiplicity of identically designed electronic components on the substrate carrier and electrical contact of the components with the antenna elements. The side of the substrate carrier on which the electronic components are located is then overmolded. Finally, the substrate elements are separated from the substrate carrier. The last-mentioned separation of the substrate elements from the substrate carrier is usually carried out by means of sawing techniques, as are known from the prior art.
  • Antenna elements are further provided that the area of the antenna elements is formed before the separation of the substrate elements by freeing or protecting without molding compound, or that on the molding compound in the area of the antenna elements covered by molding compound
  • Beam shaping elements for the antenna elements are arranged.
  • the invention also comprises a substrate carrier with a multiplicity of circuit arrangements produced in the manner described above.
  • a preferred use of circuit arrangements according to the invention is to use them as part of a driver assistance system in one
  • Fig. 4 shows in simplified longitudinal sections with a
  • Fig. 5 shows a substrate carrier which is used to form
  • substrate elements serve in plan view and
  • Fig. 6 shows a flow chart for explaining the essential
  • 1 is a first circuit arrangement 10 for forming a
  • High-frequency antenna 1 shown with a circuit carrier 12, for example in the form of an electronic circuit (not shown)
  • solder connections 16 in the form of so-called solder bumps are in the area of metallizations 18 or lands on the top of the
  • Circuit carrier 12 arranged and connect the circuit arrangement 10 with the aforementioned electronic circuit of the circuit carrier 12.
  • Circuit carrier 12 or the circuit arrangement 10 are, for example, part of a control device, not shown in detail, which as
  • Driver assistance system in a vehicle is used, for example, for distance measurement.
  • the circuit arrangement 10 comprises a substrate element 20 having glass material in the exemplary embodiment, on the upper side of which, facing away from the circuit carrier 12, at least one (RF) antenna element 22 in the form of a metallic line structure is formed by coating or printing.
  • the at least one antenna element 22 is electrically contacted on the side of the substrate element 20 facing away from the at least one antenna element 22 with a metallic coating 24 (which forms an electrical mass).
  • the coating 24 is in turn connected to an HF prepreg element 26, which consists for example of a PCB or a laminate, such as Tachyon.
  • At least one electronic component 30 in the form of an IC or the like is on the side of the HF prepreg element 26 facing away from the coating 24. arranged and electrically connected to the at least one antenna element 22 by means of connections 32.
  • the electronic component 30 is surrounded or protected at least in its immediate area on its upper side and the side surfaces by a molding compound 34.
  • a molding compound 34 To the side of the molding compound 34 are the
  • Soldered connections 16 are arranged, which form the electrical connection between the circuit carrier 12 and the HF prepreg element 26, for which purpose the HF prepreg element 26 has correspondingly designed, not shown metallic coatings or the like.
  • the circuit arrangement 10a shown in FIG. 2 differs from the circuit arrangement 10 according to FIG. 1 in that the
  • Circuit arrangement 10a has neither a metallic coating 24 nor an HF prepreg element 26. Rather, the electronic component 30 is electrically conductively connected directly to the substrate element 20.
  • Component 30 and the at least one antenna element 22 are Component 30 and the at least one antenna element 22
  • both the at least one antenna element 22 and the at least one electronic component 30 are arranged on the upper side of the substrate element 20 facing away from the circuit carrier 12 in the circuit arrangement 10b according to FIG. 3.
  • the at least one antenna element 22 is located laterally next to the electronic component 30, the electronic component 30 being electrically conductively connected to the antenna element 22 or the substrate element 20 via electrical connections 36. It is also provided that the entire top or the entire area of the
  • Substrate element 20 is covered by the molding compound 34.
  • beam shaping elements 38 are provided on the molding compound 34 in operative connection with the antenna element 22, which are designed, for example, in the form of a metallic coating or the like.
  • FIG. 4 shows an exemplary embodiment modified compared to FIG. 3 with a circuit arrangement 10c.
  • the circuit arrangement 10c differs from the circuit arrangement 10b according to FIG. 3 in that the area around the antenna element 22 is freed from molding compound 34 by no molding compound 34 being applied there. Thus, only the area of the electronic component 30 on the substrate element 20 is surrounded by molding compound 34. Due to the fact that the antenna element 22 is not surrounded by molding compound 34, it is possible to use the one shown in FIG. 3
  • Beam shaping elements 38 are dispensed with.
  • FIG. 5 shows a section of a substrate carrier 50 which is used to manufacture a large number of circuit arrangements 10a to 10c on rectangular substrate elements 20.
  • the substrate elements 20 and Circuit arrangements 10a to 10c are after their formation
  • FIG. 6 This shows that initially in a first production step 101 a large number of antenna elements 22 on the
  • a manufacturing step 103 areas in which no molding compound 34 is to be applied may be cut out or protected. This is followed in a step 104
  • the exempted areas are the areas in which at least one electrical connection to the circuit carrier 12 or the arrangement of the antenna elements 22 has been made.
  • substrate elements 20 are separated from the substrate carrier 50.
  • the beam shaping elements 38 can be arranged before the substrate elements 20 are separated.
  • the substrate elements 20 are electrically connected to a respective circuit carrier 12 in accordance with the arrangements shown in FIGS. 1 to 4.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Details Of Aerials (AREA)

Abstract

L'invention concerne un ensemble circuit (10; 10a à 10c) pour une antenne haute fréquence (1), comprenant un élément substrat (20), sur lequel est disposée une structure conductrice métallique formant au moins un élément antenne (22), l'élément substrat (20) servant de support pour au moins un composant électronique (30) qui est monté de façon à coopérer avec ledit au moins élément antenne (22), ledit au moins un composant électronique (30) étant entouré de façon hermétiquement étanche par une encapsulation.
PCT/EP2019/081263 2018-11-15 2019-11-14 Ensemble circuit pour une antenne haute fréquence, procédé pour former un ensemble circuit, support de substrat et utilisation d'un ensemble circuit WO2020099531A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102018219497.1A DE102018219497A1 (de) 2018-11-15 2018-11-15 Schaltungsanordnung für eine Hochfrequenzantenne, Verfahren zur Ausbildung einer Schaltungsanordnung, Substratträger und Verwendung einer Schaltungsanordnung
DE102018219497.1 2018-11-15

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WO2020099531A1 true WO2020099531A1 (fr) 2020-05-22

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19710811B4 (de) 1997-03-15 2006-06-01 Robert Bosch Gmbh Vorrichtung zum gerichteten Abstrahlen und/oder Aufnehmen elektromagnetischer Wellen
DE102016224936A1 (de) * 2016-12-14 2018-06-14 Robert Bosch Gmbh Radarmodul
WO2018111268A1 (fr) * 2016-12-14 2018-06-21 Intel Corporation Dispositifs microélectroniques conçus avec une formation de motifs de moule pour créer des composants au niveau du boîtier pour des systèmes de communication haute fréquence
WO2018125240A1 (fr) * 2016-12-30 2018-07-05 Intel Corporation Dispositifs micro-électroniques conçus avec des substrats de boîtier souples à antennes empilées réparties pour systèmes de communication haute fréquence
EP3364457A1 (fr) * 2017-02-15 2018-08-22 Nxp B.V. Conditionnement de circuit intégré avec antenne

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19710811B4 (de) 1997-03-15 2006-06-01 Robert Bosch Gmbh Vorrichtung zum gerichteten Abstrahlen und/oder Aufnehmen elektromagnetischer Wellen
DE102016224936A1 (de) * 2016-12-14 2018-06-14 Robert Bosch Gmbh Radarmodul
WO2018111268A1 (fr) * 2016-12-14 2018-06-21 Intel Corporation Dispositifs microélectroniques conçus avec une formation de motifs de moule pour créer des composants au niveau du boîtier pour des systèmes de communication haute fréquence
WO2018125240A1 (fr) * 2016-12-30 2018-07-05 Intel Corporation Dispositifs micro-électroniques conçus avec des substrats de boîtier souples à antennes empilées réparties pour systèmes de communication haute fréquence
EP3364457A1 (fr) * 2017-02-15 2018-08-22 Nxp B.V. Conditionnement de circuit intégré avec antenne

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