WO2020098034A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2020098034A1
WO2020098034A1 PCT/CN2018/120573 CN2018120573W WO2020098034A1 WO 2020098034 A1 WO2020098034 A1 WO 2020098034A1 CN 2018120573 W CN2018120573 W CN 2018120573W WO 2020098034 A1 WO2020098034 A1 WO 2020098034A1
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Prior art keywords
display panel
film transistor
thin film
drain
curved
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English (en)
French (fr)
Inventor
吴川
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HKC Co Ltd
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HKC Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and a display device.
  • Micro LED display is to thin, miniaturize and array the LED structure design, batch transfer Micro LED to the circuit substrate, integrate high-density micro LED array as display pixels, and carry on the substrate Packaging, complete a Micro LED display device.
  • the minimum size of the micro LED can be 1 micron to 10 microns.
  • Micro LED displays are organic light-emitting diode (Organic Light-Emitting Diode, OLED) displays that are self-luminous displays, but micro LED displays have the advantages of better material stability, longer life, and no image imprinting than OLED displays. Compared with LCD (Liquid Crystal Display), it has higher transmittance.
  • TFT Thin Film Transistor
  • IGZO Indium Gallium Zinc Oxide, Indium Gallium Zinc Oxide
  • LTPS Low Temperature Poly-silicon, low-temperature polysilicon
  • the electron mobility of IGZO can reach 10 ⁇ 50cm2 / Vs, but the stability of IGZO's compressive stress is poor, so its stability needs to be improved.
  • the electron mobility of LTPS can reach 100cm2 / Vs, but the complex structure and uniformity of its TFT device limit its application in next generation panels. Therefore, if a-Si-based TFT devices can be developed to drive micro LEDs, the mass production of micro LED displays will be greatly improved.
  • An object of the present application is to provide a display panel, including but not limited to achieving the purpose of large driving current required by micro light-emitting diodes, good stability, and suitable for mass production.
  • a display panel including:
  • the array is arranged on the substrate base layer;
  • the sub-pixel unit includes a switching thin film transistor, a driving thin film transistor, and a micro light-emitting diode
  • the driving thin film transistor includes a first gate, a first active layer, a first source, and a first drain, and the first A gate is connected to the switching thin film transistor, the first source is connected to the power terminal, and the first drain is connected to the micro light-emitting diode;
  • the first source electrode includes a plurality of curved bars connected side by side, and the first drain includes a plurality of spaced straight bars and connection bars connecting the plurality of straight bars; the straight bars Inserted into the opening of the curved bar in a one-to-one correspondence, a curved gap is formed between the curved bar and the straight bar and the connecting bar, and a portion of the first active layer corresponding to the gap is formed Conductive channel.
  • the first active layer includes a first intrinsic semiconductor layer and an ohmic contact layer formed on both sides of the first intrinsic semiconductor layer; the material of the intrinsic semiconductor layer is amorphous Silicon, the material of the ohmic contact layer is amorphous silicon doped with n-type elements.
  • the curved strip includes a semi-circular arc portion in a semi-circular arc shape and extension portions connected to both ends of the semi-circular arc portion.
  • the length of the extending portion toward the first drain is 1 micrometer to 50 micrometers.
  • the straight bar includes a rectangular portion connected to the connecting bar and a semi-circular portion provided at the top end of the rectangular portion.
  • the radius of the semi-circular portion is 2 ⁇ m to 50 ⁇ m
  • the length of the conductive channel is 3 ⁇ m to 53 ⁇ m
  • the width-to-length ratio of the conductive channel is greater than or equal to 30.
  • the width-to-length ratio of the conductive channel is less than or equal to 200.
  • the side length of the sub-pixel unit is 5 ⁇ m to 500 ⁇ m, and the side length of the micro light emitting diode is 1 ⁇ m to 10 ⁇ m.
  • one extension is shared between two adjacent curved strips.
  • the micro light emitting diodes include red micro light emitting diodes, green micro light emitting diodes, and blue micro light emitting diodes
  • the sub-pixel units include red sub-pixel units, green sub-pixel units, and blue sub-pixel units.
  • the switching thin film transistor includes a second gate, a second active layer, a second source, and a second drain; the second drain is connected to the first gate.
  • the display panel further includes a plurality of scan lines and a plurality of data lines provided on the substrate base layer; the second gate is connected to the scan line, and the second source Connect to the data line.
  • the first gate and the second gate are arranged in the same layer, and the first source, the first drain, the second source and the second drain are arranged in the same layer.
  • the first active layer and the second active layer have the same material.
  • a curved strip and a straight strip form a horseshoe structure
  • the second source and the second drain of the switching thin film transistor are correspondingly arranged in one or more horseshoe structures.
  • a passivation layer is further provided above the switching thin-film transistor and the driving thin-film transistor, and the connection between the micro light-emitting diode and the first drain electrode penetrates the passivation layer.
  • Another object of this application is to provide a display panel, including:
  • the array is arranged on the substrate base layer;
  • the sub-pixel unit includes a switching thin film transistor, a driving thin film transistor, and a micro light-emitting diode
  • the driving thin film transistor includes a first gate, a first active layer, a first source, and a first drain, and the first A gate is connected to the switching thin film transistor, the first source is connected to the power terminal, and the first drain is connected to the micro light-emitting diode;
  • the first source electrode includes a plurality of curved bars connected side by side, and the first drain includes a plurality of spaced straight bars and connection bars connecting the plurality of straight bars; the straight bars Inserted into the opening of the curved bar in a one-to-one correspondence, a curved gap is formed between the curved bar and the straight bar and the connecting bar, and a portion of the first active layer corresponding to the gap is formed Conductive channel
  • the conductive channel includes a first channel corresponding to a curved shape between the curved bar and the straight bar, and the width-to-length ratio of the first channel is 2-10.
  • the conductive channel further includes a second channel corresponding to the straight bar between the curved bar and the connecting bar, and the plurality of first channels and the second channel are connected in sequence .
  • Another object of the present application is to provide a display device, including a display panel and a packaging layer provided on the light exit side of the display panel; the display panel includes:
  • the array is arranged on the substrate base layer;
  • the sub-pixel unit includes a switching thin film transistor, a driving thin film transistor, and a micro light-emitting diode
  • the driving thin film transistor includes a first gate, a first active layer, a first source, and a first drain, and the first A gate is connected to the switching thin film transistor, the first source is connected to the power terminal, and the first drain is connected to the micro light-emitting diode;
  • the first source electrode includes a plurality of curved bars connected side by side, and the first drain includes a plurality of spaced straight bars and connection bars connecting the plurality of straight bars; the straight bars Inserted into the opening of the curved bar in a one-to-one correspondence, a curved gap is formed between the curved bar and the straight bar and the connecting bar, and a portion of the first active layer corresponding to the gap is formed Conductive channel.
  • a plurality of sub-pixel units are provided on the substrate base layer, and the first source of the driving thin-film transistor in each sub-pixel unit includes a plurality of curved strips connected side by side to drive the thin-film transistor.
  • the first drain includes a plurality of straight bars arranged at intervals and a connection bar connecting the plurality of straight bars; the straight bars are inserted into the openings of the curved bars one by one, and the curved bars
  • a tortuous gap is formed between the straight bar and the connection bar, and the second active layer forms a conductive channel corresponding to the gap, thereby significantly increasing the width of the conductive channel driving the thin film transistor Length ratio, allowing more driving current to pass between the first source and the first drain, which can meet the driving current requirements of the micro light emitting diode, reducing the manufacturing cost of the driving thin film transistor, and using the micro light emitting diode to form the sub-pixel
  • the unit also has a high penetration rate and service life, thereby reducing energy consumption and increasing the service life of the display panel.
  • the display panel of the present application uses switching thin film transistors and driving thin film transistors to drive the micro light-emitting diodes to emit light and display.
  • the structure is simple and easy to manufacture, and the manufacturing yield is high and the aperture ratio is high, which is suitable for mass production of display panels.
  • the display panel and the display device provided by the embodiments of the present application meet the driving current requirements of the micro light emitting diode, reduce the manufacturing cost of the driving thin film transistor, and use the micro light emitting diode to form the sub-pixel unit, and also have high transmittance and use
  • the service life reduces the energy consumption and improves the service life of the display panel.
  • the structure is simple and easy to manufacture, and the production yield is high and the opening rate is high, which is suitable for mass production of display panels.
  • FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a longitudinal section of a display panel provided by an embodiment of the present application.
  • FIG. 3 is another schematic structural view of a longitudinal section of a display panel provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a pixel driving circuit in a display panel provided by an embodiment of the present application.
  • FIG. 5 is a schematic circuit diagram of a sub-pixel unit in a display panel provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a single horseshoe structure in a display panel provided by an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a channel in a display panel provided by an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a connection of a horseshoe structure in a display panel provided by an embodiment of the present application.
  • FIG. 9 is a schematic diagram of the aspect ratio of the driving thin film transistor in the display panel provided by the embodiment of the present application.
  • FIG. 10 is another connection schematic diagram of the horseshoe structure in the display panel provided by the embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a display device provided by an embodiment of the present application.
  • the present application first provides a display panel 100 including a substrate base layer 9 and a plurality of pixel units arranged on the substrate base layer 9, each pixel unit including a plurality of sub-pixels of different colors Pixel unit 92.
  • Each sub-pixel unit 92 includes a switching thin-film transistor 2, a driving thin-film transistor 1, a capacitive element 3, and a micro light-emitting diode 5.
  • the sub-pixel units 92 are a red sub-pixel unit, a green sub-pixel unit, and a blue sub-pixel unit respectively.
  • the red sub-pixel unit, the green sub-pixel unit, and the blue sub-pixel unit include red micro-pixels, respectively.
  • Light emitting diodes, green micro light emitting diodes and blue micro light emitting diodes may also include a yellow sub-pixel unit or a white sub-pixel unit, or be composed of sub-pixel units of other colors, which is not limited.
  • the micro light-emitting diode 5 includes a wafer, and the semiconductor material in the wafer emits light under the action of the current between the positive electrode and the negative electrode. Depending on the semiconductor material, different colors of light are emitted.
  • the semiconductor material is a compound containing gallium (Ga), arsenic (As), phosphorus (P), nitrogen (N), etc.
  • the red micro-LEDs included in the red sub-pixel unit use gallium arsenide material; the green micro-diodes included in the green sub-pixel unit use gallium phosphide material, and the blue micro-luminescence included in the blue sub-pixel unit
  • the diode uses gallium nitride material.
  • the side length of the micro LED 5 is 1 ⁇ m to 100 ⁇ m, and the area is 5 to 800 ⁇ m 2.
  • the side length of the micro LED 5 can be at least 1 ⁇ m to 10 ⁇ m.
  • the side length of the sub-pixel unit 92 ranges from 5 ⁇ m to 500 ⁇ m, and its area may be from 10 ⁇ m to 1000 ⁇ m.
  • the micro light emitting diode 5 occupies a certain area in the sub-pixel unit 92, except for the area of the micro light emitting diode 5, the other is occupied by the pixel driving circuit.
  • micro-light-emitting diodes 5 of corresponding sizes may be used.
  • the display panel provided by the embodiment of the present application uses the switching thin film transistor and the driving thin film transistor to drive the micro light-emitting diode to emit light and display.
  • the structure is simple and easy to manufacture, and the manufacturing yield is high and the aperture ratio is high.
  • a plurality of scanning lines 6 and a plurality of data lines 7 are also formed on the substrate base layer 9, and the sub-pixel unit 92 is disposed between the scanning lines 6 and the data lines 7, switching thin film transistors 2.
  • the driving thin-film transistor 1 and the capacitive element 3 constitute a pixel driving circuit of each sub-pixel unit 92, which is configured to drive the micro light-emitting diode 5 to emit light.
  • the driving thin film transistor 1 includes a first gate 11 provided on the substrate base layer 9, a gate insulating layer 102 formed on the first gate 11, and a gate insulating layer
  • the first active layer 12 on 102 and the first source electrode 13 and the first drain electrode 14 connected to the two ends of the first active layer 12, respectively
  • the switching thin film transistor 2 includes a second gate disposed on the substrate base layer 9 21.
  • the first gate electrode 11 and the second gate electrode 21 are arranged in the same layer and formed simultaneously by a photomask process, and the first source electrode 13, the first drain electrode 14, the second source electrode 23 and the second drain electrode 24 are arranged in the same layer and Simultaneously formed by a mask process.
  • the second drain 24 is connected to the first gate 11 through the first via 106 penetrating the gate insulating layer 102, see FIG. 5.
  • the second gate 21 is connected to the scan line 6, and the second source 23 is connected to the data line 7.
  • the scan signal Scan on the scan line 6 causes the switching thin film transistor 2 to turn on
  • the data line 7 The above data signal Data can be transmitted to the second drain 24.
  • the first source electrode 13 is connected to the power supply terminal (Vdd in FIG. 4) through the power supply line 8, and the first drain electrode 14 is connected to the micro light-emitting diode 5.
  • the data signal Data causes the driving thin film transistor 1 to turn on, current from the power supply terminal can pass
  • the first source electrode 13 and the first gate electrode 11 reach the micro light emitting diode 5 so that the micro light emitting diode 5 can emit light.
  • the capacitive element 3 is connected between the first gate electrode 11 and the first drain electrode 14 of the driving thin film transistor 1 to provide a sustain voltage for turning on the driving thin film transistor 1.
  • the driving thin film transistor 1 is an a-Si TFT
  • its first active layer 12 includes a first intrinsic semiconductor layer and an ohmic contact layer formed on both sides of the first intrinsic semiconductor layer (not Icon).
  • the material of the first intrinsic semiconductor layer is amorphous silicon
  • the ohmic contact layer is amorphous silicon doped with n-type ions, such as nitrogen (N), phosphorus (P), and arsenic (As) elements.
  • the switching thin film transistor 2 can also be an n-type a-Si TFT, so that the second active layer 22 can be formed in the same process as the first active layer 12 of the driving thin film transistor 1 to improve the manufacturing efficiency; it can also be other types of thin films Transistor, no longer repeat.
  • the lower electrode plate 32 of the capacitive element 3 and the second drain 24 are disposed in the same layer, and are connected between the second drain 24 and the first gate 11.
  • a passivation layer 103 is provided above the driving thin film transistor 1 and the switching thin film transistor 2, and the upper electrode plate 31 of the capacitor element 3 is provided above the passivation layer 103.
  • a protective layer 104 is further provided on the passivation layer 103 to protect the upper electrode plate 31 of the capacitive element 3.
  • the protective layer 104 is provided with an opening defining area 105 corresponding to the micro LED 5.
  • the first drain 14 is connected to the upper electrode plate 31 of the capacitor 3 and the micro LED 5 through a second via 107, and the second via 107 penetrates the Passivation layer 103.
  • the second via hole 107 penetrates the passivation layer 103 and the protective layer 104, and the micro light-emitting diode 5 is provided on the protective layer 104.
  • the first source electrode 13 of the driving thin film transistor 1 includes a plurality of curved bars 131 connected side by side, and the opening direction of each curved bar 131 faces the first drain 14.
  • the first drain 14 of the driving thin film transistor 1 is in a comb shape, and includes a plurality of straight bars 141 arranged at intervals and a connecting bar 142 connecting the plurality of straight bars 141, and the straight bars 141 are inserted into the curved bars one by one In the opening of 131 (for convenience of description, a curved bar 131 and a straight bar 141 are defined as a horseshoe structure), so that a curved first gap is formed between the curved bar 131 and the straight bar 141 , A straight strip-shaped second gap portion is formed between the curved strip 131 and the connecting strip 142, a plurality of first gap portions and a plurality of second gap portions are sequentially connected to form a zigzag gap, the second active layer 22 A conductive channel 120 is formed at a portion corresponding to the tortuous gap.
  • the conductive channel 120 includes a first channel 121 corresponding to the first gap portion and a second channel 122 corresponding to the second gap portion, see FIG. 7.
  • a zigzag gap is formed between the first source electrode 13 and the first drain electrode 14, and when a voltage is applied to the first gate electrode 11, the first source electrode 13 flows toward the first drain electrode 14 Current flows in the direction of, the first active layer 12 corresponds to the gap to form a conductive channel 120, and in the direction of the current, the width of the gap is the length L of the conductive channel 120, in a direction perpendicular to the current, The total length of the gap is the width W of the conductive channel 120, whereby the width-to-length ratio W / L of the conductive channel 120 of the driving thin film transistor 1 can be improved, and the first source electrode 13 and the first drain of the driving thin film transistor 1 Between 14 allows a larger drive current, so that the micro-light-emitting diode 5 can be driven to emit light.
  • FIG. 6 and FIG. 9 Please refer to FIG. 6 and FIG. 9 for a specific description with a horseshoe structure.
  • the curved bar 131 includes a semi-circular arc portion 1311 in a semi-circular arc shape, and an extension portion 1312 connected to both ends of the semi-circular arc portion 1311 and extending toward the connecting bar 142, and the straight bar 141 includes a rectangle connected to the connecting bar 142 The portion 1412 and the semicircular portion 1411 provided at the tip of the rectangular portion 1412.
  • the extensions 1312 are located on both sides of the straight bar 141 respectively, and the semicircle 1411 corresponds to the semicircular arc 1311, thereby forming a semicircular arc channel 1211 of uniform width between the semicircle 1411 and the semicircular arc 1311, extending A strip-shaped channel 1212 with a uniform width is formed between the portion 1312 and the rectangular portion 1412.
  • the semi-circular arc-shaped channel 1211 is connected to the two strip-shaped channels 1212 to form a first channel 121, and the width of the semi-circular arc-shaped channel 1211 and the width of the strip-shaped channel 1212 are also equal.
  • the straight bars 141 and the connecting bars 142 are vertically connected, and the curved bars 131 are sequentially connected and arranged along the direction parallel to the connecting bars 142.
  • the extending portion 1312 is vertically connected to both ends of the semi-circular arc portion 1311.
  • the width of the gap (that is, the length of the channel) be L
  • the length of the extending portion 1312 extending toward the first drain 14 be c
  • the width-to-length ratio W / L (1) of a first channel 121 is calculated by the formula for:
  • the width-to-length ratio of one second channel 122 is roughly the ratio of the sum of the widths of the two extensions 1312 and the distance between the extension 1312 and the connecting bar 142, that is
  • the width-to-length ratio W / L of the conductive channel 120 of the driving thin film transistor 1 is the sum of multiple W / L (1) and multiple W / L (2), which can greatly increase the conductive channel 120 aspect ratio.
  • a is 2-50 microns
  • b is 5-50 microns
  • c is 1-50 microns.
  • the range of L is 3 microns to 53 microns.
  • the number of the first channels 121 that is, the number of the curved strips 131 of the first source electrode 13 may be multiple, optionally, may be more than 10, such as 15 or more, 20 or more, etc., depending on W / L ( 1) and the drive current requirements of the micro light emitting diode 5 are not limited.
  • the width-to-length ratio W / L of the conductive channel 120 of the driving thin film transistor 1 is greater than or equal to 30.
  • the width-to-length ratio W / L of the conductive channel 120 is less than or equal to 200, limited by the area of the sub-pixel unit 92 and based on meeting the driving current requirements of the micro light-emitting diode 5.
  • FIG. 10 is another connection method of the curved bar 131.
  • An extension 1312 is shared between two adjacent curved bars 131. Since W / L (2) ⁇ W / L (1), such a design can reduce the number of second channels 122, so that more first channels 121 can be formed in each driving thin film transistor 1, further improving the driving film
  • the width-to-length ratio of the conductive channel 120 of the transistor 1 is W / L.
  • the conductive channel 120 is mainly composed of the first channel 121, and the second channel 122 can be ignored. Simply consider the connection of multiple first channels 121 to derive the width-to-length ratio of the conductive channel 120 to obtain the required width-to-length ratio.
  • a-Si TFT has the advantages of simple manufacturing process, low cost, high yield, and low off-state leakage current.
  • the width-to-length ratio of a-Si TFT can be improved, and the drive current Significant improvements have made it possible to use a-Si TFT-driven micro-light-emitting diodes for pixel display, as well as mass production of a-Si TFT-driven micro-light-emitting diode display panels.
  • the switching thin film transistor 2 may also adopt the same horseshoe structure as the driving thin film transistor 1, for example, including one horseshoe structure or two or more horseshoe structures connected in sequence, which is not limited in this application.
  • the switching thin film transistor 2 may be completely the same as the driving thin film transistor 1, including the same and the same number of horseshoe structures as the driving thin film transistor 1. In this way, the voltage stability on the capacitor element 3 can be further improved, so that the current flowing through the micro light-emitting diode 5 can be made more stable, and the light emission of the micro-light emitting diode 5 can be stabilized, thereby ensuring the stability of the display screen.
  • the switching thin film transistor 2 and the driving thin film transistor 1 may be respectively disposed on both sides of the capacitive element 3, and the micro light emitting diode 5 may be provided on one side of the switching thin film transistor 2, the driving thin film transistor 1 and the capacitive element 3.
  • each structure of the pixel driving circuit may also be arranged in other positions, which is not limited thereto.
  • the present application also provides a display device 200, as shown in FIG. 11, including the above-mentioned display panel 100 and an encapsulation layer 300 provided above the display panel 100.
  • the encapsulation layer 300 is a transparent layer, such as a glass layer or a transparent plastic layer. The light emitted by the micro light-emitting diode 5 is emitted upward through the encapsulation layer 300 to form a screen for display.

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Abstract

一种显示面板（100），包括多个子像素单元（92），子像素单元（92）包括开关薄膜晶体管（2）、驱动薄膜晶体管（1）和微发光二极管（5）；驱动薄膜晶体管（1）的第一源极（13）包括多个并排连接的曲形条（131），第一漏极（14）包括多个间隔排列的直形条（141）以及将多个直形条（141）连接的连接条（142）；直形条（141）一一对应插入曲形条（131）的开口内，曲形条（131）与直形条（141）和连接条（142）之间形成曲折的间隙，第一有源层（12）对应间隙的部分形成导电沟道（120）。

Description

显示面板及显示装置
本申请要求于2018年11月12日提交中国专利局，申请号为201811339338.4，发明名称为“显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
微发光二极管(Micro LED)显示器是将LED结构设计进行薄膜化、微小化、阵列化后，将Micro LED批量式转移至电路基板上，集成高密度的微LED阵列作为显示像素，进行上基板的封装，完成一Micro LED显示器件。微LED的尺寸最小可以做到1微米～10微米。微LED显示器和有机发光二极管(Organic Light-Emitting Diode，OLED)显示器一样属于自发光显示器，但微LED显示器相比OLED显示器还具有材料稳定性更好、寿命更长、无影像烙印等优点，相比于LCD(Liquid Crystal Display,液晶显示器)具有更高的穿透率。
相比于OLED，微发光二极管发光时需要较大电流驱动。根据使用的半导体材料的不同，TFT(Thin Film Transistor，薄膜晶体管)可以分为a-Si(Amorphous Silicon,非晶硅)、IGZO(Indium Gallium Zinc Oxide,铟镓锌氧化物)和LTPS(Low Temperature Poly-silicon,低温多晶硅)三种。a-si的电子迁移率大概只有0.5cm2/Vs，其迁移率不足以提供较大开态电流进行电流驱动。IGZO的电子迁移率可达10～50cm2/Vs，但是IGZO的压应力稳定性较差， 故其稳定性还有待提升。LTPS的电子迁移率可达100cm2/Vs，但是其TFT器件复杂的结构和膜层均一性限制了其在世代面板的应用。所以若能开发出基于a-Si的TFT器件来驱动微发光二极管，将大大提升微发光二极管显示器的量产性。
申请内容
本申请一目的在于提供一种显示面板，包括但不限于实现微发光二极管要求的驱动电流大以及稳定性好、适于量产的目的。
本申请实施例采用的技术方案是：一种显示面板，包括：
衬底基层；以及
多个子像素单元，阵列排布于所述衬底基层上；
其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道。
在一实施例中，所述第一有源层包括第一本征半导体层以及形成于所述第一本征半导体层两侧上方的欧姆接触层；所述本征半导体层的材料为非晶硅，所述欧姆接触层的材料为掺杂n型元素的非晶硅。
在一实施例中，所述曲形条包括呈半圆弧状的半圆弧部以及连接于所述半圆弧部两端的延伸部。
在一实施例中，所述延伸部朝向所述第一漏极延伸的长度为1微米～50微米。
在一实施例中，所述直形条包括连接于所述连接条的矩形部以及设置于所 述矩形部的顶端的半圆部。
在一实施例中，所述半圆部的半径为2微米～50微米，所述导电沟道的长度为3微米～53微米；所述导电沟道的宽长比大于或等于30。
在一实施例中，所述导电沟道的宽长比小于或等于200。
在一实施例中，所述子像素单元的边长为5微米～500微米，所述微发光二极管的边长为1微米～10微米。
在一实施例中，相邻两个所述曲形条之间共用一个所述延伸部。
在一实施例中，所述微发光二极管包括红色微发光二极管、绿色微发光二极管和蓝色微发光二极管，所述子像素单元包括红色子像素单元、绿色子像素单元和蓝色子像素单元。
在一实施例中，所述开关薄膜晶体管包括第二栅极、第二有源层、第二源极和第二漏极；所述第二漏极连接至所述第一栅极。
在一实施例中，所述显示面板还包括设于所述衬底基层上的多条扫描线和多条数据线；所述第二栅极连接至所述扫描线，所述第二源极连接至所述数据线。
在一实施例中，所述第一栅极和第二栅极同层设置，所述第一源极、第一漏极、第二源极和第二漏极同层设置。
在一实施例中，所述第一有源层和第二有源层的材料相同。
在一实施例中，一所述曲形条和一所述直形条成为一马蹄结构，所述开关薄膜晶体管第二源极和第二漏极对应呈一个或多个马蹄结构设置。
在一实施例中，所述开关薄膜晶体管和驱动薄膜晶体管的上方还设有钝化层，所述微发光二极管与所述第一漏极的连接贯穿所述钝化层。
本申请的另一目的在于提供一种显示面板，包括：
衬底基层；以及
多个子像素单元，阵列排布于所述衬底基层上；
其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二 极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道；
所述导电沟道包括对应所述曲形条和直形条之间呈弯曲形的第一沟道，所述第一沟道的宽长比为2～10。
在一实施例中，所述导电沟道还包括对应于所述曲形条和连接条之间呈直条状的第二沟道，多个所述第一沟道和第二沟道依次连接。
本申请的又一目的在于提供一种显示装置，包括显示面板以及设于所述显示面板的出光侧的封装层；所述显示面板包括：
衬底基层；以及
多个子像素单元，阵列排布于所述衬底基层上；
其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道。
本申请实施例提供的显示面板，其衬底基层上设有多个子像素单元，每一子像素单元中的驱动薄膜晶体管的第一源极包括多个并排连接的曲形条，驱动薄膜晶体管的第一漏极包括多个间隔排列的直形条以及将多个所述直形条连 接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第二有源层对应所述间隙形成导电沟道，由此，显著地提高了驱动薄膜晶体管的导电沟道的宽长比，第一源极和第一漏极之间允许更大的驱动电流通过，能够满足微发光二极管的驱动电流要求，降低了驱动薄膜晶体管的制作成本，且使用微发光二极管来形成子像素单元，还具有高的穿透率和使用寿命，从而降低能耗并提高了显示面板的使用寿命。此外，本申请的显示面板采用开关薄膜晶体管和驱动薄膜晶体管来驱动微发光二极管进行发光和显示，结构简单、容易制作，且制作良率高、开口率高，适于显示面板量产。本申请实施例提供的显示面板及显示装置，满足微发光二极管的驱动电流要求，降低了驱动薄膜晶体管的制作成本，且使用微发光二极管来形成子像素单元，还具有高的穿透率和使用寿命，从而降低能耗并提高了显示面板的使用寿命，结构简单、容易制作，且制作良率高、开口率高，适于显示面板量产。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或示范性的技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是本申请实施例提供的显示面板的结构示意图；
图2是本申请实施例提供的显示面板的纵截面的示意图；
图3是本申请实施例提供的显示面板的纵截面的另一结构示意图；
图4是本申请实施例提供的显示面板中像素驱动电路的示意图；
图5是本申请实施例提供的显示面板中子像素单元的电路示意图；
图6是本申请实施例提供的显示面板中的单个马蹄结构的示意图；
图7是本申请实施例提供的显示面板中的沟道的示意图；
图8是本申请实施例提供的显示面板中马蹄结构的一种连接示意图；
图9是本申请实施例提供的显示面板中驱动薄膜晶体管的宽长比的示意图；
图10是本申请实施例提供的显示面板中的马蹄结构的另一连接示意图；
图11是本申请实施例提供的显示装置的结构示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
需说明的是，当部件被称为“固定于”或“设置于”另一个部件，它可以直接在另一个部件上或者间接在该另一个部件上。当一个部件被称为是“连接于”另一个部件，它可以是直接或者间接连接至该另一个部件上。术语“上”、“下”、“左”、“右”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本专利的限制，对于本领域的普通技术人员而言，可以根据具体情况理解上述术语的具体含义。术语“第一”、“第二”仅用于便于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明技术特征的数量。“多个”的含义是两个或两个以上，除非另有明确具体的限定。
为了说明本申请所述的技术方案，以下结合具体附图及实施例进行详细说明。
请参阅图1和图4，本申请首先提供一种显示面板100，包括衬底基层9以及阵列排布于衬底基层9上的多个像素单元，每一像素单元包括多个不同颜色的子像素单元92。
每一子像素单元92均包括一开关薄膜晶体管2、驱动薄膜晶体管1、电容元件3和微发光二极管5。对于不同颜色的子像素单元92，微发光二极管5的发光颜色不同。在一实施例中，子像素单元92分别为红色子像素单元、绿 色子像素单元和蓝色子像素单元，对应地，红色子像素单元、绿色子像素单元和蓝色子像素单元分别包括红色微发光二极管、绿色微发光二极管和蓝色微发光二极管。当然，像素单元还可包括如黄色子像素单元或白色子像素单元，或者由其他多种颜色的子像素单元构成，对此不作限制。
微发光二极管5包括晶片，晶片中的半导体材料在正极和负极之间电流的作用下发光。根据半导体材料的不同，发出不同颜色的光。半导体材料为含镓(Ga)、砷(As)、磷(P)、氮(N)等的化合物，具体如，发红色光的铝砷化镓、砷化镓、砷化镓磷化物、磷化铟镓、铝磷化镓(掺杂氧化锌)，发绿色光的铝磷化镓、铟氮化镓/氮化镓、磷化镓、磷化铟镓铝、铝磷化镓，发黄色(橘红色、橙色)光的磷化铝铟、镓砷化镓、磷化铟镓铝、磷化镓、碳化硅，发蓝色光的氮化镓、硒化锌等。
在一具体实施例中，红色子像素单元包括的红色微发光二极管采用砷化镓材料；绿色子像素单元包括的绿色微二极管发采用磷化镓材料，蓝色子像素单元包括的蓝色微发光二极管采用氮化镓材料。
在一实施例中，微发光二极管5的边长尺寸在1微米～100微米，面积在5～800平方微米，微发光二极管5的边长最小可为1微米～10微米。
子像素单元92的边长尺寸在5微米～500微米，其面积可为10～1000平方微米。微发光二极管5在子像素单元92中占据一定面积，除去该微发光二极管5的面积，其他为像素驱动电路所占用。
根据显示面板100的规格、分辨率等可以使用相应尺寸的微发光二极管5。
本申请实施例提供的显示面板，采用开关薄膜晶体管和驱动薄膜晶体管来驱动微发光二极管进行发光和显示，结构简单、容易制作，且制作良率高、开口率高。
如图1和图4所示，衬底基层9上还形成有多条扫描线6和多条数据线7，子像素单元92设置于该些扫描线6和数据线7之间，开关薄膜晶体管2、驱动薄膜晶体管1和电容元件3构成每一子像素单元92的像素驱动电路，设置 为驱动微发光二极管5发光。
具体如图3和图4所示，驱动薄膜晶体管1包括设置于衬底基层9上的第一栅极11、形成于第一栅极11上的栅极绝缘层102、形成于栅极绝缘层102上的第一有源层12以及分别连接于第一有源层12两端的第一源极13和第一漏极14，开关薄膜晶体管2包括设置于衬底基层9上的第二栅极21、形成于第二栅极21上的栅极绝缘层102、形成于栅极绝缘层102上的第二有源层22以及分别连接于第二有源层22两端的第二源极23和第二漏极24。
第一栅极11和第二栅极21同层设置且由一道光罩制程同时形成，第一源极13、第一漏极14、第二源极23和第二漏极24同层设置且由一道光罩制程同时形成。第二漏极24通过贯穿栅极绝缘层102的第一过孔106与第一栅极11连接，参见图5。
请参考图4和图5，第二栅极21连接至扫描线6，第二源极23连接至数据线7，当扫描线6上的扫描信号Scan使得开关薄膜晶体管2打开时，数据线7上的数据信号Data能够传输至第二漏极24。
第一源极13通过电源线8连接至电源端(图4中Vdd)，第一漏极14连接至微发光二极管5，当数据信号Data使得驱动薄膜晶体管1打开时，来自电源端的电流能够通过第一源极13和第一栅极11到达微发光二极管5，从而微发光二极管5能够发光。
电容元件3并连接至驱动薄膜晶体管1的第一栅极11和第一漏极14之间，为驱动薄膜晶体管1的打开提供维持电压。
在本实施例中，驱动薄膜晶体管1为a-Si TFT，其第一有源层12包括一层第一本征半导体层以及形成于第一本征半导体层两侧上方的欧姆接触层(未图示)。第一本征半导体层的材料为非晶硅，欧姆接触层为掺杂n型离子的非晶硅，如掺杂氮(N)、磷(P)、砷(As)元素。开关薄膜晶体管2也可以为n型a-Si TFT，这样第二有源层22可以和驱动薄膜晶体管1的第一有源层12在同一制程形成，提高制作效率；也可以是其他类型的薄膜晶体管，不再赘述。
如图2、图4和图5所示，电容元件3的下电极板32与第二漏极24同层设置，并连接至第二漏极24与第一栅极11之间。在驱动薄膜晶体管1和开关薄膜晶体管2的上方设有一层钝化层103，电容元件3的上电极板31设置于钝化层103的上方。在钝化层103上还设有一层保护层104，设置为将电容元件3的上电极板31保护起来。该保护层104对应微发光二极管5设有开口定义区105，第一漏极14与电容元件3的上电极板31和微发光二极管5通过第二过孔107连接，第二过孔107贯穿该钝化层103。或者，如图2所示，第二过孔107贯穿钝化层103与保护层104，微发光二极管5设于保护层104之上。
请参阅图5至图8，驱动薄膜晶体管1的第一源极13包括多个并排连接的曲形条131，每一曲形条131的开口方向朝向第一漏极14。
驱动薄膜晶体管1的第一漏极14呈头梳状，包括多个间隔排列的直形条141以及将多个直形条141连接的连接条142，直形条141一一对应插入曲形条131的开口内(为描述方便，本文定义一个曲形条131和一个直形条141为一个马蹄结构)，从而在曲形条131与直形条141之间形成呈弯曲形的第一间隙部，在曲形条131与和连接条142之间形成直条状的第二间隙部，多个第一间隙部和多个第二间隙部依次连接，形成曲折的间隙，第二有源层22对应该曲折的间隙的部分形成导电沟道120，导电沟道120包括对应第一间隙部的第一沟道121以及对应第二间隙部的第二沟道122，参见图7。
本申请的驱动薄膜晶体管1中，第一源极13与第一漏极14之间形成曲折的间隙，当在第一栅极11上施加电压，从第一源极13向第一漏极14的方向有电流流过，第一有源层12对应该间隙形成导电沟道120，沿着电流的方向上，间隙的宽度即为导电沟道120的长度L，在垂直于电流的方向上，间隙的总长度为导电沟道120的宽度W，由此，驱动薄膜晶体管1的导电沟道120的宽长比W/L能够提高，驱动薄膜晶体管1的第一源极13和第一漏极14之间允许通过更大的驱动电流，从而可以驱动微发光二极管5发光。
请参阅图6和图9，以一个马蹄结构具体进行说明。
曲形条131包括呈半圆弧状的半圆弧部1311，以及连接于半圆弧部1311的两端并朝向连接条142方向延伸的延伸部1312，直形条141包括连接于连接条142的矩形部1412以及设置于矩形部1412的顶端的半圆部1411。延伸部1312分别位于直形条141的两侧，半圆部1411与半圆弧部1311对应，从而在半圆部1411与半圆弧部1311之间形成宽度均一的半圆弧形沟道1211，在延伸部1312与矩形部1412之间形成宽度均一的条形沟道1212。半圆弧形沟道1211与两个条形沟道1212连接形成第一沟道121，且半圆弧形沟道1211的宽度与条形沟道1212的宽度也相等。
可选地，直形条141与连接条142之间为垂直连接，曲形条131沿着与连接条142平行的方向依次连接排列。延伸部1312垂直连接于半圆弧部1311的两端。
如图9所示，设半圆部1411的半径为a，间隙的宽度(也即沟道的长度)为L，延伸部1312朝向第一漏极14延伸的长度为c，半圆部1411的圆心至延伸部1312靠近半圆部1411的一侧的距离为b(b＝a+L)，则在第一间隙部的范围内，一个第一沟道121的宽长比W/L(1)计算公式为：
Figure PCTCN2018120573-appb-000001
在第二间隙部的范围内而言，一个第二沟道122的宽长比大体为两个延伸部1312的宽度之和与延伸部1312与连接条142之间的距离的比值，即
Figure PCTCN2018120573-appb-000002
由于多个第一沟道121和第二沟道122均对导电沟道120的宽度W做出贡献，但不改变导电沟道120的长度L，因此，多个第一沟道121和第二沟道122连接后，驱动薄膜晶体管1的导电沟道120的宽长比W/L为多个W/L(1)与多个W/L(2)的和，能够极大地高导电沟道120的宽长比。
在一实施例中，a为2微米～50微米，b为5微米～55微米，c为1微米～50微米。L的范围为3微米～53微米。
在一实施例中，对于一个第一沟道121而言，2≤W/L(1)≤10。
第一沟道121的数量也即第一源极13的曲形条131的数量可为多个，可选地，可为10个以上，如15以上、20个以上等，视W/L(1)以及微发光二极管5的驱动电流要求而定，对此不作限制。
在一实施例中，驱动薄膜晶体管1的导电沟道120的宽长比W/L大于或等于30。
在一实施例中，受限于子像素单元92的面积以及基于满足微发光二极管5的驱动电流要求，导电沟道120的宽长比W/L小于或等于200。
请参阅图10，为曲形条131的另一种连接方式，相邻两个曲形条131之间共用一个延伸部1312。由于W/L(2)<W/L(1)，这样的设计可以减少第二沟道122的数量，从而各个驱动薄膜晶体管1中可以形成更多个第一沟道121，进一步提高驱动薄膜晶体管1的导电沟道120的宽长比W/L。
在图8和图10中，当延伸部1312和半圆弧部1311的宽度足够小时，导电沟道120主要由第一沟道121构成，第二沟道122可以忽略不计，此时，可以更简单地考虑多个第一沟道121的连接以得出导电沟道120的宽长比，以获得所需要的宽长比。
a-Si TFT具有制作工艺简单、成本低、成品率高、关态漏电流低的优势，在本申请实施例提供的显示面板中，a-Si TFT的宽长比得以提高，同时驱动电流也大幅提高，使得使用a-Si TFT驱动微发光二极管发光作为像素显示成为可能，同时也使得a-Si TFT驱动微发光二极管的显示面板量产成为可能。
请参阅图5，开关薄膜晶体管2也可以采用与驱动薄膜晶体管1相同的马蹄结构，如包括1个马蹄结构或者2个以上依次连接的马蹄结构，本申请对此不作限制。在一实施例中，开关薄膜晶体管2可以与驱动薄膜晶体管1完全相同，包括与驱动薄膜晶体管1的马蹄结构相同且数量也相同的马蹄结构。这样 可以进一步提高电容元件3上的电压稳定性，从而也可以使得流过微发光二极管5的电流更加稳定，保证微发光二极管5的发光稳定，从而保证显示画面的稳定。
在一实施例中，开关薄膜晶体管2和驱动薄膜晶体管1可以分别设于电容元件3的两侧，微发光二极管5可以设于开关薄膜晶体管2、驱动薄膜晶体管1以及电容元件3的一侧。当然，在其他实施例中，像素驱动电路的各结构也可以有其他位置排布方式，并不以此为限。
本申请还提供一种显示装置200，如图11所示，包括上述所说的显示面板100，以及设于显示面板100上方的封装层300。封装层300为透明层，如玻璃层、透明塑料层等。微发光二极管5发出的光线向上经封装层300出射，形成画面予以显示。
以上仅为本申请的可选实施例而已，并不用于限制本申请。对于本领域的技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的权利要求范围之内。

Claims (19)

  1. 一种显示面板，包括：
    衬底基层；以及
    多个子像素单元，阵列排布于所述衬底基层上；
    其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
    所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道。
  2. 如权利要求1所述的显示面板，其中，所述第一有源层包括第一本征半导体层以及形成于所述第一本征半导体层两侧上方的欧姆接触层；所述本征半导体层的材料为非晶硅，所述欧姆接触层的材料为掺杂n型元素的非晶硅。
  3. 如权利要求1所述的显示面板，其中，所述曲形条包括呈半圆弧状的半圆弧部以及连接于所述半圆弧部两端的延伸部。
  4. 如权利要求3所述的显示面板，其中，所述延伸部朝向所述第一漏极延伸的长度为1微米～50微米。
  5. 如权利要求1所述的显示面板，其中，所述直形条包括连接于所述连接条的矩形部以及设置于所述矩形部的顶端的半圆部。
  6. 如权利要求5所述的显示面板，其中，所述半圆部的半径为2微米～50微米，所述导电沟道的长度为3微米～53微米；所述导电沟道的宽长比大于或等于30。
  7. 如权利要求6所述的显示面板，其中，所述导电沟道的宽长比小于或等于200。
  8. 如权利要求1所述的显示面板，其中，所述子像素单元的边长为5微米～500微米，所述微发光二极管的边长为1微米～10微米。
  9. 如权利要求2所述的显示面板，其中，相邻两个所述曲形条之间共用一个所述延伸部。
  10. 如权利要求1所述的显示面板，其中，所述微发光二极管包括红色微发光二极管、绿色微发光二极管和蓝色微发光二极管，所述子像素单元包括红色子像素单元、绿色子像素单元和蓝色子像素单元。
  11. 如权利要求1所述的显示面板，其中，所述开关薄膜晶体管包括第二栅极、第二有源层、第二源极和第二漏极；所述第二漏极连接至所述第一栅极。
  12. 如权利要求11所述的显示面板，其中，所述显示面板还包括设于所述衬底基层上的多条扫描线和多条数据线；所述第二栅极连接至所述扫描线，所述第二源极连接至所述数据线。
  13. 如权利要求11所述的显示面板，其中，所述第一栅极和第二栅极同层设置，所述第一源极、第一漏极、第二源极和第二漏极同层设置。
  14. 如权利要求11所述的显示面板，其中，所述第一有源层和第二有源层的材料相同。
  15. 如权利要求11所述的显示面板，其中，一所述曲形条和一所述直形条成为一马蹄结构，所述开关薄膜晶体管第二源极和第二漏极对应呈一个或多个马蹄结构设置。
  16. 如权利要求1所述的显示面板，其中，所述开关薄膜晶体管和驱动薄膜晶体管的上方还设有钝化层，所述微发光二极管与所述第一漏极的连接贯穿所述钝化层。
  17. 一种显示面板，包括：
    衬底基层；以及
    多个子像素单元，阵列排布于所述衬底基层上；
    其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
    所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道；
    所述导电沟道包括对应所述曲形条和直形条之间呈弯曲形的第一沟道，所述第一沟道的宽长比为2～10。
  18. 如权利要求17所述的显示面板，其中，所述导电沟道还包括对应于所述曲形条和连接条之间呈直条状的第二沟道，多个所述第一沟道和第二沟道依次连接。
  19. 一种显示装置，其中，包括显示面板以及设于所述显示面板的出光侧的封装层；所述显示面板包括：
    衬底基层；以及
    多个子像素单元，阵列排布于所述衬底基层上；
    其中，所述子像素单元包括开关薄膜晶体管、驱动薄膜晶体管和微发光二极管；所述驱动薄膜晶体管包括第一栅极、第一有源层、第一源极和第一漏极，所述第一栅极连接至所述开关薄膜晶体管，所述第一源极连接至电源端，所述第一漏极连接至所述微发光二极管；
    所述第一源极包括多个并排连接的曲形条，所述第一漏极包括多个间隔排列的直形条以及将多个所述直形条连接的连接条；所述直形条一一对应插入所 述曲形条的开口内，所述曲形条与所述直形条和所述连接条之间形成曲折的间隙，所述第一有源层对应所述间隙的部分形成导电沟道。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112713142A (zh) * 2020-08-24 2021-04-27 錼创显示科技股份有限公司 发光显示单元及显示装置
CN114420719A (zh) * 2022-02-08 2022-04-29 厦门天马微电子有限公司 显示面板和显示装置
US20230043626A1 (en) * 2020-03-24 2023-02-09 Beijing Boe Display Technology Co., Ltd. Pixel driving circuits and display devices

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111799318B (zh) * 2020-07-28 2022-08-19 武汉天马微电子有限公司 一种显示面板及显示装置
CN112086467B (zh) * 2020-09-02 2023-03-24 武汉华星光电半导体显示技术有限公司 显示面板
CN114999369B (zh) * 2022-06-08 2023-08-04 滁州惠科光电科技有限公司 像素驱动电路及显示面板
CN115842058A (zh) * 2022-12-19 2023-03-24 广州华星光电半导体显示技术有限公司 薄膜晶体管和显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007305802A (ja) * 2006-05-11 2007-11-22 Seiko Epson Corp 半導体装置、電気光学装置、電子機器及び半導体装置の製造方法
CN203707135U (zh) * 2014-01-27 2014-07-09 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN204516772U (zh) * 2015-01-23 2015-07-29 山西大同大学 一种薄膜晶体管
CN105140293A (zh) * 2015-08-10 2015-12-09 京东方科技集团股份有限公司 薄膜晶体管、goa栅极驱动电路、阵列基板和显示装置
CN107204375A (zh) * 2017-05-19 2017-09-26 深圳市华星光电技术有限公司 薄膜晶体管及其制作方法
CN108267891A (zh) * 2016-12-30 2018-07-10 乐金显示有限公司 液晶显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105702683B (zh) * 2016-02-01 2019-12-13 重庆京东方光电科技有限公司 一种薄膜晶体管及其制备方法、阵列基板及显示装置
CN107221291B (zh) * 2017-07-31 2019-04-23 上海天马微电子有限公司 一种显示基板、显示面板及其驱动方法、显示装置
CN108538254A (zh) * 2018-04-25 2018-09-14 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007305802A (ja) * 2006-05-11 2007-11-22 Seiko Epson Corp 半導体装置、電気光学装置、電子機器及び半導体装置の製造方法
CN203707135U (zh) * 2014-01-27 2014-07-09 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN204516772U (zh) * 2015-01-23 2015-07-29 山西大同大学 一种薄膜晶体管
CN105140293A (zh) * 2015-08-10 2015-12-09 京东方科技集团股份有限公司 薄膜晶体管、goa栅极驱动电路、阵列基板和显示装置
CN108267891A (zh) * 2016-12-30 2018-07-10 乐金显示有限公司 液晶显示装置
CN107204375A (zh) * 2017-05-19 2017-09-26 深圳市华星光电技术有限公司 薄膜晶体管及其制作方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20230043626A1 (en) * 2020-03-24 2023-02-09 Beijing Boe Display Technology Co., Ltd. Pixel driving circuits and display devices
US11955061B2 (en) * 2020-03-24 2024-04-09 Beijing Boe Display Technology Co., Ltd. Pixel driving circuits and display devices
CN112713142A (zh) * 2020-08-24 2021-04-27 錼创显示科技股份有限公司 发光显示单元及显示装置
US11652077B2 (en) 2020-08-24 2023-05-16 PlayNitride Display Co., Ltd. Light-emitting display unit and display apparatus
CN114420719A (zh) * 2022-02-08 2022-04-29 厦门天马微电子有限公司 显示面板和显示装置

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