WO2020052404A1 - 一种用于高功率因数无频闪led照明的驱动电路 - Google Patents

一种用于高功率因数无频闪led照明的驱动电路 Download PDF

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Publication number
WO2020052404A1
WO2020052404A1 PCT/CN2019/100783 CN2019100783W WO2020052404A1 WO 2020052404 A1 WO2020052404 A1 WO 2020052404A1 CN 2019100783 W CN2019100783 W CN 2019100783W WO 2020052404 A1 WO2020052404 A1 WO 2020052404A1
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Prior art keywords
resistor
current
primary winding
control chip
diode
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PCT/CN2019/100783
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English (en)
French (fr)
Inventor
黄胜明
冯多力
黄涛
郭天
李卫东
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苏州瑞铬优电子科技有限公司
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Priority to US17/275,138 priority Critical patent/US11304280B2/en
Publication of WO2020052404A1 publication Critical patent/WO2020052404A1/zh

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/355Power factor correction [PFC]; Reactive power compensation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/37Converter circuits
    • H05B45/3725Switched mode power supply [SMPS]
    • H05B45/382Switched mode power supply [SMPS] with galvanic isolation between input and output
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • H05B45/59Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits for reducing or suppressing flicker or glow effects

Definitions

  • the invention relates to the field of lighting technology, in particular to a driving circuit for high power factor flicker-free LED lighting.
  • the energy consumption index (conversion efficiency and power factor) of the high-voltage AC / DC conversion LED lighting driving power supply itself has become a key factor for the energy saving of the entire lighting system.
  • the power factor (PF value) is an important performance indicator.
  • the Energy Star standard proposes that for LED lighting products greater than 5W, the power factor index, that is, the PF value must be greater than 0.7. For LED lighting applications above 10 watts, the PF value must be greater than 0.9.
  • active or passive power factor adjustment (PFC) control methods can be used.
  • LED lighting drive power supplies are usually implemented with transformers to achieve an electrically isolated topology.
  • transformers For lighting application markets below 30 to 70 watts, in order to reduce the cost of driving power, a single-stage topology based on transformer primary or secondary feedback control is often used.
  • the transformer-based single-stage primary-side feedback (PSR) topology has the advantages of low cost due to its simple structure and few components. It is widely used in situations where the output power is less than 30 to 70 watts, especially in low-end lighting. market.
  • Figure 1 (a) shows the waveforms of the transformer primary and secondary winding currents in a traditional high power factor single-stage topology LED lighting drive power supply operating in a current critical mode within half a power frequency cycle, that is, a sine half wave.
  • Figure 1 (b) shows the power supply output LED current waveform corresponding to the input of Figure 1 (a).
  • Ipri is the rising current of the primary winding during the on-time ton after the transformer primary-side control switch is turned on
  • Isen is the auxiliary current within the off-time toff after the transformer's primary-side control switch is turned off.
  • the falling current of the side winding, N is the turns ratio of the transformer's primary and secondary windings.
  • the relationship between the primary peak current Ipri_pk and the secondary peak current Isen_pk in each switching cycle is:
  • Ipri_pk Isen_pk / N —........paper (1)
  • the peak current Ipri_pk on the primary side and the peak current Isen_pk / N on the secondary side show a sine half-wave waveform as shown in FIG. 1 (a), where the shaded area is the output current. Therefore, the output current will show a sinusoidal ripple as shown in Figure 1 (b).
  • Solution 1 Primary side PFC + PSR, which is the first stage power factor adjustment, raises the sine half-wave input voltage with a high power factor to 400 volts, and uses a larger capacitor to store the output energy of the first stage. Then, a single-stage primary-side feedback topology is used to form the second stage.
  • Solution two primary side PSR + secondary side DC / DC constant current control.
  • Option three primary side PSR + secondary side peak current absorption.
  • An object of the present invention is to provide a driving circuit for high power factor flicker-free LED lighting.
  • a driving circuit for high power factor flicker-free LED lighting includes a startup circuit, a control chip, a transformer T1, a first current switch, and a second current switch;
  • the transformer T1 includes a primary winding Np1 and a primary winding Np2, primary winding Na and secondary winding Ns;
  • primary primary winding Np1 and primary winding Np2 are in phase, primary winding Na and secondary winding Ns are in phase, primary primary winding Np1 and secondary winding Ns are out of phase
  • the startup circuit and the transformer T1 are both connected to the input terminal Vin;
  • the startup circuit and the first current switch and the second current switch are both connected to a control chip;
  • the control chip controls the conductance of the first current switch and the second current switch
  • the current output of the secondary winding Ns of the control transformer T1 is turned on and off.
  • the driving power circuit further includes capacitors C1 to C9, resistors R1 to R2, resistors R6 to R9, resistors R11 to R13, resistors R15 to R17, diodes D7 to D8, and diodes D12 to D13;
  • the input voltage monitoring input terminal 1 of the control chip is grounded through the resistor R2; the capacitor C2 is connected in parallel at both ends of the resistor R2; the input terminal Vin is connected to the input voltage monitoring input terminal 1 of the control chip through the resistor R1; the capacitor C1 is set at the input Between the terminal Vin and ground; the high-voltage input a of the startup circuit is connected to the input Vin; the feedback input d of the startup circuit is connected to the precharge completion feedback output 2 of the control chip; the precharge output c of the startup circuit is connected to the capacitor One end of C3 and the other end of C3 are grounded; the pre-charge output terminal b of the startup circuit is connected to resistor R7 and energy storage capacitor C7 at the same time, and is connected to ground through resistor R7 and resistor R8 in sequence; the intersection of resistor R7 and resistor R8 is connected to the control chip For the voltage monitoring input terminal 4 of the capacitor C7, the first phase transmission current monitoring input terminal 7 of the control chip is connected to the current output terminal of the first
  • the positive pole of the primary winding Np1 is connected to the input terminal Vin.
  • the negative pole of the primary winding Np1 is returned to the positive electrode through the diode D7 and the resistor R6 in order to form a closed loop.
  • the capacitor C4 is connected in parallel to the two ends of the resistor R6.
  • the anode of the diode D7 passes through the first A current switch and the resistor R11 are grounded; the control terminal of the first current switch is connected to the first drive output terminal 6 of the control chip; the negative pole of the diode D7 is connected to the negative pole of the diode D12, and the positive pole of D12 is sequentially grounded through the second current switch and the resistor R16; The control terminal of the second current switch is connected to the second drive output terminal 5 of the control chip; the positive pole of the primary winding Na is grounded, the negative pole is connected to the resistor R12 and simultaneously connected to the pre-charge output terminal c of the startup circuit and the control chip power input through the diode D8.
  • the positive pole of the primary winding Np2 is connected to the precharge output terminal b of the starting circuit, and at the same time, it returns to the negative pole of the primary winding Np2 through the capacitor C7, the resistor R16, and the second current switch in sequence; the secondary winding Ns Both ends are connected to LED lights through diode D13 to the power output.
  • the energy storage capacitor C7 is used to store energy required for the second-phase transmission current.
  • the starting circuit includes a transistor Q1, diodes D5 to D6, and resistors R3 to R5; the anode of the diode D5 is connected to the input terminal Vin; the anode of the diode D5 is connected to the collector of the transistor Q1 on the one hand, and on the other hand via a resistor R3 is connected to the anode of diode D6, and the cathode of diode D6 is connected to the base of transistor Q1; the collector of transistor Q1 is connected to capacitor C3 through resistor R5 in order; resistor R4 is set between the base and emitter of transistor Q1; The emitter is connected to the anode of the primary winding Np2.
  • the first current switch includes a diode D9 and an NMOS tube M1; the anode of the diode D9 is connected to the anode of the primary winding Np1, the anode of the diode D9 is connected to the drain of the NMOS tube M1, and the gate of the NMOS tube M1 is connected The first driving output terminal 6 of the control chip, and the source of the NMOS tube M1 is grounded through the resistor R11.
  • the first current switch includes an NMOS tube M1a and an NMOS tube M1b; the drain of the NMOS tube M1a is connected to the negative electrode of the primary winding Np1, and the gate of the NMOS tube M1a is connected to the gate of the NMOS tube M1b.
  • the source of the NMOS tube M1a is connected to the source of the NMOS tube M1b, and the drain of the NMOS tube M1b is grounded through the resistor R11.
  • the second current switch includes an NMOS tube M2; the drain of the NMOS tube M2 is connected to the anode of the transformer primary winding Np2 and the anode of the diode D12 at the same time, and the gate of the NMOS tube M2 is connected to the second driving output of the control chip. Terminal 5, the source of the NMOS tube M2 is grounded through a resistor R16.
  • the ripple of the output current of the driving power circuit for high power factor flicker-free LED lighting is significantly reduced, so that LED lighting has the advantages of high power factor, no flicker and low cost.
  • Figure 1 (a) is the current waveform diagram of the windings of the primary and secondary coils of a traditional single-stage topology high power factor LED lighting drive power transformer.
  • FIG. 1 (b) is a waveform diagram of a power output LED current corresponding to FIG. 1 (a).
  • FIG. 2 is a first circuit diagram of a driving circuit for high power factor flicker-free LED lighting provided by the present invention.
  • FIG. 3 (a) is a reference voltage waveform diagram corresponding to the two-phase transmission current peak after the control chip is turned on in FIG. 2.
  • FIG. 3 (a) is a reference voltage waveform diagram corresponding to the two-phase transmission current peak after the control chip is turned on in FIG. 2.
  • FIG. 3 (b) is a waveform diagram of the two-phase current generated at different switching cycles after the control chip is turned on in FIG.
  • Fig. 4 is a partially enlarged schematic diagram of Fig. 3 (b).
  • FIG. 5 (a) is a schematic diagram of the peak currents of the two-phase transmission currents on the primary side of the transformer during the first half of the power frequency period after the control chip is turned on.
  • FIG. 5 (b) is a schematic diagram of the two-phase output current of the secondary side of the transformer and the total output current waveform generated after the control chip is turned on during the half power frequency period after the control chip is turned on.
  • FIG. 6 is a schematic diagram of a second circuit of a driving circuit for high power factor flicker-free LED lighting according to the present invention.
  • FIG. 7 is a third circuit diagram of a driving circuit for high power factor flicker-free LED lighting according to the present invention.
  • Control chip input voltage monitoring input terminal 1, pre-charge completion feedback output terminal 2, power input terminal 3, first driving output terminal 5, second driving output terminal 6, first phase transmission current monitoring input terminal 7, transformer secondary side Winding current and output overvoltage monitoring input terminal 8, second phase transmission current monitoring input terminal 9, and ground terminal 10;
  • Start-up circuit high-voltage input a, pre-charge output b, pre-charge output c, and feedback input d;
  • Embodiment 1 A driving circuit for high power factor flicker-free LED lighting, as shown in FIG. 2, including a startup circuit, a control chip, a transformer T1, a first current switch, and a second current switch; the transformer T1 Including primary winding Np1, primary winding Np2, primary winding Na and secondary winding Ns; primary primary winding Np1 and primary winding Np2 are in phase, primary winding Na and secondary winding Ns are in phase, primary primary The winding Np1 and the secondary winding Ns are out of phase; the startup circuit and the transformer T1 are both connected to the input terminal Vin; the startup circuit and the first current switch and the second current switch are connected to a control chip; the control chip controls the first A current switch and a second current switch turn on and off the current output of the secondary winding Ns of the control transformer T1; the circuit access point of the external AC power rectified by the full bridge is the input terminal Vin, and the voltage at this point is set to Vin;
  • the driving power circuit further includes capacitors C1 to C9, resistors R1 to R2, resistors R6 to R9, resistors R11 to R13, resistors R15 to R17, diodes D7 to D8, and diodes D12 to D13;
  • the input voltage monitoring input terminal 1 of the control chip is grounded through the resistor R2; the capacitor C2 is connected in parallel at both ends of the resistor R2; the input terminal Vin is connected to the input voltage monitoring input terminal 1 of the control chip through the resistor R1; the capacitor C1 is set at the input Between the terminal Vin and ground; the high-voltage input a of the startup circuit is connected to the input Vin; the feedback input d of the startup circuit is connected to the precharge completion feedback output 2 of the control chip; the precharge output c of the startup circuit is connected to the capacitor One end of C3 and the other end of C3 are grounded; the pre-charge output terminal b of the startup circuit is connected to resistor R7 and energy storage capacitor C7 at the same time, and is connected to ground through resistor R7 and resistor R8 in sequence; the intersection of resistor R7 and resistor R8 is connected to the control chip For the voltage monitoring input terminal 4 of the capacitor C7, the first phase transmission current monitoring input terminal 7 of the control chip is connected to the current output terminal of the first
  • the positive pole of the primary winding Np1 is connected to the input terminal Vin.
  • the negative pole of the primary winding Np1 is returned to the positive electrode through the diode D7 and the resistor R6 in order to form a closed loop.
  • the capacitor C4 is connected in parallel to the two ends of the resistor R6.
  • a current switch and the resistor R11 are grounded; the control terminal of the first current switch is connected to the first drive output terminal 6 of the control chip; the negative pole of the diode D7 is connected to the negative pole of the diode D12, and the positive pole of D12 is sequentially grounded through the second current switch and the resistor R16; The control terminal of the second current switch is connected to the second drive output terminal 5 of the control chip; the positive pole of the primary winding Na is grounded, the negative pole is connected to the resistor R12 and simultaneously connected to the pre-charge output terminal c of the startup circuit and the control chip power input through the diode D8.
  • the positive pole of the primary winding Np2 is connected to the precharge output terminal b of the starting circuit, and at the same time, it returns to the negative pole of the primary winding Np2 through the capacitor C7, the resistor R16, and the second current switch in sequence; the secondary winding Ns Both ends are connected to LED lights through diode D13 to the power output.
  • the starting circuit includes a transistor Q1, diodes D5 to D6, and resistors R3 to R5; the anode of the diode D5 is connected to the input terminal Vin; the anode of the diode D5 is connected to the collector of the transistor Q1 on the one hand
  • the resistor R3 is connected to the anode of the diode D6, and the cathode of the diode D6 is connected to the base of the transistor Q1;
  • the collector of the transistor Q1 is connected to the capacitor C3 in turn through the resistor R5;
  • the resistor R4 is set at the base and emitter of the transistor Q1 Between; the emitter of the transistor Q1 is connected to the anode of the primary winding Np2.
  • the first current switch includes a diode D9 and an NMOS tube M1; the anode of the diode D9 is connected to the negative electrode of the primary winding Np1, and the anode of the diode D9 is connected to the drain of the NMOS tube M1.
  • the gate of the NMOS tube M1 is connected to the first drive output terminal 6 of the control chip, and the source of the NMOS tube M1 is grounded through a resistor R11.
  • the first current switch includes an NMOS tube M1a and an NMOS tube M1b; the drain of the NMOS tube M1a is connected to the negative electrode of the primary winding Np1, and the NMOS tube M1a is connected to the gate of the NMOS tube M1b.
  • the electrode is connected to the first driving output terminal 6 of the control chip, the source of the NMOS tube M1a is connected to the source of the NMOS tube M1b, and the drain of the NMOS tube M1b is grounded through the resistor R11.
  • the second current switch includes an NMOS tube M2; the drain of the NMOS tube M2 is connected to the anode of the transformer primary winding Np2 and the anode of the diode D12 at the same time, and the gate of the NMOS tube M2 is connected The second driving output terminal 5 of the control chip, and the source of the NMOS tube M2 is grounded through the resistor R16.
  • the three windings Np1, Np2 and Na are applied to the primary side of the transformer, and only the winding Ns is applied to the secondary side of the transformer; Np1 is the main winding, which is used to transmit the first phase current I to the secondary side winding of the transformer, that is, the power output end * sin ⁇ t, at the same time, the charge required for the second phase current I * (1-sin ⁇ t) is transmitted to the winding Np2 and stored in the capacitor C7.
  • the winding Na is used to monitor that the secondary winding Ns current drops to 0 in each switching cycle, and the controller starts the next switching cycle, that is, to ensure that the current is in a critical mode.
  • the winding Na is also used to supply the power supply voltage to the chip power after startup and to monitor the output overvoltage.
  • the Start-up Circuit module charges the capacitor C3 and the capacitor C7 at the same time; the capacitor C3 is connected to the 3 pin of the chip, which is the controller chip (Controller) Power pin.
  • Capacitor C7 is used to store the charge for transmitting the second phase current. The voltage on capacitor C7 is divided by the detection resistor R7 and resistor R8 and then fed back to pin 4 of the control chip.
  • the voltage on the capacitor C3 that is, the power of the control chip
  • control chip After the control chip starts to work, it collects AC input voltage information through pin 1, and combines the two-phase peak current information detected by pins 7 and 9 of the chip.
  • the internal circuit operation of the chip generates the reference voltage waveform of the peak value of the first phase transmission current as shown by the solid line ABJCD in the first sine half-wave period.
  • V 0 V J0 * sin ⁇ t &........paper (2)
  • V 2 V J0 * (1-sin ⁇ t) &........paper (3)
  • the control chip After the control chip starts to work, it alternately outputs driving signals to drive the switching devices M1 and M2 in Figure 2.
  • the on-time of these two switching devices is detected by the control chip's 7 and 9 pins respectively.
  • the reference voltages V 0 and V 2 are obtained by comparison.
  • Figure 3 (b) in the power frequency half cycle starting from point A, the rising edge of the first solid small triangle indicates that the current in the primary winding Np1 of the transformer linearly increases after M1 is turned on. Comparator control mentioned above.
  • the current of the secondary winding Ns of the transformer decreases linearly from its peak value, as shown by the falling edge of the first small solid triangle.
  • M2 is turned on.
  • the rising and falling edges of the second dotted large triangle represent the rising current in the primary winding Np2 and the falling current in the secondary winding Ns, respectively.
  • the left side of Figure 4 shows the current waveforms of the transformer primary and secondary windings when M1 and M2 are turned on and off during two adjacent switching cycles.
  • M1 is turned on, and the current Ipri1 of the primary winding Np1 of the transformer rises linearly.
  • the voltage V R11 generated by Rpri1 on R11 is fed back to the positive input of the internal comparator of the chip through the 7th pin of the chip.
  • the negative input of the comparator is connected to the internal reference voltage V 0 or V 1 shown in Figure 3 (a).
  • M2 is turned on, and the current Ipri2 of the primary winding Np2 of the transformer rises linearly.
  • the voltage V R16 generated by Ipri2 on the resistor R16 is fed back to the positive input of the internal comparator of the chip through pin 9 of the chip .
  • the negative input of the comparator is connected to the internal reference voltage V 2 shown in Figure 3 (a).
  • V R16 is greater than V 2
  • the comparator output is high, and M2 is turned off.
  • the solid shaded area shown in the figure is the part that contributes to the output current.
  • the current on the primary winding Np1, that is, the first phase current can only flow in one direction, that is, from the capacitor C1 to the primary winding Np1, to the diode D9 and then to M1. Therefore, when M2 is turned on, even if V C7 > Vin, the energy on C7 will not be transferred back to capacitor C1.
  • M1 When M1 is turned off, M2 is also turned off. After M1 is turned off, the peak current Isen_pk / N of the secondary winding Ns of the transformer no longer coincides with the point S of the peak current Np1 of the primary winding Np, but starts to decrease from U. This is because when M1 is turned on, the energy on the primary winding Np1 of the transformer is transferred to the secondary winding Ns and also to the primary winding Np2 to charge the capacitor C7. At this time, when the current Isen of the secondary winding Ns drops to 0, M1 is turned on again instead of M2.
  • the right side of Figure 4 shows the transformer primary and Current waveform of the secondary winding. From time B, M1 is turned on. Because V C7 ⁇ Vin, the current Ipri1 of the primary winding Np1 of the transformer increases linearly at a faster rate. The rise rate is not only related to the inductance and Vin of the transformer's primary winding, but also the difference between (Vin-V C7 ) Value related. The greater the (Vin-V C7 ) difference, the faster Ipri1 rises.
  • the rapid rise of Ipri1 is caused by the coupling induced current on the second-phase primary winding Np2, that is, the charging current I Np2 of the capacitor C7; the direction of I Np2 and Ipri1 are opposite, that is, I Np2 is negative. Therefore, the voltage V R16 generated by I Np2 across the resistor R16 is a negative voltage. Similarly, the voltage V R11 generated by Ipri1 on the resistor R11 is fed back to the positive input terminal of the internal comparator of the chip through the 7 pin of the chip. Internal negative input of the comparator is connected to the reference voltage shown in FIG.
  • the M1 is turned on when the time ton1, VR11 is greater than V 1, the comparator output high, M1 is turned off, due to the presence of Np2 I, Ipri1 Only a part of it is used to store the transition to the secondary side of the transformer, that is, at point S, the peak value of Ipri1 minus the absolute value of the peak value of I Np2 , that is, Ipri1_ U corresponding to point U is the primary side of the coupling and induction to the secondary winding Peak current of Np1 winding.
  • the height of the SU is equal to the height of the VX
  • the area of the triangle SBU is equal to the area of the triangle XBV.
  • V C7 Vin across the capacitor C7
  • M1 and M2 are alternately turned on and off. The difference is that the peak current of the first phase gradually decreases, and the peak current of the second phase gradually increases. After that, time advances to the next sine half-wave period.
  • the reference voltage waveform changes from V 0 (shown on curve ABJ 0 CD) to V 1 (shown on curve ABJ 1 CD), and the second phase
  • the maximum value of the peak current comparison reference voltage is obtained based on the average value of the first phase reference voltages at time points B and C, that is,
  • the second phase peak current comparison reference voltage can be expressed as:
  • V 2 V BC -V 1 ??wire........ (5)
  • the current transmission is only one phase.
  • the peak curve of the transmission current is ABJCD.
  • the current transmission of the present invention has two phases.
  • the peak curve of the first phase transmission current is ABKCD, but the peak curve of the first phase transmission current directly contributing to the output current is ABLCD; the peak curve of the second phase transmission current is EFGH.
  • the product of the current and time of the dotted-shaded portion surrounded by BKCL is stored in the dotted-shaded area surrounded by AEF and GHD, and is used as the second-phase transmitted current.
  • M1 and M2 are alternately turned on and off.
  • M1 is on and off. Therefore, as shown in FIG. 5 (b), the total output current waveform curve after the two-phase output currents are superimposed is EBCH.
  • FIG. 6 shows a specific circuit of the startup circuit module in FIG. 2.
  • the voltage waveform of Vin is a sine half wave after full-bridge rectification. Initially, the voltages on capacitors C3 and C7 are zero, so once Vin increases, diode D5 is forward biased.
  • pin 2 is in an open circuit state, that is, there is no pull-down current. The divided voltage of the resistor R3 and the resistor R4 makes the transistor Q1 conductive, and charges the capacitor C7.
  • capacitor C7 will charge capacitor C3.
  • the control chip detects that the voltage on capacitor C7 is equal to the peak voltage of Vin through pins 1 and 4, the control chip 2 outputs a pull-down current, so that the base-emitter of transistor Q1 is in a zero-voltage bias state, that is, transistor Q1 is turned off.
  • the charging of capacitor C7 stops; because the capacitance of capacitor C7 (for example, 100uF) is much larger than that of capacitor C3 (for example, 20uF), and it is necessary to ensure that capacitor C3 is charged before the chip's startup operating voltage (for example, 15V), C7 is already charged to Vin's peak voltage.
  • the resistance of the resistor R5 needs to be set relatively large (for example, 300K ⁇ ).
  • the function of the diode D5 is to ensure that the current does not flow backward when the voltage Vin at the input terminal is lower than the voltages on the capacitors C3 and C7.
  • the role of diode D6 is to ensure that the charge on capacitor C7 will not flow to pin 2 of the chip through resistor R4.
  • FIG. 7 shows that the diode D9 in FIG. 6 is removed, and the switching MOSFET M1 is replaced with two MOSFETs M1a and M1b. Because the sources of M1a and M1b are connected together, that is, the anodes of their body diodes are connected together. Therefore, it is equivalent to moving the diode D9 in FIG.

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Abstract

一种用于高功率因数无频闪LED照明的驱动电路,包括启动电路、控制芯片、变压器T1、第一电流开关和第二电流开关;该变压器T1包括原边主绕组Np1、原边绕组Np2、原边绕组Na和副边绕组Ns;原边主绕组Np1和原边绕组Np2同相位,原边绕组Na和副边绕组Ns同相位,原边主绕组Np1和副边绕组Ns反相位;该启动电路和变压器T1均连接到输入端Vin;该启动电路与第一电流开关和第二电流开关均连接到控制芯片;控制芯片通过控制第一电流开关和第二电流开关的导通和关断控制变压器T1副边绕组Ns的输出电流;用于高功率因数LED照明的驱动电源电路输出电流的纹波显著减小,使得LED照明同时具有高功率因数、无频闪和成本低等优点。

Description

一种用于高功率因数无频闪LED照明的驱动电路 技术领域
本发明涉及照明技术领域,特别涉及一种用于高功率因数无频闪LED照明的驱动电路。
背景技术
由于LED照明灯本身的节能特性,高电压AC/DC转换LED照明驱动电源本身的能耗指标(转换效率和功率因数)就成为整个照明系统节能的关键因素。就LED照明而言,功率因数(PF值)是一项重要的性能指标。能源之星(Energy Star)标准提出对于大于5W的LED照明产品,要求功率因数指标,即PF值必须大于0.7。对于10瓦以上的LED照明应用,PF值要大于0.9。把LED照明驱动电源的PF值提高到0.9以上,可采用有源或无源功率因数调节(PFC)控制方法,其中用控制芯片直接实现高PF值的有源调节方法更有效。由于安全要求,LED照明驱动电源通常应用以变压器实现电隔离式拓扑结构。对于30~70瓦以下的照明应用市场,为了降低驱动电源成本,常常用基于变压器原边或副边反馈控制的单级拓扑结构。而基于变压器的单级原边反馈(PSR)拓扑结构由于结构简单、所用元器件少,具有成本低的优点,在输出功率为30~70瓦以下的场合得到广泛应用,特别是在低端照明市场。然而,对于基于变压器的高功率因数单级拓扑结构驱动电源,无论是运用副边反馈还是原边反馈控制方法,在应用中都存在着两倍工频频率的输出电流正弦半波波动,导致LED照明亮度的频闪问题,致使一定比例(约10%)的人们在频闪环境中会出现不良反应,因此在高端照明市场会受到限制。图1(a)给出了半个工频周期即一个正弦半波内,工作于电流临界模式的传统高功率因数单级拓扑结构LED照明驱动电源中变压器原边和副边绕组电流的波形,图1(b)给出了对应图1(a)输入的电源输出LED电流波形。图1(a)中,Ipri是当变压器原边控制开关导通后, 在导通时间ton内原边绕组的上升电流,Isen是当变压器原边控制开关关断后,在关断时间toff内副边绕组的下降电流,N是变压器原边和副边绕组的匝数比。在每一个开关周期内的原边峰值电流Ipri_pk和副边峰值电流Isen_pk的关系是:
Ipri_pk=Isen_pk/N……………………………(1)
由于高功率因数的特点,原边峰值电流Ipri_pk和副边峰值电流Isen_pk/N呈现出图1(a)所示的正弦半波波形,其中,阴影区部分是输出电流。因此,输出电流会呈现出图1(b)所示的正弦波动。
通常,解决该问题的方案有三种,但都需要采用两级拓扑结构:这三种方案分别是:
方案一:原边PFC+PSR,即第一级的功率因数调节,把具有高功率因数的正弦半波输入电压升高到400伏,并用较大的电容对第一级的输出能量进行存储。然后,再利用单级原边反馈拓扑构成第二级。
方案二:原边PSR+副边DC/DC恒流控制。
方案三:原边PSR+副边峰值电流吸收。
无论上述哪种方案,都会增加电源成本和体积,同时转换效率由于两级拓扑结构的应用而下降,特别是方案三。
发明内容
本发明的目的是提供一种用于高功率因数无频闪LED照明的驱动电路。
为此,本发明技术方案如下:
一种用于高功率因数无频闪LED照明的驱动电路,包括启动电路、控制芯片、变压器T1、第一电流开关和第二电流开关;所述变压器T1包括原边主绕组Np1、原边绕组Np2、原边绕组Na和副边绕组Ns;原边主绕组Np1和原边绕组Np2同相位,原边绕组Na和副边绕组Ns同相位,原边主绕组Np1和副边绕组Ns反相位;所述启动电路和变压器T1均连接到输入端Vin;所述启动 电路与第一电流开关和第二电流开关均连接到控制芯片;控制芯片通过控制第一电流开关和第二电流开关的导通和关断控制变压器T1副边绕组Ns的电流输出。
进一步的,所述的驱动电源电路还包括电容C1~C9、电阻R1~R2、电阻R6~R9、电阻R11~R13、电阻R15~R17、二极管D7~D8、二极管D12~D13;
所述的控制芯片的输入电压监测输入端1通过电阻R2接地;电容C2并列在电阻R2的两端;输入端Vin通过电阻R1连接到控制芯片的输入电压监测输入端1;电容C1设置在输入端Vin与地之间;启动电路的高压输入端a连接到输入端Vin;启动电路的反馈输入端d连接到控制芯片的预充电完成反馈输出端2;启动电路的预充电输出端c连接电容C3的一端,C3的另一端接地;启动电路的预充电输出端b同时连接电阻R7和能量存储电容C7,并依次通过电阻R7和电阻R8接地;电阻R7和电阻R8的交叉点连接到控制芯片对电容C7的电压监测输入端4,控制芯片的第一相传输电流监测输入端7通过电阻R9接第一控制开关的电流输出端;控制芯片的第二相传输电流监测输入端9通过电阻R15接第二控制开关的电流输出端;控制芯片的变压器副边电流和输出过压监测输入端8通过电阻R13接地,并通过电阻R12连接到二极管D8的阳极;
原边主绕组Np1的正极接输入端Vin,原边主绕组Np1的负极依次通过二极管D7和电阻R6回到正极形成闭合回路;电容C4并联在电阻R6的两端;二极管D7的正极依次通过第一电流开关和电阻R11接地;第一电流开关的控制端接控制芯片的第一驱动输出端6;二极管D7的负极连接二极管D12的负极,D12的正极依次通过第二电流开关和电阻R16接地;第二电流开关的控制端连接控制芯片的第二驱动输出端5;原边绕组Na的正极接地,负极接电阻R12并通过二极管D8同时接到启动电路的预充电输出端c和控制芯片电源输入端3;原边绕组Np2的正极接到启动电路的预充电输出端b,且同时依次通过电容C7、电阻R16、第二电流开关回到原边绕组Np2的负极形成回路;副边绕组Ns的两端经过二极管D13到电源输出接LED灯。
进一步的,所述的能量存储电容C7是用于存储第二相传输电流所需要的能量。
进一步的,所述的启动电路包括三极管Q1、二极管D5~D6、电阻R3~R5;二极管D5的正极接输入端Vin;二极管D5的负极一方面接到三极管Q1的集电极,另一方面通过电阻R3连接到二极管D6的正极,二极管D6的负极接三极管Q1的基极;三极管Q1集电极依次通过电阻R5与电容C3接地;电阻R4设置在三极管Q1的基极和发射极之间;三极管Q1的发射极连接到原边绕组Np2的正极。
进一步的,所述的第一电流开关包括二极管D9和NMOS管M1;二极管D9的正极接原边主绕组Np1的负极,二极管D9的负极接NMOS管M1的漏极,NMOS管M1的栅极接控制芯片的第一驱动输出端6,NMOS管M1的源极通过电阻R11接地。
进一步的,所述的第一电流开关包括NMOS管M1a和NMOS管M1b;NMOS管M1a的漏极接原边主绕组Np1的负极,NMOS管M1a的栅极接NMOS管M1b的栅极的同时连接到控制芯片的第一驱动输出端6,NMOS管M1a的源极接NMOS管M1b的源极,NMOS管M1b的漏极通过电阻R11接地。
进一步的,所述的第二电流开关包括NMOS管M2;NMOS管M2的漏极同时连接变压器原边绕组Np2的负极和二极管D12的正极,NMOS管M2的栅极接控制芯片的第二驱动输出端5,NMOS管M2的源极通过电阻R16接地。
与现有技术相比,该用于高功率因数无频闪LED照明的驱动电源电路输出电流的纹波显著减小,使得LED照明同时具有高功率因数、无频闪和成本低等优点。
附图说明
图1(a)为传统的单级拓扑结构高功率因数LED照明驱动电源变压器原边和副边线圈绕组电流波形图。
图1(b)为与图1(a)对应的电源输出LED电流波形图。
图2为本发明提供的用于高功率因数无频闪LED照明的驱动电路的第一电路示意图。
图3(a)为图2中控制芯片导通后两相传输电流峰值对应的参考电压波形图。
图3(b)为图2中控制芯片导通后产生的两相电流在不同开关周期的波形示意图。
图4为图3(b)的局部放大示意图。
图5(a)为图2中控制芯片导通后半个工频周期内变压器原边两相传输电流的峰值电流示意图。
图5(b)为图2中控制芯片导通后半个工频周期内变压器副边两相输出电流和叠加后产生的总输出电流波形示意图。
图6为本发明用于高功率因数无频闪LED照明的驱动电路的第二电路示意图。
图7为本发明用于高功率因数无频闪LED照明的驱动电路的第三电路示意图。
具体实施方式
下面结合附图及具体实施例对本发明做进一步的说明,但下述实施例绝非对本发明有任何限制;
图2、图6、以及图7中的引脚说明:
控制芯片:输入电压监测输入端1、预充电完成反馈输出端2、电源输入端3、第一驱动输出端5、第二驱动输出端6、第一相传输电流监测输入端7、变压器副边绕组电流和输出过压监测输入端8、第二相传输电流监测输入端9、接地端10;
启动电路:高压输入端a、预充电输出端b、预充电输出端c、反馈输入端 d;
为了说明的简洁性,在工作原理介绍时直接引用芯片引脚编号;
实施例1:一种用于高功率因数无频闪LED照明的驱动电路,如图2所示,包括启动电路、控制芯片、变压器T1、第一电流开关和第二电流开关;所述变压器T1包括原边主绕组Np1、原边绕组Np2、原边绕组Na和副边绕组Ns;原边主绕组Np1和原边绕组Np2同相位,原边绕组Na和副边绕组Ns同相位,原边主绕组Np1和副边绕组Ns反相位;所述启动电路和变压器T1均连接到输入端Vin;所述启动电路与第一电流开关和第二电流开关均连接到控制芯片;控制芯片通过控制第一电流开关和第二电流开关的导通和关断控制变压器T1副边绕组Ns的电流输出;外接交流电经全桥整流后的电路接入点为输入端Vin,设该点电压为Vin;
所述的驱动电源电路还包括电容C1~C9、电阻R1~R2、电阻R6~R9、电阻R11~R13、电阻R15~R17、二极管D7~D8、二极管D12~D13;
所述的控制芯片的输入电压监测输入端1通过电阻R2接地;电容C2并列在电阻R2的两端;输入端Vin通过电阻R1连接到控制芯片的输入电压监测输入端1;电容C1设置在输入端Vin与地之间;启动电路的高压输入端a连接到输入端Vin;启动电路的反馈输入端d连接到控制芯片的预充电完成反馈输出端2;启动电路的预充电输出端c连接电容C3的一端,C3的另一端接地;启动电路的预充电输出端b同时连接电阻R7和能量存储电容C7,并依次通过电阻R7和电阻R8接地;电阻R7和电阻R8的交叉点连接到控制芯片对电容C7的电压监测输入端4,控制芯片的第一相传输电流监测输入端7通过电阻R9接第一控制开关的电流输出端;控制芯片的第二相传输电流监测输入端9通过电阻R15接第二控制开关的电流输出端;控制芯片的变压器副边电流和输出过压监测输入端8通过电阻R13接地,并通过电阻R12连接到二极管D8的阳极;能量存储电容C7是用于存储第二相传输电流所需要的能量。
原边主绕组Np1的正极接输入端Vin,原边主绕组Np1的负极依次通过二 极管D7和电阻R6回到正极形成闭合回路;电容C4并联在电阻R6的两端;二极管D7的正极依次通过第一电流开关和电阻R11接地;第一电流开关的控制端接控制芯片的第一驱动输出端6;二极管D7的负极连接二极管D12的负极,D12的正极依次通过第二电流开关和电阻R16接地;第二电流开关的控制端连接控制芯片的第二驱动输出端5;原边绕组Na的正极接地,负极接电阻R12并通过二极管D8同时接到启动电路的预充电输出端c和控制芯片电源输入端3;原边绕组Np2的正极接到启动电路的预充电输出端b,且同时依次通过电容C7、电阻R16、第二电流开关回到原边绕组Np2的负极形成回路;副边绕组Ns的两端经过二极管D13到电源输出接LED灯。
实施例2:
与实施例1的不同之处在于,所述的启动电路包括三极管Q1、二极管D5~D6、电阻R3~R5;二极管D5的正极接输入端Vin;二极管D5的负极一方面接到三极管Q1集电极,另一方面通过电阻R3连接到二极管D6的正极,二极管D6的负极接三极管Q1的基极;三极管Q1集电极依次通过电阻R5与电容C3接地;电阻R4设置在三极管Q1的基极和发射极之间;三极管Q1的发射极连接到原边绕组Np2的正极。
实施例3:
与实施例1的不同之处在于,所述的第一电流开关包括二极管D9和NMOS管M1;二极管D9的正极接原边主绕组Np1的负极,二极管D9的负极接NMOS管M1的漏极,NMOS管M1的栅极接控制芯片的第一驱动输出端6,NMOS管M1的源极通过电阻R11接地。
实施例4:
与实施例1的不同之处在于,所述的第一电流开关包括NMOS管M1a和NMOS管M1b;NMOS管M1a的漏极接原边主绕组Np1的负极,NMOS管M1a接NMOS管M1b的栅极的同时连接到控制芯片的第一驱动输出端6,NMOS管M1a的源极接NMOS管M1b的源极,NMOS管M1b的漏极通过电 阻R11接地。
实施例5:
与实施例1的不同之处在于,所述的第二电流开关包括NMOS管M2;NMOS管M2的漏极同时连接变压器原边绕组Np2的负极和二极管D12的正极,NMOS管M2的栅极接控制芯片的第二驱动输出端5,NMOS管M2的源极通过电阻R16接地。
在图2中,变压器T1有4个绕组:绕组Np1和绕组Np2是同相位的并且匝数比是m(m≥1,本发明提交材料以m=1即绕组Np1和绕组Np2具有相同的匝数来进行表述),绕组Ns和绕组Na是同相位的,即Ns/Na和Np1/Np2的相位刚好相反。Np1、Np2和Na三个绕组都是应用在变压器的原边,而只有绕组Ns应用在变压器副边;Np1是主绕组,用于向变压器副边绕组也即电源输出端传送第一相电流I*sinωt,同时向绕组Np2传输第二相电流I*(1-sinωt)所需的电荷并存储于电容C7。绕组Na是用于监测每一开关周期内副边绕组Ns电流下降到0后,控制器开始下一个开关周期,即保证电流处于临界模式。绕组Na同时用于启动后向芯片电源提供供电电压并监测输出过压。
当电源接通交流电源后,电容C1上的电压Vin快速上升,启动电路(Start-up Circuit)模块同时给电容C3和电容C7充电;电容C3连接到芯片的3脚,即控制芯片(Controller)的电源脚。电容C7是用于存储传输第二相电流的电荷,电容C7上的电压经过检测电阻R7和电阻R8分压后反馈到控制芯片的4脚,当控制芯片通过1脚和4脚监测到电容C7上的电压上升到等于输入线电压Vin的峰值电压除以m(Np1和Np2的匝数比,m=1)后,同时检测到电容C3上的电压(即控制芯片的电源)上升到超过欠压锁存(UVLO)所设定的电压(比如15~20V)后,控制芯片开始工作,控制芯片6脚和5脚交替输出驱动信号来驱动开关器件M1和M2;一旦控制芯片开始工作,控制芯片通过2脚给启动电路发送控制信号,启动电路停止工作;控制芯片开始工作后通过1脚采集交流输入电压信息,并结合通过芯片7脚和9脚检测到的两相峰值 电流信息,再经过芯片内部的电路运算,在第一个正弦半波周期内产生如图3(a)实线ABJCD所示的第一相传输电流峰值的参考电压波形
V 0=V J0*sinωt……………………………(2)
其中V J0是J0点(对应于正弦半波输入电压峰值位置)的电压值,是正弦半波输入电压Vin峰值缩小若干倍得到的。再通过计算(V J0-V 0)=V J0*(1-sinωt)得到如图3(a)点线EFGH所示的第二相传输电流峰值参考电压波形
V 2=V J0*(1-sinωt)……………………………(3)
控制芯片启动工作后交替输出驱动信号来驱动图2中的开关器件M1和M2,这两个开关器件的导通时间是通过控制芯片7脚和9脚分别检测变压器原边主绕组Np1和原边绕组Np2上的电流在M1和M2的源极到地之间的检测电阻R11和R16上产生的电压V R11、V R16,再通过芯片内部的比较器把V R11、V R16和上述的电流峰值参考电压V 0和V 2进行比较而得到。如图3(b)所示,从A点开始的工频半周期里,第一个实线小三角形的上升边表示M1导通后变压器原边绕组Np1中的电流线性上升,导通时间由上述提及的比较器控制。M1关断后,变压器副边绕组Ns的电流从其峰值线性下降,如第一个实线小三角形的下降边所示。当副边绕组Ns中的电流下降到0后,M2导通。同样,第二个点线大三角形的上升和下降边分别表示原边绕组Np2中的上升电流和副边绕组Ns中的下降电流。一旦副边绕组Ns中的电流下降到0后,M1和M2再次交替导通。副边绕组Ns中的电流下降到0时刻是通过芯片8脚检测变压器原边绕组Na上的电压,即电阻R12和R13的分压而得到的。从图3(a)示出的比较器参考电压可知,M1和M2交替导通时,变压器原边主绕组Np1和副边绕组Ns的峰值电流即第一相输出电流逐渐增加,变压器原边绕组Np2和副边绕组Ns的峰值电流即第二相输出电流逐渐减小,如图3(b)的左边所示。
为了更清晰地展示上述M1和M2交替导通过程,图4左边给出了相邻两个开关周期内,M1和M2导通和关断时变压器原边和副边绕组的电流波形。从时间点K时刻开始,M1导通,变压器原边绕组Np1的电流Ipri1线性上升,Ipri1在 R11上产生的电压V R11通过芯片7脚反馈到芯片内部比较器的正输入端。比较器的负输入端连接图3(a)所示的内部参考电压V 0或V 1,当M1导通ton1时间后,V R11大于V 0或V 1时,比较器输出高电平,M1关断。之后,变压器副边绕组Ns的电流从其峰值线性下降。由于原边主绕组Np1和副边绕组Ns的匝数比是N,那么,副边绕组Ns的峰值电流Isen_pk就是原边峰值电流Ipri1_pk的N倍。因此,Ipri1_pk=Isen_pk/N。当副边绕组的电流下降到0时,M2导通,变压器原边绕组Np2的电流Ipri2线性上升,Ipri2在电阻R16上产生的电压V R16通过芯片9脚反馈到芯片内部比较器的正输入端。比较器的负输入端连接图3(a)所示的内部参考电压V 2,当M2导通ton2时间后,V R16大于V 2,比较器输出高电平,M2关断。之后,变压器副边绕组Ns的电流从其峰值线性下降。由于原边绕组Np2和副边绕组Ns的匝数比是N,那么,副边绕组Ns的峰值电流Isen_pk就是原边峰值电流Ipri2_pk的N倍。因此,Ipri2_pk=Isen_pk/N。图中所示的实体斜线阴影区图形部分是对输出电流有贡献的部分。
由于变压器原边主绕组Np1和原边绕Np2之间是正激组合,当V C7>Vin/m(m=1)时,如果没有二极管D9,一旦M2导通,变压器原边主绕组Np1上会有电流从原边主绕组Np1的正极流向电容C1,即电容C7上的能量又传送回电容C1。但由于二极管D9的存在,原边绕组Np1上的电流,也即第一相电流只能单向即从电容C1流到原边主绕组Np1、到二极管D9再到M1这一方向流动。因此,当M2导通时,即使V C7>Vin,C7上的能量不会再传送回电容C1。
随着时间的推进,电容C7中存储的能量逐渐通过开关M2控制的原边绕组Np2被传送到变压器副边即输出端。因此电容C7上的电压V C7逐渐下降。同时交流输入电压Vin逐渐上升。当时间推进到B点,即当V C7<Vin/m(m=1),由于变压器原边绕组Np1和Np2之间是正激组合,一旦M1导通,Np1上电流增加的同时,Np2上的电流也会同时上升,但这一电流I Np2的方向是从Np2的正极到C7,再经过电阻R16到M2的源极,通过M2的体二极管到Np2的负极,即I Np2对电容C7充电。因此,I Np2在电阻R16上产生的电压是负值。当控制芯片的9脚检测 到R16上的电压小于0时,芯片的5脚也会输出驱动信号,M2导通,使得I Np2流经M2而不再通过M2的体二极管流动。此时,M2起着同步整流的作用,达到减小功耗、提高效率的目的。在M1关断的同时M2也被关断。M1关断后,变压器副边绕组Ns的峰值电流Isen_pk/N不再和原边主绕组Np1的峰值电流S点重合,而是从U点开始下降。这是因为在M1导通时变压器原边主绕组Np1上的能量传送到副边绕组Ns的同时也传送到原边绕组Np2上,给电容C7充电。此时,当副边绕组Ns的电流Isen下降到0后,M1再次导通,而不是M2导通。由于给电容C7充电需要额外的能量,从时间点B开始,M1导通时原边主绕组Np1的电流峰值比较参考电压需要增加,增加的幅度是根据芯片1脚和4脚检测到的Vin和V C7之间的差值来确定。因此,从输入电压第二个正弦半波开始,第一相峰值电流的参考电压波形示意图如图3(a)的虚线ABJ 1CD所示,和在时间区间AB段不同的是,从时间点B开始直到时间点C,由于电容C7需要充电,第二相电流控制开关M2不再导通,一直处于关断状态,只有第一相电流控制开关M1导通和关断。
为了更清晰地展示在电容C7需要充电(V C7<Vin)的时间段内M1的导通和关断过程,图4右边给出了一个开关周期内M1导通和关断时变压器原边和副边绕组的电流波形。从时间点B时刻开始,M1导通。由于V C7<Vin,变压器原边主绕组Np1的电流Ipri1以较快的速率线性上升,上升速率不仅和变压器的原边绕组的电感量及Vin大小有关,还和(Vin-V C7)的差值有关。(Vin-V C7)的差值越大,Ipri1上升越快。Ipri1的快速上升是因为第二相原边绕组Np2上的耦合感应电流即对电容C7的充电电流I Np2而引起的;I Np2的方向和Ipri1的方向相反,即I Np2为负值。因此,I Np2在电阻R16上产生的电压V R16是负电压。同样,Ipri1在电阻R11上产生的电压V R11通过芯片7脚反馈到芯片内部比较器的正输入端。比较器的负输入端连接图3所示的内部参考电压V 1,当M1导通ton1时间后,VR11大于V 1时,比较器输出高电平,M1关断,由于I Np2的存在,Ipri1中只有一部分用于存储转换到变压器副边,即在S点时刻,Ipri1的峰值减去I Np2峰值的绝对值之 后,即对应于U点的Ipri1_ U才是耦合感应到副边绕组的原边Np1绕组的电流峰值。图4中SU的高度等于VX高度,三角形SBU的面积等于三角形XBV的面积。M1关断之后,变压器副边绕组Ns的电流从其峰值线性下降。此时,副边绕组Ns峰值电流Isen_pk=N*Ipri1_ U。图4中的实体斜线阴影区图形部分才是对输出电流有贡献的部分。
当时间推进到C点时,控制芯片检测到电容C7两端的电压V C7=Vin时,M2才再次开始导通和关断。和在时间区间AB段一样,在时间区间CD段,M1和M2交替导通和关断。不同之处是第一相峰值电流逐渐减小,第二相峰值电流逐渐增加。此后,时间推进到下一个正弦半波周期,由于第一相峰值电流的比较参考电压波形从V 0(曲线ABJ 0CD所示)变成V 1(曲线ABJ 1CD所示),第二相峰值电流比较参考电压的最大值是根据时间点B和C处的第一相参考电压的平均值得到,即
V BC=(V 1(B)+V1 (C))/2……………………………(4)
因此,从输入电压第二个正弦半波周期开始,第二相峰值电流比较参考电压可表示为:
V 2=V BC-V 1……………………………(5)
由于在BC时间段,V BC<V 1,即V 2<0,所以把V 2<0的部分作为V 2=0来处理,即V 2波形的FG段。从以上分析可知,本发明的电流传输过程中由于两相互补电流的叠加,导致输出电流的波动会显著减小。这一效果也可以从图3(b)的变压器原边和副边有效电流峰值看出。总输出电流可以通过累计计算每一个开关周期内副边绕组电流下降部分的三角形面积再除以从A到D的正弦半波周期时间即交流输入工频周期的一半而得到。
为了更直观的表述本发明的原理和效果,下面对本发明作进一步的解释。如图5(a)所示,传统的单级高功率因数LED照明驱动电源中,电流的传输只有一相,在交流输入全桥整流后的正弦半波周期内,传输电流的峰值曲线是ABJCD。而本发明的电流传输有两相,第一相传输电流的峰值曲线是ABKCD, 但直接对输出电流有贡献的第一相传输电流峰值曲线是ABLCD;第二相传输电流的峰值曲线是EFGH。本发明控制方法在进行第一相电流传输时,把BKCL所包围的虚线阴影部分的电流和时间的乘积即电荷存储到AEF和GHD所包围的虚线阴影区,用来作为第二相传输电流的电荷。在AF和GD时间段,M1和M2交替导通和关断。在FG也即BC时间段,只有M1导通和关断。因此,如图5(b)所示,两相输出电流叠加的后的总输出电流波形曲线是EBCH。通过优化图5(a)中K、J两点以及J、L两点之间的电流差值,可达到功率因数大于0.92、总输出电流纹波小于6%(+/-3%)的效果。和图1(b)所示的传统的单级高功率因数驱动电源的输出电流波形曲线ABJCD相比,本发明LED照明驱动电源输出电流的纹波显著减小,使得LED照明驱动电源同时具有高功率因数、无频闪和成本低等优点。
图6给出了图2中启动电路模块的具体电路。如图6所示,当交流输入电压接通后,由于电容C1的容值较小(例如100nF),Vin的电压波形就是全桥整流后的正弦半波。开始时电容C3和电容C7上的电压为零,因此,一旦Vin增加,二极管D5正向偏置。控制芯片启动工作前,2脚处于开路状态,即没有下拉电流。电阻R3和电阻R4的分压使三极管Q1导通,对电容C7充电。同时,电流也会从Vin经过二极管D5和电阻R5流向电容C3,对电容C3充电。一旦控制芯片通过1脚和4脚检测到电容C7上的电压等于Vin的峰值电压,控制芯片2脚输出下拉电流,使得三极管Q1的基极-发射极处于零电压偏置状态,即三极管Q1截止,对电容C7的充电停止;由于电容C7的容值(例如100uF)远大于电容C3的容值(例如20uF),并且需要保证电容C3被充电到芯片的启动工作电压(例如15V)前,电容C7就已经被充电到Vin的峰值电压。因此,电阻R5的阻值需要设置的比较大(例如300KΩ)。二极管D5的作用是保证当输入端电压Vin低于电容C3和电容C7上的电压时电流不会倒流。二极管D6的作用是保证电容C7上的电荷不会经过电阻R4流向芯片的2脚。图7所示是把图6中的二极管D9去掉,把开关MOSFET M1用两个MOSFET M1a和M1b来 替换。由于M1a和M1b的源极连接在一起,也就是它们的体二极管的阳极连接在一起。因此,相当于把图6中的二极管D9移到M1b的位置,同样可以起到阻止当M2导通且V C7>Vin时变压器原边主绕组Np1中电流会倒流的作用。并且优点是当M1a和M1b导通时,M1b的压降会小于二极管D9的正向压降,可以适当减小功耗,提高转换效率。

Claims (7)

  1. 一种用于高功率因数无频闪LED照明的驱动电路,其特征在于,包括启动电路、控制芯片、变压器T1、第一电流开关和第二电流开关;所述变压器T1包括原边主绕组Np1、原边绕组Np2、原边绕组Na和副边绕组Ns;原边主绕组Np1和原边绕组Np2同相位,原边绕组Na和副边绕组Ns同相位,原边主绕组Np1和副边绕组Ns反相位;所述启动电路和变压器T1均连接到输入端Vin;所述启动电路与第一电流开关和第二电流开关均连接到控制芯片;控制芯片通过控制第一电流开关和第二电流开关的导通和关断控制变压器T1副边绕组Ns的电流输出。
  2. 根据权利要求1所述的用于高功率因数无频闪LED照明的驱动电路,其特征在于,所述的驱动电源电路还包括电容C1~C9、电阻R1~R2、电阻R6~R9、电阻R11~R13、电阻R15~R17、二极管D7~D8、二极管D12~D13;
    所述的控制芯片的输入电压监测输入端1通过电阻R2接地;电容C2并列在电阻R2的两端;电压输入端Vin通过电阻R1连接到控制芯片的输入电压监测输入端1;电容C1设置在输入端Vin与地之间;启动电路的高压输入端a连接到输入端Vin;启动电路的反馈输入端d连接到控制芯片的预充电完成反馈输出端2;启动电路的预充电输出端c连接电容C3的一端,C3的另一端接地;启动电路的预充电输出端b同时连接电阻R7和能量存储电容C7,并依次通过电阻R7和电阻R8接地;电阻R7和电阻R8的交叉点连接到控制芯片对电容C7的电压监测输入端4,控制芯片的第一相传输电流监测输入端7通过电阻R9接第一控制开关的电流输出端;控制芯片的第二相传输电流监测输入端9通过电阻R15接第二控制开关的电流输出端;控制芯片的变压器副边电流和输出过压监测输入端8通过电阻R13接地,并通过电阻R12连接到二极管D8的阳极;
    原边主绕组Np1的正极接输入端Vin,原边主绕组Np1的负极依次通过二极管D7和电阻R6回到正极形成闭合回路;电容C4并联在电阻R6的两端; 二极管D7的正极依次通过第一电流开关和电阻R11接地;第一电流开关的控制端接控制芯片的第一驱动输出端6;二极管D7的负极连接二极管D12的负极,D12的正极依次通过第二电流开关和电阻R16接地;第二电流开关的控制端连接控制芯片的第二驱动输出端5;原边绕组Na的正极接地,负极接电阻R12并通过二极管D8同时接到启动电路的预充电输出端c和控制芯片电源输入端3;原边绕组Np2的正极接到启动电路的预充电输出端b,且同时依次通过电容C7、电阻R16、第二电流开关回到原边绕组Np2的负极形成回路;副边绕组Ns的两端经过二极管D13到电源输出接LED灯。
  3. 根据权利要求2所述的能量存储电容C7是用于存储第二相传输电流所需要的能量。
  4. 根据权利要求2所述的用于高功率因数无频闪LED照明的驱动电路,其特征在于,所述的启动电路包括三极管Q1、二极管D5~D6、电阻R3~R5;二极管D5的正极接输入端Vin;二极管D5的负极一方面接到三极管Q1的集电极,另一方面通过电阻R3连接到二极管D6的正极,二极管D6的负极接三极管Q1的基极;三极管Q1集电极依次通过电阻R5与电容C3接地;电阻R4设置在三极管Q1的基极和发射极之间;三极管Q1的发射极连接到原边绕组Np2的正极。
  5. 根据权利要求2所述的用于高功率因数无频闪LED照明的驱动电路,其特征在于,所述的第一电流开关包括二极管D9和NMOS管M1;二极管D9的正极接原边主绕组Np1的负极,二极管D9的负极接NMOS管M1的漏极,NMOS管M1的栅极接控制芯片的第一驱动输出端6,NMOS管M1的源极通过电阻R11接地。
  6. 根据权利要求2所述的用于高功率因数无频闪LED照明的驱动电路,其特征在于,所述的第一电流开关包括NMOS管M1a和MMOS管M1b;NMOS管M1a的漏极接原边主绕组Np1的负极,NMOS管M1a的栅极接NMOS管M1b的栅极的同时连接到控制芯片的第一驱动输出端6,NMOS管M1a的源极 接NMOS管M1b的源极,NMOS管M1b的漏极通过电阻R11接地。
  7. 根据权利要求2所述的用于高功率因数无频闪LED照明的驱动电路,其特征在于,所述的第二电流开关包括NMOS管M2;NMOS管M2的漏极同时连接变压器原边绕组Np2的负极和二极管D12的正极,NMOS管M2的栅极接控制芯片的第二驱动输出端5,NMOS管M2的源极通过电阻R16接地。
PCT/CN2019/100783 2018-09-14 2019-08-15 一种用于高功率因数无频闪led照明的驱动电路 WO2020052404A1 (zh)

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