WO2020043134A1 - 电子装置以及校正该电子装置中比较器的方法 - Google Patents

电子装置以及校正该电子装置中比较器的方法 Download PDF

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WO2020043134A1
WO2020043134A1 PCT/CN2019/103079 CN2019103079W WO2020043134A1 WO 2020043134 A1 WO2020043134 A1 WO 2020043134A1 CN 2019103079 W CN2019103079 W CN 2019103079W WO 2020043134 A1 WO2020043134 A1 WO 2020043134A1
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comparator
electronic device
input terminal
voltage
counter
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PCT/CN2019/103079
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English (en)
French (fr)
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吴杰
奚道明
陈瑞
刘苇
曾晨
张鹏飞
谢庆国
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苏州瑞迈斯医疗科技有限公司
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Publication of WO2020043134A1 publication Critical patent/WO2020043134A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1071Measuring or testing

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  • the present application relates to the field of signal processing, and in particular, to an electronic device and a method for correcting a comparator in the electronic device.
  • a comparator is a circuit that compares the voltage amplitude of an analog signal with the voltage amplitude of a reference signal. It can implement the conversion from an analog signal to a digital signal.
  • the working principle of the comparator is as follows: When the voltage at the P terminal is greater than the voltage at the N terminal, it outputs 1; otherwise, it outputs 0.
  • Comparators can be widely used in many electronic devices, such as X-ray detectors and Digital Positron Emission Tomography (PET) detectors.
  • comparators applied to the aforementioned electronic devices generally have a problem of conversion errors. That is, only when the voltage of the analog signal input at the N terminal and the voltage of the reference signal input at the P terminal differ by a specific voltage value, the output of the comparator will transition from 0 to 1, or from 1 to To 0.
  • the specific voltage value is the conversion error of the comparator.
  • the conversion error may be different for different comparators. Comparator conversion errors may affect the accuracy of measurement results from devices such as X-ray detectors and digital PET detectors.
  • the conversion error is usually calculated by additionally inputting a triangular pulse with a fixed pulse width at the P terminal of the comparator, so that the input amplitude conversion error can be superimposed on the original reference signal input at the N terminal. Signal to eliminate its conversion error.
  • the purpose of the embodiments of the present application is to provide an electronic device and a method for calibrating a comparator in the electronic device, so as to reduce software and hardware overhead and cost.
  • an electronic device and a method for correcting a comparator in the electronic device provided in the embodiments of the present application are implemented as follows:
  • An electronic device includes:
  • An operational amplifier whose non-inverting input terminal is suspended and whose output terminal is connected to a first input terminal of the comparator to provide a white noise signal to the comparator;
  • a controller connected to a second input terminal of the comparator to control a voltage of the second input terminal
  • a counter connected to the controller and the output of the comparator to count the number of hops of the output signal of the comparator
  • a processor connected to the counter to determine a conversion error of the comparator according to the number of transitions recorded by the counter.
  • the electronic device further includes a bias voltage supply terminal connected to an output terminal of the operational amplifier and a first input terminal of the comparator.
  • the electronic device further includes a digital-to-analog converter, which is connected to the second input terminal of the comparator and the controller.
  • the electronic device further includes a memory connected to the processor to store a conversion error of the comparator.
  • the electronic device further includes a detection channel corresponding to the operational amplifier, which is used to detect an optical signal and generate a corresponding electrical signal.
  • the number of the comparators, the operational amplifiers, and the counters corresponds to the number of the detection channels on a one-to-one basis.
  • the controller, the counter and the processor are integrated on a same field programmable array chip.
  • a method for calibrating a comparator in the electronic device includes:
  • Step S1 after the operational amplifier outputs a white noise signal to the first input terminal of the comparator and the controller sets the voltage of the second input terminal of the comparator to a first voltage threshold, the counter records The first number of transitions of the output signal of the comparator within a preset time period;
  • Step S2 after the counter finishes counting within the preset time period, the controller changes the voltage of the second input terminal of the comparator by a preset change amount, and the counter records the preset again The number of second transitions of the output signal of the comparator in the time period;
  • Step S3 repeating the above step S2 until the voltage value of the second input terminal of the comparator reaches the Nth voltage threshold, and the counter records the Nth transition number of the output signal of the comparator in the preset time period ;as well as
  • step S4 the processor compares all the hop counts recorded by the counter, and determines a conversion error of the comparator according to the comparison result to correct the comparator.
  • the step S1 further includes:
  • a bias voltage supply terminal in the electronic device provides a bias voltage signal to a first input terminal of the comparator.
  • the step S2 further includes:
  • the controller resets the counter to return the counter to an initial state.
  • the following relationship is satisfied between the Nth voltage threshold and the first voltage threshold:
  • the Nth voltage threshold is a preset maximum voltage
  • the Nth voltage threshold the first voltage threshold + (N-1) * the preset change amount
  • the Nth voltage threshold is a preset minimum voltage
  • the Nth voltage threshold first voltage threshold- (N-1) * preset change amount
  • N is a positive integer greater than 1.
  • the preset variation is less than or equal to an amplitude of a white noise signal generated by the operational amplifier.
  • the process of determining the conversion error of the comparator according to the comparison result in step S4 includes:
  • the voltage threshold value of the second input terminal of the comparator corresponding to the maximum number of transition times among all the transition times is determined as a conversion error of the comparator.
  • the method further comprises:
  • step S5 a memory in the electronic device stores a conversion error of the comparator.
  • the embodiment of the present application uses the white noise signal generated by the operational amplifier inside the electronic device as the reference signal of the first input terminal of the comparator, and uses the controller to control the second input of the comparator. Voltage at the terminal, the counter is used to record the number of transitions of the comparator output signal, and the processor is used to process the number of transitions, so as to determine the conversion error of the comparator to achieve the correction of the comparator without using an additional signal generator To provide a reference signal, which can achieve the purpose of reducing software and hardware overhead and cost. Moreover, when correcting the conversion error of the comparator, there is no need to manually control the specific schedule, which can reduce labor costs. In addition, when correcting the conversion error of the comparator, the upper computer software is not required to calculate the signal pulse width, which can reduce resource consumption.
  • FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of another electronic device according to an embodiment of the present application.
  • FIG. 3 is a schematic flowchart of a method for calibrating a comparator in an electronic device according to an embodiment of the present application.
  • an embodiment of the present application provides an electronic device, which can be applied to photodetectors such as X-ray detectors and digital PET detectors, but is not limited thereto.
  • the electronic device may include:
  • the operational amplifier 120 has its non-inverting input terminal floating, its inverting input terminal connected to the peripheral circuit, and its output terminal connected to the first input terminal (ie, the P terminal) of the comparator 110 to provide a white noise signal to the comparator 110;
  • the controller 130 is connected to the second input terminal (ie, the N terminal) of the comparator 110 to control the voltage of the second input terminal;
  • a counter 140 connected to the controller 130 and also connected to the output terminal of the comparator 110 to count the number of transitions of the output signal of the comparator 110;
  • the processor 150 is connected to the counter 140 to determine a conversion error of the comparator 110 according to the number of transitions recorded by the counter 140.
  • the comparator 110 may refer to a voltage comparator implemented using a differential IO port (for example, a low voltage differential signal (LVDS) port and a stub series termination logic (SSTL) port) of a field programmable gate array (FPGA) chip. It can also include dedicated voltage comparators (for example, LM339 and LM393, etc.), or other comparators.
  • a differential IO port for example, a low voltage differential signal (LVDS) port and a stub series termination logic (SSTL) port
  • FPGA field programmable gate array
  • the comparator 110 may compare the voltage of the white noise signal provided by the operational amplifier 120 (that is, the voltage of the first input terminal) with the voltage controlled by the controller 130 and output a signal according to the comparison result. When the voltage at the first input terminal is greater than the voltage at the second input terminal, it outputs 1; when the voltage at the first input terminal is less than the voltage at the second input terminal, it outputs 0.
  • the number of transitions may refer to the number of changes in the output signal of the comparator 110 from 0 to 1 or from 1 to 0.
  • the controller 130 may control the voltage of the second input terminal of the comparator 110 according to the received control instruction, so that the voltage of the second input terminal of the comparator 110 is changed according to a preset change amount.
  • the control instruction may be received from the outside in advance or in real time by timing or manual triggering.
  • the controller 130 may also reset the counter 140 to return to the initial state.
  • the counter 140 may be a multi-bit counter, for example, a 4-bit counter or an 8-bit counter. After the comparator 110 outputs a signal, the counter 140 may start counting up from an initial state (for example, 0 or another value) until it reaches its upper limit of counting or is reset by the controller 130; it may also start from an initial state (for example, the count of the counter (Upper limit) until it reaches its lower limit or is reset by the controller 130.
  • an initial state for example, 0 or another value
  • the processor 150 may compare all the transition times recorded by the counter 140 and determine the conversion error of the comparator 110 according to the comparison result.
  • the controller 130, the counter 140, and the processor 150 may be integrated on the same FPGA chip in the device, or may be independently provided in the electronic device.
  • the electronic device may further include a bias voltage supply terminal 125, which may be connected to the output terminal of the operational amplifier 120 and the first input terminal of the comparator 110 to connect the first terminal of the comparator 110 to the first terminal of the comparator 110.
  • An input terminal provides a bias voltage signal, so that the voltage at the first input terminal of the comparator 110 is higher than the voltage at the second input terminal.
  • the amplitude of the bias voltage signal may be higher than the absolute value of the minimum conversion error in the comparator 110.
  • the electronic device may further include a digital-to-analog converter (DAC) 160, which may be connected to the second input terminal of the comparator 110 and the controller 130, which may input the input digital signal Convert to analog signal and send the converted analog signal to the comparator.
  • the controller 130 may control the voltage of the second input terminal of the comparator 110 by controlling the output voltage of the DAC 160.
  • the electronic device may further include a memory 170 that may be connected to the processor 150 to store the conversion error of the comparator 110 determined by the processor 150. Moreover, when the counter 140 does not have a storage function, the memory 170 may also be used to store data recorded by the counter 140.
  • the memory 170 may be an on-chip random access memory (RAM) or other memories.
  • the electronic device may further include a detection channel corresponding to the operational amplifier 120 for detecting an optical signal and generating a corresponding electrical signal.
  • the detection channel can be connected to the non-inverting input of the operational amplifier.
  • the number of comparators 110, operational amplifiers 120, and counters 140 may correspond to the number of detection channels on a one-to-one basis.
  • the electronic device includes multiple detection channels, a schematic structural diagram is shown in FIG. 2.
  • the electronic device provided by the embodiment of the present application generates a white noise signal as a reference signal of a first input terminal of the comparator by using an internal operational amplifier, and controls a second input terminal of the comparator by a controller.
  • Voltage use the counter to record the number of transitions of the output signal of the comparator, and use the processor to process the number of transitions, so as to determine the conversion error of the comparator to achieve the correction of the comparator without using an additional signal generator to Provide a reference signal, which can achieve the purpose of reducing software and hardware overhead and cost.
  • a processor to determine the conversion error of the comparator, there is no need to manually control the specific schedule, which can reduce labor costs.
  • the host computer software is not required to calculate the trend line of the signal pulse width, which can reduce resource consumption.
  • An embodiment of the present application further provides a method for calibrating a comparator in the electronic device. As shown in FIG. 3, the method may include the following steps:
  • Step S1 After the operational amplifier outputs a white noise signal to the first input terminal of the comparator and the controller sets the voltage of the second input terminal of the comparator to the first voltage threshold, the counter records the output signal of the comparator within a preset period of time The number of first transitions.
  • each operational amplifier can send the white noise signal to the first input of its corresponding comparator, and the controller can The control instruction received in advance or in real time sets the voltage of the second input terminal of each comparator to a first voltage threshold. Then, each comparator can compare the amplitude of the white noise signal input at its first input terminal with the first voltage threshold of the second input terminal. When the amplitude of the white noise signal at the first input terminal is greater than the The comparator can output 1 at a voltage threshold, and the comparator can output 0 when the amplitude of the white noise signal at the first input terminal is smaller than the first voltage threshold at the second input terminal.
  • each counter can record the first transition times of the corresponding output signal of the comparator within a preset time period (for example, 0.5ms ⁇ 1ms, etc.) from the initial state. For example, it can be recorded as Num ( m, 1), where m can represent the detection channel number or group number.
  • a preset time period for example, 0.5ms ⁇ 1ms, etc.
  • m can represent the detection channel number or group number.
  • Each group can consist of an operational amplifier, a comparator, and a counter.
  • the bias voltage supply terminal in the electronic device may provide a bias voltage signal to the first input terminal of each comparator to ensure each comparison.
  • the voltage of the first input terminal of the converter is greater than the voltage of its second input terminal.
  • the first voltage threshold may be a preset minimum value of the voltage (i.e., the conversion error of the comparator) that is statistically calculated in advance or determined empirically by using a method in the prior art (for example, a method of calculating the conversion error of the comparator by inputting a triangular wave) Minimum value) or a preset voltage maximum value (ie, the maximum value of the conversion error of the comparator).
  • execution sequence between the operational amplifier outputting the white noise signal to the first input terminal of the comparator and the voltage set at the second input terminal of the comparator by the controller is not limited in this step. Can also be performed simultaneously.
  • Step S2 after the counter finishes counting within a preset time period, the controller changes the voltage of the second input terminal of the comparator by a preset change amount, and the counter records the second jump of the output signal of the comparator within the preset time period again. Variable times.
  • the controller may increase or decrease the voltage of the second input terminal of each comparator by a preset change amount. Then, each comparator can again compare the voltage value between its first input terminal and the second input terminal, and output a corresponding signal according to the comparison result, that is, when the voltage value of the first input terminal is greater than the voltage value of the second input terminal When the voltage value of the first input terminal is smaller than the voltage value of the second input terminal, it outputs 0.
  • each counter can record the second number of transitions corresponding to the output signal of the comparator within a preset period of time, for example, it can be recorded as Num (m, 2). The second number of transitions may be equal to the difference between the current count of the counter and the first number of transitions.
  • the controller may reset each counter to return to the initial state. At this time, the second number of transitions is the current count of the counter.
  • step S3 the above step S2 is repeated until the voltage value of the second input terminal of the comparator reaches the Nth voltage threshold, and the counter records the number of Nth transitions of the output signal of the comparator within a preset time period.
  • step S2 may be repeated until the voltage value of the second input terminal of each comparator reaches the Nth voltage threshold.
  • each counter can record the number of N-th transitions of the output signal of the corresponding comparator within a preset time period, and record it as Num (m, N).
  • the Nth hop count may be equal to the difference between the current count of the counter and the N-1th hop count.
  • the controller can reset each counter to return to the initial state.
  • the Nth hop count is the current count of the counter.
  • the Nth voltage threshold is the maximum preset voltage
  • the Nth voltage threshold the first voltage threshold + (N-1) * the preset change amount
  • the Nth voltage threshold is the minimum value of the preset voltage
  • the Nth voltage threshold the first voltage threshold- (N-1) * the preset change amount
  • the preset variation can be less than or equal to the amplitude of the white noise signal generated by the operational amplifier, and it can be determined according to the following formula:
  • ⁇ V is a preset change amount
  • V max is a preset voltage maximum value
  • V min is a preset voltage minimum value
  • N is a positive integer greater than 1. The specific value can be determined based on experience or theoretical calculation.
  • step S4 the processor compares all the jump times recorded by the counter, and determines a conversion error of the comparator according to the comparison result, so as to correct the comparator.
  • the processor can compare all the hop counts recorded by each counter in turn to determine the highest value jump among all the hop counts recorded by each counter. The number of times of change, thereby determining the voltage threshold of the second input terminal of the comparator corresponding to the number of times of transition as the conversion error of the comparator.
  • the conversion error of the comparator corresponding to the i-th detection channel for:
  • the conversion error of the comparator corresponding to the j-th detection channel is:
  • i and j are positive integers between 1 and m
  • K and L are positive integers between 1 and N.
  • the input reference signal to the first input end of each comparator can be used to superimpose a signal with an input amplitude conversion error, thereby realizing the comparison of the comparator. Correction.
  • the controller can change the voltage of the second input terminal of the comparator by controlling the output voltage of the DAC .
  • the output voltage range of the DAC is between V min and V max .
  • the method may further include:
  • step S5 the memory stores the conversion error of the comparator determined by the processor.
  • the memory can be used to store the conversion errors of each comparator, so that the next time the device works, read the conversion errors and superimpose them on the original reference signal amplitude To achieve the correction of the comparator.
  • the embodiment of the present application uses the operational amplifier inside the electronic device to provide a white noise signal as a reference signal of the first input terminal of the comparator, and uses the controller to control the voltage of the second input terminal of the comparator.
  • Use a counter to record the number of transitions of the output signal of the comparator, and use a processor to compare the number of transitions of the output signal of the comparator, so as to determine the conversion error of the comparator without using additional devices to generate the comparator.
  • the first input of the reference signal which can reduce software and hardware overhead.
  • there is no need to manually control the specific schedule which can reduce labor costs.
  • the upper computer software when correcting the conversion error of the comparator, the upper computer software is not required to calculate the signal pulse width, which can reduce resource consumption.
  • the conversion error of its corresponding comparator can be corrected at the same time, which improves the work efficiency.
  • the devices, units, modules, and devices described in the foregoing embodiments may be specifically implemented by computer chips, semiconductor chips, and / or entities, or by products with certain functions.
  • the functions are divided into various devices and described separately.
  • the functions of each device may be implemented in the same computer chip or semiconductor chip.

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Abstract

一种电子装置以及校正该电子装置中的比较器(110)的方法,该电子装置包括:比较器(110);运算放大器(120),其同相输入端悬空,其输出端与该比较器(110)的第一输入端连接以向该比较器(110)提供白噪声信号;控制器(130),其与该比较器(110)的第二输入端连接以控制该第二输入端的电压;计数器(140),其与该控制器(130)和该比较器(110)的输出端连接以对该比较器(110)的输出信号的跳变次数进行计数;以及处理器(150),其与该计数器(140)连接以根据该计数器(140)所记录的该跳变次数来确定该比较器(110)的转换误差。通过该技术方案,可以利用电子装置内部的运算放大器所提供的白噪声信号来对比较器进行校正,而不需要附加器件来提供信号,因而可以降低软硬件开销和人工成本。

Description

电子装置以及校正该电子装置中比较器的方法 技术领域
本申请涉及信号处理领域,特别涉及一种电子装置以及校正该电子装置中的比较器的方法。
背景技术
本部分的描述仅提供与本申请公开相关的背景信息,而不构成现有技术。
比较器是将模拟信号的电压幅值与基准信号的电压幅值相比较的电路,其可以实现模拟信号到数字信号的转换。比较器的工作原理如下:当P端电压大于N端电压时,其输出1,反之,其输出0。
比较器可以广泛地用于诸多电子装置,例如,X-ray探测器和数字正电子发射断层成像(Positron Emission Tomography,简称PET)探测器等。然而,应用于上述电子装置的比较器通常都存在转换误差的问题。即,只有当在N端输入的模拟信号的电压与在P端输入的基准信号的电压之间相差一特定电压值时,比较器的输出才会从0跳变到1,或者从1跳变到0。该特定电压值即为比较器的转换误差。对于不同的比较器,其转换误差可能都各不相同。比较器的转换误差可能会影响X-ray探测器和数字PET探测器等装置的测量结果的准确性。
在上述电子装置中,通常通过在比较器的P端额外地输入一个脉宽固定的三角波来计算其转换误差,从而可以通过在N端输入原基准信号的基础上叠加输入幅值为转换误差的信号来消除其转换误差。
发明内容
在实现本申请过程中,发明人发现现有技术中至少存在如下问题:
在校正比较器的转换误差时,需要额外使用信号发生器来输入三角波并且需要上位机软件来计算在N端输入的基准信号脉宽和输出信号脉宽的趋势线,这带来了额外的软硬件开销和成本。
本申请实施例的目的是提供一种电子装置以及校正该电子装置中的比较器的方法,以降低软硬件开销和成本。
为实现上述目的,本申请实施例提供的一种电子装置以及校正该电子装置中的比较器的方法是这样实现的:
一种电子装置,所述电子装置包括:
比较器;
运算放大器,其同相输入端悬空,其输出端与所述比较器的第一输入端连接以向所述比较器提供白噪声信号;
控制器,其与所述比较器的第二输入端连接以控制所述第二输入端的电压;
计数器,其与所述控制器和所述比较器的输出端连接以对所述比较器的输出信号的跳变次数进行计数;以及
处理器,其与所述计数器连接以根据所述计数器所记录的所述跳变次数来确定所述比较器的转换误差。
优选地,所述电子装置还包括偏置电压供应端,其与所述运算放大器的输出端和所述比较器的第一输入端连接。
优选地,所述电子装置还包括数字模拟转换器,其与所述比较器的第二输入端和所述控制器连接。
优选地,所述电子装置还包括存储器,其与所述处理器连接以存储所述比较器的转换误差。
优选地,所述电子装置还包括与所述运算放大器对应的探测通道,其用于探测光信号并产生对应的电信号。
优选地,所述比较器、所述运算放大器和所述计数器的个数与所述探测通道的数量一一对应。
优选地,所述控制器、所述计数器和所述处理器集成于同一个现场可编程阵列芯片上。
一种校正上述电子装置中的比较器的方法,所述方法包括:
步骤S1,在所述运算放大器向所述比较器的第一输入端输出白噪声信号并且所述控制器将所述比较器的第二输入端的电压设置为第一电压阈值之后,所述计数器记录预设时间段内所述比较器的输出信号的第一跳变次数;
步骤S2,在所述计数器完成所述预设时间段内的计数之后,所述控制器将所述比较器的第二输入端的电压改变预设变化量,并且所述计数器再次记录所述预设时间段内所述比较器的输出信号的第二跳变次数;
步骤S3,重复上述步骤S2,直到所述比较器的第二输入端的电压值达到第N电压阈值,所述计数器记录所述预设时间段内所述比较器的输出信号的第N跳变次数;以及
步骤S4,所述处理器将所述计数器所记录的所有跳变次数进行对比,并且根据对比结果来确定所述比较器的转换误差,以校正所述比较器。
优选地,所述步骤S1还包括:
在所述计数器记录所述第一跳变次数之前,所述电子装置中的偏置电压供应端向所述比较器的第一输入端提供偏置电压信号。
优选地,所述步骤S2还包括:
在所述计数器记录所述预设时间段内所述比较器的输出信号的第二跳变次数之前,所述控制器重置所述计数器以使所述计数器回到初始状态。
优选地,所述第N电压阈值与所述第一电压阈值之间满足以下关系:
当所述第一电压阈值为预设电压最小值时,所述第N电压阈值为预设电压最大值,并且第N电压阈值=第一电压阈值+(N-1)*预设变化量;
当所述第一电压阈值为预设电压最大值时,所述第N电压阈值为预设电压最小值,并且第N电压阈值=第一电压阈值-(N-1)*预设变化量,
其中,N为大于1的正整数。
优选地,所述预设变化量小于或等于所述运算放大器所产生的白噪声信号的幅值。
优选地,所述步骤S4中根据对比结果来确定所述比较器的转换误差的过程包括:
所有所述跳变次数中数值最大的跳变次数所对应的所述比较器的第二输入端的电压阈值确定为所述比较器的转换误差。
优选地,所述方法还包括:
步骤S5,所述电子装置中的存储器存储所述比较器的转换误差。
由以上本申请实施例提供的技术方案可见,本申请实施例通过利用电子装置内部的运算放大器产生的白噪声信号作为比较器的第一输入端的基准信号,利用控制器控制比较器的第二输入端的电压,利用计数器记录比较器的输出信号的跳变次数,并且利用处理器处理跳变次数,从而确定出比较器的转换误差以实现对比较器的校正,而不需要利用额外的信号发生器来提供基准信号,从而可以实现降低软硬件开销和成本的目的。而且,在校正比较器的转换误差时,不需要人工控制具体进度,这可以降低人工成本。此外,在校正比较器的转换误差时,不需要上位机软件来计算信号脉宽,这可以降低资源消耗。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的一种电子装置的结构示意图;
图2是本申请实施例提供的另一种电子装置的结构示意图;
图3是本申请实施例提供的一种校正电子装置中的比较器的方法的流程示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是用于解释说明本申请的一部分实施例,而不是全部的实施例,并不希望限制本申请的范围或权利要求书。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其它实施例,都应当属于本申请保护的范围。
需要说明的是,当元件被称为“设置在”另一个元件上,它可以直接设置在另一个元件上或者也可以存在居中的元件。当元件被称为“连接/联接”至另一个元件,它可以是直接连接/联接至另一个元件或者可能同时存在居中元件。本文所使用的术语“连接/联接”可以包括电气和/或机械物理连接/联接。本文所使用的术语“包括/包含”指特征、步骤或元件的存在,但并不排除一个或更多个其它特征、步骤或元件的存在或添加。本文所使用的术语“和/或”包括一个或多个相关所列项目的任意的和所有的组合。
除非另有定义,本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中所使用的术语只是为了描述具体实施例的目的,而并不是旨在限制本申请。
另外,在本申请的描述中,术语“第一”、“第二”等仅用于描述目的和区别类似的对象,两者之间并不存在先后顺序,也不能理解为指示或暗示相对重要性。此外,在本申请的描述中,除非另有说明,“多个”的含义是两个或两个以上。
下面结合附图对本申请实施例所提供的电子装置以及校正该电子装置中的比较器的方法进行详细说明。
如图1所示,本申请实施例提供了一种电子装置,其可以应用于X-ray探测器和数字PET探测器等光电探测器,但不限于此。该电子装置可以包括:
比较器110;
运算放大器120,其同相输入端悬空,其反相输入端与外围电路连接,其输出端与比较器110的第一输入端(即,P端)连接,以向比较器110提供白噪声信号;
控制器130,其与比较器110的第二输入端(即,N端)连接,以控制第二输入端的电压;
计数器140,其与控制器130连接,并且还与比较器110的输出端连接,以对比较器110的输出信号的跳变次数进行计数;以及
处理器150,其与计数器140连接以根据计数器140所记录的跳变次数来确定比较器110的转换误差。
比较器110可以是指利用现场可编程门阵列(FPGA)芯片的差分IO端口(例如,低电压差分信号(LVDS)端口和短截线串联端接逻辑(SSTL)端口)实现的电压比较器,也可以包括专用的电压比较器(例如,LM339和LM393等),也还可以是其它比较器。
比较器110可以根据将运算放大器120所提供的白噪声信号的电压(即,第一输入端的电压)与控制器130所控制的电压进行对比,根据对比结果来输出信号。当第一输入端的电压大于第二输入端的电压时,其输出1,当第一输入端的电压小于第二输入端的电压时,其输出0。
跳变次数可以是指比较器110的输出信号从0跳变到1或者从1跳变到0的变化次数。
控制器130可以根据所接收的控制指令来控制比较器110的第二输入端的电压,使其电压按照预设变化量来改变。所述控制指令可以是定时或者人工触发而从外部预先或实时接收的。控制器130还可以重置计数器140,使其回到初始状态。
计数器140可以是多位计数器,例如,4位计数器或8位计数器等。在比较器110输出信号之后,计数器140可以从初始状态(例如,0或其它数值)开始向上计数,直到达到其计数上限或被控制器130重置;也可以从初始状态(例如,计数器的计数上限)向下计数,直到达到其计数下限或被控制器130重置。
处理器150可以将计数器140所记录的所有跳变次数进行对比,并根据对比结果来确定比较器110的转换误差。
控制器130、计数器140和处理器150可以集成于该装置中的同一个FPGA芯片上,也可以独立地设置在该电子装置中。
在本申请的另一实施例中,该电子装置还可以包括偏置电压供应端125,其可以与运算放大器120的输出端和比较器110的第一输入端连接,以向比较器110的第一输入端提供偏置电压信号,使得比较器110的第一输入端的电压高于其第二输入端的电压。该偏置电压信号的幅值可以高于比较器110所存在的最小转换误差的绝对值。
在本申请的另一实施例中,该电子装置还可以包括数字模拟转换器(DAC)160,其可以与比较器110的第二输入端和控制器130连接,其可以将所输入的数字信号转换为模拟信号并将转换后的模拟信号发送给比较器。控制器130可以通过控制DAC 160的输出电压来控制比较器110的第二输入端的电压。
在本申请的另一实施例中,该电子装置还可以包括存储器170,其可以与处理器150连接,以存储处理器150所确定的比较器110的转换误差。而且,当计数器140不具备存储功能时,存储器170还可以用于存储计数器140所记录的数据。存储器170可以是片上随机存储器(RAM),也可以是其它存储器。
在本申请的另一实施例中,该电子装置还可以包括与运算放大器120对应的探测通道,其用于探测光信号并产生对应的电信号。在实际应用中,探测通道可以与运算放大器的同相输入端连接,在校正比较器的转换误差时,只需要断开二者之间的连接,使运算放大器的同相输入端悬空即可。
比较器110、运算放大器120和计数器140的数量可以与探测通道的数量一一对应。针对该装电子置包括多个探测通道的情况,其结构示意图如图2所示。
通过上述描述可以看出,本申请实施例提供的电子装置通过利用其内部的运算放大器来产生白噪声信号以作为比较器的第一输入端的基准信号,利用控制器控制比较器的第二输入端的电压,利用计数器记录比较器的输出信号的跳变次数,并且利用处理器处理跳变次数,从而确定出比较器的转换误差以实现对比较器的校正,而不需要利用额外的信号发生器来提供基准信号,从而可以实现降低软硬件开销和成本的目的。而且,在利用处理器确定比较器的转换误差时,不需要人工控制具体进度,这可以降低人工成本。此外,在校正比较器的过程中,不需要上位机软件来计算信号脉宽的趋势线,这可以降低资源消耗。
本申请实施例还提供了一种校正上述电子装置中的比较器的方法,如图3所示,该方法可以包括以下步骤:
步骤S1,在运算放大器向比较器的第一输入端输出白噪声信号并且控制器将比较器的第二输入端的电压设置为第一电压阈值之后,计数器记录预设时间段内比较器的输出信号的第一跳变次数。
当各个运算放大器的同相输入端被悬空时,其运放基线上会产生白噪声信号,各个运算放大器可以将该白噪声信号发送给与其对应的比较器的第一输入端,并且控制器可以根据预先或实时接收的控制指令将各个比较器的第二输入端的电压设置为第一电压阈值。然后,各个比较器可以将在其第一输入端输入的白噪声信号的幅值与第二输入端的第一电压阈值进行对比,当第一输入端的白噪声信号的幅值大于第二输入端的第一电压阈值时,该比较器可以输出1,而当第一输入端的白噪声信号的幅值小于第二输入端的第一电压阈值时,该比较器可以输出0。在各个比较器输出信号之后,各个计数器可以从初始状态开始记录预设时间段(例如,0.5ms~1ms等)内对应比较器的输出信号的第一跳变次数,例如,可以记为Num(m,1),其中,m可以表示探测通道编号或分组编号。每个分组均可以由一个运算放大器、 一个比较器和一个计数器构成。
在本申请的另一实施例中,在计数器记录第一跳变次数之前,该电子装置中的偏置电压供应端可以向各个比较器的第一输入端提供偏置电压信号,以确保各个比较器的第一输入端的电压大于其第二输入端的电压。
第一电压阈值可以是利用现有技术中的方法(例如,通过输入三角波来计算比较器的转换误差的方法)预先统计的或者根据经验确定的预设电压最小值(即,比较器的转换误差的最小值)或者预设电压最大值(即,比较器的转换误差的最大值)。
需要说明的是,本步骤中并不限定运算放大器向比较器的第一输入端输出白噪声信号与控制器设置比较器的第二输入端的电压之间的执行顺序,二者可以按顺序执行,也可以同时执行。
步骤S2,在计数器完成预设时间段内的计数之后,控制器将比较器的第二输入端的电压改变预设变化量,并且计数器再次记录预设时间段内比较器的输出信号的第二跳变次数。
在各个计数器完成预设时间段内的计数之后,控制器可以将各个比较器的第二输入端的电压增大或减小预设变化量。然后,各个比较器可以再次对其第一输入端与第二输入端之间的电压值进行对比,根据对比结果来输出对应的信号,即当第一输入端的电压值大于第二输入端的电压值时,输出1,而当第一输入端的电压值小于第二输入端的电压值时,输出0。在各个比较器输出信号之后,各个计数器可以再次记录预设时间段内对应比较器的输出信号的第二跳变次数,例如,可以记为Num(m,2)。第二跳变次数可以等于计数器的当前计数与第一跳变次数之差。
在本申请的另一实施例中,在各个计数器开始计数之前,控制器可以重置各个计数器,使其回到初始状态。此时,第二跳变次数即为计数器的当前计数。
步骤S3,重复上述步骤S2,直到比较器的第二输入端的电压值达到第N电压阈值,计数器记录预设时间段内比较器的输出信号的第N跳变次数。
在各个计数器记录对应比较器的输出信号的第二次跳变次数之后,可以重复上述步骤S2,直到各个比较器的第二输入端的电压值达到第N电压阈值。此时,各个计数器可以再次记录预设时间段内对应比较器的输出信号的第N跳变次数,并将其记为Num(m,N)。第N跳变次数可以等于计数器的当前计数与第N-1跳变次数之差。
在本步骤中,在各个计数器开始计数之前,控制器可以重置各个计数器,使其回到初始状态。此时,第N跳变次数即为计数器的当前计数。
其中,第N电压阈值与第一电压阈值之间满足以下关系:
当第一电压阈值为预设电压最小值时,第N电压阈值为预设电压最大值,并且第N电 压阈值=第一电压阈值+(N-1)*预设变化量;
当第一电压阈值为预设电压最大值时,第N电压阈值为预设电压最小值,并且第N电压阈值=第一电压阈值-(N-1)*预设变化量。
预设变化量可以小于或等于运算放大器所产生的白噪声信号的幅值,并且其可以按照以下公式来确定:
Figure PCTCN2019103079-appb-000001
其中,△V为预设变化量,V max为预设电压最大值,V min为预设电压最小值,N为大于1的正整数,其具体数值可以根据经验或理论计算来确定。
步骤S4,处理器将计数器所记录的所有跳变次数进行对比,并且根据对比结果来确定所述比较器的转换误差,以校正所述比较器。
在各个计数器都记录对应比较器的第N跳变次数之后,处理器可以依次将各个计数器所记录的所有跳变次数分别进行对比,确定出各个计数器所记录的所有跳变次数中数值最大的跳变次数,从而将该跳变次数所对应的比较器的第二输入端的电压阈值确定为该比较器的转换误差。
例如,对于第i探测通道和第j探测通道,如果其跳变次数的最大值分别为Num(i,K)和Num(j,L),则第i探测通道所对应的比较器的转换误差为:
V min+(K-1)*△V或者V max-(K-1)*△V;
第j探测通道所对应的比较器的转换误差为:
V min+(L-1)*△V或者V max-(L-1)*△V。
其中,i和j为1到m之间的正整数,K和L为1到N之间的正整数。
在确定出每个比较器的转换误差之后,可以通过在向每个比较器的第一输入端输入原基准信号的基础上再叠加输入幅值为转换误差的信号,从而可以实现对比较器的校正。
需要说明的是,在上述步骤中,针对在控制器与比较器之间设置有数字模拟转换器(DAC)的情形,控制器可以通过控制DAC的输出电压来改变比较器的第二输入端的电压。而且,DAC的输出电压范围在V min与V max之间。
在本申请的另一实施例中,该方法还可以包括:
步骤S5,存储器存储处理器所确定的比较器的转换误差。
在确定出所有比较器的转换误差之后,可以利用存储器来存储每个比较器的转换误差,以便于在装置下次工作时,读取该转换误差并将其叠加在原基准信号的幅值之上,以实现对比较器的校正。
通过上述描述可以看出,本申请实施例通过利用电子装置内部的运算放大器来提供白噪声信号以作为比较器的第一输入端的基准信号,利用控制器来控制比较器的第二输入端的电压,利用计数器来记录比较器的输出信号的跳变次数,以及利用处理器来比较比较器的输出信号的跳变次数,从而确定出比较器的转换误差,而不需要利用额外的器件来产生比较器的第一输入端的基准信号,这可以降低软硬件开销。而且,在校正比较器的转换误差时,不需要人工控制具体进度,这可以降低人工成本。此外,在校正比较器的转换误差时,不需要上位机软件来计算信号脉宽,这可以降低资源消耗。另外,针对该电子装置中的各个探测通道,可以同时校正其对应比较器的转换误差,这提高了工作效率。
上述实施例阐明的装置、单元、模块以及器件等,具体可以由计算机芯片、半导体芯片和/或实体实现,或者由具有某种功能的产品来实现。为了描述的方便,描述以上装置时以功能分为各种器件分别描述。当然,在实施本申请时可以把各器件的功能在同一个或多个计算机芯片或半导体芯片中实现。
虽然本申请提供了如上述实施例或流程图所述的方法操作步骤,但基于常规或者无需创造性的劳动在所述方法中可以包括更多或者更少的操作步骤。在逻辑性上不存在必要因果关系的步骤中,这些步骤的执行顺序不限于本申请实施例提供的执行顺序。
本说明书中的各个实施例均采用递进的方式描述,各个实施例之间相同相似的部分互相参见即可,每个实施例重点说明的都是与其它实施例的不同之处。
上述实施例是为便于该技术领域的普通技术人员能够理解和使用本申请而描述的。熟悉本领域技术的人员显然可以容易地对这些实施例做出各种修改,并把在此说明的一般原理应用到其它实施例中而不必经过创造性的劳动。因此,本申请不限于上述实施例,本领域技术人员根据本申请的揭示,不脱离本申请范畴所做出的改进和修改都应该在本申请的保护范围之内。

Claims (14)

  1. 一种电子装置,其特征在于,所述电子装置包括:
    比较器;
    运算放大器,其同相输入端悬空,其输出端与所述比较器的第一输入端连接以向所述比较器提供白噪声信号;
    控制器,其与所述比较器的第二输入端连接以控制所述第二输入端的电压;
    计数器,其与所述控制器和所述比较器的输出端连接以对所述比较器的输出信号的跳变次数进行计数;以及
    处理器,其与所述计数器连接以根据所述计数器所记录的所述跳变次数来确定所述比较器的转换误差。
  2. 根据权利要求1所述的电子装置,其特征在于,所述电子装置还包括偏置电压供应端,其与所述运算放大器的输出端和所述比较器的第一输入端连接。
  3. 根据权利要求1所述的电子装置,其特征在于,所述电子装置还包括数字模拟转换器,其与所述比较器的第二输入端和所述控制器连接。
  4. 根据权利要求1所述的电子装置,其特征在于,所述电子装置还包括存储器,其与所述处理器连接以存储所述比较器的转换误差。
  5. 根据权利要求1所述的电子装置,其特征在于,所述电子装置还包括与所述运算放大器对应的探测通道,其用于探测光信号并产生对应的电信号。
  6. 根据权利要求5所述的电子装置,其特征在于,所述比较器、所述运算放大器和所述计数器的个数与所述探测通道的数量一一对应。
  7. 根据权利要求1所述的电子装置,其特征在于,所述控制器、所述计数器和所述处理器集成于同一个现场可编程阵列芯片上。
  8. 一种校正权利要求1-7任一项所述的电子装置中的比较器的方法,其特征在于,所述方法包括:
    步骤S1,在所述运算放大器向所述比较器的第一输入端输出白噪声信号并且所述控制器将所述比较器的第二输入端的电压设置为第一电压阈值之后,所述计数器记录预设时间段内所述比较器的输出信号的第一跳变次数;
    步骤S2,在所述计数器完成所述预设时间段内的计数之后,所述控制器将所述比较器的第二输入端的电压改变预设变化量,并且所述计数器再次记录所述预设时间段内所述比较器的输出信号的第二跳变次数;
    步骤S3,重复上述步骤S2,直到所述比较器的第二输入端的电压值达到第N电压阈值,所述计数器记录所述预设时间段内所述比较器的输出信号的第N跳变次数;以及
    步骤S4,所述处理器将所述计数器所记录的所有跳变次数进行对比,并且根据对比结果来确定所述比较器的转换误差,以校正所述比较器。
  9. 根据权利要求8所述的方法,其特征在于,所述步骤S1还包括:
    在所述计数器记录所述第一跳变次数之前,所述电子装置中的偏置电压供应端向所述比较器的第一输入端提供偏置电压信号。
  10. 根据权利要求8所述的方法,其特征在于,所述步骤S2还包括:
    在所述计数器记录所述预设时间段内所述比较器的输出信号的第二跳变次数之前,所述控制器重置所述计数器以使所述计数器回到初始状态。
  11. 根据权利要求8所述的方法,其特征在于,所述第N电压阈值与所述第一电压阈值之间满足以下关系:
    当所述第一电压阈值为预设电压最小值时,所述第N电压阈值为预设电压最大值,并且第N电压阈值=第一电压阈值+(N-1)*预设变化量;
    当所述第一电压阈值为预设电压最大值时,所述第N电压阈值为预设电压最小值,并且第N电压阈值=第一电压阈值-(N-1)*预设变化量,
    其中,N为大于1的正整数。
  12. 根据权利要求8或11所述的方法,其特征在于,所述预设变化量小于或等于所述运算放大器所产生的白噪声信号的幅值。
  13. 根据权利要求8所述的方法,其特征在于,所述步骤S4中根据对比结果来确定所述比较器的转换误差的过程包括:
    所有所述跳变次数中数值最大的跳变次数所对应的所述比较器的第二输入端的电压阈值确定为所述比较器的转换误差。
  14. 根据权利要求8所述的方法,其特征在于,所述方法还包括:
    步骤S5,所述电子装置中的存储器存储所述比较器的转换误差。
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