WO2020042840A1 - 电路板组件及其制造方法和应用 - Google Patents

电路板组件及其制造方法和应用 Download PDF

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Publication number
WO2020042840A1
WO2020042840A1 PCT/CN2019/097758 CN2019097758W WO2020042840A1 WO 2020042840 A1 WO2020042840 A1 WO 2020042840A1 CN 2019097758 W CN2019097758 W CN 2019097758W WO 2020042840 A1 WO2020042840 A1 WO 2020042840A1
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WO
WIPO (PCT)
Prior art keywords
layer
circuit board
conductive layer
circuit
board assembly
Prior art date
Application number
PCT/CN2019/097758
Other languages
English (en)
French (fr)
Inventor
陈飞帆
曾俊杰
戴蓓蓓
王晓锋
Original Assignee
宁波舜宇光电信息有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201821387474.6U external-priority patent/CN210247131U/zh
Priority claimed from CN201810980011.9A external-priority patent/CN110868791A/zh
Application filed by 宁波舜宇光电信息有限公司 filed Critical 宁波舜宇光电信息有限公司
Publication of WO2020042840A1 publication Critical patent/WO2020042840A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present invention relates to the field of circuit boards, and in particular, to a circuit board assembly, a manufacturing method and application thereof.
  • the TOF camera module is gradually applied to small mobile devices such as mobile phones.
  • the TOF camera module includes a light source unit and a receiving unit.
  • the light source unit can emit a large amount of heat when it emits light outward.
  • the working quality and working efficiency of the light source unit will be affected, thereby affecting the entire TOF camera module. Imaging accuracy.
  • the light source unit generally includes a light emitting element and a circuit board, wherein the light emitting element is supported on the circuit board and dissipates heat through the circuit board.
  • Commonly used circuit boards on the market include ordinary soft and hard boards, but their own heat dissipation performance is poor.
  • the soft-hard combined board has poor heat dissipation performance, and for a multilayer circuit board, due to the presence of vias, the reduction in thickness of the entire circuit board is restricted.
  • the smaller the via size the higher the requirements for the entire process, and the higher the cost of the circuit board. That is to say, it is difficult for the general soft-hard board to meet the current requirements for heat dissipation performance of electronic equipment and the requirements for lightening and thinning of electronic equipment.
  • the current ceramic substrates have better heat dissipation performance, but the cost is higher, and the production capacity of related enterprises with the ability to produce related ceramic substrates is currently limited, which cannot meet the large-scale demand of the current mobile phone or other electronic equipment market.
  • An object of the present invention is to provide a circuit board assembly, a manufacturing method and application thereof, wherein the circuit board assembly can provide better heat dissipation performance.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board assembly can provide good heat dissipation performance while having good electrical conductivity.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the manufacturing method of the circuit board can facilitate the manufacture of the miniaturized circuit board assembly.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board manufactured by the manufacturing method has a better manufacturing accuracy.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board with better accuracy can reduce assembly tolerances in subsequent assembly processes.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the manufacturing cost of the circuit board is low.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board assembly is a multi-layer structure, and no structural cooperation is required between layers to reduce assembly tolerances.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the layers of the circuit board assembly do not need structural cooperation and do not need to reserve space for a connector, thereby facilitating the circuit. Miniaturization of board components.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein during the manufacturing process, the circuit board assembly does not need to be assembled and aligned step by step for each layer, which is beneficial to improving production efficiency.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, in which the flexibility of structural design of the circuit board assembly can be improved by the manufacturing method.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board assembly has a better structural strength through the manufacturing method.
  • Another object of the present invention is to provide a circuit board assembly and a manufacturing method and application thereof, wherein the circuit board can be applied to a TOF camera module that is thin and thin.
  • the present invention provides a method for manufacturing a circuit board assembly, which includes the following steps:
  • a heat dissipation portion that can be conducted is formed in a manner that a first conductive layer is formed on the upper side of the first circuit layer, wherein the first conductive layer is formed in a plurality of second forming channels, and the heat dissipation portion is formed in At least one of the second forming channels, wherein a cross section of the first conductive layer portion corresponding to the second forming channel forming the heat dissipation portion is larger than the first conductive layer corresponding to other second forming channels.
  • a partial cross-section, wherein the heat sink has a first surface and a second surface, wherein the first surface is exposed to support an electronic component, and the second surface can be exposed to Loss of heat; and
  • a first insulating portion is integrally formed on the first circuit layer and the first conductive layer, and at least the first conductive layer penetrates the first insulating portion in a height direction.
  • the heat dissipation portion is formed on at least part of the first conductive layer and at least part of the first circuit layer.
  • At least part of the first conductive layer is overlapped on at least part of the first circuit layer.
  • the substrate is removed to expose a lower surface of the first wiring layer.
  • the method further includes the following steps:
  • the first circuit layer is formed on an upper surface of the first bonding layer.
  • the method further includes the following steps:
  • the first circuit layer is formed in the first forming channel.
  • the method further includes the following steps:
  • the first conductive layer is formed between the second forming channels.
  • the method further includes the following steps:
  • the method further includes the following steps:
  • the heat dissipation part is formed in a manner that a second circuit layer is formed on the upper side of the first conductive layer, wherein the heat dissipation part is formed at least part of the second circuit layer and at least part of the first conductive layer, wherein
  • the second circuit layer is formed in a plurality of third molding channels, and at least a part of the heat dissipation portion is formed in at least one of the third molding channels, wherein the third molding channel corresponding to the third molding channel forming the heat dissipation portion is formed.
  • the cross-section of the second circuit layer portion is larger than the cross-section of the second circuit layer portion corresponding to the other third molding channels.
  • the heat dissipation portion is formed on at least part of the second circuit layer, at least part of the first conductive layer, and at least part of the first circuit layer.
  • the first circuit layer, the first conductive layer, and the second circuit layer at least partially overlap each other.
  • the method further includes the following steps:
  • the second circuit layer is formed on an upper surface of the second bonding layer, wherein the second circuit layer is at least partially conductively connected to the first conductive layer.
  • the method further includes the following steps:
  • the heat dissipation portion is formed in a manner that a second conductive layer is formed on the upper side of the second circuit layer, wherein the second conductive layer is formed in a plurality of fourth forming channels, and at least a part of the heat dissipation portion is formed in at least one place.
  • the fourth molding channel wherein a cross section of the second conductive layer portion corresponding to the fourth molding channel forming the heat dissipation portion is larger than a cross section of the second conductive layer portion corresponding to other fourth molding channels. Section;
  • a second insulating portion is integrally formed on the second circuit layer and the second conductive layer, and at least part of the second conductive layer penetrates the second insulating portion in a height direction.
  • At least part of the first circuit layer, at least part of the first conductive layer, at least part of the second circuit layer, and at least part of the second conductive layer overlap each other in a height direction, so The heat dissipation portion is formed on the first circuit layer, the first conductive layer, the second circuit layer, and the second conductive layer portion which overlap each other.
  • the method further includes the following steps:
  • the heat dissipation part is formed in such a manner that at least part of a third circuit layer is formed on an upper surface of the second conductive layer, wherein the heat dissipation part is formed at least part of the second conductive layer and at least part of the third conductive layer.
  • the cross-section of the third circuit layer portion is larger than the cross-section of the third circuit layer portion corresponding to the other fifth forming channels
  • At least part of the first conductive layer, at least part of the second circuit layer, at least part of the second conductive layer, and at least part of the third circuit layer overlap each other in a height direction.
  • the method further includes the following steps:
  • the protective layer is removed after removing the substrate.
  • the present invention provides a circuit board assembly manufactured by a manufacturing method as described above.
  • a line width A and a line pitch B of the circuit board assembly respectively satisfy the following conditions:
  • the present invention provides a TOF camera module, which includes:
  • a flood light wherein the flood light is used to emit a light to a subject
  • a receiving unit wherein the receiving unit is configured to receive a reflected light reflected by the subject, and obtain depth information of the subject based on information about the emitted light and the reflected light, wherein the pan
  • the light lamp includes a light emitting element and a circuit board assembly according to the above-mentioned manufacturing method, wherein the light emitting element is connectably connected to the heat dissipation portion of the circuit board assembly.
  • the present invention provides an electronic device including:
  • the electronic device includes a camera module, a receiving unit, and an assembly, and the camera module, the floodlight, and the camera module are assembled into a whole through the assembly.
  • the camera modules are commonly mounted on the electronic device body.
  • the present invention provides a floodlight including:
  • a light emitting element A light emitting element
  • a circuit board assembly manufactured by a manufacturing method described above.
  • a bracket wherein the bracket forms a light window, the light emitting element is connectably connected to the circuit board assembly, and the bracket is connected to the circuit board assembly.
  • the present invention provides a TOF camera module, which includes:
  • a receiving unit with a flexible circuit board wherein the receiving unit includes a lens assembly, a photosensitive element, a circuit board, and a flexible circuit board, wherein the lens assembly provides an optical path for light to reach the light
  • the photosensitive element performs photoelectric conversion, wherein the photosensitive element is connectably connected to the circuit board, wherein the circuit board is connectably connected to the flexible circuit board, and the flood light is conductively connected. Connected to the flexible circuit board.
  • the present invention provides an electronic device including:
  • a main circuit board wherein the main circuit board is disposed on the electronic device body, wherein the floodlight is mounted on the main circuit board, and the circuit board component of the floodlight is guideable. Connected to the main circuit board.
  • the electronic device includes a camera module, a receiving unit, and an assembly, and the camera module, the floodlight, and the camera module are assembled into a whole through the assembly.
  • the camera modules are commonly mounted on the electronic device body.
  • the present invention provides a floodlight including:
  • a light emitting element A light emitting element
  • a bracket wherein the bracket forms a light window, the light emitting element is connectably connected to the circuit board assembly, and the bracket is connected to the circuit board assembly;
  • a flexible circuit board wherein the flexible circuit board is connectably connected to the circuit board assembly.
  • the present invention provides a TOF camera module, which includes:
  • a receiving unit wherein the receiving unit includes a lens component, a photosensitive component, and a circuit board, wherein the lens component provides an optical path for light to reach the photosensitive element for photoelectric conversion, and the photosensitive element is guided.
  • the ground is connected to the circuit board, wherein the flexible circuit board of the floodlight is connected to the circuit board of the receiving unit.
  • the present invention provides a circuit board assembly including a first circuit layer, a first conductive layer, a first insulating layer, a conductive heat sink, and at least two second A molding position, wherein the first conductive layer is formed on the upper side of the first circuit layer, and the first insulating layer is integrally formed on the first circuit layer and the first conductive layer, wherein the first conductive layer
  • the layer is formed at the second forming position, and at least one of the second forming positions forms at least a part of the heat dissipation part, wherein a cross section of the first conductive layer part corresponding to the second forming position where the heat dissipation part is formed.
  • the cross section is larger than the cross section of the first conductive layer portion corresponding to the other second molding positions, wherein the heat dissipation part has a first surface and a second surface, and the first surface is exposed to the outside for: An electronic component is supported, and the second surface can be exposed to dissipate heat.
  • the heat dissipation portion is formed on the first conductive layer and the first circuit layer.
  • the circuit board assembly further includes a second circuit layer and has at least two third molding positions, wherein the second circuit layer is formed on the upper side of the first conductive layer and is formed on the first conductive layer.
  • the third molding position at least one of the third molding positions forms at least part of the heat dissipation portion, and a cross section of the second circuit layer portion corresponding to the third molding position forming the heat dissipation portion is larger than other A cross section of the second circuit layer portion corresponding to the third molding position.
  • the heat radiation portion is formed on the second circuit layer, the first conductive layer and the first circuit layer portion overlapping in a height direction; or the heat radiation portion is formed on The second wiring layer and the first conductive layer portion overlapping in a height direction.
  • the circuit board assembly further includes a second conductive layer and has at least two fourth molding positions, wherein the second conductive layer is formed on an upper side of the second circuit layer and is formed on the second circuit layer.
  • the fourth molding position at least one of the fourth molding positions forms at least a part of the heat dissipation portion, and a cross section of the second conductive layer portion corresponding to the fourth molding position forming the heat dissipation portion is larger than that of other heat dissipation portions.
  • the heat dissipation portion is formed on the first conductive layer, the second circuit layer, and the second conductive layer portion that overlap in a height direction.
  • the circuit board assembly further includes a third circuit layer and has at least two fifth locations, wherein the third circuit layer is formed on the upper side of the second conductive layer and is formed on the second conductive layer.
  • the fifth molding position at least one of the fifth molding positions forms at least a part of the heat dissipation portion, and a cross section of the third circuit layer portion corresponding to the fifth molding position forming the heat dissipation portion is larger than other cross-sections.
  • the heat dissipating portion is formed at a portion of the first conductive layer, the second wiring layer, the second conductive layer, and the third wiring layer that overlap in a height direction.
  • the circuit board assembly further has at least two first molding positions, wherein the first circuit layer is molded at the first molding position, and at least one of the first molding positions forms at least part of the first molding position.
  • a cross section of the first circuit layer portion corresponding to the first molding position where the heat dissipation portion is formed is larger than a cross section of the first circuit layer portion corresponding to other first molding positions.
  • the circuit board assembly further includes a second solder resist layer, wherein the second solder resist layer covers at least part of the second insulation portion.
  • the circuit board assembly further includes a first solder resist layer, wherein the first solder resist layer covers at least part of the first insulation portion.
  • a line width A and a line pitch B of the circuit board assembly respectively satisfy the following conditions:
  • the present invention provides a TOF camera module, which includes:
  • a flood light wherein the flood light is used to emit a light to a subject
  • a receiving unit wherein the receiving unit is configured to receive a reflected light reflected by the subject, and obtain depth information of the subject based on information about the emitted light and the reflected light, wherein the pan
  • the light lamp includes a light emitting element and a circuit board assembly according to the above, wherein the light emitting element is conductively connected to the heat dissipation portion of the circuit board assembly.
  • the present invention provides an electronic device including:
  • the electronic device includes a camera module, a receiving unit, and an assembly, and the camera module, the floodlight, and the camera module are assembled into a whole through the assembly.
  • the camera modules are commonly mounted on the electronic device body.
  • the present invention provides a floodlight including:
  • a light emitting element A light emitting element
  • a bracket wherein the bracket forms a light window, the light emitting element is supported on a first conductive portion of the circuit board assembly, and the bracket is connected to the circuit board assembly.
  • the present invention provides a TOF camera module, which includes:
  • a receiving unit with a flexible circuit board wherein the receiving unit includes a lens assembly, a photosensitive element, a circuit board, and a flexible circuit board, wherein the lens assembly provides an optical path for light to reach the light
  • the photosensitive element performs photoelectric conversion, wherein the photosensitive element is connectably connected to the circuit board, wherein the circuit board is connectably connected to the flexible circuit board, and the flood light is conductively connected. Connected to the flexible circuit board.
  • the present invention provides an electronic device including:
  • a main circuit board wherein the main circuit board is disposed on the electronic device body, wherein the flood light is mounted on the main circuit board, the circuit board assembly of the flood light
  • the conductive portion is connected to the main wiring board in a conductive manner.
  • the electronic device includes a camera module, a receiving unit, and an assembly, and the camera module, the floodlight, and the camera module are assembled into a whole through the assembly.
  • the camera modules are commonly mounted on the electronic device body.
  • the present invention provides a floodlight including:
  • a light emitting element A light emitting element
  • a bracket wherein the bracket forms a light window, the light emitting element is supported on a first conductive portion of the circuit board assembly, and the bracket is connected to the circuit board assembly;
  • a flexible circuit board wherein the flexible circuit board is connectably connected to the conductive portion of the circuit board assembly.
  • the present invention provides a TOF camera module, which includes:
  • a receiving unit wherein the receiving unit includes a lens component, a photosensitive element, and a circuit board, wherein the lens component provides an optical path for light to reach the photosensitive element for photoelectric conversion, and the photosensitive element is guided.
  • the ground is connected to the circuit board, wherein the flexible circuit board of the floodlight is connected to the circuit board of the receiving unit.
  • FIG. 1 is a schematic cross-sectional view of a circuit board assembly according to a preferred embodiment of the present invention.
  • FIG 3 is a schematic cross-sectional view of a circuit board assembly according to a preferred embodiment of the present invention.
  • FIG. 4 is a TOF camera module with the circuit board assembly according to a preferred embodiment of the present invention.
  • FIG. 5 is a schematic diagram of an electronic device with the TOF camera module according to a preferred embodiment of the present invention.
  • FIG. 6A is a schematic diagram of an application of a flood light according to a preferred embodiment of the present invention.
  • 6B is a schematic diagram of an application of a flood light according to a preferred embodiment of the present invention.
  • FIG. 1 it is a preferred embodiment of a circuit board assembly 1 according to the present invention.
  • a multilayered circuit board assembly 1 is taken as an example.
  • the circuit board assembly 1 may be a single-layer board or a multilayer board.
  • the circuit board assembly 1 has an upper surface, wherein the upper surface of the circuit board assembly 1 can be used to support at least one electronic component.
  • the electronic component can transmit electrical signals through the circuit board assembly 1 or Heat is dissipated through the circuit board assembly 1 to prevent heat from accumulating in the electronic component, which affects the normal operation of the electronic component.
  • the circuit board assembly 1 has a better heat dissipation performance.
  • the circuit board assembly 1 includes at least one circuit layer 10, a conductive layer 20, an insulating portion 30, and a heat radiating portion 40.
  • the insulating portion 30 is integrally formed on the circuit layer 10 and the conductive layer 20.
  • the insulating layer 30 plays an insulating role in the circuit layer 10 and the conductive layer 20 to avoid a short circuit between the circuit layer 10 and the conductive layer 20 during operation.
  • the heat dissipating portion 40 is conductive, and the heat dissipating portion 40 has a first surface and a second surface, wherein the heat at the first surface position can be conducted to the second surface position.
  • An electronic component is placed on the first surface to transfer heat to the second surface when the electronic component is operating, and then the second surface transfers heat to the outside.
  • the heat dissipation portion 40 is formed on the conductive layer 20 or the circuit layer 10 or the circuit layer 10 and the conductive layer 20.
  • the first surface is exposed to support the electronic component, and the second surface is exposed to dissipate heat outward.
  • the circuit layer 10 is connectably connected to the conductive layer 20.
  • the first surface of the heat dissipation portion 40 is an upper surface of the conductive layer 20, and at least part of the conductive layer 20 penetrates the insulating portion 30 in a height direction, that is, That is, an upper surface and a lower surface of the conductive layer 20 are not at least partially covered by the insulating portion 30 so that heat from the outside can be transferred to the upper surface of the conductive layer 20 and then transferred to all
  • the lower surface of the conductive layer 20 is transmitted outside the conductive layer 20. That is, a first surface of the heat dissipation portion 40 is the upper surface of the conductive layer 20, and a second surface of the heat dissipation portion 40 is the lower surface of the circuit layer 10.
  • the first surface of the heat sink 40 is the upper surface of the conductive layer 20, and the second surface of the heat sink 40 is the lower surface of the conductive layer 20, such as the conductive layer.
  • the first surface of the heat dissipation portion 40 may be the upper surface of the circuit layer 10
  • the first surface of the heat dissipation portion 40 may be The two surfaces are the lower surface of the circuit layer 10. For example, when the circuit layer 10 is located on the upper and lower sides of the conductive layer 20, respectively.
  • the first surface of the heat dissipation portion 40 is the upper surface of the conductive layer 20, and the second surface of the heat dissipation portion 40 is the conductive layer 20. One side.
  • the first surface of the heat dissipation portion 40 is the upper surface of the conductive layer 20, and the second surface of the heat dissipation portion 40 is a first surface of the circuit layer. side.
  • the first surface of the heat dissipation portion 40 is the upper surface of the circuit layer 10
  • the second surface of the heat dissipation portion 40 is another circuit layer. The lower surface of 10.
  • the heat dissipation part 40 penetrates the insulation part 30, that is, at least part of the circuit layer 10 and at least part of the conductive layer 20 overlap each other in a height direction, and the heat dissipation part 40 is formed to overlap each other. Portions of the circuit layer 10 and the conductive layer 20.
  • the circuit board assembly 1 includes a first circuit layer 10A, a first conductive layer 20A, and a first insulating portion 30A, wherein the first circuit layer 10A has an upper surface, and the first A conductive layer 20A is formed on the upper surface of the first circuit layer 10A, and the first insulating portion 30A is integrally formed on the first circuit layer 10A and the first conductive layer 20A.
  • the first insulating portion 30A can avoid short circuits between the first wiring layer 10A portions in the width direction or short circuit between the first conductive layer 20A portions in the width direction.
  • the first insulating portion 30A is integrally formed on the first circuit layer 10A and the first conductive layer 20A, which is beneficial to the structural strength between the three.
  • the first insulating portion 30A is connected to the first circuit layer 10A and the first conductive layer 20A at the same time, and a part of the first insulating portion 30A may be integrally formed on the first portion.
  • the first insulating portion 30A may be integrally formed on the first circuit layer 10A and the first conductive layer 20A at one time.
  • the first circuit layer 10A is used for transmitting electrical signals
  • the first conductive layer 20A is capable of conducting electricity and can perform heat dissipation
  • the first insulating portion 30A can isolate electrical signals.
  • the conductive portions of the first wiring layers 10A at different positions in the width direction are separated by the first insulating portion 30A, and the conductive portions of the first conductive layers 20A at different positions in the width direction are separated by The first insulating portion 30A is divided.
  • the first circuit layer 10A and the first conductive layer 20A are located at different heights. At least part of the first circuit layer 10A is connectable to the first conductive layer 20A, and, more specifically, at least part of the upper surface of the first circuit layer 10A is attached in the height direction. There is the first conductive layer 20A. In other words, at least the first circuit layer 10A is overlapped with the first conductive layer 20A, and the overlapping portions may be electrically connected to each other.
  • At least part of the upper surface of the first conductive layer 20A is exposed to the outside, that is, at least part of the upper surface of the conductive layer 20 is not covered by the first insulating portion 30A.
  • the circuit board assembly 1 further includes the heat dissipating portion 40, wherein the heat dissipating portion 40 is formed on the first conductive layer 20A and the first circuit layer 10A overlapping each other, and the heat dissipating portion 40 has a first A surface and a second surface, the first surface of the heat sink 40 is the upper surface of the first conductive layer 20A, and the second surface of the heat sink 40 is the first circuit layer 10A at least part of the lower surface. Both the upper surface and the lower surface of the heat sink 40 are exposed.
  • the first conductive layer 20A When the electronic component is mounted on the upper surface of the heat sink 40, that is, the first conductive layer 20A On the upper surface, heat generated from the operation of the electronic component is transferred to the first conductive layer 20A of the heat sink 40, and then transferred to the first conductive layer 20A that is conducted through the first conductive layer 20A. The portion of the first circuit layer 10A is then transmitted to the outside through the lower surface of the first circuit layer 10A, thereby avoiding heat accumulation at the position of the first conductive layer 20A directly contacting the electronic component, and avoiding Most of the heat is dissipated on the upper surface of the first conductive layer 20A, which further increases the temperature of the environment in which the electronic component is located.
  • the electronic component can be directly attached to the heat dissipation portion 40 and directly dissipated through the heat dissipation portion 40, that is, the electronic component is attached to the upper surface of the heat dissipation portion 40, and the heat generated The first surface of the heat radiating portion 40 is transmitted to the second surface of the heat radiating portion 40 and then transmitted to the external environment.
  • the circuit board assembly 1 has at least two first molding positions, wherein the first circuit layer 10A is molded at the first molding position. At least one of the first molding positions forms at least a part of the heat dissipation portion 40. A cross section of the first circuit layer 10A portion corresponding to the first molding position where the heat dissipation portion 40 is formed is larger than a cross section of the first circuit layer 10A portion corresponding to the other first molding positions. That is, the first circuit layer 10A provides a plurality of conducting positions on the surface, and the conducting capability of one of the conducting positions is stronger than the conducting capability of the other conducting positions.
  • the circuit board assembly 1 has at least two second molding positions, wherein the first conductive layer 20A is molded at the second molding position. At least a part of the heat dissipation portion 40 is formed in at least one of the second molding positions.
  • a cross section of the first conductive layer 20A portion corresponding to the second molding position where the heat dissipation portion 40 is formed is larger than a cross section of the first conductive layer 20A portion corresponding to the other second molding positions. That is, the first conductive layer 20A provides a plurality of conducting positions on its surface, and the conducting capability of one of the conducting positions is stronger than the conducting capability of the other conducting positions.
  • the cross-sections of the first conductive layer 20A portion and the second conductive layer 20B portion corresponding to the first molding position and the second molding position forming the heat dissipation portion 40 are larger than those forming the other A cross section of the first conductive layer 20A portion and the second conductive layer 20B portion corresponding to the first molding position and the second molding position of the heat dissipation portion 40. That is to say, the conducting ability of the heat dissipation portion 40 is stronger than the first conductive layer 20A portion and the second conductive layer 20B portion corresponding to the other first molding positions and the second molding positions.
  • the circuit board assembly 1 has at least two first positions, wherein the first positions are used for molding the first insulating portion 30A. Part of the first position is located on the first circuit layer 10A, and part of the first position is located on the first conductive layer 20A, that is, the first circuit layer 10A and the first conductive layer 20A are respectively A space is provided for filling the first insulating portion 30A.
  • the first position penetrates the first circuit layer 10A and the first conductive layer 20A in a height direction, that is, the first position can be filled with a fluid material at the top, and the first position is not completely filled at the bottom.
  • the first circuit layer 10A is covered.
  • the first insulating portion 30A fills at least part of the first position.
  • the circuit board assembly 1 may further include a second circuit layer 10B, wherein the second circuit layer 10B is formed on the upper surface of the first conductive layer 20A and the first insulating portion 30A.
  • the upper surface Preferably, the upper and lower surfaces of the first conductive layer 20A are both a plane, and the upper surface of the first insulating portion 30A is a plane.
  • At least part of the second circuit layer 10B overlaps the first conductive layer 20A, that is, at least part of the second circuit layer 10B is connectably connected to the first conductive layer 20A. Further, the first circuit layer 10A and the corresponding second circuit layer 10B are made conductive through the corresponding first conductive layer 20A, respectively.
  • the heat dissipation portion 40 further includes at least part of the second circuit layer 10B, wherein the heat dissipation portion 40 is formed on at least a portion of the second circuit layer 10B that overlaps in a height direction, the first conductive layer 20A and at least a portion of the First line layer 10A.
  • the heat generated by the electronic component during operation is firstly
  • the first surface of the heat dissipating portion 40 that is, at least a part of the upper surface of the second circuit layer 10B, is then transmitted to the lower surface through the lower surface of the second circuit layer 10B.
  • the upper surface of the first conductive layer 20A is then transferred to the upper surface of the first wiring layer 10A through the lower surface of the first conductive layer 20A and then through the first wiring layer 10A
  • the lower surface is passed to the outside world.
  • the heat dissipation portion 40 may be formed on the second circuit layer 10B, and the first surface of the heat dissipation portion 40 is the second circuit layer 10B.
  • the upper surface and the second surface of the heat sink 40 are a side surface of the second circuit layer 10B.
  • the heat dissipation portion 40 may be formed on the second circuit layer 10B and the first conductive layer 10A, and the first surface of the heat dissipation portion 40 is the second circuit.
  • the upper surface of the layer 10B, and the second surface of the heat dissipation portion 40 are a side surface of the first conductive layer 20A.
  • the heat dissipation part 40 is formed on the second circuit layer 10B, the first conductive layer 20A and the first circuit layer 10A portion overlapping each other in a height direction, so that heat is directly directed in the height direction. Outer conduction.
  • the circuit board assembly 1 further includes a second conductive layer 20B and a second insulating portion 30B, wherein the second conductive layer 20B is formed on at least a part of the upper surface of the second circuit layer 10B.
  • the second insulating portion 30B is integrally formed on the second conductive layer 20B and the second circuit layer 10B.
  • the second insulating portion 30B is integrally formed on the second conductive layer 20B and the second circuit layer 10B, which is beneficial to the structural strength between the three. It is worth mentioning that the second insulating portion 30B has a lower surface, at least part of the lower surface of which is integrally formed on at least part of the upper surface of the first insulating portion 30A, so as to facilitate the The structural strength is beneficial to the structural strength of the entire circuit board assembly 1.
  • Part of the second insulating portion 30B separates the second circuit layer 10B in the width direction, so as to avoid that the second circuit layer 10B portions on the same plane are electrically connected to each other, thereby causing a short circuit.
  • the circuit of the second circuit layer 10B may be a line of a certain shape, such as an S shape, and the second insulating portion 30B is filled with the second circuit layer 10B. Space between them to prevent contaminants from entering the second circuit layer 10B or deformation of the second circuit layer 10B during use or manufacturing so that the circuits of the second circuit layer 10B are connected to each other , Which may cause a short circuit.
  • Part of the second insulating portion 30B separates the second conductive layer 20B in the width direction to prevent the second conductive layers 20B on the same plane from being electrically connected to each other, thereby causing a short circuit.
  • the line of the second conductive layer 20B may be a line of a certain shape, such as a U shape, and the second insulating portion 30B is filled with the second conductive layer 20B.
  • the space between the two conductive layers prevents the contaminants from entering the second conductive layer 20B or the second conductive layer 20B is deformed during use or manufacturing so that the lines of the second conductive layer 20B are connected to each other. , Which may cause a short circuit.
  • the circuit board assembly 1 has at least two third molding positions, wherein the second circuit layer 10B is molded at the third molding position. At least one of the third molding positions forms at least a part of the heat dissipation portion 40.
  • a cross section of the second circuit layer 10B portion corresponding to the third molding position where the heat dissipation portion 40 is formed is larger than a cross section of the second circuit layer 10B portion corresponding to the other third molding positions. That is, the second circuit layer 10B provides a plurality of conducting positions on the surface, and the conducting capability of one of the conducting positions is stronger than the conducting capability of the other conducting positions.
  • the circuit board assembly 1 has at least two fourth molding positions, wherein the second conductive layer 20A is molded at the fourth molding position. At least one of the fourth molding positions is formed with at least a part of the heat dissipation portion 40.
  • a cross section of the second conductive layer 20B portion corresponding to the fourth molding position where the heat dissipation portion 40 is formed is larger than a cross section of the second conductive layer 20B portion corresponding to the other fourth molding positions. That is, the second conductive layer 20B provides a plurality of conducting positions on its surface, and the conducting capability of one of the conducting positions is stronger than the conducting capability of the other conducting positions.
  • the cross-sections of the second circuit layer 10B portion and the second conductive layer 20B portion corresponding to the third molding position and the fourth molding position forming the heat dissipation portion 40 are larger than those forming the other A cross section of the second circuit layer 10B portion and the second conductive layer 20B portion corresponding to the third molding position and the fourth molding position of the heat dissipation portion 40. That is, the conducting ability of the heat sink 40 is stronger than the second circuit layer 10B portion and the second conductive layer 20B portion corresponding to the other first molding positions and the second molding positions.
  • the heat dissipation portion 40 is formed on the first circuit layer 10A, the first conductive layer 20A, the second circuit layer 10B, and the second conductive layer 20B in a height direction overlapping portion. Further, each of the first molding position, the second molding position, the third molding position, and the fourth molding position corresponding to the heat dissipation portion 40 has a larger cross-sectional area than the other first molding positions. Position, the second molding position, the third molding position, and the cross-sectional area of the fourth molding position.
  • the circuit board assembly 1 has at least two second positions, wherein the second positions are used for molding the first insulating portion 30A and the second insulating portion 30B.
  • Part of the second position is located in the first circuit layer 10A
  • part of the second position is located in the first conductive layer 20A
  • part of the second position is located in the second circuit layer 10B, that is, all
  • the first circuit layer 10A, the first conductive layer 20A, and the second circuit layer 10B respectively provide spaces in the height direction for filling the first insulating portion 30A and the second insulating portion 30B.
  • the second positions are separated by at least part of the first circuit layer 10A, at least part of the first conductive layer 20A, and at least part of the second circuit layer 10B, wherein each of the second positions penetrates in a height direction.
  • the first circuit layer 10A, the first conductive layer 20A, and the second circuit layer 10B, that is, the first position is not completely covered by the second circuit layer 10B above, so that fluid can be injected. Material, the first position is not completely covered by the first circuit layer 10A below.
  • the second insulating portion 30B and the ground insulating portion 30 fill at least part of the second position.
  • the first position coincides with at least a portion of the second position.
  • the heat sink 40 further includes the second conductive layer 20B, wherein the second conductive layer 20B is overlapped on at least part of the second circuit layer 10B.
  • the heat dissipating portion 40 is formed on the second conductive layer 20B, at least part of the second circuit layer 10B, the first conductive layer 20A, and at least part of the first circuit layer 10A.
  • the upper surface of the heat dissipation portion 40 is the upper surface of the second conductive layer 20B, and the lower surface of the heat dissipation portion 40 is at least part of the lower surface of the first circuit layer 10A.
  • the heat generated by the electronic component during operation is first transferred to the upper surface of the second conductive layer 20B, and then passes through the upper surface
  • the lower surface of the second conductive layer 20B is transferred to the upper surface of the second wiring layer 10B, and then is transferred to the first conductive layer 20A through the lower surface of the second wiring layer 10B.
  • the upper surface is then passed through the lower surface of the first conductive layer 20A to the upper surface of the first circuit layer 10A, and then passes through the upper surface of the first circuit layer 10A It is thermally conducted to the lower surface of the first circuit layer 10A, and is then dissipated to the outside.
  • the circuit board assembly 1 has at least two third positions, wherein the third positions are used for molding the first insulating portion 30A and the second insulating portion 30B.
  • Part of the third position is located in the first circuit layer 10A
  • part of the third position is located in the first conductive layer 20A
  • part of the third position is located in the second circuit layer 10B
  • part of the third The position is located on the second conductive layer 20B, that is, the first circuit layer 10A, the first conductive layer 20A, the second circuit layer 10B, and the second conductive layer 20B are provided in the height direction, respectively.
  • the space is filled with a fluid material.
  • the second and third positions are separated by at least part of the first circuit layer 10A, at least part of the first conductive layer 20A, at least part of the second circuit layer 10B, and at least part of the second conductive layer 20B, wherein each A third position penetrates the first circuit layer 10A, the first conductive layer 20A, the second circuit layer 10B, and the second conductive layer 20B in a height direction, that is, the third position is at The upper part is not completely covered by the second conductive layer 20B, so that fluid material can be injected, and the first molding position is not completely covered by the first circuit layer 10A below.
  • An insulating material may fill at least part of the third position.
  • the second position coincides with at least a portion of the third position.
  • the circuit board assembly 1 may further include a third circuit layer 10C, wherein the third circuit layer 10C is formed on the upper surface of the second conductive layer 20B and the second insulating portion 30B.
  • the upper surface Preferably, the upper and lower surfaces of the second conductive layer 20B are both a plane, and the upper surface of the second insulating portion 30B is a plane.
  • At least part of the third circuit layer 10C overlaps the second conductive layer 20B, that is, at least part of the third circuit layer 10C is connectably connected to the second conductive layer 20B.
  • the circuit board assembly 1 has at least two fourth positions, wherein the fourth position provides a molding position, part of the fourth position is located on the first circuit layer 10A, and part of the fourth position is located on the first circuit layer 10A.
  • the conductive layer 20A, part of the fourth position is located in the second circuit layer 10B, part of the fourth position is located in the second conductive layer 20B, and part of the fourth position is located in the third circuit layer 10C. That is, the first circuit layer 10A, the first conductive layer 20A, the second circuit layer 10B, the second conductive layer 20B, and the third circuit layer 10C respectively provide space for the height direction. Fill with a fluid material.
  • the second position is separated by at least part of the first circuit layer 10A, at least part of the first conductive layer 20A, at least part of the second circuit layer 10B, and at least part of the second conductive layer 20B, each of which A fourth position penetrates the first circuit layer 10A, the first conductive layer 20A, the second circuit layer 10B, the second conductive layer 20B, and the third circuit layer 10C in the height direction, that is, That is, the fourth position is not completely covered by the third circuit layer 10C above, so that fluid material can be injected, and the fourth position is not completely covered by the third circuit layer 10C below.
  • An insulating material may fill at least part of the fourth position.
  • the second position coincides with at least a portion of the third position.
  • the heat dissipation part 40 further includes at least part of the third circuit layer 10C, wherein the heat dissipation part 40 is formed on at least part of the third circuit layer 10C overlapping in the height direction, at least part of the second conductive layer 20B, and at least part of The second circuit layer 10B is at least part of the first conductive layer 20A and at least part of the first circuit layer 10A.
  • the heat generated by the electronic component during operation firstly
  • the first surface of the heat dissipating portion 40 being transferred that is, at least part of the upper surface of the third circuit layer 10C, is then transferred to the third surface through the lower surface of the third circuit layer 10C.
  • the upper surface of the second conductive layer 20B is then transferred to the upper surface of the second circuit layer 10B through the lower surface of the second conductive layer 20B, and then passes through the second circuit layer
  • the lower surface of 10B is transferred to the upper surface of the first conductive layer 20A, and then is transferred to the upper of the first wiring layer 10A through the upper surface of the first conductive layer 20A.
  • the surface is then transmitted to the outside through the lower surface of the first wiring layer 10A.
  • the circuit board assembly 1 has at least two fifth positions, wherein the third circuit layer 10C is formed at the fifth position. At least one of the fifth molding positions is formed with at least a part of the heat dissipation portion 40. A cross section of the third circuit layer 10C portion corresponding to the fifth molding position where the heat dissipation portion 40 is formed is larger than a cross section of the third circuit layer 10C portion corresponding to the other fifth molding positions. That is, the third circuit layer 10C provides a plurality of conducting positions on the surface, and the conducting capability of one of the conducting positions is stronger than the conducting capability of the other conducting positions.
  • the cross-sectional areas of the first molding position, the second molding position, the third molding position, the fourth molding position, and the fifth molding position corresponding to the heat dissipation part 40 are larger than Other cross-sectional areas of the first molding position, the second molding position, the third molding position, the fourth molding position, and the fifth molding position.
  • the electronic component has a front surface and a back surface, wherein the back surface of the electronic component is communicably connected to the upper surface of the heat sink 40, and the front surface of the electronic component may be connected to other Conductive parts.
  • the heat dissipating portion 40 can be designed to have a larger area size to facilitate heat dissipation, and also facilitate electric conduction.
  • the electronic component may be a light-emitting component.
  • the first surface of the heat sink 40 is the upper surface of the third circuit layer 10C, and the second surface of the heat sink 40 is the first circuit layer
  • FIG. 2A to FIG. 2Q it is a preferred embodiment of a manufacturing method of the circuit board assembly 1 according to the present invention.
  • the circuit board assembly 1 manufactured by the manufacturing method not only has good heat dissipation performance and electrical conductivity, but also is suitable for manufacturing the circuit board assembly 1 with miniaturization. That is, the circuit board assembly 1 is suitable for manufacturing the circuit board assembly 1 having a smaller size.
  • circuit board assembly 1 manufactured by the manufacturing method has a better manufacturing accuracy, which is beneficial to the performance of the circuit board assembly 1 itself on the one hand, and to reduce assembly tolerances in subsequent assembly on the other. .
  • circuit board assembly 1 is a multilayer structure, no structural cooperation is required between the layers to reduce assembly tolerances, and there is no need to reserve a space for the connectors between the layers, thereby It is beneficial to miniaturization of the circuit board assembly 1.
  • circuit board assembly 1 has a multi-layer structure
  • step-by-step assembly and alignment need not be performed for each layer, so as to improve production efficiency and yield of the entire product.
  • the method for manufacturing the circuit board assembly 1 includes the following steps:
  • a first insulating portion 30A is integrally formed on the first circuit layer 10A and the first conductive layer 20A, and the first conductive layer 20A penetrates the first insulating portion 30A in a height direction.
  • part of the first insulating portion 30A may be integrally formed on part of the first circuit layer 10A, and then part of the first insulating portion 30A may be integrally formed on part of the first insulating portion 30A and The first conductive layer 20A.
  • the first insulating portion 30A may be integrally formed on the first circuit layer 10A and the first conductive layer 20A in a single process, or may be integrally formed on the first circuit layer 10A and the first circuit layer in a single process.
  • First conductive layer 20A may be integrally formed on part of the first circuit layer 10A, and then part of the first insulating portion 30A may be integrally formed on part of the first insulating portion 30A and The first conductive layer 20A.
  • a step (d) is further included:
  • the substrate 110 is removed until a portion of the first circuit layer 10A overlapping the first conductive layer 20A is exposed to obtain a circuit board assembly 1.
  • At least part of the conductive part of the circuit board assembly 1 in the height direction can directly transfer heat from an electronic component attached to an upper surface of the circuit board assembly 1 to the circuit board by thermal conduction. The lower surface of component 1 is then lost to the outside world.
  • step (a) further includes the following steps:
  • the first circuit layer 10A is formed on an upper surface of the first bonding layer 130.
  • the substrate 110 may be a copper substrate 110, wherein the copper substrate 110 provides a reference surface during the entire manufacturing process.
  • the upper surface of the substrate 110 is a plane.
  • the isolation layer 120 can isolate the substrate 110 and the first bonding layer 130 to prevent subsequent operations from affecting the substrate 110, so that the substrate 110 can always provide a reference surface during the manufacturing process.
  • the isolation layer 120 may be a nickel metal layer.
  • the first bonding layer 130 mainly functions as a seed layer, and may be copper or titanium copper. The first bonding layer 130 can ensure that the first circuit layer 10A is formed in the subsequent steps. It can be understood that the materials of the substrate 110, the isolation layer 120, and the first bonding layer 130 are not limited to the materials described above.
  • the isolation layer 120 covers at least part of the upper surface of the substrate 110, and the first bonding layer 130 covers at least part of the upper surface of the isolation layer 120.
  • the first bonding layer 130 is formed on the first wiring layer 10A by means of lamination, exposure, development, and plating.
  • the method further includes the following steps:
  • the first circuit layer 10A is formed in the first molding channel 100.
  • the first dry film 140 may be implemented as a photoresist, and then a part of the photoresist is exposed through the first mask, and then the exposed first part is removed by development.
  • a dry film 140 is used to form the first molding channel 100 between the unexposed portions of the first dry film 140, and then the first circuit layer 10A is formed in the first molding channel 100 by a plating process.
  • the material of the first circuit layer 10A is copper. It can be understood that the above-mentioned manner of forming the first circuit layer 10A does not limit the present invention.
  • the first circuit layer 10A may be formed in a manner such as electroless plating, thermal spraying, surfacing, chemical vapor deposition, and the like.
  • the first forming channel 100 corresponds to the first forming position.
  • first circuit layer 10A can be flexibly designed, and then the structure and shape of the first circuit layer 10A can be controlled by controlling the exposed area of the first dry film 140. Because the exposed first dry film 140 provides a molding space for the first circuit layer 10A. Those skilled in the art can understand that the first dry film 140 and the first circuit layer 10A are not limited to the above materials.
  • a method for forming the first conductive layer 20A may be: firstly, unexposed one of the first circuit layer 10A on an upper surface of the first dry film 140 A second dry film 240 is disposed on the upper surface and an upper surface of the first circuit layer 10A, and at least a part of the second dry film 240 is exposed through a second mask, and then the second exposed film is removed.
  • the dry film 240 is used to form a second forming channel 200 between the unexposed second dry films 240, and then the first conductive layer 20A is formed in the second forming channel 200.
  • the first conductive layer 20A overlaps at least part of the first circuit layer 10A so that the first conductive layer 20A and at least part of the first circuit layer 10A can be electrically connected to each other.
  • the shape and structure of the first conductive layer 20A are limited by the second molding channel 200, that is, the second molding can be controlled by controlling the exposure area of the second dry film 240 during the exposure process. Channel 200.
  • the first conductive layer 20A may be formed on the second molding channel 200 by electroplating or sputtering.
  • the material of the first conductive layer 20A may be a copper metal material and other metal materials having conductive properties and high thermal conductivity, and may also be other materials having conductive and heat dissipation functions.
  • the manufacturing materials and manufacturing methods of the first conductive layer 20A are not limited to the above manufacturing materials and manufacturing methods.
  • the second dry film 240 may be implemented as a photoresist, and then a part of the photoresist is exposed through the second mask, and then the exposed second dry film 240 is removed by development.
  • the second forming channel 200 is formed between the unexposed portions of the second dry film 240, and then the first conductive layer 20A is formed in the second forming channel 200 by an electroplating process.
  • the first circuit layer 10A may be formed in a manner such as electroless plating, thermal spraying, surfacing, chemical vapor deposition, and the like.
  • the method further includes the following steps:
  • a first conductive layer 20A is formed between the second forming channels 200 and overlaps at least a part of the first circuit layer 10A.
  • the upper surface of the first dry film 140 and the upper surface of the first circuit layer 10A are located on the same plane.
  • the upper surface of the first circuit layer 10A and the upper surface of the first dry film 140 may not be on the same plane, for example, the upper surface of the first dry film 140
  • the surface is the upper surface of the first wiring layer 10A.
  • the height of the first conductive layer 20A may be controlled according to requirements.
  • the second forming channel 200 corresponds to the second forming position.
  • a step may be further included: removing the remaining dry film, and then removing the first conductive layer 20A and the first circuit layer. 10A integrally molds the first insulating portion 30A.
  • step (c) further includes the following steps:
  • the insulating portion 30 is integrally formed on the first circuit layer 10A and the first conductive layer 20A, and the insulating portion 30 covers the upper portion of the first circuit layer 10A and the first conductive layer 20A. Surface;
  • step (c) further includes the following steps:
  • the insulating portion 30 is integrally formed on the first circuit layer 10A and the first conductive layer 20A, wherein an upper surface of the insulating portion 30 and the upper surface of the first circuit layer 10A are located on the same plane. .
  • the insulating portion 30 may be integrally formed by a molding process or an injection molding process.
  • the insulating portion 30 can support the first circuit layer 10A and the first conductive layer 20A, and avoid the first circuit layer 10A and the first circuit layer being squeezed during use.
  • the conductive layer 20A is deformed.
  • the insulating portion 30 can protect the first circuit layer 10A and the first conductive layer 20A, and prevent some pollutants from entering the first circuit layer 10A.
  • the gap or the gap of the first conductive layer 20A affects the normal operation of the first circuit layer 10A and the first conductive layer 20A. It can be understood that the bonding strength of the first conductive layer 20A and the first circuit layer 10A is guaranteed to a certain degree by the integral molding process of the insulating portion 30.
  • circuit board assembly 1 having a multilayer circuit
  • more circuits can be formed in the current circuit board assembly 1, and at the same time, heat dissipation of the entire circuit board assembly 1 can be ensured.
  • a second bonding layer 230 is formed on at least part of the upper surface of the first conductive layer 20A and at least part of the upper surface of the first insulating portion 30A.
  • the second bonding layer 230 may be a sub-copper to facilitate subsequent processes.
  • the upper surface of the first conductive layer 20A and the upper surface of the first insulating portion 30A are located on the same plane, and the second bonding layer 230 is tiled on the first conductive layer 20A. At least part of the upper surface and at least part of the upper surface of the first insulating portion 30A.
  • a second circuit layer 10B is formed on an upper surface of the second bonding layer 230.
  • At least a part of the second circuit layer 10B is overlapped with the first conductive layer 20A, and an overlapped part of the second circuit
  • the layer 10B is conductively connected to the first conductive layer 20A, and the heat from the second circuit layer 10B can be dissipated to the outside through the first conductive layer 20A and the first circuit layer 10A in this order.
  • the second circuit layer 10B may be formed on the second bonding layer 230 by means of lamination, exposure, development, and plating.
  • the first circuit layer 10A and the second circuit layer 10B may be formed in the same manner or differently.
  • the step of forming the second circuit layer 10B may be:
  • the second circuit layer 10B is formed in the third molding channel 300.
  • the third dry film 340 may be implemented as a photoresist, and then a part of the photoresist is exposed through the third mask, and then the exposed first part is removed by development.
  • the three dry films 340 are used to form the third molding channel 300 between the unexposed portions of the third dry film 340, and then the second circuit layer 10B is formed in the third molding channel 300 by an electroplating process.
  • the material of the second circuit layer 10B is copper. It can be understood that the manner of forming the second circuit layer 10B described above does not limit the present invention.
  • the second circuit layer 10B may be formed in a manner such as electroless plating, thermal spraying, surfacing, chemical vapor deposition, and the like.
  • the third forming channel 300 corresponds to the third forming position.
  • the second circuit layer 10B can be flexibly designed, and then the structure and shape of the second circuit layer 10B can be controlled by controlling the exposed area of the third dry film 340.
  • the exposed third dry film 340 provides a molding space for the second circuit layer 10B.
  • the third dry film 340 and the second circuit layer 10B are not limited to the above materials.
  • the first manufacturing method further includes a step, wherein the step is located after the step (c).
  • the second circuit layer 10B is formed on an upper surface of the second bonding layer 230, and at least a part of the second circuit layer 10B is conductively overlapped with the first conductive layer 20A.
  • the method further includes the following steps:
  • a second insulating portion 30B is integrally formed on the second conductive layer 20B and the second circuit layer 10B.
  • the second conductive layer 20B penetrates the second insulating portion 30B in a height direction.
  • the fact that the second conductive layer 20B penetrates the second insulating portion 30B in the height direction means that at least part of an upper surface of the second conductive layer 20B is exposed.
  • heat generated during the operation of the electronic component can be transferred from the upper surface of the second conductive layer 20B to the lower portion of the second conductive layer 20B. Surface, and then in the process of reaching the upper surface of the second circuit layer 10B. That is, the second insulating portion 30B does not hinder this process.
  • the method further includes the following steps:
  • the method further includes the following steps:
  • the second insulating layer 30B is integrally formed on the second circuit layer 10B and the second conductive layer 20B.
  • An upper surface of the second insulating portion 30B and the upper surface of the second conductive layer 20B are integrally formed. The surfaces are on the same plane.
  • the method of forming the second conductive layer 20B may be the same as the method of forming the first conductive layer 20A, or may be different from the method of forming the first conductive layer 20A.
  • the manufacturing method further includes the following steps:
  • a fourth dry film 440 is provided on the upper surface of the third exposed dry film 340 and the upper surface of the second circuit layer 10B.
  • a second conductive layer 20B is formed between the fourth molding channels 400 and overlaps at least part of the second circuit layer 10B.
  • the process of forming the second conductive layer 20B may be: firstly, disposing the fourth dry film 440 on the upper surface of the third dry film 340 and the upper surface of the second circuit layer 10B which are not exposed, Expose at least part of the fourth dry film 440 through a fourth mask, and then remove the exposed fourth dry film 440 to form a fourth molding between the unexposed fourth dry film 440 Channel 400, and then forming the second conductive layer 20B in the fourth molding channel 400.
  • the second conductive layer 20B overlaps at least part of the second circuit layer 10B so that the second conductive layer 20B and at least part of the second circuit layer 10B can be electrically connected to each other.
  • the fourth forming channel 400 corresponds to the fourth forming position.
  • the shape and structure of the second conductive layer 20B are limited by the fourth molding channel 400, that is, the fourth molding can be controlled by controlling the exposure area of the fourth dry film 440 during the exposure process. Channel 400.
  • the second conductive layer 20B may be formed in the fourth molding channel 400 by plating or sputtering.
  • the material of the two conductive layers 20 may be a copper metal material.
  • the manufacturing materials and manufacturing methods of the second conductive layer 20B are not limited to the above manufacturing materials and manufacturing methods.
  • the fourth dry film 440 may be implemented as a photoresist, and then a partial area of the photoresist is exposed through the fourth mask, and then the exposed fourth dry film 440 is removed by development.
  • the fourth molding channel 400 is formed between the unexposed portions of the fourth dry film 440, and then the second conductive layer 20B is formed in the fourth molding channel 400 by a plating process.
  • the second conductive layer 20B may be formed in a manner such as electroless plating, thermal spraying, surfacing, chemical vapor deposition, and the like.
  • the upper surface of the third dry film 340 and the upper surface of the second circuit layer 10B are located on the same plane.
  • the upper surface of the second circuit layer 10B and the upper surface of the third dry film 340 may not be on the same plane, for example, the upper surface of the third dry film 340
  • the surface is equal to the upper surface of the second wiring layer 10B.
  • the height of the second conductive layer 20B can be controlled according to requirements.
  • the second conductive layer 20B After forming the second conductive layer 20B, it may further include a step of removing the remaining dry film, and then forming the second insulating portion 30B on the second conductive layer 20B and the second circuit layer 10B.
  • the dry film includes a remaining third dry film 340 and a remaining fourth dry film 440.
  • the exposed second bonding layer 230 is removed before the second conductive layer 20B and the second circuit layer 10B are integrally formed with the second insulating portion 30B, so that the The lower surface of the second insulating portion 30B is connected to the upper surface of the first insulating portion 30A. That is to say, the second insulating portion 30B may not only be integrally formed with the second circuit layer 10B and the second conductive layer 20B, but also integrally formed with the second bonding layer 230 exposed after being removed. At least a part of the upper surface of the first insulating portion 30A to facilitate the bonding strength between the layers of the circuit board assembly 1.
  • the method further includes the following steps:
  • a third bonding layer 330 is provided on the upper surface of the second conductive layer 20B and the upper surface of the second insulating portion 30B;
  • a third circuit layer 10C is formed on at least a portion of the upper surface of the third bonding layer 330.
  • the third bonding layer 330 may be a copper layer, which functions as a sub-layer. At least part of the third circuit layer 10C overlaps the second conductive layer 20B. Specifically, when an electronic component is placed on at least a portion of an upper surface of the third circuit layer 10C, the heat generated by the electronic component can reach the corresponding third through the third circuit layer 10C. The bonding layer 330 then reaches the second conductive layer 20B. It can be understood that, in some examples of the present invention, the third circuit layer 10C is independent of the first circuit layer 10A and the second circuit layer 10B. That is, the shape and design of the third circuit layer 10C are not limited to the shape and design of the first circuit layer 10A or the second circuit layer 10B.
  • the method further includes the following steps:
  • the third circuit layer 10C is formed in the fifth molding channel 500.
  • the fifth dry film 540 can be implemented as a photoresist, and then a partial area of the photoresist is exposed through the fifth mask. And then developing and removing the exposed fifth dry film 540 to form the fifth forming channel 500 between the unexposed portions of the fifth dry film 540, and then in the fifth forming channel 500 by an electroplating process
  • the third circuit layer 10C is formed.
  • the material of the third circuit layer 10C is copper. It can be understood that the manner of forming the third circuit layer 10C described above does not limit the present invention.
  • the third circuit layer 10C may be formed in a manner such as electroless plating, thermal spraying, surfacing, chemical vapor deposition, and the like.
  • the fifth forming channel 500 corresponds to the fifth forming position.
  • the third circuit layer 10C can be flexibly designed, and then the structure and shape of the third circuit layer 10C can be controlled by controlling the exposed area of the third dry film 340. Because the fifth dry film 540 that is exposed provides a molding space for the third circuit layer 10C. Those skilled in the art can understand that the fifth dry film 540 and the third circuit layer 10C are not limited to the above materials.
  • the above method includes the following steps:
  • the first bonding layer 130 and the second bonding layer 230 are removed, respectively.
  • the method for removing the substrate 110 may be etching the substrate 110 in an alkaline solution, and the method for removing the isolation layer 120 may also be etching.
  • a method of forming a protective layer 550 on the upper surface of the third circuit layer 10C may be to first provide the protective layer 550 on the upper surface of the third circuit layer 10C and the upper surface of the third bonding layer 330.
  • the first bonding layer 130 may be further removed, and then the protective layer 550 is removed, and then the third bonding layer 330 is removed.
  • the protective layer 550 may be removed, and then the exposed first bonding layer 130 and the third bonding layer 330 may be removed.
  • the isolation layer 120 may be removed, the third bonding layer 330 may be removed, the protection layer 550 may be removed, and then the first bonding layer 130 may be removed.
  • the electronic component may be placed on the upper surface of the third circuit layer 10C of the circuit board assembly 1.
  • heat can be conducted from the third circuit layer 10C to
  • the second conductive layer 20B that is overlapped on at least part of the third circuit layer 10C is then conducted to the second circuit layer 10B that is overlapped on the second conductive layer 20B and then is conducted to the overlapped
  • the first conductive layer 20A on the second circuit layer 10B is then conducted to the first circuit layer 10A overlapped with the first conductive layer 20A, and finally passes through the first circuit layer 10A.
  • the lower surface conducts outwards. That is, the heat generated by the electronic component can be conducted from the upper surface of the heat dissipation portion 40 to the lower surface of the heat dissipation portion 40, and then transferred to the outside.
  • the heat dissipation part 40 forms the third circuit layer 10C, the second conductive layer 20B, the second circuit layer 10B, the first conductive layer 20A, and the first circuit layer 10A overlapping each other.
  • the upper surface of the heat dissipation portion 40 is the upper surface of the third circuit layer 10C, and the lower surface of the heat dissipation portion 40 is the lower surface of the first circuit layer 10A.
  • the manner of removing the substrate 110 and the isolation layer 120 is not limited to the above steps.
  • the protective layer 550 may not be formed on the upper surface of the third circuit layer 10C, the substrate 110 may be directly removed, and then the substrate 110 may be removed.
  • the isolation layer 120, and then the exposed first bonding layer 130 and the third bonding layer 330 are removed respectively.
  • the protective layer 550 may not be formed on the upper surface of the third circuit layer 10C, and the substrate 110 may be directly removed, and then removed.
  • the first bonding layer 130 is then removed from the isolation layer 120 and then the third bonding layer 330 is removed.
  • the protective layer 550 may not be formed on the upper surface of the third circuit layer 10C, the substrate 110 may be directly removed, and then the substrate 110 may be removed.
  • the isolation layer 120 is then removed from the third bonding layer 330 and then the first bonding layer 130 is removed.
  • the manufacturing method may further include the following steps:
  • a lower solder resist layer 60B is formed on part of the lower surface of the first wiring layer 10A and the lower surface of the first insulating portion 30A.
  • the manufacturing method may further include the following steps:
  • the lower surface of the exposed first circuit layer 10A is subjected to the next surface treatment.
  • the circuit board assembly 1 may include one circuit layer 10 or two circuit layers. 10.
  • the first circuit layer 10A and the second circuit layer 10B may also include three or more of the circuit layers 10, such as the first circuit layer 10A and the second circuit layer 10B.
  • the line width A of the circuit board assembly 1 manufactured by the manufacturing method may reach 30 ⁇ m-150 ⁇ m, and the line pitch B may reach 30 ⁇ m-150 ⁇ m.
  • the circuit board assembly 1 manufactured in this way can guarantee a certain processing accuracy in the process of forming each layer, such as the first circuit layer 10A and the first conductive layer 20A.
  • the lamination alignment accuracy between the layers is low, and in the present invention, the way of forming a molding channel between the first conductive layers 20A located in different layers is directly developed through exposure and development.
  • the first conductive layer 20A may be formed on at least a part of the first circuit layer 10A in an overlapping manner according to the first circuit layer 10A and the first conductive layer 20A that are designed in advance. No alignment is required during assembly and assembly.
  • connection of the layers in the circuit board assembly 1 does not need to be assisted by other connectors.
  • vias need to be formed to facilitate communication between the layers. There is no need to reserve space for via holes in the circuit board assembly 1 to facilitate the reduction in size of the entire circuit board assembly 1.
  • step-by-step assembly is not required between the layers of the circuit board assembly 1, thereby reducing assembly tolerances between the circuit board assemblies 1.
  • the position through the forming channel To control the shape of the conductive part of each layer, its manufacturing accuracy is also high, which is also beneficial to reducing the assembly tolerance of the entire circuit board assembly 1.
  • circuit board assembly 1 can be designed into different structures and layouts according to needs and sizes, and the circuit board assembly 1 can also be cut into individual small circuit board assemblies 1 to meet different needs, or That is, by such a manufacturing method, a plurality of the circuit board assemblies 1 can be formed at a time.
  • a method for manufacturing a circuit board assembly includes the following steps:
  • first molding spaces Forming at least two first molding spaces by overlapping the first circuit layer 10A on the upper surface of the substrate 110 and overlapping the first conductive layer 20A on one upper surface of the first circuit layer 10A, Wherein each of the first molding spaces penetrates the first circuit layer 10A and the first conductive layer 20A in a height direction;
  • circuit board assembly 1 can also be applied to a structured light camera module.
  • each of the circuit layers 10 is overlapped with the conductive layer 20, the insulation layers 30 communicate with each other, and the first circuit layer 10A Both the second circuit layer 10B and the third circuit layer 10C are overlapped with the first conductive layer 20A or the second conductive layer 20B.
  • the first circuit layer 10A, the second circuit layer 10B, and the third circuit layer 10C may be flexibly designed, and the three may be independent of each other. At least part of the first circuit layer 10A overlaps the first circuit layer 10A.
  • the first circuit layer 10A, the second circuit layer 10B, and the third circuit layer 10C of the circuit board assembly 1 manufactured by the above-mentioned manufacturing method can be flexibly according to user needs Ground design.
  • the first circuit layer 10A, the second circuit layer 10B, and the third circuit layer 10C may be formed by a photolithography process, and the first and second structures of different structures may be obtained by controlling the position of the mask and the area of the light.
  • the first conductive layer 20A the first The two conductive layers 20B can conduct the first circuit layer 10A and the second circuit layer 10B, and the second circuit layer 10B and the third circuit layer 10C, and do not need to be used in a conventional PCB circuit board. Taking into account the structure of the circuit boards of each layer to reserve the conduction space.
  • circuit board assembly 1 electrical conduction is performed through the first circuit layer 10A or another circuit layer or a conductive layer that is exposed outside the circuit board assembly 1.
  • the conduction positions may be based on the flexible design of the circuit layer and the conductive layer so as to also It is designed to be very flexible.
  • the first conductive layer 20A and the second conductive layer 20B are formed by an electroplating process. Compared with the etching process, the electroplating process is performed by an addition method. The manufacturing method reduces the loss of raw materials and thus saves costs.
  • FIG. 4 it is a preferred embodiment of a TOF camera module 1000 according to the present invention.
  • the TOF camera module 1000 includes a flood light 110 and a receiving unit 120.
  • the flood light 110 is used to generate a light to a subject, and the light is reflected by the subject.
  • the receiving unit 120 receives reflected light, and obtains depth information of the photographed object according to information of the emitted light and the reflected light.
  • the receiving unit 120 includes a lens assembly 121 and a photosensitive circuit 122.
  • the lens assembly 121 is configured to receive light.
  • the photosensitive circuit 122 receives light and converts a light signal into an electrical signal based on a photoelectric conversion principle.
  • the receiving unit 120 includes a lens assembly 121 and a photosensitive circuit 122.
  • the photosensitive circuit 122 includes a photosensitive element 1221 and a circuit board 1222.
  • the lens assembly 121 provides an optical path for light to reach the photosensitive element 1221. Photoelectric conversion is performed, and the photosensitive element 1221 is connectably connected to the circuit board 1222.
  • the lens assembly 121 of the receiving unit 120 further includes an optical lens 1211 and a base 1212.
  • the optical lens 1211 is held on a photosensitive path of the photosensitive element 1221 by the base 1212. It can be understood that the base 1212 is connected to the circuit board 1222. In this example, the base 1212 is integrally formed with the circuit board 1222.
  • the electronic component is implemented as a light emitting element 2
  • the flood light 110 includes the light emitting element 2 and the circuit board assembly 1, wherein the light emitting element 2 is supported by the circuit
  • the board assembly 1 is also communicably connected to the circuit board assembly 1.
  • the circuit board assembly 1 provides a light passing path, and the light emitting element 2 can be excited after being energized to emit light outward through the light passing path.
  • the light emitting element 2 has a front surface and a back surface, wherein the front surface of the light emitting element 2 is connected to other communicable areas of the circuit board assembly 1 through a wire, and the back surface of the light emitting element 2 is
  • the heat sink is directly supported by the circuit board assembly 1 and is connectably connected to the circuit board assembly 1.
  • the floodlight 110 further includes a bracket 3 and an optical auxiliary element 4, wherein the bracket 3 supports the optical auxiliary element 4 on the circuit board and the optical auxiliary element 4 is held on the light emitting element 2.
  • the optical auxiliary element 4 is used to change or improve the light emitted from the light emitting element 2, for example, to change the light emitted from the light emitting element 2 by means of refraction, diffraction, and filtering.
  • the optical auxiliary element 4 may be a refractive lens or a diffractive lens. Those skilled in the art can understand that the above examples do not limit the type of the optical auxiliary element 4.
  • the bracket 3 has a light window 31, and the light-emitting element 2 cooperates with the bracket 3 and the light-emitting element 2 to form the light window 31, so that light passes out through the light window 31.
  • the flood light 110 further includes at least one electronic component 6, wherein the electronic component 6 is connectably connected to the circuit board assembly 1 and the light emitting element 2. It is worth mentioning that, in this example, at least part of the electronic component 6 is disposed on the circuit board 1222 of the receiving unit 120 to facilitate reducing the size of the floodlight 110.
  • the light-emitting element 2 may be implemented as a vertical cavity surface emitter (VCSEL). After being energized, the vertical cavity surface emitter can be excited to emit a laser.
  • VCSEL vertical cavity surface emitter
  • the vertical cavity surface emitter needs to be maintained within a specific temperature range to be able to work normally, that is, the heat dissipation performance of the circuit board is very important for the working state of the vertical cavity surface emitter . Since the heat dissipation portion 40 of the circuit board assembly 1 provides a large heat dissipation area, the vertical cavity surface emitter can be supported on an upper surface of the heat dissipation portion 40 and work normally.
  • a back surface of the vertical cavity surface emitter is a negative electrode
  • a front surface is a positive electrode.
  • a heat dissipation method which includes the following steps:
  • heat is transferred from a circuit layer 10 of the circuit component to a conductive layer 20 overlapping the circuit layer 10, and then transferred to the conductive layer 20 Layer 20 of the circuit layer 10.
  • heat is transferred from the upper surface of the circuit board assembly 1 to a lower surface of a conductive layer 20, and then is transferred to the conductive layer 20 overlapping the conductive layer 20.
  • the electronic device 3000 includes the TOF camera module 1000 and an electronic device body 2000, wherein the TOF camera module 1000 is provided in the electronic device body 2000.
  • the electronic device 3000 includes the electronic device body 2000 and a main circuit board, wherein the main circuit board is disposed on the electronic device body 2000 and is connectably connected to the electronic device body 2000.
  • the electronic device body 2000 includes the electronic device body 2000 and a main circuit board, wherein the main circuit board is disposed on the electronic device body 2000 and is connectably connected to the electronic device body 2000.
  • the electronic device 3000 further includes the flood light 110 with a flexible circuit board, wherein the flood light 110 can be connected to the main circuit board of the electronic device.
  • the electronic device 1000 further includes a flood light 110, wherein the flood light 110 is conductively mounted on the main circuit board of the electronic device 1000.
  • the circuit board assembly 1 of the floodlight 110 can be electrically connected to the main circuit board of the electronic device 1000.
  • the floodlight 110, the receiving unit 120, and a camera module can be simultaneously installed on an electronic device body 2000, wherein the floodlight 110, the receiving unit 120, and the camera
  • the modules can be formed as a whole by an assembly.
  • a flood light 110A with a flexible circuit board 5A is provided, wherein the flood light 110A can be installed in a receiving unit 120A to form a TOF camera. Module 1000A.
  • the floodlight 110A includes the circuit board assembly 1A, a light emitting element 2A, a bracket 3A, a flexible circuit board 5A, and at least one electronic component 6A manufactured according to the above manufacturing method, wherein the bracket 3A forms a light Window 31A, the light-emitting element 2A is supported by the circuit board assembly 1A to be conductive to the circuit board assembly 1A, and the flexible circuit board 5A is connected to the circuit board assembly 1A to be conductively connected, The electronic component 6A is conductively connected to the circuit board assembly 1A and the light emitting element 2A.
  • the floodlight 110A may further include an optical auxiliary element 4A, wherein the optical auxiliary element 4A is supported by the bracket 3A, and the light emitted by the light emitting element 2A is directed outward by the optical auxiliary element 4A.
  • the flexible circuit board 5A may be conductively connected to the circuit board assembly 1A by means of a conductive adhesive, or may be conductively connected to the circuit board assembly 1A by means of a card slot.
  • the receiving unit 120A includes a lens assembly 121A and a photosensitive circuit 122A.
  • the photosensitive circuit 122A includes a photosensitive element 1221A and a circuit board 1222A.
  • the lens assembly 121A provides an optical path for light to reach the photosensitive element 1221A. Photoelectric conversion is performed, and the photosensitive element 1221A is connectably connected to the circuit board 1222A.
  • the lens assembly 121A of the receiving unit 120A further includes an optical lens 1211A and a base 1212A, wherein the optical lens 1211A is held by a photosensitive path of the photosensitive element 1221A via the base 1212A. It can be understood that the base 1212A is connected to the circuit board 1222A. In this example, the base 1212A is mounted on the circuit board 1222A.
  • At least a part of the electronic component 6A of the floodlight 110A is disposed on the circuit board 1222A of the receiving unit 120A to facilitate reducing the size of the floodlight 110A.
  • the floodlight 110A with the flexible circuit board 5A can be mounted to the receiving unit 120A through the flexible circuit board 5A, wherein the circuit board 1222A of the receiving unit 120A is connectably connected. On the flexible circuit board 4A.
  • a flood light 110B is provided, wherein the flood light 110B can be mounted on a receiving unit 120B with a flexible circuit board to form a TOF camera. Module 1000B.
  • the floodlight 110B includes the circuit board assembly 1B, a light emitting element 2B, a bracket 3B, a flexible circuit board 5B, and at least one electronic component 6B manufactured according to the above manufacturing method, wherein the bracket 3B forms a light Window 31B, the light-emitting element 2B is connectably connected to the circuit board assembly 1B and supported by the circuit board assembly 1B, wherein the electronic component 6B is connectably connected to the circuit board Module 1B and the light-emitting element 2B.
  • the floodlight 110B may further include an optical auxiliary element 4B, wherein the optical auxiliary element 4B is supported by the bracket 3B, and the light emitted by the light emitting element 2B is directed outward by the optical auxiliary element 4B. Shoot out.
  • the receiving unit 120B includes a lens component 121B and a photosensitive component 122B.
  • the photosensitive component 122B further includes a photosensitive element 1221B and a circuit board 1222B.
  • the lens component 121B provides an optical path for light to reach the lens.
  • the photosensitive element 1221B performs photoelectric conversion, wherein the photosensitive element 1221B is connected to the circuit board 1222B in a conductive manner.
  • the flexible circuit board 5B is connectably connected to the circuit board 1222B. It can be understood that the flexible circuit board 5B may be connected to the circuit board 1222B of the receiving unit 120B through a conductive adhesive, and the flexible circuit board 5B may also be connected to the receiving unit 120B through a slot.
  • the circuit board 1222B may be connected to the circuit board 1222B of the receiving unit 120B through a conductive adhesive, and the flexible circuit board 5B may also be connected to the receiving unit 120B through a slot.
  • the circuit board 1222B may be connected to the circuit board
  • the lens assembly 121B further includes an optical lens 1211B and a base 1212B.
  • the base 1212B is supported by the optical lens 1211B and the circuit board 1222B.
  • the base 1212B also supports
  • the floodlight 110B is on the circuit board 1222B.
  • the electronic component 6B of the floodlight 110B is at least partially accommodated in the base 1212B to facilitate the reduction in size of the floodlight 110B.
  • the floodlight 110B is assembled to the receiving unit by being connected to the flexible circuit board 5B of the receiving unit 120B to form the TOF camera module 1000B.

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Abstract

一电路板组件(1)及其制造方法和应用,其中所述电路板组件(1)的制造方法包括如下步骤:在一基板(110)的一上表面形成一第一线路层(10A);在至少部分所述第一线路层(10A)的一上表面形成一第一导电层(20A);以及在所述第一线路层(10A)和所述第一导电层(20A)一体成型一第一绝缘部(30A),其中所述第一导电层(20A)在高度方向贯通所述第一绝缘部(30A)。

Description

电路板组件及其制造方法和应用 技术领域
本发明涉及到电路板领域,尤其涉及到一电路板组件及其制造方法和应用。
背景技术
随着市场的发展,TOF摄像模组开始被逐渐应用到手机等小型的移动设备中,然而对于TOF摄像模组来说,所述TOF摄像模组包括一光源单元和一接收单元,其中所述光源单元在朝外发出光线时能够发出大量的热量,当热量积累在所述光源单元位置时,所述光源单元的工作质量和工作效率会受到影响,从而影响到整个所述TOF摄像模组的成像精度。
所述光源单元一般包括一发光元件和一电路板,其中所述发光元件被支持于所述电路板,并且通过所述电路板散热。一般市场上的常用的电路板有普通的软硬结合板,但是其本身的散热性能较差。
进一步地,软硬结合板由于本身散热性能较差,并且对于多层电路板来说,由于过孔(vias)的存在,限制了整个电路板在厚度尺寸上的缩小。过孔的尺寸越小,对于整个工艺的要求越高,从而电路板的成本也越高。也就是说,一般的软硬结合板难以满足目前电子设备对于散热性能的要求,和电子设备的轻薄化要求。
目前的陶瓷基板具有较好的散热性能,但是对于其成本较高,并且目前相关拥有生产相关陶瓷基板能力的企业的生产能力有限,无法满足当前手机或者是其他电子设备市场大规模的需求。
发明内容
本发明的一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板组件能够提供一较好的散热性能。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板组件能够在提供较好散热性能的同时具有良好的导电性能。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板的制造方法能够便于制造小型化的所述电路板组件。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中通过所述制造方法制作的所述电路板具有一较好的制作精度。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中具有较好精度的所述电路板能够减小后续组装过程中的组装公差。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板制造成本低。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板组件是一多层结构,各层之间无需结构配合,以减少装配公差。
根据本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板组件的各层之间无需结构配合,无需为一连接件预留空间,从而有利于所述电路板组件的小型化。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板组件在制造过程中,无需对于每一层进行逐步拼装和对准,有利于提高生产效率。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中通过所述制造方法,所述电路板组件结构设计的灵活性能够被提高。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中通过所述制造方法,所述电路板组件具有一较好的结构强度。
本发明的另一目的在于提供一电路板组件及其制造方法和应用,其中所述电路板能够被应用于追求轻薄化的TOF摄像模组。
根据本发明的一方面,本发明提供了一电路板组件的制造方法,其包括如下步骤:
在一基板的一上表面形成一第一线路层;
以在所述第一线路层上侧形成一第一导电层的方式形成可被导通的一散热部,其中所述第一导电层成型于多个第二成型通道,所述散热部形成于至少一所述第二成型通道,其中形成所述散热部的所述第二成型通道对应的所述第一导电层部分的横截面大于其他所述第二成型通道对应的所述第一导电层部分的横截面,其中所述散热部具有一第一表面和一第二表面,其中所述第一表面被暴露在 外,用于支撑一电子元件,所述第二表面能够被暴露在外,用于散失热量;以及
在所述第一线路层和所述第一导电层一体成型一第一绝缘部,其中至少所述第一导电层在高度方向贯通于所述第一绝缘部。
根据本发明的一些实施例,所述散热部形成于至少部分所述第一导电层和至少部分所述第一线路层。
根据本发明的一些实施例,至少部分所述第一导电层被重叠于至少部分所述第一线路层。
根据本发明的一些实施例,在上述方法中,进一步包括一步骤:
去除所述基板以暴露所述第一线路层的一下表面。
根据本发明的一些实施例,在上述方法中,进一步包括如下步骤:
形成一隔离层于所述基板的一上表面;
形成一第一结合层于所述隔离层的一上表面;以及
在所述第一结合层的一上表面形成所述第一线路层。
根据本发明的一些实施例,在上述方法中,进一步包括如下步骤:
设置一第一干膜于所述第一结合层的所述上表面;
通过一第一掩膜对于部分所述第一干膜进行曝光;
去除被曝光的所述第一干膜以在未曝光的所述第一干膜之间形成至少一第一成型通道;以及
在所述第一成型通道内形成所述第一线路层。
根据本发明的一些实施例,在上述方法中,进一步包括如下步骤:
在所述第一干膜的所述上表面和所述第一线路层的所述上表面设置一所述第二干膜;
通过一所述第二掩膜对于至少部分所述第二干膜进行曝光;
去除被曝光的所述第二干膜以在未曝光的所述第二干膜之间形成所述第二成型通道;以及
在所述第二成型通道之间形成所述第一导电层。
根据本发明的一些实施例,在上述方法中,进一步包括如下步骤:
在所述第一线路层和所述第一导电层一体成型所述第一绝缘部,其中所述第一绝缘部覆盖所述第一导电层的一上表面;和
降低所述第一绝缘层的高度至所述第一导电层的所述上表面露出。
根据本发明的一些实施例,进一步包括如下步骤:
以在所述第一导电层上侧形成一第二线路层的方式形成所述散热部,其中所述散热部形成于至少部分所述第二线路层和至少部分所述第一导电层,其中所述第二线路层成型于多个第三成型通道,至少部分所述散热部形成于至少一所述第三成型通道,其中形成所述散热部的所述第三成型通道对应的所述第二线路层部分的横截面大于其他所述第三成型通道对应的所述第二线路层部分的横截面。
根据本发明的一些实施例,所述散热部形成于至少部分所述第二线路层,至少部分所述第一导电层以及至少部分所述第一线路层。
根据本发明的一些实施例,所述第一线路层,所述第一导电层以及所述第二线路层至少部分相互重叠。
根据本发明的一些实施例,在上述方法中,进一步包括如下步骤:
在至少部分所述第一导电层的所述上表面和至少部分所述第一绝缘部的所述上表面形成一第二结合层;和
在所述第二结合层的一上表面形成所述第二线路层,其中所述第二线路层被至少部分可导通地连接于所述第一导电层。
根据本发明的一些实施例,进一步包括如下步骤:
以在所述第二线路层上侧成一第二导电层的方式形成所述散热部,其中所述第二导电层成型于多个第四成型通道,至少部分所述散热部形成于至少一所述第四成型通道,其中形成所述散热部的所述第四成型通道对应的所述第二导电层部分的横截面大于其他所述第四成型通道对应的所述第二导电层部分的横截面;和
在所述第二线路层和所述第二导电层一体成型一第二绝缘部,其中至少部分所述第二导电层在高度方向贯通所述第二绝缘部。
根据本发明的一些实施例,至少部分所述第一线路层,至少部分所述第一导电层,至少部分所述第二线路层以及至少部分所述第二导电层在高度方向相互重叠,所述散热部形成于相互重叠的所述第一线路层,所述第一导电层,第二线路层以及第二导电层部分。
根据本发明的一些实施例,进一步包括如下步骤:
以在所述第二导电层的一上表面形成至少部分一第三线路层的方式形成所述散热部,其中所述散热部形成于至少部分所述第二导电层和至少部分所述第三线路层,其中所述第三线路层成型于多个第五成型通道,至少部分所述散热部形 成于至少一所述第五成型通道,其中形成所述散热部的所述第五成型通道对应的所述第三线路层部分的横截面大于其他所述第五成型通道对应的所述第三线路层部分的横截面
根据本发明的一些实施例,至少部分所述第一导电层,至少部分所述第二线路层,至少部分第二导电层以及至少部分所述第三线路层在高度方向相互重叠。
根据本发明的一些实施例,进一步包括如下步骤:
形成覆盖于所述第三线路层和所述第二绝缘层的一保护层;和
在去除所述基板之后去除所述保护层。
根据本发明的另一方面,本发明提供了一电路板组件,其通过上述的一制造方法制造而成。
根据本发明的一些实施例,所述电路板组件的一线宽A和一线距B分别满足下列条件:
30μm≤A≤150μm;和30μm≤B≤150μm。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
一泛光灯,其中所述泛光灯用于发射一光线至一被拍摄对象;和
一接收单元,其中所述接收单元用于接收被所述被拍摄对象反射的一反射光线,基于所述发射光线和所述反射光线的信息获得所述被拍摄对象的深度信息,其中所述泛光灯包括一发光元件和根据上述的制造方法的一电路板组件,其中所述发光元件被可导通地连接于所述电路板组件的所述散热部。
根据本发明的另一方面,本发明提供了一电子设备,其包括:
一电子设备本体和根据上述的一摄像模组,其中所述摄像模组被设置于所述电子设备本体。
根据本发明的一些实施例,所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
根据本发明的另一方面,本发明提供了一泛光灯,其包括:
一发光元件;
通过上述的一制造方法制造而成的一电路板组件;以及
一支架,其中所述支架形成一光窗,所述发光元件被可导通地连接于所述电路板组件,所述支架被连接于所述电路板组件。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
根据上述的泛光灯;和
带有一柔性线路板的一接收单元,其中所述接收单元包括一镜头组件,一感光元件,一电路板以及一柔性线路板,其中所述镜头组件为光线提供一光学通路以使光线达到所述感光元件进行光电转换,其中所述感光元件被可导通地连接于所述电路板,其中所述电路板被可导通地连接于所述柔性线路板,其中所述泛光灯被可导通地连接于所述柔性线路板。
根据本发明的另一方面,本发明提供了一电子设备,其包括:
根据上述的泛光灯;
一电子设备本体;以及
一主线路板,其中所述主线路板被设置于所述电子设备本体,其中在所述泛光灯被安装于所述主线路板,所述泛光灯的所述电路板组件被可导通地连接于所述主线路板。
根据本发明的一些实施例,所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
根据本发明的另一方面,本发明提供了一泛光灯,其包括:
一发光元件;
通过上述的一制造方法制造而成的一电路板组件;
一支架,其中所述支架形成一光窗,所述发光元件被可导通地连接于所述电路板组件,所述支架被连接于所述电路板组件;以及
一柔性线路板,其中所述柔性线路板被可导通地连接于所述电路板组件。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
根据上述的一泛光灯;和
一接收单元,其中所述接收单元包括一镜头组件,一感光组件以及一电路板,其中所述镜头组件提供一光学通路以使光线达到所述感光元件进行光电转换,所述感光元件被可导通地连接于所述电路板,其中所述泛光灯的所述柔性线路板被可导通地连接于所述接收单元的所述电路板。
根据本发明的另一方面,本发明提供了一电路板组件,其包括一第一线路层,一第一导电层,一第一绝缘层,一可导通的散热部以及具有至少二第二成型位置, 其中所述第一导电层形成于所述第一线路层上侧,所述第一绝缘层一体成型于所述第一线路层和所述第一导电层,其中所述第一导电层成型于所述第二成型位置,至少一所述第二成型位置形成至少部分所述散热部,其中形成所述散热部的所述第二成型位置对应的所述第一导电层部分的横截面大于其他所述第二成型位置对应的所述第一导电层部分的横截面,其中所述散热部具有一第一表面和一第二表面,其中所述第一表面被暴露在外,用于支撑一电子元件,所述第二表面能够被暴露在外,用于散失热量。
根据本发明的一些实施例,所述散热部形成于所述第一导电层和所述第一线路层。
根据本发明的一些实施例,所述电路板组件进一步包括一第二线路层和具有至少二第三成型位置,其中所述第二线路层形成于所述第一导电层上侧并且成型于所述第三成型位置,至少一所述第三成型位置形成至少部分所述散热部,其中形成所述散热部的所述第三成型位置对应的所述第二线路层部分的横截面大于其他所述第三成型位置对应的所述第二线路层部分的横截面。
根据本发明的一些实施例,所述散热部形成于在高度方向重叠的所述第二线路层,所述第一导电层和所述第一线路层部分;或者是,所述散热部形成于在高度方向重叠的所述第二线路层和所述第一导电层部分。
根据本发明的一些实施例,所述电路板组件进一步包括一第二导电层和具有至少二第四成型位置,其中所述第二导电层形成于所述第二线路层上侧并且成型于所述第四成型位置,至少一所述第四成型位置形成至少部分所述散热部,其中形成所述散热部的所述第四成型位置对应的所述第二导电层部分的横截面大于其他所述第四成型位置对应的所述第二导电层部分的横截面。
根据本发明的一些实施例,所述散热部形成于在高度方向重叠的所述第一导电层,所述第二线路层以及所述第二导电层部分。
根据本发明的一些实施例,所述电路板组件进一步包括一第三线路层和具有至少二第五成型位置,其中所述第三线路层形成于所述第二导电层上侧并且成型于所述第五成型位置,至少一所述第五成型位置形成至少部分所述散热部,其中形成所述散热部的所述第五成型位置对应的所述第三线路层部分的横截面大于其他所述第五成型位置对应的所述第三线路层部分的横截面。
根据本发明的一些实施例,所述散热部形成于在高度方向重叠的所述第一导 电层,所述第二线路层,所述第二导电层以及所述第三线路层部位。
根据本发明的一些实施例,所述电路板组件进一步具有至少二第一成型位置,其中所述第一线路层成型于所述第一成型位置,至少一所述第一成型位置形成至少部分所述散热部,其中形成所述散热部的所述第一成型位置对应的所述第一线路层部分的横截面大于其他所述第一成型位置对应的所述第一线路层部分的横截面。
根据本发明的一些实施例,所述电路板组件进一步包括一第二阻焊层,其中所述第二阻焊层覆盖于至少部分所述第二绝缘部。
根据本发明的一些实施例,所述电路板组件进一步包括一第一阻焊层,其中所述第一阻焊层覆盖于至少部分所述第一绝缘部。
根据本发明的一些实施例,所述电路板组件的一线宽A和一线距B分别满足下列条件:
30μm≤A≤150μm;和30μm≤B≤150μm。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
一泛光灯,其中所述泛光灯用于发射一光线至一被拍摄对象;和
一接收单元,其中所述接收单元用于接收被所述被拍摄对象反射的一反射光线,基于所述发射光线和所述反射光线的信息获得所述被拍摄对象的深度信息,其中所述泛光灯包括一发光元件和根据上述的一电路板组件,其中所述发光元件被可导通地连接于所述电路板组件的所述散热部。。
根据本发明的另一方面,本发明提供了一电子设备,其包括:
一电子设备本体和根据上述的一TOF摄像模组,其中所述TOF摄像模组被设置于所述电子设备本体。
根据本发明的一些实施例,所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
根据本发明的另一方面,本发明提供了一泛光灯,其包括:
一发光元件;
根据上述的一电路板组件,以及
一支架,其中所述支架形成一光窗,所述发光元件被支撑于所述电路板组件的一第一导电部,所述支架被连接于所述电路板组件。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
根据上述的一泛光灯;和
带有一柔性线路板的一接收单元,其中所述接收单元包括一镜头组件,一感光元件,一电路板以及一柔性线路板,其中所述镜头组件为光线提供一光学通路以使光线达到所述感光元件进行光电转换,其中所述感光元件被可导通地连接于所述电路板,其中所述电路板被可导通地连接于所述柔性线路板,其中所述泛光灯被可导通地连接于所述柔性线路板。
根据本发明的另一方面,本发明提供了一电子设备,其包括:
根据上述的一泛光灯;
一电子设备本体;以及
一主线路板,其中所述主线路板被设置于所述电子设备本体,其中在所述泛光灯被安装于所述主线路板,所述泛光灯的所述电路板组件的所述导电部被可导通地连接于所述主线路板。
根据本发明的一些实施例,所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
根据本发明的另一方面,本发明提供了一泛光灯,其包括:
一发光元件;
根据上述的一电路板组件;
一支架,其中所述支架形成一光窗,所述发光元件被支撑于所述电路板组件的一第一导电部,所述支架被连接于所述电路板组件;以及
一柔性线路板,其中所述柔性线路板被可导通地连接于所述电路板组件的所述导电部。
根据本发明的另一方面,本发明提供了一TOF摄像模组,其包括:
根据上述的一泛光灯;和
一接收单元,其中所述接收单元包括一镜头组件,一感光元件以及一电路板,其中所述镜头组件提供一光学通路以使光线达到所述感光元件进行光电转换,所述感光元件被可导通地连接于所述电路板,其中所述泛光灯的所述柔性线路板被可导通地连接于所述接收单元的所述电路板。
附图说明
图1是根据本发明的一较佳实施例的一电路板组件的剖面示意图。
图2A、图2B、图2C、图2D、图2E、图2F、图2G、图2H、图2I、图2J图2K、图2L、图2M、图2N、图2O、图2P、图2Q分别是本发明的一较佳实施例的一电路板组件的一制作流程示意图。
图3是根据本发明的一较佳实施例的一电路板组件的剖面示意图。
图4是根据本发明的一较佳实施例的带有所述电路板组件的一TOF摄像模组。
图5是根据本发明的一较佳实施例的带有所述TOF摄像模组的一电子设备的示意图。
图6A是根据本发明的一较佳实施例的一泛光灯的应用示意图。
图6B是根据本发明的一较佳实施例的一泛光灯的应用示意图。
具体实施方式
以下描述用于揭露本发明以使本领域技术人员能够实现本发明。以下描述中的优选实施例只作为举例,本领域技术人员可以想到其他显而易见的变型。在以下描述中界定的本发明的基本原理可以应用于其他实施方案、变形方案、改进方案、等同方案以及没有背离本发明的精神和范围的其他技术方案。
本领域技术人员应理解的是,在本发明的揭露中,术语“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系是基于附图所示的方位或位置关系,其仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此上述术语不能理解为对本发明的限制。
可以理解的是,术语“一”应理解为“至少一”或“一个或多个”,即在一个实施例中,一个元件的数量可以为一个,而在另外的实施例中,该元件的数量可以为多个,术语“一”不能理解为对数量的限制。
参考附图1所示,是根据本发明的一电路板组件1的一较佳实施例方式。
附图1中以多层的所述电路板组件1为例,本领域技术人员可以理解的是,所述电路板组件1可以是一单层板也可以是一多层板。所述电路板组件1具有一上表面,其中所述电路板组件1的所述上表面可用于支撑至少一电子元件,所述 电子元件藉由所述电路板组件1可以传递电信号,也可以通过所述电路板组件1散失热量,以避免热量堆积在所述电子元件,对于所述电子元件的正常工作造成影响。
所述电路板组件1具有一较好的散热性能。
所述电路板组件1包括至少一线路层10,一导电层20,一绝缘部30和一散热部40,其中所述绝缘部30一体成型于所述线路层10和所述导电层20,所述绝缘层30在所述线路层10和所述导电层20起到绝缘作用,以避免所述线路层10和所述导电层20在工作过程中发生短路。
所述散热部40是一可导通的,所述散热部40具有一第一表面和一第二表面,其中所述第一表面位置的热量能够被传导至所述第二表面位置。所述第一表面被放置一电子元件,以在所述电子元件工作时将热量传递至所述第二表面,然后第二表面传递热量至外界。
所述散热部40形成于所述导电层20,或者是所述线路层10,或者是所述线路层10和所述导电层20。所述第一表面被暴露在外,用于支撑所述电子元件,所述第二表面被暴露在外,用于朝外散失热量。
所述线路层10被可导通地连接于所述导电层20。
在本发明的一些示例中,所述散热部40的所述第一表面是所述导电层20的一上表面,至少部分所述导电层20在高度方向贯通于所述绝缘部30,也就是说,所述导电层20的一上表面和一下表面至少部分没有被所述绝缘部30覆盖以使从外界的热量能够被传递至所述导电层20的所述上表面,然后被传递至所述导电层20的所述下表面,再朝所述导电层20外传递。也就是说,所述散热部40的一第一表面为所述导电层20的所述上表面,所述散热部40的一第二表面为所述线路层10的一下表面,也可以是所述散热部40的所述第一表面是所述导电层20的所述上表面,所述散热部40的所述第二表面是所述导电层20的所述下表面,比如说所述导电层20分别位于所述线路层10的上下两侧时,也可以是所述散热部40的所述第一表面是所述线路层10的所述上表面,所述散热部40的所述第二表面是所述线路层10的所述下表面,比如说所述线路层10分别位于所述导电层20的上下两侧时。
在本发明的另一些示例中,所述散热部40的所述第一表面是所述导电层20的所述上表面,所述散热部40的所述第二表面是所述导电层20的一侧面。
在本发明的另一些示例中,所述散热部40的所述第一表面是所述导电层20的所述上表面,所述散热部40的所述第二表面是所述线路层的一侧面。
在本发明的另一些示例中,所述散热部40的所述第一表面是所述线路层10的所述上表面,所述散热部40的所述第二表面是另一所述线路层10的所述下表面。
优选地,所述散热部40贯通于所述绝缘部30,也就是说,至少部分所述线路层10和至少部分所述导电层20在高度方向相互重叠,所述散热部40形成于相互重叠的所述线路层10和所述导电层20部分。
在本示例中,所述电路板组件1包括一第一线路层10A,一第一导电层20A以及一第一绝缘部30A,其中所述第一线路层10A具有一上表面,所述第一导电层20A形成于所述第一线路层10A的所述上表面,所述第一绝缘部30A一体成型于所述第一线路层10A和所述第一导电层20A。所述第一绝缘部30A能够避免在宽度方向的所述第一线路层10A部分相互短路或者是在宽度方向的所述第一导电层20A部分之间的相互短路。所述第一绝缘部30A一体成型于所述第一线路层10A和所述第一导电层20A有利于三者之间的结构强度。
可以理解的是,所述第一绝缘部30A被同时连接于所述第一线路层10A和所述第一导电层20A,可以是部分所述第一绝缘部30A可以先一体成型于所述第一线路层10A,部分所述第一绝缘部30A一体成型在先的所述第一绝缘部30A部分和所述第一导电层20A。也可以是,所述第一绝缘部30A一次一体成型于所述第一线路层10A和所述第一导电层20A。
所述第一线路层10A用于传递电信号,所述第一导电层20A能够导电并且能够起到散热作用,所述第一绝缘部30A能够隔绝电信号。
也就是说,在宽度方向不同位置的各所述第一线路层10A的导电部分被所述第一绝缘部30A分隔,在宽度方向不同位置的各所述第一导电层20A的导电部分被所述第一绝缘部30A分隔。
所述第一线路层10A和所述第一导电层20A位于不同的高度。至少部分所述第一线路层10A被可连通于连接于所述第一导电层20A,并且,更加具体地,在高度方向上,至少部分所述第一线路层10A的所述上表面贴附有所述第一导电层20A。换句话说,至少所述第一线路层10A被重叠有所述第一导电层20A,并且重叠的部位可以相互导通。
进一步地,至少部分所述第一导电层20A的所述上表面被暴露在外,也就是说,所述导电层20的至少部分所述上表面并没有被所述第一绝缘部30A覆盖。
所述电路板组件1进一步包括所述散热部40,其中所述散热部40形成于相互重叠的所述第一导电层20A和所述第一线路层10A,所述散热部40具有一第一表面和一第二表面,所述散热部40的所述第一表面就是所述第一导电层20A的所述上表面,所述散热部40的所述第二表面就是所述第一线路层10A的至少部分所述下表面。所述散热部40的所述上表面和所述下表面皆为暴露在外,当所述电子元件被安装在所述散热部40的所述上表面,也就是所述第一导电层20A的所述上表面,来自于所述电子元件工作中产生的热量被传递至所述散热部40的所述第一导电层20A,然后被传递至被导通于所述第一导电层20A的所述第一线路层10A部分,然后通过所述第一线路层10A的所述下表面被传递至外界,从而避免了热量在直接接触于所述电子元件的所述第一导电层20A位置积聚,避免了大部分热量在所述第一导电层20A的所述上表面散失,进而使得所述电子元件所在环境的温度升高。值得一说的是,所述电子元件可以直接贴附于所述散热部40,通过所述散热部40直接散热,即所述电子元件贴附于所述散热部40的上表面,产生的热量由所述散热部40的所述第一表面传递至所述散热部40的所述第二表面,再传递至外部环境。
从另一方面而言,所述电路板组件1具有至少二第一成型位置,其中所述第一线路层10A成型于所述第一成型位置。在至少一所述第一成型位置形成至少部分所述散热部40。形成所述散热部40的所述第一成型位置对应的所述第一线路层10A部分的横截面大于其他所述第一成型位置对应的所述第一线路层10A部分的横截面。也就是说,所述第一线路层10A在表面提供多个导通位置,其中一所述导通位置的导通能力强于其他所述导通位置的导通能力。
进一步地,所述电路板组件1具有至少二第二成型位置,其中所述第一导电层20A成型于所述第二成型位置。在至少一所述第二成型位置形成至少部分所述散热部40。形成所述散热部40的所述第二成型位置对应的所述第一导电层20A部分的横截面大于其他所述第二成型位置对应的所述第一导电层20A部分的横截面。也就是说,所述第一导电层20A在其表面提供多个导通位置,其中一所述导通位置的导通能力强于其他所述导通位置的导通能力。
进一步地,形成所述散热部40的所述第一成型位置和所述第二成型位置对 应的所述第一导电层20A部分和所述第二导电层20B部分的横截面大于其他形成所述散热部40的所述第一成型位置和所述第二成型位置对应的所述第一导电层20A部分和所述第二导电层20B部分的横截面。也就是说,所述散热部40的导通能力强于其他第一成型位置和所述第二成型位置对应的所述第一导电层20A部分和所述第二导电层20B部分。
从另一方面而言,所述电路板组件1具有至少二第一位置,其中所述第一位置用于成型所述第一绝缘部30A。部分所述第一位置位于所述第一线路层10A,部分所述第一位置位于所述第一导电层20A,也就是说,所述第一线路层10A和所述第一导电层20A分别提供了空间供填充所述第一绝缘部30A。
所述第一位置在高度方向贯通第一线路层10A和所述第一导电层20A,也就是说,所述第一位置在上方可被注入流体材料,所述第一位置在下方没有完全被所述第一线路层10A覆盖。所述第一绝缘部30A填充至少部分所述第一位置。
进一步地,所述电路板组件1还可以包括一第二线路层10B,其中所述第二线路层10B形成于所述第一导电层20A的所述上表面和所述第一绝缘部30A的所述上表面。优选地,所述第一导电层20A的所述上、下表面皆为一平面,所述第一绝缘部30A的所述上表面为一平面。
至少部分所述第二线路层10B重叠于所述第一导电层20A,也就是说,至少部分所述第二线路层10B被可导通地连接于所述第一导电层20A。进一步,使得所述第一线路层10A分别和对应的第二线路层10B通过对应的所述第一导电层20A导通。
所述散热部40进一步包括至少部分所述第二线路层10B,其中所述散热部40形成于在高度方向重叠的至少部分第二线路层10B,所述第一导电层20A和至少部分所述第一线路层10A。当所述电子元件被贴装在所述散热部40的所述上表面,也就是所述第二线路层10B的至少部分所述上表面,所述电子元件在工作过程中产生的热量首先被传递中所述散热部40的所述第一表面,也就是所述第二线路层10B的至少部分所述上表面,然后通过所述第二线路层10B的所述下表面被传递至所述第一导电层20A的所述上表面,然后通过所述第一导电层20A的所述下表面被传递至所述第一线路层10A的所述上表面,然后通过所述第一线路层10A的所述下表面被传递至外界。
可以理解的是,在本发明的一些实施例中,所述散热部40可以形成于所述 第二线路层10B,所述散热部40的所述第一表面是所述第二线路层10B的所述上表面,所述散热部40的所述第二表面是所述第二线路层10B的一侧面。
在本发明的另一些示例中,所述散热部40可以形成于所述第二线路层10B和所述第一导电层10A,所述散热部40的所述第一表面是所述第二线路层10B的所述上表面,所述散热部40的所述第二表面是所述第一导电层20A的一侧面。
优选地,所述散热部40形成于在高度方向相互重叠的所述第二线路层10B,所述第一导电层20A和所述第一线路层10A部分,以使热量直接在高度方向被朝外传导。
进一步地,所述电路板组件1进一步包括一第二导电层20B和一第二绝缘部30B,其中所述第二导电层20B形成于所述第二线路层10B的至少部分所述上表面。所述第二绝缘部30B位于一体成型于所述第二导电层20B和所述第二线路层10B。
所述第二绝缘部30B一体成型于所述第二导电层20B和所述第二线路层10B有利于三者之间的结构强度。值得一提的是,所述第二绝缘部30B具有一下表面,其中至少部分所述下表面一体成型于所述第一绝缘部30A的至少部分所述上表面,以有利于各层之间的结构强度,从而有利于整个所述电路板组件1的结构强度。
部分所述第二绝缘部30B在宽度方向分隔所述第二线路层10B,以避免在同一平面的所述第二线路层10B部分相互被导通,从而造成短路。具体地说,在俯视角度来说,所述第二线路层10B的线路可以是一定形状排布的线状,比如说S形,所述第二绝缘部30B填充了所述第二线路层10B之间的空间以避免污染物进入到所述第二线路层10B或者是所述第二线路层10B在使用过程中或者是制造过程中产生形变从而所述第二线路层10B的线路被相互连通,进而造成短路。
部分所述第二绝缘部30B在宽度方向分隔所述第二导电层20B,以避免在同一平面的所述第二导电层20B部分相互被导通,从而造成短路。具体地说,在俯视角度来说,所述第二导电层20B的线路可以是一定形状排布的线状,比如说U形,所述第二绝缘部30B填充了所述第二导电层20B之间的空间以避免污染物进入到所述第二导电层20B或者是所述第二导电层20B在使用过程中或者是制造过程中产生形变从而所述第二导电层20B的线路被相互连通,进而造成 短路。
进一步地,所述第二导电层20B的至少部分所述上表面被暴露在外,也就是说,所述第二绝缘部30B没有覆盖所述第二导电层20B的至少部分所述上表面。、从另一方面而言,所述电路板组件1具有至少二第三成型位置,其中所述第二线路层10B成型于所述第三成型位置。在至少一所述第三成型位置形成至少部分所述散热部40。形成所述散热部40的所述第三成型位置对应的所述第二线路层10B部分的横截面大于其他所述第三成型位置对应的所述第二线路层10B部分的横截面。也就是说,所述第二线路层10B在表面提供多个导通位置,其中一所述导通位置的导通能力强于其他所述导通位置的导通能力。
进一步地,所述电路板组件1具有至少二第四成型位置,其中所述第二导电层20A成型于所述第四成型位置。在至少一所述第四成型位置形成至少部分所述散热部40。形成所述散热部40的所述第四成型位置对应的所述第二导电层20B部分的横截面大于其他所述第四成型位置对应的所述第二导电层20B部分的横截面。也就是说,所述第二导电层20B在其表面提供多个导通位置,其中一所述导通位置的导通能力强于其他所述导通位置的导通能力。
进一步地,形成所述散热部40的所述第三成型位置和所述第四成型位置对应的所述第二线路层10B部分和所述第二导电层20B部分的横截面大于其他形成所述散热部40的所述第三成型位置和所述第四成型位置对应的所述第二线路层10B部分和所述第二导电层20B部分的横截面。也就是说,所述散热部40的导通能力强于其他第一成型位置和所述第二成型位置对应的所述第二线路层10B部分和所述第二导电层20B部分。
优选地,所述散热部40形成于所述第一线路层10A,第一导电层20A,第二线路层10B以及所述第二导电层20B在高度方向重叠部分。进一步地,所述散热部40对应的所述第一成型位置,所述第二成型位置,所述第三成型位置以及所述第四成型位置各自的横截面积大于其他的所述第一成型位置,所述第二成型位置,所述第三成型位置以及所述第四成型位置的横截面积。
从另一方面来说,所述电路板组件1具有至少二第二位置,其中所述第二位置用于成型所述第一绝缘部30A和所述第二绝缘部30B。部分所述第二位置位于所述第一线路层10A,部分所述第二位置位于所述第一导电层20A,部分所述第二位置位于所述第二线路层10B,也就是说,所述第一线路层10A和所述第 一导电层20A以及所述第二线路层10B在高度方向分别提供了空间供填充所述第一绝缘部30A和所述第二绝缘部30B。
二所述第二位置被至少部分所述第一线路层10A和至少部分所述第一导电层20A以及至少部分所述第二线路层10B分隔,其中每一所述第二位置在高度方向贯通第一线路层10A和所述第一导电层20A以及所述第二线路层10B,也就是说,所述第一位置在上方没有完全被所述第二线路层10B覆盖,从而可被注入流体材料,所述第一位置在下方没有完全被所述第一线路层10A覆盖。所述第二绝缘部30B和所述地绝缘部30填充至少部分所述第二位置。
所述第一位置和至少部分所述第二位置重合。
所述散热部40进一步包括所述第二导电层20B,其中所述第二导电层20B被重叠于至少部分所述第二线路层10B。所述散热部40形成于相互重叠的所述第二导电层20B,至少部分所述第二线路层10B,所述第一导电层20A以及至少部分所述第一线路层10A。所述散热部40的所述上表面为所述第二导电层20B的所述上表面,所述散热部40的所述下表面为所述第一线路层10A的至少部分所述下表面。
当所述电子元件被支撑于所述散热部40的所述上表面,所述电子元件在工作时产生的热量首先被传递至所述第二导电层20B的所述上表面,然后经过所述第二导电层20B的所述下表面被传递至所述第二线路层10B的所述上表面,然后经过所述第二线路层10B的所述下表面被传递至所述第一导电层20A的所述上表面,然后经过所述第一导电层20A的所述下表面被传递至所述第一线路层10A的所述上表面,然后经过所述第一线路层10A的所述上表面被热传导至所述第一线路层10A的所述下表面,然后被散失至外界。
从另一方面来说,所述电路板组件1具有至少二第三位置,其中所述第三位置用于成型所述第一绝缘部30A和所述第二绝缘部30B。部分所述第三位置位于所述第一线路层10A,部分所述第三位置位于所述第一导电层20A,部分所述第三位置位于所述第二线路层10B,部分所述第三位置位于所述第二导电层20B,也就是说,所述第一线路层10A、所述第一导电层20A、所述第二线路层10B以及所述第二导电层20B在高度方向分别提供了空间供填充一流体材料。
二所述第三位置被至少部分所述第一线路层10A、至少部分所述第一导电层20A、至少部分所述第二线路层10B以及至少部分所述第二导电层20B分隔,其 中每一所述第三位置在高度方向贯通第一线路层10A、所述第一导电层20A、所述第二线路层10B以及所述第二导电层20B,也就是说,所述第三位置在上方没有完全被所述第二导电层20B覆盖,从而可被注入流体材料,所述第一成型位置在下方没有完全被所述第一线路层10A覆盖。一绝缘材料可以填充至少部分所述第三位置。
所述第二位置和至少部分所述第三位置重合。
进一步地,所述电路板组件1还可以包括一第三线路层10C,其中所述第三线路层10C形成于所述第二导电层20B的所述上表面和所述第二绝缘部30B的所述上表面。优选地,所述第二导电层20B的所述上、下表面皆为一平面,所述第二绝缘部30B的所述上表面为一平面。
至少部分所述第三线路层10C重叠于所述第二导电层20B,也就是说,至少部分所述第三线路层10C被可导通地连接于所述第二导电层20B。
所述电路板组件1具有至少二第四位置,其中所述第四位置提供一成型位置,部分所述第四位置位于所述第一线路层10A,部分所述第四位置位于所述第一导电层20A,部分所述第四位置位于所述第二线路层10B,部分所述第四位置位于所述第二导电层20B,部分所述第四位置位于所述第三线路层10C,也就是说,所述第一线路层10A、所述第一导电层20A、所述第二线路层10B、所述第二导电层20B以及所述第三线路层10C在高度方向分别提供了空间供填充一流体材料。
二所述第四位置被至少部分所述第一线路层10A、至少部分所述第一导电层20A、至少部分所述第二线路层10B以及至少部分所述第二导电层20B分隔,其中每一所述第四位置在高度方向贯通第一线路层10A、所述第一导电层20A、所述第二线路层10B、所述第二导电层20B以及所述第三线路层10C,也就是说,所述第四位置在上方没有完全被所述第三线路层10C覆盖,从而可被注入流体材料,所述第四位置在下方没有完全被所述第三线路层10C覆盖。一绝缘材料可以填充至少部分所述第四位置。
所述第二位置和至少部分所述第三位置重合。
所述散热部40进一步包括至少部分所述第三线路层10C,其中所述散热部40形成于在高度方向重叠的至少部分第三线路层10C,至少部分所述第二导电层20B,至少部分所述第二线路层10B,至少部分所述第一导电层20A以及至少 部分所述第一线路层10A。当所述电子元件被贴装在所述散热部40的所述第一表面,也就是所述第三线路层10C的至少部分所述上表面,所述电子元件在工作过程中产生的热量首先被传递中所述散热部40的所述第一表面,也就是所述第三线路层10C的至少部分所述上表面,然后通过所述第三线路层10C的所述下表面被传递至所述第二导电层20B的所述上表面,然后通过所述第二导电层20B的所述下表面被传递至所述第二线路层10B的所述上表面,然后通过所述第二线路层10B的所述下表面被传递至所述第一导电层20A的所述上表面,然后通过所述第一导电层20A的所述上表面被传递至所述第一线路层10A的所述上表面,然后通过所述第一线路层10A的所述下表面被传递至外界。
从另一方面而言,所述电路板组件1具有至少二第五成型位置,其中所述第三线路层10C成型于所述第五成型位置。在至少一所述第五成型位置形成至少部分所述散热部40。形成所述散热部40的所述第五成型位置对应的所述第三线路层10C部分的横截面大于其他所述第五成型位置对应的所述第三线路层10C部分的横截面。也就是说,所述第三线路层10C在表面提供多个导通位置,其中一所述导通位置的导通能力强于其他所述导通位置的导通能力。
换句话说,所述散热部40对应的所述第一成型位置,所述第二成型位置,所述第三成型位置,所述第四成型位置以及所述第五成型位置的横截面积大于其他的所述第一成型位置,所述第二成型位置,所述第三成型位置,所述第四成型位置以及所述第五成型位置的横截面积。
所述电子元件具有一正面和一背面,其中所述电子元件的所述背面被可连通地连接于所述散热部40的所述上表面,所述电子元件的所述正面可以被连接于其他的可导通部位。
可以理解的是,所述散热部40能够被设计为一较大的面积尺寸以有利于散热,同时也有利于导电。
可选地,所述电子元件可以是一发光元件。
所述散热部40的所述第一表面为所述第三线路层10C的所述上表面,所述散热部40的所述第二表面为所述第一线路层
参考附图2A至附图2Q所示,是根据本发明的所述电路板组件1的一制造方法的一较佳实施方式。
通过所述制造方法制造的所述电路板组件1,不仅具有较好的散热性能和导 电性能,还有适用于制造小型化的所述电路板组件1。也就是说,通过所述电路板组件1,适于制造具有更小尺寸的所述电路板组件1。
进一步地,通过所述制作方法制作的所述电路板组件1具有一较好的制作精度,一方面有利于所述电路板组件1本身的性能,另一方面有利于在后续组装中减少组装公差。
更值得一提的是,在所述电路板组件1是一多层结构时,各层之间无需结构配合,以减少装配公差,也无需为各层之间的连接件预留一空间,从而有利于所述电路板组件1的小型化。
更进一步地,在所述电路板组件1是一多层结构时,无需对于每一层进行逐步的拼装和对准,以有利于提高生产效率和整个产品良率。
具体地说,所述电路板组件1的制造方法包括如下步骤:
(a)在一基板110形成一第一线路层10A;(b)在至少部分所述第一线路层10A的一上表面形成一第一导电层20A;以及
(c)在所述第一线路层10A和所述第一导电层20A一体成型一第一绝缘部30A,并且所述第一导电层20A在高度方向贯通于所述第一绝缘部30A。
可以理解是,部分所述第一绝缘部30A可以先一体成型于部分所述第一线路层10A,然后部分所述第一绝缘部30A一体成型于在先的所述第一绝缘部30A部分和所述第一导电层20A。也就说,所述第一绝缘部30A可以单次一体成型于所述第一线路层10A和所述第一导电层20A,也可以分次一体成型于所述第一线路层10A和所述第一导电层20A。
根据本发明的一实施例,进一步包括一步骤(d):
去除所述基板110至重叠于所述第一导电层20A的所述第一线路层10A部分被暴露以得到一电路板组件1。
至少部分所述电路板组件1的导电部分在高度方向上的可以直接将来自于贴附于所述电路板组件1的一上表面的一电子元件的热量通过热传导的方式传递至所述电路板组件1的一下表面,然后散失到外界。
参考附图2A,在所述步骤(a)中,进一步包括如下步骤:
形成一隔离层120于所述基板110的一上表面;
形成一第一结合层130于所述隔离层120的一上表面;以及
在所述第一结合层130的一上表面形成所述第一线路层10A。
所述基板110可以是一铜基板110,其中所述铜基板110为在整个制作过程中提供了基准面。优选地,所述基板110的所述上表面是一平面。
所述隔离层120能够隔离所述基板110和所述第一结合层130,避免后续的操作对于所述基板110造成影响,使所述基板110在制造过程中始终能够提供一基准面。所述隔离层120可以是一镍金属层。所述第一结合层130主要起到种子层的作用,可以是铜或是钛铜,所述第一结合层130能够保证在后续中形成所述第一线路层10A。可以理解的是,此处所述基板110,所述隔离层120以及所述第一结合层130的材料并不限制于上述的材料。
所述隔离层120覆盖至少部分所述基板110的所述上表面,所述第一结合层130覆盖至少部分所述隔离层120的所述上表面。在所述第一结合层130通过压膜、曝光、显影、电镀的方式形成于所述第一线路层10A。
进一步地,参考附图2B,在上述方法中,进一步包括如下步骤:
形成一第一干膜140于所述第一结合层130的所述上表面;
通过一第一掩膜对于部分所述第一干膜140进行曝光;
去除被曝光的所述第一干膜140以在未曝光的所述第一干膜140之间形成一第一成型通道100;以及
在所述第一成型通道100内形成所述第一线路层10A。
可以理解的是,所述第一干膜140可以被实施为一光刻胶,然后通过所述第一掩膜对于所述光刻胶的部分区域进行曝光,再显影去除被曝光的所述第一干膜140以在未曝光的所述第一干膜140部分之间形成所述第一成型通道100,然后通过电镀工艺在所述第一成型通道100内形成所述第一线路层10A。在本示例中,所述第一线路层10A的材质是铜。可以理解的是,上述的形成所述第一线路层10A的方式并不对本发明造成限制。所述第一线路层10A的形成方式还可以是化学镀,热喷涂,堆焊,化学气相沉积等方式。
所述第一成型通道100对应于所述第一成型位置。
可以理解的是,所述第一线路层10A可以被灵活设计,然后通过控制所述第一干膜140的曝光区域来控制所述第一线路层10A的结构和形状。因为被曝光的所述第一干膜140为所述第一线路层10A提供了成型的空间。本领域人员可以理解的是,所述第一干膜140和所述第一线路层10A并不限制于上述的材料。
进一步地,参考附图2C和附图2D,形成所述第一导电层20A的方式可以是, 首先未曝光的所述第一干膜140的一上表面的所述第一线路层10A的一上表面和所述第一线路层10A的一上表面设置一第二干膜240,通过一第二掩膜对于至少部分所述第二干膜240进行曝光,然后去除被曝光的所述第二干膜240以在未曝光的所述第二干膜240之间形成一第二成型通道200,然后在所述第二成型通道200内形成所述第一导电层20A。所述第一导电层20A重叠于至少部分所述第一线路层10A以使所述第一导电层20A和至少部分所述第一线路层10A能够相互导通。
所述第一导电层20A的形状和结构被所述第二成型通道200所限制,也就是说,可以通过控制在曝光过程中所述第二干膜240的曝光区域来控制所述第二成型通道200。
所述第一导电层20A可以以电镀或溅镀的方式形成于所述第二成型通道200。所述第一导电层20A的材料可以是铜金属材料等具有导电性能和高导热性能的金属材料,也可以是其他具有导电、散热功能材料。当然,本领域技术人员可以理解的是,所述第一导电层20A的制作材料和制作方式并不限制上述的制作材料和制作方式。
所述第二干膜240可以被实施为一光刻胶,然后通过所述第二掩膜对于所述光刻胶的部分区域进行曝光,再显影去除被曝光的所述第二干膜240以在未曝光的所述第二干膜240部分之间形成所述第二成型通道200,然后通过电镀工艺在所述第二成型通道200内形成所述第一导电层20A。所述第一线路层10A的形成方式还可以是化学镀,热喷涂,堆焊,化学气相沉积等方式。
进一步地,在上述制作方法中,进一步包括如下步骤:
在所述第一干膜140的所述上表面和所述第一线路层10A的所述上表面设置一所述第二干膜240;
通过一所述第二掩膜对于至少部分所述第二干膜240进行曝光;
去除被曝光的所述第二干膜240以在未曝光的所述第二干膜240之间形成一第二成型通道200;以及
在所述第二成型通道200之间形成重叠于至少部分所述第一线路层10A的所述第一导电层20A。
优选地,所述第一干膜140的所述上表面和所述第一线路层10A的所述上表面位于同一平面。当然,可以理解的是,所述第一线路层10A的所述上表面可 以和所述第一干膜140的所述上表面不在同一平面,比如说所述第一干膜140的所述上表面对于所述第一线路层10A的所述上表面。在形成所述第一导电层20A的过程中,可以根据需求控制所述第一导电层20A的高度。
所述第二成型通道200对应于所述第二成型位置。
参考附图2E和附图2F,在形成所述第一导电层20A之后,还可以包括一步骤:去除剩余的所述干膜,然后在所述第一导电层20A和所述第一线路层10A一体成型所述第一绝缘部30A。
根据本发明的一实施例,其中所述步骤(c)进一步包括如下步骤:
在所述第一线路层10A和所述第一导电层20A一体成型所述绝缘部30,其中所述绝缘部30覆盖所述第一线路层10A和所述第一导电层20A的所述上表面;和
降低所述第一绝缘部30A的高度至至少部分所述第一导电层20A的所述上表面露出。
根据本发明的一实施例,其中所述步骤(c)进一步包括如下步骤:
在所述第一线路层10A和所述第一导电层20A一体成型所述绝缘部30,其中所述绝缘部30的一上表面和所述第一线路层10A的所述上表面位于同一平面。
可以理解的是,可以通过模塑工艺或者是注塑工艺一体成型所述绝缘部30。所述绝缘部30一方面能够对于所述第一线路层10A和所述第一导电层20A起到支撑作用,避免在使用过程中由于挤压导致所述第一线路层10A和所述第一导电层20A发生形变,另一方面所述绝缘部30能够对于所述第一线路层10A和所述第一导电层20A起到保护作用,避免一些污染物进入到所述第一线路层10A的缝隙或者是所述第一导电层20A的缝隙,影响到所述第一线路层10A和所述第一导电层20A的正常工作。可以理解的是,藉由一体成型工艺所述绝缘部30,所述第一导电层20A和所述第一线路层10A的结合强度得到一定的保证。
进一步地,为了制作拥有多层线路的所述电路板组件1,还可以在目前的所述电路板组件1形成更多的线路,同时还可以保证整个所述电路板组件1的散热。
参考附图2G和附图2H,在至少部分所述第一导电层20A的所述上表面和至少部分所述第一绝缘部30A的所述上表面形成一第二结合层230,其中所述第二结合层230可以是一种子铜,以有利于后续的工艺。优选地,所述第一导电层20A的所述上表面和所述第一绝缘部30A的所述上表面位于同一平面,所述第 二结合层230被平铺于所述第一导电层20A的至少部分所述上表面和所述第一绝缘部30A的至少部分所述上表面。然后在所述第二结合层230的一上表面形成一第二线路层10B,其中至少部分所述第二线路层10B被重叠于所述第一导电层20A,其中重叠部分所述第二线路层10B被可导通地连接于所述第一导电层20A,来自于所述第二线路层10B热量能够依次通过所述第一导电层20A和所述第一线路层10A被散失至外界。
在所述第二结合层230可以通过压膜、曝光、显影、电镀的方式形成所述第二线路层10B。所述第一线路层10A和所述第二线路层10B形成的方式可以相同,也可以不同。
形成所述第二线路层10B的步骤可以是:
形成一第三干膜340于所述第二结合层230的所述上表面;
通过一第三掩膜对于部分所述第三干膜340进行曝光;
去除被曝光的所述第三干膜340以在未曝光的所述第三干膜340之间形成一第三成型通道300;以及
在所述第三成型通道300内形成所述第二线路层10B。
可以理解的是,所述第三干膜340可以被实施为一光刻胶,然后通过所述第三掩膜对于所述光刻胶的部分区域进行曝光,再显影去除被曝光的所述第三干膜340以在未曝光的所述第三干膜340部分之间形成所述第三成型通道300,然后通过电镀工艺在所述第三成型通道300内形成所述第二线路层10B。在本示例中,所述第二线路层10B的材质是铜。可以理解的是,上述的形成所述第二线路层10B的方式并不对本发明造成限制。所述第二线路层10B的形成方式还可以是化学镀,热喷涂,堆焊,化学气相沉积等方式。
所述第三成型通道300对应于所述第三成型位置。
可以理解的是,所述第二线路层10B可以被灵活设计,然后通过控制所述第三干膜340的曝光区域来控制所述第二线路层10B的结构和形状。因为被曝光的所述第三干膜340为所述第二线路层10B提供了成型的空间。本领域人员可以理解的是,所述第三干膜340和所述第二线路层10B并不限制于上述的材料。
也就是说,所述第一所述制造方法还包括如下步骤,其中所述步骤位于所述步骤(c)之后。
在至少部分所述第一导电层20A的所述上表面和至少部分所述第一绝缘部 30A的所述上表面形成一第二结合层230;和
在所述第二结合层230的一上表面形成所述第二线路层10B,其中至少部分所述第二线路层10B被可导通地重叠于所述第一导电层20A。
进一步,在上述方法中,至少部分所述第二线路层10B的所述上表面被露出,使得在后续工艺中获得的所述电路板组件1可以通过所述第二线路层10B的所述上表面传导热量至所述第一导电层20A。
参考附图2I、附图2J、附图2K以及附图2L,根据本发明的一些实施例,其中在上述方法中,进一步包括如下步骤:
在至少部分所述第二线路层10B的所述上表面形成一第二导电层20B;和
在所述第二导电层20B和所述第二线路层10B一体成型一第二绝缘部30B,其中所述第二导电层20B在高度方向贯通所述第二绝缘部30B。
可以理解的是,所述第二导电层20B在高度方向贯通于所述第二绝缘部30B,是指至少部分所述第二导电层20B的一上表面被露出,当一电子元件被贴装于所述第二导电层20B的所述上表面,所述电子元件工作时产生的热量能够自所述第二导电层20B的所述上表面传递至所述第二导电层20B的所述下表面,然后到达所述第二线路层10B的所述上表面的过程中。也就是说,所述第二绝缘部30B没有对于这一过程造成阻碍。
根据本发明的一些实施例,其中在上述方法中,进一步包括如下步骤:
在所述第二线路层10B和所述第二导电层20B一体成型所述第二绝缘部30B,其中所述第二绝缘部30B覆盖所述第二导电层20B的所述上表面;和
降低所述第二绝缘部30B的所述高度至所述第二导电层20B的所述上表面露出。
根据本发明的一些实施例,其中在上述方法中,进一步包括如下步骤:
在所述第二线路层10B和所述第二导电层20B一体成型所述第二绝缘部30B,其中所述第二绝缘部30B的一上表面和所述第二导电层20B的所述上表面位于同一平面。
形成所述第二导电层20B的方式可以和形成所述第一导电层20A的方式一致,也可以和形成所述第一导电层20A的方式不一致。
根据本发明的一些实施例,其中在上述制造方法中,进一步包括如下步骤:
在未曝光的所述第三干膜340的所述上表面和所述第二线路层10B的所述上 表面设置一第四干膜440;
通过一所述第四掩膜以对至少部分所述第四干膜440进行曝光;
去除被曝光的所述第四干膜440以在未曝光的所述第四干膜440之间形成一第四成型通道400;以及
在所述第四成型通道400之间形成重叠于至少部分所述第二线路层10B的所述第二导电层20B。形成所述第二导电层20B的工艺可以是首先未曝光的所述第三干膜340的所述上表面和所述第二线路层10B的所述上表面设置所述第四干膜440,通过一第四掩膜对于至少部分所述第四干膜440进行曝光,然后去除被曝光的所述第四干膜440以在未曝光的所述第四干膜440之间形成一第四成型通道400,然后在所述第四成型通道400内形成所述第二导电层20B。所述第二导电层20B重叠于至少部分所述第二线路层10B以使所述第二导电层20B和至少部分所述第二线路层10B能够相互导通。
所述第四成型通道400对应于所述第四成型位置。
所述第二导电层20B的形状和结构被所述第四成型通道400所限制,也就是说,可以通过控制在曝光过程中所述第四干膜440的曝光区域来控制所述第四成型通道400。
所述第二导电层20B可以以电镀或/和溅镀的方式形成于所述第四成型通道400。所述二导电层20的材料可以是铜金属材料。当然,本领域技术人员可以理解的是,所述第二导电层20B的制作材料和制作方式并不限制上述的制作材料和制作方式。
所述第四干膜440可以被实施为一光刻胶,然后通过所述第四掩膜对于所述光刻胶的部分区域进行曝光,再显影去除被曝光的所述第四干膜440以在未曝光的所述第四干膜440部分之间形成所述第四成型通道400,然后通过电镀工艺在所述第四成型通道400内形成所述第二导电层20B。所述第二导电层20B的形成方式还可以是化学镀,热喷涂,堆焊,化学气相沉积等方式。
优选地,所述第三干膜340的所述上表面和所述第二线路层10B的所述上表面位于同一平面。当然,可以理解的是,所述第二线路层10B的所述上表面可以和所述第三干膜340的所述上表面不在同一平面,比如说所述第三干膜340的所述上表面等于所述第二线路层10B的所述上表面。在形成所述第二导电层20B的过程中,可以根据需求控制所述第二导电层20B的高度。
在形成所述第二导电层20B之后,还可以包括一步骤:去除剩余的所述干膜,然后在所述第二导电层20B和所述第二线路层10B形成所述第二绝缘部30B。所述干膜包括剩余的第三干膜340和剩余的所述第四干膜440。
在本发明的一些实施例,在去除剩余的所述第三干膜340和剩余所述第四干膜440后,部分所述第二结合层230被露出,部分所述第二结合层230重叠于所述第二线路层10B,在所述第二导电层20B和所述第二线路层10B一体成型所述第二绝缘部30B之前去除被露出的所述第二结合层230,使得所述第二绝缘部30B的所述下表面连接于所述第一绝缘部30A的所述上表面。也就说,所述第二绝缘部30B不仅可以一体成型于所述第二线路层10B和所述第二导电层20B,还可以一体成型于因为所述第二结合层230被去除后而露出的所述第一绝缘部30A的至少部分所述上表面,以有利于所述电路板组件1的各层之间的结合强度。
参考附图2M,根据本发明的一些实施例,其中在上述方法中,进一步包括如下步骤:
在所述第二导电层20B的所述上表面和所述第二绝缘部30B的所述上表面设置一第三结合层330;和
形成一第三线路层10C于至少部分所述第三结合层330的所述上表面。
可以理解的是,所述第三结合层330可以是一铜层,起到一种子层的作用。至少部分所述第三线路层10C重叠于所述第二导电层20B。具体地说,当一所述电子元件被放置于至少部分所述第三线路层10C的一上表面,所述电子元件产生的热量能够通过所述第三线路层10C达到对应的所述第三结合层330,然后到达所述第二导电层20B。可以理解的是,在本发明的一些示例中,所述第三线路层10C与所述第一线路层10A以及所述第二线路层10B相互独立。也就是说,所述第三线路层10C的形状和设计并不限制于所述第一线路层10A或所述第二线路层10B的形状和设计。
进一步地,参考附图2N,在上述方法中,进一步包括如下步骤:
设置一第五干膜540于所述第三结合层330的所述上表面;
通过一第五掩膜对于所述至少部分所述第五干膜540进行曝光;
去除被曝光的所述第五掩膜以形成一第五成型通道500;以及
在所述第五成型通道500形成所述第三线路层10C。
在本发明的一些实施例中,可以理解的是,所述第五干膜540可以被实施为 一光刻胶,然后通过所述第五掩膜对于所述光刻胶的部分区域进行曝光,再显影去除被曝光的所述第五干膜540以在未曝光的所述第五干膜540部分之间形成所述第五成型通道500,然后通过电镀工艺在所述第五成型通道500内形成所述第三线路层10C。在本示例中,所述第三线路层10C的材质是铜。可以理解的是,上述的形成所述第三线路层10C的方式并不对本发明造成限制。所述第三线路层10C的形成方式还可以是化学镀,热喷涂,堆焊,化学气相沉积等方式。
所述第五成型通道500对应于所述第五成型位置。
可以理解的是,所述第三线路层10C可以被灵活设计,然后通过控制所述第三干膜340的曝光区域来控制所述第三线路层10C的结构和形状。因为被曝光的所述第五干膜540为所述第三线路层10C提供了成型的空间。本领域人员可以理解的是,所述第五干膜540和所述第三线路层10C并不限制于上述的材料。
参考附图2O、附图2P以及附图2Q,进一步地,在上述方法中,包括如下步骤:
在所述第三线路层10C的所述上表面形成一保护层550;
去除所述基板110;
去除所述隔离层120;
去除所述保护层550;以及
分别去除所述第一结合层130和所述第二结合层230。
通过这样的方式,能够得到完整的一所述电路板组件1。
根据本发明的一些实施例,去除所述基板110的方式可以是将所述基板110放入碱性溶液中蚀刻,去除所述隔离层120的方式也可以是蚀刻。在所述第三线路层10C的所述上表面形成一保护层550的方式可以是首先在所述第三线路层10C的所述上表面和所述第三结合层330的所述上表面设置一第六干膜,其中所述第六干膜完全重叠于所述第三线路层10C和所述第三结合层330的所述上表面,以在后续蚀刻去除所述基板110的过程中保护所述第三线路层10C。在去除所述隔离层120后,可以继续去除所述第一结合层130,然后在去除所述保护层550,然后再去除所述第三结合层330。也可以在去除所述隔离层120后,然后去除所述保护层550,然后分别去除外露的所述第一结合层130和所述第三结合层330。也可以是去除所述隔离层120,然后去除所述第三结合层330,然后去除所述保护层550,再去除所述第一结合层130。
在所述电路板组件1的所述第三线路层10C的所述上表面可以被放置有所述电子元件,当所述电子元件在工作时,热量能够从所述第三线路层10C传导至被重叠于至少部分所述第三线路层10C的所述第二导电层20B,然后被传导至被重叠于所述第二导电层20B的所述第二线路层10B,然后被传导至被重叠于所述第二线路层10B的所述第一导电层20A,然后被传导至被重叠于所述第一导电层20A的所述第一线路层10A,最后经过所述第一线路层10A的所述下表面朝外传导。也就说,所述电子元件产生的热量可以从所述散热部40的所述上表面被传导至所述散热部40的所述下表面,然后被传递至外界。
所述散热部40形成相互重叠所述第三线路层10C,所述第二导电层20B,所述第二线路层10B,所述第一导电层20A以及所述第一线路层10A。所述散热部40的所述上表面是所述第三线路层10C的所述上表面,所述散热部40的所述下表面是所述第一线路层10A的所述下表面。
可以理解的是,去除所述基板110和所述隔离层120的方式并不限制于上述的步骤。
根据本发明的一些示例,可以在所述第三线路层10C被形成后,不在所述第三线路层10C的所述上表面形成所述保护层550,直接去除所述基板110,然后去除所述隔离层120,然后分别去除被露出的所述第一结合层130和所述第三结合层330。根据本发明的一些实施例,可以在所述第三线路层10C被形成后,不在所述第三线路层10C的所述上表面形成所述保护层550,直接去除所述基板110,然后去除所述第一结合层130,然后去除所述隔离层120,然后去除所述第三结合层330。根据本发明的一些实施例,可以在所述线路层10被形成后,不在所述第三线路层10C的所述上表面形成所述保护层550,直接去除所述基板110,然后去除所述隔离层120,然后去除所述第三结合层330,然后去除所述第一结合层130。
进一步地,根据本发明一些实施例,所述制造方法还可以包括如下步骤:
在部分所述第三线路层10C的所述上表面和所述第二绝缘部30B露出的所述上表面形成一上阻焊层60A;和
在部分所述第一线路层10A的所述下表面和所述第一绝缘部30A的所述下表面形成一下阻焊层60B。
进一步地,根据本发明的一些实例,所述制造方法还可以包括如下步骤:
对于露出的所述第三线路层10C的所述上表面进行一表面处理;和
对于露出的所述第一线路层10A的所述下表面进下一表面处理。
本领域技术人员可以理解的是,在此举例的所述电路板组件1的层数并不对本发明造成限制,所述电路板组件1可以包括一线路层10,也可以包括二所述线路层10,所述第一线路层10A和所述第二线路层10B,也可以包括三或者更多的所述线路层10,比如说所述第一线路层10A,所述第二线路层10B,所述第三线路层10C或者是更多。
根据本发明的一些实施例,通过所述制造方法制造得到的所述电路板组件1的线宽A可以达到30μm-150μm,线距B可以达到30μm-150μm。
可以理解的是,通过这样的方式制造得到的所述电路板组件1,在形成各层比如说第一线路层10A和所述第一导电层20A的过程中,能够保证一定的加工精度。在传统的PCB电路板中,各层之间的层压对准精度较低,而在本发明中,位于不同层的所述第一导电层20A之间通过曝光显影形成一成型通道的方式直接形成所述第一导电层20A,可以根据预先设计的所述第一线路层10A和所述第一导电层20A将所述第一导电层20A重叠地形成于至少部分所述第一线路层10A,无需拼装和拼装中的对准。
进一步地,所述电路板组件1中各层的连接不需要借助于其他的连接件,像传统的PCB电路板中,需要形成过孔以方便各层之间的连通,而在本发明提供的所述电路板组件1中无需为过孔预留空间,以有利于整个所述电路板组件1尺寸的缩小。
进一步地,所述电路板组件1各层之间无需逐步装配,从而减少了所述电路板组件1之间的装配公差,对于所述电路板组件1每一层来说,通过成型通道的位置来控制每一层导电部分的形状,其本身的制作精度也较高,从而也有利于减少整个所述电路板组件1的装配公差。
可以理解的是,所述电路板组件1可以根据需求和大小被设计为不同的结构和布局,并且所述电路板组件1还可以被切割为各个小电路板组件1以满足不同的需求,或者说,通过这样的制作方式,可以单次形成多个所述电路板组件1。
根据本发明的另一方面,一电路板组件的制造方法包括如下步骤:
通过在所述基板110的所述上表面重叠所述第一线路层10A和在所述第一线路层10A的一上表面重叠所述第一导电层20A的方式形成至少二第一成型空 间,其中每一所述第一成型空间在高度方向贯通所述第一线路层10A和所述第一导电层20A;和
填充至少部分所述第一成型空间以形成所述第一绝缘层30A。
可以理解的是,所述电路板组件1还可以被应用于一结构光摄像模组。
参考附图3所示,是根据本发明的所述电路板组件1的另一实施方式。本实施例和上述实施例的不同之处在于在本实施例中,每个所述线路层10都被重叠于所述导电层20,所述绝缘层30相互连通,所述第一线路层10A,所述第二线路层10B和所述第三线路层10C都被重叠有所述第一导电层20A或者是所述第二导电层20B。所述第一线路层10A和所述第二线路层10B以及所述第三线路层10C可以被灵活设计,三者之间可以相互独立,至少部分所述第一线路层10A重叠于所述第一导电层20A,至少部分所述第二线路层10B重叠于所述第二导电层20B,至少部分所述第三线路层10C重叠于所述第二导电层20B以使所述电路板组件1存在上下贯通的一散热区域即可。
换句话说,通过上述的制造方法制造得到的所述电路板组件1,其所述第一线路层10A,所述第二线路层10B,所述第三线路层10C可以根据用户的需求被灵活地设计。
所述第一线路层10A,所述第二线路层10B以及所述第三线路层10C可以通过一光照蚀刻工艺形成,通过控制掩膜的位置和光照的区域来获得不同的结构的所述第一线路层10A,所述第二线路层10B以及所述第三线路层10C。值得一提的是,所述第一线路层10A,所述第二线路层10B以及所述第三线路层10C之间的结构可以被独立设计,通过所述第一导电层20A,所述第二导电层20B导通所述第一线路层10A和所述第二线路层10B,以及所述第二线路层10B和所述第三线路层10C即可,不需要像传统的PCB电路板中考虑到各层线路板的结构以预留导通空间。
进一步地,对于整个所述电路板组件1来说,通过被暴露在所述电路板组件1外的所述第一线路层10A或者是其他的线路层或者是导电层来进行导电。对于被支撑于所述电路板组件1的所述电子元件而言,所述电路板组件1提供的导通位置可以是多个,并且导通位置可以基于线路层和导电层的灵活设计从而也被设计的十分灵活。
进一步地,通过上述制造方法制造的所述电路板组件1,所述第一导电层20A 和所述第二导电层20B通过一电镀工艺形成,相对于蚀刻工艺而言,电镀工艺通过一加法式制造方式,减少了原材料的损耗,从而节约了成本。
参考附图4,是根据本发明的一TOF摄像模组1000的一较佳实施方式。
所述TOF摄像模组1000包括一泛光灯110和一接收单元120,其中所述泛光灯110用于产生一光线至一被拍摄对象,光线被所述被拍摄对象反射,所述接收单元120接收反射光线,并且根据发射光线和反射光线的信息获得所述被拍摄对象的深度信息。
所述接收单元120包括一镜头组件121和一感光电路122,其中所述镜头组件121用于接收光线,所述感光电路122接收光线并且基于光电转换原理将光信号转换至一电信号。
所述接收单元120包括一镜头组件121和一感光电路122,其中所述感光电路122包括一感光元件1221和一电路板1222,所述镜头组件121提供一光学通路供光线达到所述感光元件1221进行光电转换,所述感光元件1221被可导通地连接于所述电路板1222。
所述接收单元120的所述镜头组件121进一步包括一光学镜头1211和一基座1212,其中所述光学镜头1211借助所述基座1212被保持于所述感光元件1221的一感光路径。可以理解的是,所述基座1212被连接于所述电路板1222,在本示例中,所述基座1212被一体成型于所述电路板1222。
在本实施例中,所述电子元件被实施为一发光元件2,所述泛光灯110包括所述发光元件2和所述电路板组件1,其中所述发光元件2被支持于所述电路板组件1并且被可连通地连接于所述电路板组件1。所述电路板组件1提供一通光路径,所述发光元件2被通电后能够被激发以通过所述通光路径朝外发射光线。
所述发光元件2具有一正面和一背面,其中所述发光元件2的所述正面通过一导线被连通于所述电路板组件1的其他可连通区域,所述发光元件2的所述背面被直接支撑于所述电路板组件1并且被可导通地连接于所述电路板组件1的所述散热部。
所述泛光灯110进一步包括一支架3和一光学辅助元件4,其中所述支架3支撑所述光学辅助元件4于所述电路板并且所述光学辅助元件4被保持在所述发光元件2的一光学通路。所述光学辅助元件4用于改变或者是改善所述发光元件2发出的光线,比如说以折射,衍射,滤波的方式改变所述发光元件2发出的光 线。所述光学辅助元件4可以是一折射透镜或者是一衍射透镜。本领域技术人员可以理解的是,上述的举例并不对所述光学辅助元件4的类型造成限制。所述支架3具有一光窗31,所述发光元件2配合所述支架3和所述发光元件2形成所述光窗31,以使光线通过所述光窗31朝外射出。
所述泛光灯110进一步包括至少一电子元器件6,其中所述电子元器件6被可导通地连接于所述电路板组件1和所述发光元件2,。值得一提的是,在本示例中,至少部分所述电子元器件6被设置于所述接收单元120的所述电路板1222,以有利于缩小所述泛光灯110的尺寸。
进一步地,在本发明的一些示例中,所述发光元件2可以被实施为一垂直腔面发射器(VCSEL)。在通电后,所述垂直腔面发射器能够被激发从而发出激光。
值得一提的是,所述垂直腔面发射器需要维持在特定的温度范围内才能够正常工作,也就是说,所述电路板的散热性能对于所述垂直腔面发射器的工作状态非常重要。由于所述电路板组件1的所述散热部40提供一较大的散热面积,从而所述垂直腔面发射器能够被支撑于所述散热部40的一上表面而正常工作。
进一步地,所述垂直腔面发射器的一背面为一负极,一正面为一正极,当所诉垂直腔面发射器被分别连通于所述散热部40和所述电路板组件1其他的导电部位,所述散热部40为一负极,所述垂直腔面发射器产生的热量能够通过所述散热部40的所述上表面被直接传递至所述散热部40的所述下表面,然后被传递至外界。
根据本发明的另一方面,提供一散热方法,其包括如下步骤:
引导一电子元件产生的热量自所述电子元件的一下表面传递至一电路板组件1的一上表面;
沿所述电路板组件1高度方向直接热传导所述热量至所述电路板组件1的一下表面;以及
朝外散失热量。
根据本发明的一实施例,其中在上述方法中,热量自所述电路组件的一线路层10被传递至重叠于所述线路层10的一导电层20,然后被传递至重叠于所述导电层20的所述线路层10。
根据本发明的一实施例,其中在上述方法中,热量自所述电路板组件1的所述上表面被传递至一导电层20的一下表面,然后被传递至重叠于所述导电层20 的所述线路层10。
参考附图5所示,根据本发明的一电子设备3000的一较佳实施方式,其中所述电子设备3000包括所述TOF摄像模组1000和一电子设备本体2000,其中所述TOF摄像模组1000被设置于所述电子设备本体2000。
在本发明的另一些示例中,所述电子设备3000包括所述电子设备本体2000和一主线路板,其中所述主线路板被设置于所述电子设备本体2000并且被可导通地连接于所述电子设备本体2000。
所述电子设备3000进一步包括带有一柔性线路板的所述泛光灯110,其中所述泛光灯110能够被可导通地安装于所述电子设备的所述主线路板。
在本发明的另一些示例中,所述电子设备1000进一步包括一泛光灯110,其中所述泛光灯110被可导通地安装于所述电子设备1000的所述主线路板。具体地说,所述泛光灯110的所述电路板组件1能够被导通地连接于所述电子设备1000的所述主线路板。
可以理解的是,所述泛光灯110,所述接收单元120以及一摄像模组可以被同时安装于一电子设备本体2000,其中所述泛光灯110,所述接收单元120以及所述摄像模组可以通过一组装体形成一整体。
参考附图6A所示,根据本发明的另一方面,提供了带有一柔性线路板5A的一泛光灯110A,其中所述泛光灯110A能够被安装于一接收单元120A以组成一TOF摄像模组1000A。
所述泛光灯110A包括根据上述制造方法制造的所述电路板组件1A,一发光元件2A,一支架3A,一柔性线路板5A以及至少一电子元器件6A,其中所述支架3A形成一光窗31A,所述发光元件2A被可导通于所述电路板组件1A地支撑于所述电路板组件1A,所述柔性电路板5A被可导通地连接于所述电路板组件1A,所述电子元器件6A被可导通地连接于所述电路板组件1A和所述发光元件2A。所述泛光灯110A还可以包括一光学辅助元件4A,其中所述光学辅助元件4A被支撑于所述支架3A,所述发光元件2A发出的光线在所述光学辅助元件4A的作用下朝外射出。所述柔性线路板5A可以通过导电胶的方式被可导通地连接于所述电路板组件1A,也可以是通过卡槽的方式被可导通地连接于所述电路板组件1A。
所述接收单元120A包括一镜头组件121A和一感光电路122A,其中所述感 光电路122A包括一感光元件1221A和一电路板1222A,所述镜头组件121A提供一光学通路供光线达到所述感光元件1221A进行光电转换,所述感光元件1221A被可导通地连接于所述电路板1222A。
所述接收单元120A的所述镜头组件121A进一步包括一光学镜头1211A和一基座1212A,其中所述光学镜头1211A借助所述基座1212A被保持于所述感光元件1221A的一感光路径。可以理解的是,所述基座1212A被连接于所述电路板1222A,在本示例中,所述基座1212A被安装所述电路板1222A。
进一步地,所述泛光灯110A的至少部分所述电子元器件6A被设置于所述接收单元120A的所述电路板1222A,以有利于缩小所述泛光灯110A的尺寸。
带有所述柔性线路板5A的所述泛光灯110A能够通过所述柔性线路板5A被安装于所述接收单元120A,其中所述接收单元120A的所述电路板1222A被可导通地连接于所述柔性线路板4A。
参考附图6B所示,是根据本发明的另一方面,提供了一泛光灯110B,其中所述泛光灯110B能够被安装于带有一柔性线路板的一接收单元120B以组成一TOF摄像模组1000B。
所述泛光灯110B包括根据上述制造方法制造的所述电路板组件1B,一发光元件2B,一支架3B,一柔性线路板5B以及至少一电子元器件6B,其中所述支架3B形成一光窗31B,所述发光元件2B被可导通地连接于所述电路板组件1B并且被支撑于所述电路板组件1B,其中所述电子元器件6B被可导通地连接于所述电路板组件1B和所述发光元件2B。所述泛光灯110B还可以包括一光学辅助元件4B,其中所述光学辅助元件4B被支撑于所述支架3B,所述发光元件2B发出的光线在所述光学辅助元件4B的作用下朝外射出。
所述接收单元120B包括一镜头组件121B和一感光组件122B,其中所述感光组件122B进一步包括一感光元件1221B和一电路板1222B,其中所述镜头组件121B提供一光学通路以供光线到达所述感光元件1221B进行光电转换,其中所述感光元件1221B被可导通地连接于所述电路板1222B。所述柔性线路板5B被可导通地连接于所述电路板1222B。可以理解的是,所述柔性线路板5B可以通过一导电胶被连接于所述接收单元120B的所述电路板1222B,所述柔性线路板5B也可以通过卡槽连接于所述接收单元120B的所述电路板1222B。
所述镜头组件121B进一步包括一光学镜头1211B和一基座1212B,其中所 述基座1212B支撑于所述光学镜头1211B于所述电路板1222B,在本示例中,所述基座1212B还支撑所述泛光灯110B于所述电路板1222B。所述泛光灯110B的所述电子元器件6B被至少部分容纳于所述基座1212B,以有利于所述泛光灯110B的尺寸的缩小。
所述泛光灯110B通过被可导通地连接于所述接收单元120B的所述柔性线路板5B的方式被组装于所述接收单元从而形成所述TOF摄像模组1000B。
本领域的技术人员应理解,上述描述及附图中所示的本发明的实施例只作为举例而并不限制本发明。本发明的目的已经完整并有效地实现。本发明的功能及结构原理已在实施例中展示和说明,在没有背离所述原理下,本发明的实施方式可以有任何变形或修改。

Claims (49)

  1. 一电路板组件的制造方法,其特征在于,包括如下步骤:
    在一基板的一上表面形成一第一线路层;
    以在所述第一线路层上侧形成一第一导电层的方式形成可被导通的一散热部,其中所述第一导电层成型于多个第二成型通道,所述散热部形成于至少一所述第二成型通道,其中形成所述散热部的所述第二成型通道对应的所述第一导电层部分的横截面大于其他所述第二成型通道对应的所述第一导电层部分的横截面,其中所述散热部具有一第一表面和一第二表面,其中所述第一表面被暴露在外,用于支撑一电子元件,所述第二表面能够被暴露在外,用于散失热量;以及
    在所述第一线路层和所述第一导电层一体成型一第一绝缘部,其中至少所述第一导电层在高度方向贯通于所述第一绝缘部。
  2. 根据权利要求1所述的电路板组件的制造方法,其中所述散热部形成于至少部分所述第一导电层和至少部分所述第一线路层。
  3. 根据权利要求2所述的电路板组件的制造方法,其中至少部分所述第一导电层被重叠于至少部分所述第一线路层。
  4. 根据权利要求1至3任一所述的制造方法,其中在上述方法中,进一步包括一步骤:
    去除所述基板以暴露所述第一线路层的一下表面。
  5. 根据权利要求1至3任一所述的制造方法,其中在上述方法中,进一步包括如下步骤:
    形成一隔离层于所述基板的一上表面;
    形成一第一结合层于所述隔离层的一上表面;以及
    在所述第一结合层的一上表面形成所述第一线路层。
  6. 根据权利要求5所述的制造方法,其中在上述方法中,进一步包括如下步骤:
    设置一第一干膜于所述第一结合层的所述上表面;
    通过一第一掩膜对于部分所述第一干膜进行曝光;
    去除被曝光的所述第一干膜以在未曝光的所述第一干膜之间形成至少一第一成型通道;以及
    在所述第一成型通道内形成所述第一线路层。
  7. 根据权利要求6所述的制造方法,其中在上述方法中,进一步包括如下步骤:
    在所述第一干膜的所述上表面和所述第一线路层的所述上表面设置一所述第二干膜;
    通过一所述第二掩膜对于至少部分所述第二干膜进行曝光;
    去除被曝光的所述第二干膜以在未曝光的所述第二干膜之间形成所述第二成型通道;以及
    在所述第二成型通道之间形成所述第一导电层。
  8. 根据权利要求1至3任一所述的制造方法,其中在上述方法中,进一步包括如下步骤:
    在所述第一线路层和所述第一导电层一体成型所述第一绝缘部,其中所述第一绝缘部覆盖所述第一导电层的一上表面;和
    降低所述第一绝缘层的高度至所述第一导电层的所述上表面露出。
  9. 根据权利要求1至3任一所述的制造方法,进一步包括如下步骤:
    以在所述第一导电层上侧形成一第二线路层的方式形成所述散热部,其中所述散热部形成于至少部分所述第二线路层和至少部分所述第一导电层,其中所述第二线路层成型于多个第三成型通道,至少部分所述散热部形成于至少一所述第三成型通道,其中形成所述散热部的所述第三成型通道对应的所述第二线路层部分的横截面大于其他所述第三成型通道对应的所述第二线路层部分的横截面。
  10. 根据权利要求9所述的制造方法,其中所述散热部形成于至少部分所述第二线路层,至少部分所述第一导电层以及至少部分所述第一线路层。
  11. 根据权利要求10所述的制造方法,其中所述第一线路层,所述第一导电层以及所述第二线路层至少部分相互重叠。
  12. 根据权利要求9所述的制造方法,其中在上述方法中,进一步包括如下步骤:
    在至少部分所述第一导电层的所述上表面和至少部分所述第一绝缘部的所述上表面形成一第二结合层;和
    在所述第二结合层的一上表面形成所述第二线路层,其中所述第二线路层被至少部分可导通地连接于所述第一导电层。
  13. 根据权利要求9所述的制造方法,进一步包括如下步骤:
    以在所述第二线路层上侧成一第二导电层的方式形成所述散热部,其中所述第二导电层成型于多个第四成型通道,至少部分所述散热部形成于至少一所述第四成型通道,其中形成所述散热部的所述第四成型通道对应的所述第二导电层部分的横截面大于其他所述第四成型通道对应的所述第二导电层部分的横截面;和在所述第二线路层和所述第二导电层一体成型一第二绝缘部,其中至少部分所述第二导电层在高度方向贯通所述第二绝缘部。
  14. 根据权利要求13所述的制造方法,其中至少部分所述第一线路层,至少部分所述第一导电层,至少部分所述第二线路层以及至少部分所述第二导电层在高度方向相互重叠,所述散热部形成于相互重叠的所述第一线路层,所述第一导电层,第二线路层以及第二导电层部分。
  15. 根据权利要求13或14所述的制造方法,进一步包括如下步骤:
    以在所述第二导电层的一上表面形成至少部分一第三线路层的方式形成所述散热部,其中所述散热部形成于至少部分所述第二导电层和至少部分所述第三线路层,其中所述第三线路层成型于多个第五成型通道,至少部分所述散热部形成于至少一所述第五成型通道,其中形成所述散热部的所述第五成型通道对应的所述第三线路层部分的横截面大于其他所述第五成型通道对应的所述第三线路层部分的横截面。
  16. 根据权利要求15所述的制造方法,其中至少部分所述第一导电层,至少部分所述第二线路层,至少部分第二导电层以及至少部分所述第三线路层在高度方向相互重叠。
  17. 根据权利要求15所述的制造方法,进一步包括如下步骤:
    形成覆盖于所述第三线路层和所述第二绝缘层的一保护层;和
    在去除所述基板之后去除所述保护层。
  18. 一电路板组件,其特征在于,通过上述权利要求1至17任一所述的一制造方法制造而成。
  19. 根据权利要求18所述的电路板组件,其中所述电路板组件的一线宽A和一线距B分别满足下列条件:
    30μm≤A≤150μm;和30μm≤B≤150μm。
  20. 一TOF摄像模组,其特征在于,包括:
    一泛光灯,其中所述泛光灯用于发射一光线至一被拍摄对象;和
    一接收单元,其中所述接收单元用于接收被所述被拍摄对象反射的一反射光线,基于所述发射光线和所述反射光线的信息获得所述被拍摄对象的深度信息,其中所述泛光灯包括一发光元件和根据上述权利要求1至17任一所述的制造方法的一电路板组件,其中所述发光元件被可导通地连接于所述电路板组件的所述散热部。
  21. 一电子设备,其特征在于,包括:
    一电子设备本体和根据上述权利要求20所述的一摄像模组,其中所述摄像模组被设置于所述电子设备本体。
  22. 根据权利要求21所述的电子设备,其中所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
  23. 一泛光灯,其特征在于,包括:
    一发光元件;
    通过上述权利要求1至17任一所述的一制造方法制造而成的一电路板组件,以及
    一支架,其中所述支架形成一光窗,所述发光元件被可导通地连接于所述电路板组件,所述支架被连接于所述电路板组件。
  24. 一TOF摄像模组,其特征在于,包括:
    根据权利要求23所述的泛光灯;和
    带有一柔性线路板的一接收单元,其中所述接收单元包括一镜头组件,一感光元件,一电路板以及一柔性线路板,其中所述镜头组件为光线提供一光学通路以使光线达到所述感光元件进行光电转换,其中所述感光元件被可导通地连接于所述电路板,其中所述电路板被可导通地连接于所述柔性线路板,其中所述泛光灯被可导通地连接于所述柔性线路板。
  25. 一电子设备,其特征在于,包括:
    根据权利要求23所述的泛光灯;
    一电子设备本体;以及
    一主线路板,其中所述主线路板被设置于所述电子设备本体,其中在所述泛光灯被安装于所述主线路板,所述泛光灯的所述电路板组件被可导通地连接于所 述主线路板。
  26. 根据权利要求25所述的电子设备,其中所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
  27. 一泛光灯,其特征在于,包括:
    一发光元件;
    通过上述权利要求1至17任一所述的一制造方法制造而成的一电路板组件;
    一支架,其中所述支架形成一光窗,所述发光元件被可导通地连接于所述电路板组件,所述支架被连接于所述电路板组件;以及
    一柔性线路板,其中所述柔性线路板被可导通地连接于所述电路板组件。
  28. 一TOF摄像模组,其特征在于,包括:
    根据权利要求27所述的一泛光灯;和
    一接收单元,其中所述接收单元包括一镜头组件,一感光组件以及一电路板,其中所述镜头组件提供一光学通路以使光线达到所述感光元件进行光电转换,所述感光元件被可导通地连接于所述电路板,其中所述泛光灯的所述柔性线路板被可导通地连接于所述接收单元的所述电路板。
  29. 一电路板组件,其特征在于,包括一第一线路层,一第一导电层,一第一绝缘层,一可导通的散热部以及具有至少二第二成型位置,其中所述第一导电层形成于所述第一线路层上侧,所述第一绝缘层一体成型于所述第一线路层和所述第一导电层,其中所述第一导电层成型于所述第二成型位置,至少一所述第二成型位置形成至少部分所述散热部,其中形成所述散热部的所述第二成型位置对应的所述第一导电层部分的横截面大于其他所述第二成型位置对应的所述第一导电层部分的横截面,其中所述散热部具有一第一表面和一第二表面,其中所述第一表面被暴露在外,用于支撑一电子元件,所述第二表面能够被暴露在外,用于散失热量。
  30. 根据权利要求29所述的电路板组件,其中所述散热部形成于所述第一导电层和所述第一线路层。
  31. 根据权利要求29所述的电路板组件,其中所述电路板组件进一步包括一第二线路层和具有至少二第三成型位置,其中所述第二线路层形成于所述第一导电层上侧并且成型于所述第三成型位置,至少一所述第三成型位置形成至少部 分所述散热部,其中形成所述散热部的所述第三成型位置对应的所述第二线路层部分的横截面大于其他所述第三成型位置对应的所述第二线路层部分的横截面。
  32. 根据权利要求31所述的电路板组件,其中所述散热部形成于在高度方向重叠的所述第二线路层,所述第一导电层和所述第一线路层部分;或者是,所述散热部形成于在高度方向重叠的所述第二线路层和所述第一导电层部分。
  33. 根据权利要求31所述的电路板组件,其中所述电路板组件进一步包括一第二导电层和具有至少二第四成型位置,其中所述第二导电层形成于所述第二线路层上侧并且成型于所述第四成型位置,至少一所述第四成型位置形成至少部分所述散热部,其中形成所述散热部的所述第四成型位置对应的所述第二导电层部分的横截面大于其他所述第四成型位置对应的所述第二导电层部分的横截面。
  34. 根据权利要求33所述的电路板组件,其中所述散热部形成于在高度方向重叠的所述第一导电层,所述第二线路层以及所述第二导电层部分。
  35. 根据权利要求33所述的电路板组件,其中所述电路板组件进一步包括一第三线路层和具有至少二第五成型位置,其中所述第三线路层形成于所述第二导电层上侧并且成型于所述第五成型位置,至少一所述第五成型位置形成至少部分所述散热部,其中形成所述散热部的所述第五成型位置对应的所述第三线路层部分的横截面大于其他所述第五成型位置对应的所述第三线路层部分的横截面。
  36. 根据权利要求35所述的电路板组件,其中所述散热部形成于在高度方向重叠的所述第一导电层,所述第二线路层,所述第二导电层以及所述第三线路层部位。
  37. 根据权利要求29至36任一所述的电路板组件,其中所述电路板组件进一步具有至少二第一成型位置,其中所述第一线路层成型于所述第一成型位置,至少一所述第一成型位置形成至少部分所述散热部,其中形成所述散热部的所述第一成型位置对应的所述第一线路层部分的横截面大于其他所述第一成型位置对应的所述第一线路层部分的横截面。
  38. 根据权利要求29至36任一所述的电路板组件,其中所述电路板组件进一步包括一第二阻焊层,其中所述第二阻焊层覆盖于至少部分所述第二绝缘部。
  39. 根据权利要求38所述的电路板组件,其中所述电路板组件进一步包括一第一阻焊层,其中所述第一阻焊层覆盖于至少部分所述第一绝缘部。
  40. 根据权利要求29至36任一所述的电路板组件,其中所述电路板组件的 一线宽A和一线距B分别满足下列条件:
    30μm≤A≤150μm;和30μm≤B≤150μm。
  41. 一TOF摄像模组,其特征在于,包括:
    一泛光灯,其中所述泛光灯用于发射一光线至一被拍摄对象;和
    一接收单元,其中所述接收单元用于接收被所述被拍摄对象反射的一反射光线,基于所述发射光线和所述反射光线的信息获得所述被拍摄对象的深度信息,其中所述泛光灯包括一发光元件和根据上述权利要求28至39任一所述的一电路板组件,其中所述发光元件被可导通地连接于所述电路板组件的所述散热部。。
  42. 一电子设备,其特征在于,包括:
    一电子设备本体和根据权利要求41所述的一TOF摄像模组,其中所述TOF摄像模组被设置于所述电子设备本体。
  43. 根据权利要求42所述的电子设备,其中所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
  44. 一泛光灯,其特征在于,包括:
    一发光元件;
    根据权利要求29至40任一所述的一电路板组件,以及
    一支架,其中所述支架形成一光窗,所述发光元件被支撑于所述电路板组件的一第一导电部,所述支架被连接于所述电路板组件。
  45. 一TOF摄像模组,其特征在于,包括:
    根据权利要求43所述的一泛光灯;和
    带有一柔性线路板的一接收单元,其中所述接收单元包括一镜头组件,一感光元件,一电路板以及一柔性线路板,其中所述镜头组件为光线提供一光学通路以使光线达到所述感光元件进行光电转换,其中所述感光元件被可导通地连接于所述电路板,其中所述电路板被可导通地连接于所述柔性线路板,其中所述泛光灯被可导通地连接于所述柔性线路板。
  46. 一电子设备,其特征在于,包括:
    根据权利要求43所述的一泛光灯;
    一电子设备本体;以及
    一主线路板,其中所述主线路板被设置于所述电子设备本体,其中在所述泛 光灯被安装于所述主线路板,所述泛光灯的所述电路板组件的所述导电部被可导通地连接于所述主线路板。
  47. 根据权利要求45所述的电子设备,其中所述电子设备包括一摄像模组,一接收单元以及一组装体,其中通过所述组装体被组装成一整体的所述摄像模组,所述泛光灯以及所述摄像模组被共同安装于所述电子设备本体。
  48. 一泛光灯,其特征在于,包括:
    一发光元件;
    根据权利要求29至40任一所述的一电路板组件;
    一支架,其中所述支架形成一光窗,所述发光元件被支撑于所述电路板组件的一第一导电部,所述支架被连接于所述电路板组件;以及
    一柔性线路板,其中所述柔性线路板被可导通地连接于所述电路板组件的所述导电部。
  49. 一TOF摄像模组,其特征在于,包括:
    根据权利要求48所述的一泛光灯;和
    一接收单元,其中所述接收单元包括一镜头组件,一感光元件以及一电路板,其中所述镜头组件提供一光学通路以使光线达到所述感光元件进行光电转换,所述感光元件被可导通地连接于所述电路板,其中所述泛光灯的所述柔性线路板被可导通地连接于所述接收单元的所述电路板。
PCT/CN2019/097758 2018-08-27 2019-07-25 电路板组件及其制造方法和应用 WO2020042840A1 (zh)

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