WO2020026079A1 - 二次電池の異常検知システム - Google Patents

二次電池の異常検知システム Download PDF

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Publication number
WO2020026079A1
WO2020026079A1 PCT/IB2019/056305 IB2019056305W WO2020026079A1 WO 2020026079 A1 WO2020026079 A1 WO 2020026079A1 IB 2019056305 W IB2019056305 W IB 2019056305W WO 2020026079 A1 WO2020026079 A1 WO 2020026079A1
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WO
WIPO (PCT)
Prior art keywords
insulator
oxide
conductor
transistor
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2019/056305
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English (en)
French (fr)
Japanese (ja)
Inventor
池田隆之
田島亮太
岡本佑樹
山崎舜平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2020533885A priority Critical patent/JP7309717B2/ja
Priority to US17/263,170 priority patent/US11867503B2/en
Publication of WO2020026079A1 publication Critical patent/WO2020026079A1/ja
Anticipated expiration legal-status Critical
Priority to JP2023110661A priority patent/JP7661410B2/ja
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/05—Accumulators with non-aqueous electrolyte
    • H01M10/052—Li-accumulators
    • H01M10/0525—Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/08—Output circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
    • G01B7/16—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring the deformation in a solid, e.g. by resistance strain gauge
    • G01B7/18—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring the deformation in a solid, e.g. by resistance strain gauge using change in resistance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

Definitions

  • oxide semiconductors have recently attracted attention as semiconductors applicable to transistors.
  • a transistor including an oxide semiconductor also referred to as an oxide semiconductor transistor or an OS transistor
  • the off-state current of the transistor is extremely small and a high voltage (also referred to as a potential difference) can be applied between a source and a drain (withstand voltage). Is high) and can be provided by being stacked.
  • Non-Patent Documents 1 and 2 disclose a technique for manufacturing a transistor using an oxide semiconductor having a CAAC structure. Further, Non-Patent Documents 4 and 5 show that even an oxide semiconductor having lower crystallinity than the CAAC structure and the nc structure has minute crystals.
  • the memory 40 has a capacitor C11 and a transistor T11.
  • One of a source and a drain of the transistor T11 is electrically connected to the wiring DL, a gate of the transistor T11 is electrically connected to the wiring WL, and the other of the source and the drain of the transistor T11 is connected to a first terminal of the capacitor C11.
  • the terminal and the inverting input terminal of the comparator 50 are electrically connected.
  • the second terminal of the capacitor C11 is electrically connected to the wiring CAL.
  • the wiring CAL is a wiring to which a predetermined potential Vc is supplied.
  • the OS transistor is suitable for use as the transistor T11 because the OS transistor has extremely low off-state current.
  • the OS transistor can have an off-state current per 1 ⁇ m of channel width of 100 zA / ⁇ m or less, 10 zA / ⁇ m or less, 1 zA / ⁇ m or less, or 10 yA / ⁇ m or less.
  • the memory 40 can hold an analog potential for a long time.
  • transistor 300 illustrated in FIG. 5 is an example, and there is no limitation on the structure, and an appropriate transistor may be used depending on a circuit configuration and a driving method.
  • aluminum oxide has a high blocking effect on both oxygen and impurities such as hydrogen and moisture which cause a change in electric characteristics of a transistor, without passing through the film. Accordingly, the aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the manufacturing process of the transistor. Further, release of oxygen from an oxide included in the transistor 500 can be suppressed. Therefore, it is suitable for use as a protective film for the transistor 500.
  • FIG. 12A is a top view of the transistor
  • FIG. 12B is a perspective view of the transistor
  • 13A is a cross-sectional view taken along line X1-X2 in FIG. 12A
  • FIG. 13B is a cross-sectional view taken along line Y1-Y2 in FIG.
  • the oxide semiconductor has a carrier density of less than 8 ⁇ 10 11 / cm 3 , preferably less than 1 ⁇ 10 11 / cm 3 , more preferably less than 1 ⁇ 10 10 / cm 3 , and 1 ⁇ 10 ⁇ 9 / cm 3. cm 3 or more.
  • the charge trapped in the trap level of the oxide semiconductor takes a long time to be lost, and may behave as a fixed charge. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap state density may have unstable electric characteristics in some cases.
  • the touch pad 5403 functions as an input unit such as a pointing device or a pen tablet, and can be operated with a finger, a stylus, or the like.
  • a display element is incorporated in the touch pad 5403. By displaying input keys 5405 on the surface of the touch pad 5403 as illustrated in FIG. 14B, the touch pad 5403 can be used as a keyboard.
  • a vibration module may be incorporated in the touch pad 5403 in order to realize a tactile sensation by vibration when the input key 5405 is touched.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Secondary Cells (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Protection Of Static Devices (AREA)
PCT/IB2019/056305 2018-08-03 2019-07-24 二次電池の異常検知システム Ceased WO2020026079A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2020533885A JP7309717B2 (ja) 2018-08-03 2019-07-24 二次電池の異常検知システム
US17/263,170 US11867503B2 (en) 2018-08-03 2019-07-24 Anomaly detection system for secondary battery
JP2023110661A JP7661410B2 (ja) 2018-08-03 2023-07-05 異常検知システム

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-146472 2018-08-03
JP2018146472 2018-08-03

Publications (1)

Publication Number Publication Date
WO2020026079A1 true WO2020026079A1 (ja) 2020-02-06

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PCT/IB2019/056305 Ceased WO2020026079A1 (ja) 2018-08-03 2019-07-24 二次電池の異常検知システム

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US (1) US11867503B2 (enExample)
JP (2) JP7309717B2 (enExample)
WO (1) WO2020026079A1 (enExample)

Families Citing this family (5)

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Publication number Priority date Publication date Assignee Title
JP7330986B2 (ja) 2018-08-31 2023-08-22 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の動作方法
US12451714B2 (en) 2018-10-25 2025-10-21 Semiconductor Energy Laboratory Co., Ltd. Power storage device and method for operating power storage device
US12444779B2 (en) 2018-11-26 2025-10-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device sensor unit
CN113169546A (zh) 2018-12-19 2021-07-23 株式会社半导体能源研究所 二次电池的过放电防止电路及二次电池模块
JP7463298B2 (ja) 2019-01-24 2024-04-08 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の動作方法

Citations (5)

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JP2010011619A (ja) * 2008-06-26 2010-01-14 Panasonic Corp 電池の充電制御方法および充電制御装置
JP2016200539A (ja) * 2015-04-13 2016-12-01 株式会社古河テクノマテリアル センサ、リチウムイオン電池の異常検知方法
JP2017003370A (ja) * 2015-06-09 2017-01-05 オムロン株式会社 センサノード
US20170141360A1 (en) * 2014-03-19 2017-05-18 Commissariat A L'energie Atomique Et Aux Energies Alternatives Flexible structure with strain gauge, application to electrochemical lithium-ion batteries in a flexible packaging

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JP7134981B2 (ja) * 2017-09-14 2022-09-12 株式会社半導体エネルギー研究所 二次電池の異常検知システム及び二次電池の異常検出方法
JP7399857B2 (ja) * 2018-07-10 2023-12-18 株式会社半導体エネルギー研究所 二次電池の保護回路
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Publication number Priority date Publication date Assignee Title
JP2004251901A (ja) * 2003-02-06 2004-09-09 Ego Elektro Geraete Blanc & Fischer 誘導的に動作するセンサの回路配置と該回路配置の操作方法
JP2010011619A (ja) * 2008-06-26 2010-01-14 Panasonic Corp 電池の充電制御方法および充電制御装置
US20170141360A1 (en) * 2014-03-19 2017-05-18 Commissariat A L'energie Atomique Et Aux Energies Alternatives Flexible structure with strain gauge, application to electrochemical lithium-ion batteries in a flexible packaging
JP2016200539A (ja) * 2015-04-13 2016-12-01 株式会社古河テクノマテリアル センサ、リチウムイオン電池の異常検知方法
JP2017003370A (ja) * 2015-06-09 2017-01-05 オムロン株式会社 センサノード

Also Published As

Publication number Publication date
JP7309717B2 (ja) 2023-07-18
JP2023133301A (ja) 2023-09-22
JP7661410B2 (ja) 2025-04-14
US11867503B2 (en) 2024-01-09
JPWO2020026079A1 (enExample) 2020-02-06
US20210190471A1 (en) 2021-06-24

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