WO2020008838A1 - Appareil d'inspection d'embout de découpage en dés - Google Patents

Appareil d'inspection d'embout de découpage en dés Download PDF

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Publication number
WO2020008838A1
WO2020008838A1 PCT/JP2019/023572 JP2019023572W WO2020008838A1 WO 2020008838 A1 WO2020008838 A1 WO 2020008838A1 JP 2019023572 W JP2019023572 W JP 2019023572W WO 2020008838 A1 WO2020008838 A1 WO 2020008838A1
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Prior art keywords
inspection
imaging
unit
wafer
region
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PCT/JP2019/023572
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English (en)
Japanese (ja)
Inventor
英一 大▲美▼
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東レエンジニアリング株式会社
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Publication date
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Priority to CN201980036796.7A priority Critical patent/CN112204384A/zh
Publication of WO2020008838A1 publication Critical patent/WO2020008838A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects

Definitions

  • the present invention relates to a dicing chip inspection apparatus for inspecting a device region and a peripheral region of a device chip arranged on a wafer having scribe lines formed or diced.
  • a dicing apparatus is known as an apparatus for performing cutting and grooving (scribe) processing on a work such as a wafer on which a semiconductor device or an electronic component is formed (for example, Patent Documents 1 and 2).
  • Patent Document 3 a technique of imaging one device chip at a time on a wafer on which a scribe line is formed or diced, and inspecting an effective area (that is, a device area) and an edge (that is, a peripheral area) of the device chip ( That is, an inspection by an inspection device has been proposed (for example, Patent Document 3).
  • the moving speed of the wafer (that is, the cutting speed) is set to an extent that does not affect the inspection quality while increasing the imaging magnification. ).
  • both the device region of the device chip and the chip end that is, the peripheral region on which the dicing line (including the scribe line; the same applies hereinafter) are formed with a predetermined accuracy within a predetermined time.
  • the inspection time for one wafer becomes long.
  • the present invention has been made in view of the above-described problems, and it is possible to reliably detect defects such as cracks, chipping, and film peeling lurking in a dicing line of a wafer on which a scribe line is formed or diced, and to detect a defect of a device chip. It is an object of the present invention to provide a dicing chip inspection apparatus capable of reducing a time for inspecting a device region.
  • one embodiment of the present invention provides: In a dicing chip inspection device for inspecting a device region and a peripheral region of a device chip arranged on a diced wafer, A wafer holding unit for holding a wafer, An imaging unit that images a predetermined area set on the wafer at a predetermined imaging magnification; A relative moving unit that relatively moves the wafer and the imaging unit; An inspection recipe registration unit that registers the direction and speed of the relative movement in the relative movement unit, and the imaging magnification and the imaging position in the imaging unit as an inspection recipe, A control unit that controls the imaging unit and the relative movement unit based on the inspection recipe, The control unit is A peripheral area inspection mode for performing imaging along the dicing line so as to include a dicing line of a wafer diced at a predetermined imaging magnification and inspecting a peripheral area of a device chip; At a lower imaging magnification than the imaging magnification in the peripheral area inspection mode, imaging is performed so as to skip a dicing
  • an area (peripheral area) along the dicing line is imaged with a high-magnification visual field size in the peripheral area inspection mode, and defects such as cracks and chipping can be reliably detected.
  • the inspection time can be reduced by imaging the device region of the device chip with a relatively small magnification field of view.
  • FIG. 1 is a schematic diagram illustrating an overall configuration of an example of a mode that embodies the present invention.
  • FIG. 2 is a perspective view showing a main part of an example of a mode for embodying the present invention. It is a conceptual diagram in an example of the form which embodies the present invention. It is a conceptual diagram in an example of the form which embodies the present invention. It is a flow figure in an example of an embodiment which embodies the present invention.
  • X, Y, and Z three axes of the rectangular coordinate system are represented by X, Y, and Z, the horizontal direction is represented by the X direction and the Y direction, and the direction perpendicular to the XY plane (that is, the direction of gravity) is represented by the Z direction. I do.
  • the Z direction the direction against gravity is expressed as “up”, and the direction in which gravity acts is expressed as “down”.
  • the direction in which the Z direction rotates about the center axis is defined as the ⁇ direction.
  • FIG. 1 is a schematic diagram showing the entire configuration of an example of an embodiment embodying the present invention.
  • FIG. 1 shows a schematic diagram of a dicing chip inspection apparatus 1 according to the present invention.
  • the dicing chip inspection apparatus 1 inspects the device region Rc and the peripheral region Re of the device chip C arranged on the diced wafer W.
  • the device region Rc is a region where the main circuit of the device chip C is patterned.
  • the peripheral region Re is a region arranged around (outside) the device region Rc of the device chip C, and is a region set to allow a positional shift of the dicing line DL (a blank region). , And cut off).
  • the peripheral region Re of the device chip C is adjacent to the dicing line DL.
  • the dicing line DL is a processing groove formed when the wafer W is scribed or cut, and is actually a space between the ridge lines of the processed wafer W.
  • the dicing line DL including the edge line of the processed wafer W is referred to as a dicing line DL.
  • the dicing chip inspection device 1 includes a wafer holding unit 2, an imaging unit 3, a relative movement unit 4, an inspection recipe registration unit 5, a control unit 9, a computer CN, and the like.
  • the wafer holding unit 2 holds the wafer W.
  • the lower surface of the diced wafer W is held by using a wafer ring R (also called a flat ring or a dicing ring) and an expanded sheet (not shown).
  • the wafer holding unit 2 is configured to maintain a horizontal state while supporting the wafer W from below by way of a wafer ring R or the like.
  • the wafer holding unit 2 includes a wafer mounting table 20 having a horizontal upper surface.
  • the wafer mounting table 20 is provided with a groove or a hole at a portion that comes into contact with a wafer ring or the like holding the wafer W. These grooves and holes are connected to a negative pressure of a vacuum pump or the like via a switching valve or the like. It is connected to the generating means.
  • the wafer holding section 2 can hold or release the wafer ring or the like by switching these grooves and holes to a negative pressure state or an atmosphere release state.
  • the imaging unit 3 captures an image of a predetermined area set on the wafer W at a predetermined imaging magnification. Specifically, the imaging unit 3 captures an image of the device region Rc and the peripheral region Re to be inspected. are doing. More specifically, the imaging unit 3 includes a lens barrel 30, an illumination unit 31, a half mirror 32, a plurality of objective lenses 33a and 33b, a revolver mechanism 34, an imaging camera 35, and the like.
  • the lens barrel 30 fixes the illumination unit 31, the half mirror 32, the objective lenses 33a and 33b, the revolver mechanism 34, the imaging camera 35, and the like in a predetermined posture, and guides illumination light and observation light.
  • the lens barrel 30 is attached to the apparatus frame 1f via a connection fitting or the like (not shown).
  • the illumination unit 31 emits illumination light L1 necessary for imaging.
  • the illumination unit 31 can be exemplified by a laser diode, a metal halide lamp, a xenon lamp, an LED illumination, and the like.
  • the half mirror 32 reflects the illumination light L1 emitted from the illumination unit 31 and irradiates it to the wafer W side, and passes the light (reflected light, scattered light) L2 incident from the wafer W side to the imaging camera 35 side. It is.
  • the objective lenses 33a and 33b form images of the imaging area on the workpiece W on the imaging camera 35 at different predetermined observation magnifications.
  • the revolver mechanism 34 switches which of the objective lenses 33a and 33b is used. Specifically, the revolver mechanism 34 rotates and stops at predetermined angles at a time based on manual or external signal control.
  • the imaging camera 35 captures an image of the imaging area F on the work W and obtains an image.
  • the acquired image is output to the outside (in the present invention, a chip position calculation unit described in detail later) as a video signal or video data.
  • the relative moving section 4 moves the wafer holding section 2 and the imaging section 3 relatively.
  • the relative moving section 4 includes an X-axis slider 41, a Y-axis slider 42, and a rotation mechanism 43.
  • the X-axis slider 41 is mounted on the apparatus frame 1f, and moves the Y-axis slider 42 at an arbitrary speed in the X direction and stops at an arbitrary position.
  • the X-axis slider includes a pair of rails extending in the X direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit.
  • the slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like.
  • the X-axis slider 41 is provided with an encoder for detecting a current position and a moving amount of the slider unit.
  • the encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
  • the Y-axis slider 42 moves the rotating mechanism 43 in the Y direction at an arbitrary speed and stops at an arbitrary position based on a control signal output from the control unit CN.
  • the Y-axis slider includes a pair of rails extending in the Y direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit.
  • the slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like.
  • the Y-axis slider 42 is provided with an encoder for detecting the current position and the moving amount of the slider section.
  • the encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
  • the rotation mechanism 43 rotates the wafer mounting table 20 at an arbitrary speed in the ⁇ direction and stops at an arbitrary angle. Specifically, as the rotation mechanism 43, a mechanism that rotates / stops at an arbitrary angle by signal control from an external device such as a direct drive motor can be exemplified.
  • the wafer mounting table 20 of the wafer holding unit 2 is mounted on the member on the rotating side of the rotation mechanism 43.
  • the relative movement unit 4 Since the relative movement unit 4 has such a configuration, the wafer W is independently or combined in the XY ⁇ direction with respect to the imaging unit 3 in a predetermined manner while holding the wafer W to be inspected. It can be relatively moved at a speed or angle, or can be stopped at any position and angle.
  • FIG. 2 is a perspective view showing a main part of an example of an embodiment embodying the present invention.
  • FIG. 2 shows a state in which the wafer W and the imaging unit 3 are relatively moved along the dicing line DL, and the peripheral area Re of the device chip C is sequentially imaged while moving the imaging area F in the direction indicated by the arrow Vs. ing.
  • the inspection recipe registration unit 5 registers, as an inspection recipe, the direction and speed of the relative movement in the relative moving unit 4, the imaging magnification and the imaging position in the imaging unit 3, and the like.
  • the inspection recipe registration unit 5 can register an inspection recipe relating to a device area inspection mode and a peripheral area inspection mode, which will be described in detail later. An inspection recipe for executing both or at least one of these modes is registered. ing. Specifically, the inspection recipe registration unit 5 captures an image of a place on the wafer W at any imaging magnification in any order (that is, the imaging route T) in each of the device area inspection mode and the peripheral area inspection mode.
  • information also referred to as recipe information
  • information on the moving speed and the imaging interval and the moving pitch and the feed speed at that time can be registered as an inspection recipe for each inspection type.
  • the control unit 9 has, for example, the following functions and roles. -Outputs a signal for holding / releasing the wafer W to the wafer holding unit 2-Controls the revolver mechanism 34 to switch the objective lens (imaging magnification) to be used-Outputs an imaging trigger to the imaging camera 35
  • Driving control of the relative moving unit 4 a function of outputting a driving signal while monitoring the current positions of the X-axis slider 41, the Y-axis slider 42, and the rotating mechanism 43.
  • control unit 9 includes a computer CN, a programmable logic controller and the like (that is, hardware), and an execution program and the like (that is, software).
  • the inspection recipe registration unit 5 is configured by a part of a storage unit (register, memory, HDD, SSD, etc.) of the computer CN.
  • control unit 9 controls the imaging unit 3 and the relative moving unit 4 based on the inspection recipe, and sets a peripheral area inspection mode and an operation mode called a device area inspection mode (for example, a setting screen or the like). ) And execution means (computer CN and control equipment, etc.).
  • FIG. 3 is a conceptual diagram showing an example of an embodiment of the present invention.
  • FIG. 3 illustrates an imaging route T and an imaging region F in the peripheral region inspection mode.
  • an image is taken along the dicing line DL so as to include the dicing line DL of the wafer W diced at a predetermined imaging magnification (relatively high magnification), and the peripheral area of the device chip C is taken.
  • This is an operation mode for checking Re.
  • imaging is performed along an imaging route T that relatively moves the imaging region F along a dicing line DL extending in the X direction.
  • FIG. 3 (b) while performing imaging along the imaging route T that relatively moves the imaging region F along the dicing line DL extending in the Y direction, cracks that lie in the dicing line DL over the entire surface of the wafer W.
  • the inspection of the peripheral region Re is performed at a predetermined imaging magnification (relatively high magnification) enough to reliably detect a defect such as chipping.
  • an edge extraction process is performed to detect a chip end portion (that is, a ridge line) of the device chip C, and a part of the ridge line does not enter a preset intrusion prohibition area. It is checked whether cracks, chippings, etc. extending from the ridge line have entered the intrusion prohibited area.
  • the imaging magnification and the imaging region F, the peripheral region Re of a plurality of device chips arranged adjacent to each other are simultaneously imaged in a positional relationship straddling the dicing line DL.
  • the imaging route T and the like are set in the inspection recipe registration unit 5.
  • FIG. 4 is a conceptual diagram showing an example of an embodiment of the present invention.
  • FIG. 4 illustrates an imaging route T and an imaging region F in the device area inspection mode.
  • imaging is performed at an imaging route T that relatively moves the imaging region F so as to skip the dicing line DL of the diced wafer W at an imaging magnification lower than the imaging magnification in the peripheral region inspection mode,
  • This is an operation mode for inspecting the device region Rc of the device chip C over the entire surface of the wafer W.
  • a predetermined magnification eg, a predetermined magnification (eg, a predetermined magnification factor) is used to determine whether a foreign object or a scratch is present on the device region Rc, whether a clear pattern collapse, a film formation failure, or the like has occurred.
  • the imaging / inspection of the device region Rc is performed at a relatively low magnification.
  • an image (a so-called teaching image) in which no foreign matter, scratch, pattern collapse, film formation failure, or the like has occurred in the device region Rc is registered in advance.
  • the image is inspected for foreign matter, scratches, pattern collapse, film formation failure, and the like.
  • the imaging magnification, the imaging region F, the imaging route T, and the like are set such that the predetermined region imaged in the device region inspection mode skips the predetermined region imaged in the peripheral region inspection mode. This is set in the inspection recipe registration unit 5.
  • FIG. 5 is a flowchart showing an example of an embodiment embodying the present invention.
  • FIG. 5 shows a configuration for imaging and inspecting the device region Rc and the peripheral region Re of the device chip C arranged on the wafer W using the dicing chip inspection device 1 as a series of flows for each step. .
  • an inspection recipe is set (step s11), and an inspection mode and an order of the wafer W are determined.
  • the wafer W is mounted on the wafer mounting table 20 of the dicing chip inspection apparatus 1 (step s12), and is moved to a reading position of a reference mark (not shown) formed on the wafer W to perform alignment ( Step s13).
  • the mode is switched to the peripheral area inspection mode based on the inspection recipe (step s21), and the revolver mechanism 34 is rotated so that a high-magnification lens is selected (step s22). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s23). It is determined whether or not all imaging in this mode has been completed (step 24), and if not completed, imaging and inspection are continued. If the imaging has been completed, it is determined whether to execute another inspection mode (step s25).
  • step s31 If another inspection mode (that is, a device area inspection mode) is to be executed, the mode is switched to the device area inspection mode (step s31), and the revolver mechanism 34 is rotated so that a low-magnification lens is selected (step s31). s32). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s33). It is determined whether or not all imaging in this mode has been completed (step 34), and if not completed, imaging and inspection are continued. If the imaging has been completed, the wafer W is paid out of the apparatus (step s41). It should be noted that the wafer W is paid out of the apparatus even when another inspection mode is not executed in step 25 (step s41).
  • these inspection modes indicate a series of operation flows and states, and are not limited to those registered in a state specified in the inspection recipe, and different imaging magnifications and imaging routes T are registered without being specified. Includes cases where
  • the output of the imaging trigger from the control unit 9 to the imaging unit 3 can be exemplified by the following method.
  • a relative position and a stationary state are set at a predetermined position, and the illumination light L1 is irradiated in a stationary state to capture an image (so-called step & repeat).
  • the imaging trigger means an image capturing instruction to the imaging camera 35 or an image processing device (not shown), an emission instruction of the illumination light L1, and the like.
  • an imaging trigger (case 1) the illumination light L1 is strobed during the time during which the imaging camera 35 can capture an image (so-called exposure time), or (case 2) the illumination light L1 is irradiated. Within a certain period of time.
  • the imaging trigger is not limited to the instruction to the imaging camera 35, and (case 3) may be an image capturing instruction to an image processing apparatus that acquires an image. By doing so, it is possible to cope with a mode in which video signals and video data are sequentially output from the imaging camera 35.
  • the dicing chip inspection device 1 Since the dicing chip inspection device 1 according to the present invention has such a configuration, in the peripheral region inspection mode, an area along the dicing line (that is, the peripheral region Re) is imaged with a high magnification field size, Defects such as cracks and chippings can be reliably detected (ie, inspected). On the other hand, in the device area inspection mode, the inspection time can be shortened by imaging the device area Rc of the device chip C with a relatively small magnification field of view. That is, the dicing chip inspection device 1 can inspect both the device region Rc and the peripheral region Re with a predetermined accuracy within a predetermined time.
  • the imaging magnification, the imaging region F, the imaging route T, and the like are set so that the peripheral regions Rc of the plurality of device chips C arranged adjacent to each other are simultaneously imaged in a positional relationship that straddles the dicing line DL.
  • the configuration set in the inspection recipe registration unit 5 has been exemplified.
  • Such a configuration is preferable because the number of times of imaging can be reduced, and the inspection time per wafer W can be reduced.
  • the dicing line DL when the width of the dicing line DL is large with respect to the imaging region F, the ridge line of the peripheral region Re is likely to be out of the field of view, or cracks or chips to be detected are small, and if the imaging magnification is increased, the dicing line DL may be straddled. If the images cannot be captured simultaneously due to the positional relationship, the peripheral region Rc of one device chip C may be captured.

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  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Dicing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

Grâce à la présente invention, le temps d'inspection pour une puce de dispositif est réduit par détection fiable des défauts tels que des fissures ou un écaillage dans une ligne de découpage en dés d'une tranche découpée en dés. En particulier, un appareil d'inspection d'une région de dispositif et d'une région périphérique d'une puce de dispositif disposée sur une tranche découpée en dés est pourvu d'une unité de maintien de tranche, d'une unité de capture d'image, d'une unité de mouvement relatif, d'une unité d'enregistrement de formule d'inspection et d'une unité de commande. L'unité de commande présente un mode d'inspection de région périphérique et une région d'inspection de région de dispositif. Dans le mode d'inspection de région périphérique, des images sont capturées suivant un grossissement prédéfini d'imagerie le long d'une ligne de découpage en dés de la tranche découpée en dés, pour comprendre la ligne de découpage en dés, et la région périphérique de la puce de dispositif est inspectée. Dans le mode d'inspection de région de dispositif, des images sont capturées suivant un grossissement d'imagerie inférieur à celui du mode d'inspection de région périphérique, de façon à sauter la ligne de découpage en dés, et la région de dispositif est inspectée. Une formule d'inspection permettant d'exécuter le mode d'inspection de région de dispositif et/ou le mode d'inspection de région périphérique est enregistrée dans l'unité d'enregistrement de formule d'inspection.
PCT/JP2019/023572 2018-07-06 2019-06-13 Appareil d'inspection d'embout de découpage en dés WO2020008838A1 (fr)

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Application Number Priority Date Filing Date Title
CN201980036796.7A CN112204384A (zh) 2018-07-06 2019-06-13 切割芯片检查装置

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JP2018128666A JP7007993B2 (ja) 2018-07-06 2018-07-06 ダイシングチップ検査装置
JP2018-128666 2018-07-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220308549A1 (en) * 2021-03-25 2022-09-29 Disco Corporation Processing apparatus
US11462439B2 (en) * 2019-10-10 2022-10-04 Disco Corporation Wafer processing method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022061127A (ja) * 2020-10-06 2022-04-18 東レエンジニアリング株式会社 外観検査装置および方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57167651A (en) * 1981-04-07 1982-10-15 Mitsubishi Electric Corp Inspecting device for surface of semiconductor wafer
JPH03144568A (ja) * 1989-10-31 1991-06-19 Fujitsu Ltd レチクル検査装置
JP2004177377A (ja) * 2002-11-29 2004-06-24 Hitachi Ltd 検査方法および検査装置
JP2008139202A (ja) * 2006-12-04 2008-06-19 Tokyo Electron Ltd 欠陥検出装置、欠陥検出方法、情報処理装置、情報処理方法及びそのプログラム
JP2009162718A (ja) * 2008-01-10 2009-07-23 Olympus Corp 基板検査装置および検査領域設定方法
US20130082257A1 (en) * 2011-10-03 2013-04-04 St Microelectronics, Inc. Via chains for defect localization
JP2017111147A (ja) * 2015-12-18 2017-06-22 ウルトラテック インク 選択可能な画素密度を有する全ウエハ検査方法
JP2017161236A (ja) * 2016-03-07 2017-09-14 東レエンジニアリング株式会社 欠陥検査装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3144568B2 (ja) 1991-09-25 2001-03-12 マツダ株式会社 車両用騒音制御装置
JPH0755711A (ja) * 1993-08-12 1995-03-03 Sumitomo Electric Ind Ltd 半導体デバイスの検査装置
JP3349339B2 (ja) * 1996-04-24 2002-11-25 シャープ株式会社 外観検査機能を備えたダイシング装置
US6324298B1 (en) * 1998-07-15 2001-11-27 August Technology Corp. Automated wafer defect inspection system and a process of performing such inspection
JP5187505B2 (ja) * 2008-04-07 2013-04-24 株式会社東京精密 ダイシング方法
JP5544894B2 (ja) * 2010-01-21 2014-07-09 カシオ計算機株式会社 ウエハ検査装置及びウエハ検査方法
CN102053093A (zh) * 2010-11-08 2011-05-11 北京大学深圳研究生院 一种晶圆表面切割芯片的表面缺陷检测方法
JP5978162B2 (ja) * 2013-03-29 2016-08-24 株式会社日立ハイテクノロジーズ 欠陥検査方法および欠陥検査装置
JP6617050B2 (ja) * 2016-02-22 2019-12-04 東京エレクトロン株式会社 基板撮像装置
WO2017203600A1 (fr) * 2016-05-24 2017-11-30 株式会社日立ハイテクノロジーズ Dispositif de classification de défaut et procédé de classification de défaut
JP2018054429A (ja) * 2016-09-28 2018-04-05 株式会社Ｓｃｒｅｅｎホールディングス 検出方法および検出装置
CN206557129U (zh) * 2016-11-17 2017-10-13 哈尔滨理工大学 一种镜片瑕疵检测系统

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57167651A (en) * 1981-04-07 1982-10-15 Mitsubishi Electric Corp Inspecting device for surface of semiconductor wafer
JPH03144568A (ja) * 1989-10-31 1991-06-19 Fujitsu Ltd レチクル検査装置
JP2004177377A (ja) * 2002-11-29 2004-06-24 Hitachi Ltd 検査方法および検査装置
JP2008139202A (ja) * 2006-12-04 2008-06-19 Tokyo Electron Ltd 欠陥検出装置、欠陥検出方法、情報処理装置、情報処理方法及びそのプログラム
JP2009162718A (ja) * 2008-01-10 2009-07-23 Olympus Corp 基板検査装置および検査領域設定方法
US20130082257A1 (en) * 2011-10-03 2013-04-04 St Microelectronics, Inc. Via chains for defect localization
JP2017111147A (ja) * 2015-12-18 2017-06-22 ウルトラテック インク 選択可能な画素密度を有する全ウエハ検査方法
JP2017161236A (ja) * 2016-03-07 2017-09-14 東レエンジニアリング株式会社 欠陥検査装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11462439B2 (en) * 2019-10-10 2022-10-04 Disco Corporation Wafer processing method
US20220308549A1 (en) * 2021-03-25 2022-09-29 Disco Corporation Processing apparatus

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