WO2020008838A1 - Dicing-tip inspection apparatus - Google Patents

Dicing-tip inspection apparatus Download PDF

Info

Publication number
WO2020008838A1
WO2020008838A1 PCT/JP2019/023572 JP2019023572W WO2020008838A1 WO 2020008838 A1 WO2020008838 A1 WO 2020008838A1 JP 2019023572 W JP2019023572 W JP 2019023572W WO 2020008838 A1 WO2020008838 A1 WO 2020008838A1
Authority
WO
WIPO (PCT)
Prior art keywords
inspection
imaging
unit
wafer
region
Prior art date
Application number
PCT/JP2019/023572
Other languages
French (fr)
Japanese (ja)
Inventor
英一 大▲美▼
Original Assignee
東レエンジニアリング株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東レエンジニアリング株式会社 filed Critical 東レエンジニアリング株式会社
Priority to CN201980036796.7A priority Critical patent/CN112204384A/en
Publication of WO2020008838A1 publication Critical patent/WO2020008838A1/en

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects

Definitions

  • the present invention relates to a dicing chip inspection apparatus for inspecting a device region and a peripheral region of a device chip arranged on a wafer having scribe lines formed or diced.
  • a dicing apparatus is known as an apparatus for performing cutting and grooving (scribe) processing on a work such as a wafer on which a semiconductor device or an electronic component is formed (for example, Patent Documents 1 and 2).
  • Patent Document 3 a technique of imaging one device chip at a time on a wafer on which a scribe line is formed or diced, and inspecting an effective area (that is, a device area) and an edge (that is, a peripheral area) of the device chip ( That is, an inspection by an inspection device has been proposed (for example, Patent Document 3).
  • the moving speed of the wafer (that is, the cutting speed) is set to an extent that does not affect the inspection quality while increasing the imaging magnification. ).
  • both the device region of the device chip and the chip end that is, the peripheral region on which the dicing line (including the scribe line; the same applies hereinafter) are formed with a predetermined accuracy within a predetermined time.
  • the inspection time for one wafer becomes long.
  • the present invention has been made in view of the above-described problems, and it is possible to reliably detect defects such as cracks, chipping, and film peeling lurking in a dicing line of a wafer on which a scribe line is formed or diced, and to detect a defect of a device chip. It is an object of the present invention to provide a dicing chip inspection apparatus capable of reducing a time for inspecting a device region.
  • one embodiment of the present invention provides: In a dicing chip inspection device for inspecting a device region and a peripheral region of a device chip arranged on a diced wafer, A wafer holding unit for holding a wafer, An imaging unit that images a predetermined area set on the wafer at a predetermined imaging magnification; A relative moving unit that relatively moves the wafer and the imaging unit; An inspection recipe registration unit that registers the direction and speed of the relative movement in the relative movement unit, and the imaging magnification and the imaging position in the imaging unit as an inspection recipe, A control unit that controls the imaging unit and the relative movement unit based on the inspection recipe, The control unit is A peripheral area inspection mode for performing imaging along the dicing line so as to include a dicing line of a wafer diced at a predetermined imaging magnification and inspecting a peripheral area of a device chip; At a lower imaging magnification than the imaging magnification in the peripheral area inspection mode, imaging is performed so as to skip a dicing
  • an area (peripheral area) along the dicing line is imaged with a high-magnification visual field size in the peripheral area inspection mode, and defects such as cracks and chipping can be reliably detected.
  • the inspection time can be reduced by imaging the device region of the device chip with a relatively small magnification field of view.
  • FIG. 1 is a schematic diagram illustrating an overall configuration of an example of a mode that embodies the present invention.
  • FIG. 2 is a perspective view showing a main part of an example of a mode for embodying the present invention. It is a conceptual diagram in an example of the form which embodies the present invention. It is a conceptual diagram in an example of the form which embodies the present invention. It is a flow figure in an example of an embodiment which embodies the present invention.
  • X, Y, and Z three axes of the rectangular coordinate system are represented by X, Y, and Z, the horizontal direction is represented by the X direction and the Y direction, and the direction perpendicular to the XY plane (that is, the direction of gravity) is represented by the Z direction. I do.
  • the Z direction the direction against gravity is expressed as “up”, and the direction in which gravity acts is expressed as “down”.
  • the direction in which the Z direction rotates about the center axis is defined as the ⁇ direction.
  • FIG. 1 is a schematic diagram showing the entire configuration of an example of an embodiment embodying the present invention.
  • FIG. 1 shows a schematic diagram of a dicing chip inspection apparatus 1 according to the present invention.
  • the dicing chip inspection apparatus 1 inspects the device region Rc and the peripheral region Re of the device chip C arranged on the diced wafer W.
  • the device region Rc is a region where the main circuit of the device chip C is patterned.
  • the peripheral region Re is a region arranged around (outside) the device region Rc of the device chip C, and is a region set to allow a positional shift of the dicing line DL (a blank region). , And cut off).
  • the peripheral region Re of the device chip C is adjacent to the dicing line DL.
  • the dicing line DL is a processing groove formed when the wafer W is scribed or cut, and is actually a space between the ridge lines of the processed wafer W.
  • the dicing line DL including the edge line of the processed wafer W is referred to as a dicing line DL.
  • the dicing chip inspection device 1 includes a wafer holding unit 2, an imaging unit 3, a relative movement unit 4, an inspection recipe registration unit 5, a control unit 9, a computer CN, and the like.
  • the wafer holding unit 2 holds the wafer W.
  • the lower surface of the diced wafer W is held by using a wafer ring R (also called a flat ring or a dicing ring) and an expanded sheet (not shown).
  • the wafer holding unit 2 is configured to maintain a horizontal state while supporting the wafer W from below by way of a wafer ring R or the like.
  • the wafer holding unit 2 includes a wafer mounting table 20 having a horizontal upper surface.
  • the wafer mounting table 20 is provided with a groove or a hole at a portion that comes into contact with a wafer ring or the like holding the wafer W. These grooves and holes are connected to a negative pressure of a vacuum pump or the like via a switching valve or the like. It is connected to the generating means.
  • the wafer holding section 2 can hold or release the wafer ring or the like by switching these grooves and holes to a negative pressure state or an atmosphere release state.
  • the imaging unit 3 captures an image of a predetermined area set on the wafer W at a predetermined imaging magnification. Specifically, the imaging unit 3 captures an image of the device region Rc and the peripheral region Re to be inspected. are doing. More specifically, the imaging unit 3 includes a lens barrel 30, an illumination unit 31, a half mirror 32, a plurality of objective lenses 33a and 33b, a revolver mechanism 34, an imaging camera 35, and the like.
  • the lens barrel 30 fixes the illumination unit 31, the half mirror 32, the objective lenses 33a and 33b, the revolver mechanism 34, the imaging camera 35, and the like in a predetermined posture, and guides illumination light and observation light.
  • the lens barrel 30 is attached to the apparatus frame 1f via a connection fitting or the like (not shown).
  • the illumination unit 31 emits illumination light L1 necessary for imaging.
  • the illumination unit 31 can be exemplified by a laser diode, a metal halide lamp, a xenon lamp, an LED illumination, and the like.
  • the half mirror 32 reflects the illumination light L1 emitted from the illumination unit 31 and irradiates it to the wafer W side, and passes the light (reflected light, scattered light) L2 incident from the wafer W side to the imaging camera 35 side. It is.
  • the objective lenses 33a and 33b form images of the imaging area on the workpiece W on the imaging camera 35 at different predetermined observation magnifications.
  • the revolver mechanism 34 switches which of the objective lenses 33a and 33b is used. Specifically, the revolver mechanism 34 rotates and stops at predetermined angles at a time based on manual or external signal control.
  • the imaging camera 35 captures an image of the imaging area F on the work W and obtains an image.
  • the acquired image is output to the outside (in the present invention, a chip position calculation unit described in detail later) as a video signal or video data.
  • the relative moving section 4 moves the wafer holding section 2 and the imaging section 3 relatively.
  • the relative moving section 4 includes an X-axis slider 41, a Y-axis slider 42, and a rotation mechanism 43.
  • the X-axis slider 41 is mounted on the apparatus frame 1f, and moves the Y-axis slider 42 at an arbitrary speed in the X direction and stops at an arbitrary position.
  • the X-axis slider includes a pair of rails extending in the X direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit.
  • the slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like.
  • the X-axis slider 41 is provided with an encoder for detecting a current position and a moving amount of the slider unit.
  • the encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
  • the Y-axis slider 42 moves the rotating mechanism 43 in the Y direction at an arbitrary speed and stops at an arbitrary position based on a control signal output from the control unit CN.
  • the Y-axis slider includes a pair of rails extending in the Y direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit.
  • the slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like.
  • the Y-axis slider 42 is provided with an encoder for detecting the current position and the moving amount of the slider section.
  • the encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
  • the rotation mechanism 43 rotates the wafer mounting table 20 at an arbitrary speed in the ⁇ direction and stops at an arbitrary angle. Specifically, as the rotation mechanism 43, a mechanism that rotates / stops at an arbitrary angle by signal control from an external device such as a direct drive motor can be exemplified.
  • the wafer mounting table 20 of the wafer holding unit 2 is mounted on the member on the rotating side of the rotation mechanism 43.
  • the relative movement unit 4 Since the relative movement unit 4 has such a configuration, the wafer W is independently or combined in the XY ⁇ direction with respect to the imaging unit 3 in a predetermined manner while holding the wafer W to be inspected. It can be relatively moved at a speed or angle, or can be stopped at any position and angle.
  • FIG. 2 is a perspective view showing a main part of an example of an embodiment embodying the present invention.
  • FIG. 2 shows a state in which the wafer W and the imaging unit 3 are relatively moved along the dicing line DL, and the peripheral area Re of the device chip C is sequentially imaged while moving the imaging area F in the direction indicated by the arrow Vs. ing.
  • the inspection recipe registration unit 5 registers, as an inspection recipe, the direction and speed of the relative movement in the relative moving unit 4, the imaging magnification and the imaging position in the imaging unit 3, and the like.
  • the inspection recipe registration unit 5 can register an inspection recipe relating to a device area inspection mode and a peripheral area inspection mode, which will be described in detail later. An inspection recipe for executing both or at least one of these modes is registered. ing. Specifically, the inspection recipe registration unit 5 captures an image of a place on the wafer W at any imaging magnification in any order (that is, the imaging route T) in each of the device area inspection mode and the peripheral area inspection mode.
  • information also referred to as recipe information
  • information on the moving speed and the imaging interval and the moving pitch and the feed speed at that time can be registered as an inspection recipe for each inspection type.
  • the control unit 9 has, for example, the following functions and roles. -Outputs a signal for holding / releasing the wafer W to the wafer holding unit 2-Controls the revolver mechanism 34 to switch the objective lens (imaging magnification) to be used-Outputs an imaging trigger to the imaging camera 35
  • Driving control of the relative moving unit 4 a function of outputting a driving signal while monitoring the current positions of the X-axis slider 41, the Y-axis slider 42, and the rotating mechanism 43.
  • control unit 9 includes a computer CN, a programmable logic controller and the like (that is, hardware), and an execution program and the like (that is, software).
  • the inspection recipe registration unit 5 is configured by a part of a storage unit (register, memory, HDD, SSD, etc.) of the computer CN.
  • control unit 9 controls the imaging unit 3 and the relative moving unit 4 based on the inspection recipe, and sets a peripheral area inspection mode and an operation mode called a device area inspection mode (for example, a setting screen or the like). ) And execution means (computer CN and control equipment, etc.).
  • FIG. 3 is a conceptual diagram showing an example of an embodiment of the present invention.
  • FIG. 3 illustrates an imaging route T and an imaging region F in the peripheral region inspection mode.
  • an image is taken along the dicing line DL so as to include the dicing line DL of the wafer W diced at a predetermined imaging magnification (relatively high magnification), and the peripheral area of the device chip C is taken.
  • This is an operation mode for checking Re.
  • imaging is performed along an imaging route T that relatively moves the imaging region F along a dicing line DL extending in the X direction.
  • FIG. 3 (b) while performing imaging along the imaging route T that relatively moves the imaging region F along the dicing line DL extending in the Y direction, cracks that lie in the dicing line DL over the entire surface of the wafer W.
  • the inspection of the peripheral region Re is performed at a predetermined imaging magnification (relatively high magnification) enough to reliably detect a defect such as chipping.
  • an edge extraction process is performed to detect a chip end portion (that is, a ridge line) of the device chip C, and a part of the ridge line does not enter a preset intrusion prohibition area. It is checked whether cracks, chippings, etc. extending from the ridge line have entered the intrusion prohibited area.
  • the imaging magnification and the imaging region F, the peripheral region Re of a plurality of device chips arranged adjacent to each other are simultaneously imaged in a positional relationship straddling the dicing line DL.
  • the imaging route T and the like are set in the inspection recipe registration unit 5.
  • FIG. 4 is a conceptual diagram showing an example of an embodiment of the present invention.
  • FIG. 4 illustrates an imaging route T and an imaging region F in the device area inspection mode.
  • imaging is performed at an imaging route T that relatively moves the imaging region F so as to skip the dicing line DL of the diced wafer W at an imaging magnification lower than the imaging magnification in the peripheral region inspection mode,
  • This is an operation mode for inspecting the device region Rc of the device chip C over the entire surface of the wafer W.
  • a predetermined magnification eg, a predetermined magnification (eg, a predetermined magnification factor) is used to determine whether a foreign object or a scratch is present on the device region Rc, whether a clear pattern collapse, a film formation failure, or the like has occurred.
  • the imaging / inspection of the device region Rc is performed at a relatively low magnification.
  • an image (a so-called teaching image) in which no foreign matter, scratch, pattern collapse, film formation failure, or the like has occurred in the device region Rc is registered in advance.
  • the image is inspected for foreign matter, scratches, pattern collapse, film formation failure, and the like.
  • the imaging magnification, the imaging region F, the imaging route T, and the like are set such that the predetermined region imaged in the device region inspection mode skips the predetermined region imaged in the peripheral region inspection mode. This is set in the inspection recipe registration unit 5.
  • FIG. 5 is a flowchart showing an example of an embodiment embodying the present invention.
  • FIG. 5 shows a configuration for imaging and inspecting the device region Rc and the peripheral region Re of the device chip C arranged on the wafer W using the dicing chip inspection device 1 as a series of flows for each step. .
  • an inspection recipe is set (step s11), and an inspection mode and an order of the wafer W are determined.
  • the wafer W is mounted on the wafer mounting table 20 of the dicing chip inspection apparatus 1 (step s12), and is moved to a reading position of a reference mark (not shown) formed on the wafer W to perform alignment ( Step s13).
  • the mode is switched to the peripheral area inspection mode based on the inspection recipe (step s21), and the revolver mechanism 34 is rotated so that a high-magnification lens is selected (step s22). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s23). It is determined whether or not all imaging in this mode has been completed (step 24), and if not completed, imaging and inspection are continued. If the imaging has been completed, it is determined whether to execute another inspection mode (step s25).
  • step s31 If another inspection mode (that is, a device area inspection mode) is to be executed, the mode is switched to the device area inspection mode (step s31), and the revolver mechanism 34 is rotated so that a low-magnification lens is selected (step s31). s32). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s33). It is determined whether or not all imaging in this mode has been completed (step 34), and if not completed, imaging and inspection are continued. If the imaging has been completed, the wafer W is paid out of the apparatus (step s41). It should be noted that the wafer W is paid out of the apparatus even when another inspection mode is not executed in step 25 (step s41).
  • these inspection modes indicate a series of operation flows and states, and are not limited to those registered in a state specified in the inspection recipe, and different imaging magnifications and imaging routes T are registered without being specified. Includes cases where
  • the output of the imaging trigger from the control unit 9 to the imaging unit 3 can be exemplified by the following method.
  • a relative position and a stationary state are set at a predetermined position, and the illumination light L1 is irradiated in a stationary state to capture an image (so-called step & repeat).
  • the imaging trigger means an image capturing instruction to the imaging camera 35 or an image processing device (not shown), an emission instruction of the illumination light L1, and the like.
  • an imaging trigger (case 1) the illumination light L1 is strobed during the time during which the imaging camera 35 can capture an image (so-called exposure time), or (case 2) the illumination light L1 is irradiated. Within a certain period of time.
  • the imaging trigger is not limited to the instruction to the imaging camera 35, and (case 3) may be an image capturing instruction to an image processing apparatus that acquires an image. By doing so, it is possible to cope with a mode in which video signals and video data are sequentially output from the imaging camera 35.
  • the dicing chip inspection device 1 Since the dicing chip inspection device 1 according to the present invention has such a configuration, in the peripheral region inspection mode, an area along the dicing line (that is, the peripheral region Re) is imaged with a high magnification field size, Defects such as cracks and chippings can be reliably detected (ie, inspected). On the other hand, in the device area inspection mode, the inspection time can be shortened by imaging the device area Rc of the device chip C with a relatively small magnification field of view. That is, the dicing chip inspection device 1 can inspect both the device region Rc and the peripheral region Re with a predetermined accuracy within a predetermined time.
  • the imaging magnification, the imaging region F, the imaging route T, and the like are set so that the peripheral regions Rc of the plurality of device chips C arranged adjacent to each other are simultaneously imaged in a positional relationship that straddles the dicing line DL.
  • the configuration set in the inspection recipe registration unit 5 has been exemplified.
  • Such a configuration is preferable because the number of times of imaging can be reduced, and the inspection time per wafer W can be reduced.
  • the dicing line DL when the width of the dicing line DL is large with respect to the imaging region F, the ridge line of the peripheral region Re is likely to be out of the field of view, or cracks or chips to be detected are small, and if the imaging magnification is increased, the dicing line DL may be straddled. If the images cannot be captured simultaneously due to the positional relationship, the peripheral region Rc of one device chip C may be captured.

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Dicing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

According to the present invention, the inspection time for a device chip is reduced while reliably detecting defects such as cracks or chipping in a dicing line of a diced wafer. Particularly, an apparatus for inspecting a device region and a peripheral region of a device chip disposed on a diced wafer is provided with a wafer holding unit, an image capturing unit, a relative movement unit, an inspection recipe registration unit, and a control unit. The control unit has a peripheral region inspection mode and a device region inspection region. In the peripheral region inspection mode, images are captured at a predetermined imaging magnification along a dicing line of the diced wafer to include the dicing line, and the peripheral region of the device chip is inspected. In the device region inspection mode, images are captured at a lower imaging magnification than in the peripheral region inspection mode so as to skip the dicing line, and the device region is inspected. An inspection recipe for executing at least one among the device region inspection mode and the peripheral region inspection mode is registered in the inspection recipe registration unit.

Description

ダイシングチップ検査装置Dicing chip inspection device
 本発明は、スクライブラインが形成またはダイシングされたウエーハに配置されているデバイスチップのデバイス領域および周辺領域を検査するダイシングチップ検査装置に関する。 The present invention relates to a dicing chip inspection apparatus for inspecting a device region and a peripheral region of a device chip arranged on a wafer having scribe lines formed or diced.
 半導体装置や電子部品が形成されたウエーハ等のワークに対して切断や溝入れ(スクライブ)加工を施す装置としてダイシング装置が知られている(例えば、特許文献1,2)。 2. Description of the Related Art A dicing apparatus is known as an apparatus for performing cutting and grooving (scribe) processing on a work such as a wafer on which a semiconductor device or an electronic component is formed (for example, Patent Documents 1 and 2).
 また、ダイシング加工中にワークを撮像することで加工サイズや加工状態等の異常を検知し、異常の状態に応じた対処を行う技術が提案されている(例えば、特許文献2)。 Also, a technique has been proposed in which an abnormality such as a processing size or a processing state is detected by imaging a workpiece during dicing processing, and a countermeasure is taken according to the abnormal state (for example, Patent Document 2).
 また、スクライブラインが形成またはダイシングされたウエーハに配置されているデバイスチップを1つずつ撮像し、当該デバイスチップの有効領域(つまり、デバイス領域)およびエッジ(つまり、周辺領域)を検査する技術(つまり、検査装置による検査)が提案されている(例えば、特許文献3)。 Also, a technique of imaging one device chip at a time on a wafer on which a scribe line is formed or diced, and inspecting an effective area (that is, a device area) and an edge (that is, a peripheral area) of the device chip ( That is, an inspection by an inspection device has been proposed (for example, Patent Document 3).
特開昭62-53804号公報JP-A-62-53804 特開2009-253017号公報JP 2009-253017 A 特開2017-161236号公報JP-A-2017-161236
 特許文献2に開示されている様な技術では、微細なクラック(ひび)等を検出しようとすると、撮像倍率を高倍率にしつつ、検査品質に影響しない程度にウエーハの移動速度(つまり、切断速度)を抑える必要があった。 According to the technique disclosed in Patent Document 2, in order to detect a minute crack (crack) or the like, the moving speed of the wafer (that is, the cutting speed) is set to an extent that does not affect the inspection quality while increasing the imaging magnification. ).
 一方、単位時間当たりのウエーハ処理枚数(いわゆる、WPH)をできる限り上げたいというニーズがあり、ダイシング中の検査は、加工溝(カーフ)の位置やカーフ幅、大きなチッピング(欠け)の有無等を計測するに留まり、微細なクラック等検出は、専用機(つまり、検査装置)に委ねられていた。 On the other hand, there is a need to increase the number of processed wafers per unit time (so-called WPH) as much as possible. Inspection during dicing involves checking the position of the processing groove (kerf), the width of the kerf, and the presence or absence of large chipping (chipping). In addition to measurement, detection of minute cracks and the like has been left to a dedicated machine (that is, an inspection device).
 しかし、検査装置における検査においては、デバイスチップのデバイス領域と、ダイシングライン(スクライブラインを含む。以下同じ)が形成されたチップ端部(つまり、周辺領域)の双方を所定時間内に所定精度で検査したいというニーズがあるが、全ての分割領域を同一の高倍率で検査していたのでは、ウエーハ1枚にかかる検査時間が長くなってしまう。一方、検査時間の短縮を企図して全ての分割領域を同一の低倍率で検査しては、ダイシングラインに潜む微細なクラック等の欠陥を確実に検出できないという律則があった。そのため、デバイス領域と周辺領域の双方を所定時間内に所定精度で検査できる検査装置が求められていた。 However, in the inspection by the inspection apparatus, both the device region of the device chip and the chip end (that is, the peripheral region) on which the dicing line (including the scribe line; the same applies hereinafter) are formed with a predetermined accuracy within a predetermined time. Although there is a need for inspection, if all the divided areas are inspected at the same high magnification, the inspection time for one wafer becomes long. On the other hand, there is a rule that if all the divided areas are inspected at the same low magnification in an attempt to shorten the inspection time, defects such as minute cracks hidden in the dicing line cannot be reliably detected. Therefore, there has been a demand for an inspection apparatus capable of inspecting both the device area and the peripheral area with a predetermined accuracy within a predetermined time.
 そこで本発明は、上記問題点に鑑みてなされたものであり、スクライブラインが形成またはダイシングされたウエーハのダイシングラインに潜むクラックやチッピング、膜剥がれなどの欠陥を確実に検出しつつ、デバイスチップのデバイス領域を検査する時間を短縮することができる、ダイシングチップ検査装置を提供することを目的としている。 Therefore, the present invention has been made in view of the above-described problems, and it is possible to reliably detect defects such as cracks, chipping, and film peeling lurking in a dicing line of a wafer on which a scribe line is formed or diced, and to detect a defect of a device chip. It is an object of the present invention to provide a dicing chip inspection apparatus capable of reducing a time for inspecting a device region.
 以上の課題を解決するために、本発明に係る一態様は、
 ダイシングされたウエーハに配置されているデバイスチップのデバイス領域および周辺領域を検査するダイシングチップ検査装置において、
 ウエーハを保持するウエーハ保持部と、
 ウエーハに設定された所定領域を所定の撮像倍率で撮像する撮像部と、
 ウエーハと撮像部とを相対移動させる相対移動部と、
 相対移動部における相対移動の方向および速度、ならびに、撮像部における撮像倍率および撮像位置を検査レシピとして登録する検査レシピ登録部と、
 検査レシピに基づいて撮像部および相対移動部を制御する制御部を備え、
 制御部は、
所定の撮像倍率でダイシングされたウエーハのダイシングラインが含まれるように当該ダイシングラインに沿いながら撮像を行い、デバイスチップの周辺領域を検査する周辺領域検査モードと、
周辺領域検査モードにおける撮像倍率よりも低い撮像倍率で、ダイシングラインをスキップするように撮像を行い、デバイス領域を検査するデバイス領域検査モードとを備え、
 検査レシピ登録部には、デバイス領域検査モードおよび周辺領域検査モードの少なくとも一方を実行するための検査レシピが登録されていることを特徴としている。
In order to solve the above problems, one embodiment of the present invention provides:
In a dicing chip inspection device for inspecting a device region and a peripheral region of a device chip arranged on a diced wafer,
A wafer holding unit for holding a wafer,
An imaging unit that images a predetermined area set on the wafer at a predetermined imaging magnification;
A relative moving unit that relatively moves the wafer and the imaging unit;
An inspection recipe registration unit that registers the direction and speed of the relative movement in the relative movement unit, and the imaging magnification and the imaging position in the imaging unit as an inspection recipe,
A control unit that controls the imaging unit and the relative movement unit based on the inspection recipe,
The control unit is
A peripheral area inspection mode for performing imaging along the dicing line so as to include a dicing line of a wafer diced at a predetermined imaging magnification and inspecting a peripheral area of a device chip;
At a lower imaging magnification than the imaging magnification in the peripheral area inspection mode, imaging is performed so as to skip a dicing line, and a device area inspection mode for inspecting a device area is provided.
The inspection recipe registration unit is characterized in that an inspection recipe for executing at least one of the device area inspection mode and the peripheral area inspection mode is registered.
 上記のダイシングチップ検査装置によれば、周辺領域検査モードにてダイシングラインに沿った領域(周辺領域)を高倍率の視野サイズで撮像し、クラックやチッピングなどの欠陥を確実に検出することができる。一方、デバイス領域検査モードでは比較的低い倍率の視野サイズでデバイスチップのデバイス領域を撮像して検査時間を短縮することができる。 According to the dicing chip inspection apparatus described above, an area (peripheral area) along the dicing line is imaged with a high-magnification visual field size in the peripheral area inspection mode, and defects such as cracks and chipping can be reliably detected. . On the other hand, in the device region inspection mode, the inspection time can be reduced by imaging the device region of the device chip with a relatively small magnification field of view.
本発明を具現化する形態の一例の全体構成を示す概略図である。FIG. 1 is a schematic diagram illustrating an overall configuration of an example of a mode that embodies the present invention. 本発明を具現化する形態の一例の要部を示す斜視図である。FIG. 2 is a perspective view showing a main part of an example of a mode for embodying the present invention. 本発明を具現化する形態の一例における概念図である。It is a conceptual diagram in an example of the form which embodies the present invention. 本発明を具現化する形態の一例における概念図である。It is a conceptual diagram in an example of the form which embodies the present invention. 本発明を具現化する形態の一例におけるフロー図である。It is a flow figure in an example of an embodiment which embodies the present invention.
 以下に、本発明を実施するための形態について、図を用いながら説明する。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
 なお、以下の説明では、直交座標系の3軸をX、Y、Zとし、水平方向をX方向、Y方向と表現し、XY平面に垂直な方向(つまり、重力方向)をZ方向と表現する。また、Z方向は、重力に逆らう方向を上、重力がはたらく方向を下と表現する。また、Z方向を中心軸として回転する方向をθ方向とする。 In the following description, three axes of the rectangular coordinate system are represented by X, Y, and Z, the horizontal direction is represented by the X direction and the Y direction, and the direction perpendicular to the XY plane (that is, the direction of gravity) is represented by the Z direction. I do. In the Z direction, the direction against gravity is expressed as “up”, and the direction in which gravity acts is expressed as “down”. The direction in which the Z direction rotates about the center axis is defined as the θ direction.
 図1は、本発明を具現化する形態の一例の全体構成を示す概略図である。図1には、本発明に係るダイシングチップ検査装置1の概略図が示されている。 FIG. 1 is a schematic diagram showing the entire configuration of an example of an embodiment embodying the present invention. FIG. 1 shows a schematic diagram of a dicing chip inspection apparatus 1 according to the present invention.
 ダイシングチップ検査装置1は、ダイシングされたウエーハWに配置されているデバイスチップCのデバイス領域Rcおよび周辺領域Reを検査するものである。なお、デバイス領域Rcとは、デバイスチップCの主要回路がパターニングされた領域である。一方、周辺領域Reとは、デバイスチップCのデバイス領域Rcの周辺(外側とも言う)に配置された領域であり、ダイシングラインDLの位置ずれを許容するために設定された領域である(余白領域、切りしろとも言う)。 The dicing chip inspection apparatus 1 inspects the device region Rc and the peripheral region Re of the device chip C arranged on the diced wafer W. The device region Rc is a region where the main circuit of the device chip C is patterned. On the other hand, the peripheral region Re is a region arranged around (outside) the device region Rc of the device chip C, and is a region set to allow a positional shift of the dicing line DL (a blank region). , And cut off).
 そして、デバイスチップCの周辺領域Reは、ダイシングラインDLと隣接している。なお、ダイシングラインDLは、ウエーハWをスクライブまたは切断した際に生じた加工溝であり、実態としては加工されたウエーハWの稜線と稜線の間の空間である。本願では、説明の便宜上、加工されたウエーハWの稜線を含めてダイシングラインDLと呼ぶ。 {Circle around (2)} The peripheral region Re of the device chip C is adjacent to the dicing line DL. The dicing line DL is a processing groove formed when the wafer W is scribed or cut, and is actually a space between the ridge lines of the processed wafer W. In the present application, for convenience of description, the dicing line DL including the edge line of the processed wafer W is referred to as a dicing line DL.
 具体的には、ダイシングチップ検査装置1は、ウエーハ保持部2、撮像部3、相対移動部4、検査レシピ登録部5、制御部9、コンピュータCN等を備えている。 Specifically, the dicing chip inspection device 1 includes a wafer holding unit 2, an imaging unit 3, a relative movement unit 4, an inspection recipe registration unit 5, a control unit 9, a computer CN, and the like.
 ウエーハ保持部2は、ウエーハWを保持するものである。例えば、ダイシングされたウエーハWは、ウエーハリングR(フラットリング、ダイシングリングとも呼ばれる)およびエキスパンドシート(不図示)を用いて下面側が保持されいる。具体的には、ウエーハ保持部2は、ウエーハリングR等を介してウエーハWを下面側から支えつつ水平状態を保つものである。より具体的には、ウエーハ保持部2は、上面が水平なウエーハ載置台20を備えている。 The wafer holding unit 2 holds the wafer W. For example, the lower surface of the diced wafer W is held by using a wafer ring R (also called a flat ring or a dicing ring) and an expanded sheet (not shown). Specifically, the wafer holding unit 2 is configured to maintain a horizontal state while supporting the wafer W from below by way of a wafer ring R or the like. More specifically, the wafer holding unit 2 includes a wafer mounting table 20 having a horizontal upper surface.
 ウエーハ載置台20は、ウエーハWを保持しているウエーハリング等と接触する部分に溝部や孔部が設けられており、これら溝部や孔部は、切替バルブなどを介して真空ポンプなどの負圧発生手段と接続されている。そして、ウエーハ保持部2は、これら溝部や孔部を負圧状態若しくは大気解放状態に切り替えることで、ウエーハリング等を保持したり保持解除したりすることができる。 The wafer mounting table 20 is provided with a groove or a hole at a portion that comes into contact with a wafer ring or the like holding the wafer W. These grooves and holes are connected to a negative pressure of a vacuum pump or the like via a switching valve or the like. It is connected to the generating means. The wafer holding section 2 can hold or release the wafer ring or the like by switching these grooves and holes to a negative pressure state or an atmosphere release state.
 撮像部3は、ウエーハWに設定された所定領域を所定の撮像倍率で撮像するものである。具体的には、撮像部3は、検査対象となるデバイス領域Rcと周辺領域Reを撮像するもので、これら領域に対して適した撮像倍率で撮像できるよう、撮像倍率を切り替えて撮像する構成をしている。より具体的には、撮像部3は、鏡筒30、照明部31、ハーフミラー32、複数の対物レンズ33a,33b、レボルバー機構34、撮像カメラ35等を備えている。 The imaging unit 3 captures an image of a predetermined area set on the wafer W at a predetermined imaging magnification. Specifically, the imaging unit 3 captures an image of the device region Rc and the peripheral region Re to be inspected. are doing. More specifically, the imaging unit 3 includes a lens barrel 30, an illumination unit 31, a half mirror 32, a plurality of objective lenses 33a and 33b, a revolver mechanism 34, an imaging camera 35, and the like.
 鏡筒30は、照明部31、ハーフミラー32、対物レンズ33a,33b、レボルバー機構34、撮像カメラ35等を所定の姿勢で固定し、照明光や観察光を導光するものである。鏡筒30は、連結金具など(不図示)を介して装置フレーム1fに取り付けられている。 The lens barrel 30 fixes the illumination unit 31, the half mirror 32, the objective lenses 33a and 33b, the revolver mechanism 34, the imaging camera 35, and the like in a predetermined posture, and guides illumination light and observation light. The lens barrel 30 is attached to the apparatus frame 1f via a connection fitting or the like (not shown).
 照明部31は、撮像に必要な照明光L1を放出するものである。具体的には、照明部31は、レーザダイオードやメタルハライドランプ、キセノンランプ、LED照明などが例示できる。 The illumination unit 31 emits illumination light L1 necessary for imaging. Specifically, the illumination unit 31 can be exemplified by a laser diode, a metal halide lamp, a xenon lamp, an LED illumination, and the like.
 ハーフミラー32は、照明部31から放出された照明光L1を反射させてウエーハW側に照射し、ウエーハW側から入射した光(反射光、散乱光)L2を撮像カメラ35側に通過させるものである。 The half mirror 32 reflects the illumination light L1 emitted from the illumination unit 31 and irradiates it to the wafer W side, and passes the light (reflected light, scattered light) L2 incident from the wafer W side to the imaging camera 35 side. It is.
 対物レンズ33a,33bは、ワークW上の撮像エリアの像を、それぞれ異なる所定の観察倍率で撮像カメラ35に結像させるものである。
レボルバー機構34は、対物レンズ33a,33bのいずれを使用するか切り替えるものである。具体的には、レボルバー機構34は、手動または外部からの信号制御に基づいて、所定の角度ずつ回転および静止するものである。
The objective lenses 33a and 33b form images of the imaging area on the workpiece W on the imaging camera 35 at different predetermined observation magnifications.
The revolver mechanism 34 switches which of the objective lenses 33a and 33b is used. Specifically, the revolver mechanism 34 rotates and stops at predetermined angles at a time based on manual or external signal control.
 撮像カメラ35は、ワークW上の撮像エリアFを撮像し、画像を取得するものである。取得した画像は、映像信号や映像データとして外部(本発明では、詳細を後述するチップ位置算出部)に出力される。 The imaging camera 35 captures an image of the imaging area F on the work W and obtains an image. The acquired image is output to the outside (in the present invention, a chip position calculation unit described in detail later) as a video signal or video data.
 相対移動部4は、ウエーハ保持部2と撮像部3とを相対移動させるものである。
具体的には、相対移動部4は、X軸スライダー41と、Y軸スライダー42と、回転機構43とを備えて構成されている。
The relative moving section 4 moves the wafer holding section 2 and the imaging section 3 relatively.
Specifically, the relative moving section 4 includes an X-axis slider 41, a Y-axis slider 42, and a rotation mechanism 43.
 X軸スライダー41は、装置フレーム1f上に取り付けられており、Y軸スライダー42をX方向に任意の速度で移動させ、任意の位置で静止させるものである。具体的には、X軸スライダーは、X方向に延びる1対のレールと、そのレール上を移動するスライダー部と、スライダー部を移動および静止させるスライダー駆動部とで構成されている。スライダー駆動部は、制御部CNからの信号制御により回転し静止するサーボモータやパルスモータとボールネジ機構を組み合わせたものや、リニアモータ機構などで構成することができる。また、X軸スライダー41には、スライダー部の現在位置や移動量を検出するためのエンコーダが備えられている。なお、このエンコーダは、リニアスケールと呼ばれる直線状の部材に細かな凹凸が所定ピッチで刻まれたものや、ボールネジを回転させるモータの回転角度を検出するロータリエンコーダ等が例示できる。 The X-axis slider 41 is mounted on the apparatus frame 1f, and moves the Y-axis slider 42 at an arbitrary speed in the X direction and stops at an arbitrary position. Specifically, the X-axis slider includes a pair of rails extending in the X direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit. The slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like. Further, the X-axis slider 41 is provided with an encoder for detecting a current position and a moving amount of the slider unit. The encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
 Y軸スライダー42は、制御部CNから出力される制御信号に基づいて、回転機構43をY方向に任意の速度で移動させ、任意の位置で静止させるものである。具体的には、Y軸スライダーは、Y方向に延びる1対のレールと、そのレール上を移動するスライダー部と、スライダー部を移動および静止させるスライダー駆動部とで構成されている。スライダー駆動部は、制御部CNからの信号制御により回転し静止するサーボモータやパルスモータとボールネジ機構を組み合わせたものや、リニアモータ機構などで構成することができる。また、Y軸スライダー42には、スライダー部の現在位置や移動量を検出するためのエンコーダが備えられている。なお、このエンコーダは、リニアスケールと呼ばれる直線状の部材に細かな凹凸が所定ピッチで刻まれたものや、ボールネジを回転させるモータの回転角度を検出するロータリエンコーダ等が例示できる。 The Y-axis slider 42 moves the rotating mechanism 43 in the Y direction at an arbitrary speed and stops at an arbitrary position based on a control signal output from the control unit CN. Specifically, the Y-axis slider includes a pair of rails extending in the Y direction, a slider unit that moves on the rail, and a slider drive unit that moves and stops the slider unit. The slider drive unit can be configured by a combination of a servo motor or a pulse motor that rotates and stops by signal control from the control unit CN and a ball screw mechanism, a linear motor mechanism, or the like. Further, the Y-axis slider 42 is provided with an encoder for detecting the current position and the moving amount of the slider section. The encoder may be, for example, a linear member called a linear scale in which fine irregularities are carved at a predetermined pitch, a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.
 回転機構43は、ウエーハ載置台20をθ方向に任意の速度で回転させ、任意の角度で静止させるものである。具体的には、回転機構43は、ダイレクトドライブモータなどの、外部機器からの信号制御により任意の角度に回転/静止させるものが例示できる。回転機構43の回転する側の部材の上には、ウエーハ保持部2のウエーハ載置台20が取り付けられている。 The rotation mechanism 43 rotates the wafer mounting table 20 at an arbitrary speed in the θ direction and stops at an arbitrary angle. Specifically, as the rotation mechanism 43, a mechanism that rotates / stops at an arbitrary angle by signal control from an external device such as a direct drive motor can be exemplified. The wafer mounting table 20 of the wafer holding unit 2 is mounted on the member on the rotating side of the rotation mechanism 43.
 相対移動部4は、この様な構成をしているため、検査対象となるウエーハWを保持したまま、ウエーハWを撮像部3に対してXYθ方向にそれぞれ独立させて又は複合的に、所定の速度や角度で相対移動させたり、任意の位置・角度で静止させたりすることができる。 Since the relative movement unit 4 has such a configuration, the wafer W is independently or combined in the XYθ direction with respect to the imaging unit 3 in a predetermined manner while holding the wafer W to be inspected. It can be relatively moved at a speed or angle, or can be stopped at any position and angle.
 図2は、本発明を具現化する形態の一例の要部を示す斜視図である。図2には、ウエーハWと撮像部3をダイシングラインDLに沿って相対移動させ、撮像エリアFを矢印Vsで示す方向に移動させながらデバイスチップCの周辺領域Reを逐次撮像する様子が示されている。 FIG. 2 is a perspective view showing a main part of an example of an embodiment embodying the present invention. FIG. 2 shows a state in which the wafer W and the imaging unit 3 are relatively moved along the dicing line DL, and the peripheral area Re of the device chip C is sequentially imaged while moving the imaging area F in the direction indicated by the arrow Vs. ing.
 検査レシピ登録部5は、相対移動部4における相対移動の方向および速度、ならびに、撮像部3における撮像倍率および撮像位置等を検査レシピとして登録するものである。そして、検査レシピ登録部5には、詳細を後述するデバイス領域検査モードおよび周辺領域検査モードに関する検査レシピを登録することができ、これらモードの双方または少なくとも一方を実行するための検査レシピが登録されている。具体的には、検査レシピ登録部5は、デバイス領域検査モードおよび周辺領域検査モードそれぞれにおいて、どのような撮像倍率でウエーハWのどの場所をどのような順序(つまり、撮像ルートT)で撮像するか、そのときの移動速度と撮像間隔や移動ピッチと送り速度をどうするかなどの情報(レシピ情報とも言う)を、検査品種毎の検査レシピとして登録することができる。 The inspection recipe registration unit 5 registers, as an inspection recipe, the direction and speed of the relative movement in the relative moving unit 4, the imaging magnification and the imaging position in the imaging unit 3, and the like. The inspection recipe registration unit 5 can register an inspection recipe relating to a device area inspection mode and a peripheral area inspection mode, which will be described in detail later. An inspection recipe for executing both or at least one of these modes is registered. ing. Specifically, the inspection recipe registration unit 5 captures an image of a place on the wafer W at any imaging magnification in any order (that is, the imaging route T) in each of the device area inspection mode and the peripheral area inspection mode. Alternatively, information (also referred to as recipe information) on the moving speed and the imaging interval and the moving pitch and the feed speed at that time can be registered as an inspection recipe for each inspection type.
 制御部9は、例えば、以下の様な機能や役割を担っている。
・ウエーハ保持部2に対して、ウエーハWの保持/解除の信号を出力
・レボルバー機構34を制御して、使用する対物レンズ(撮像倍率)を切り替える
・撮像カメラ35に対して、撮像トリガを出力する
・相対移動部4の駆動制御:X軸スライダー41、Y軸スライダー42、回転機構43の現在位置をモニタリングしつつ、駆動用信号を出力する機能
・撮像位置や撮像ルートT、撮像間隔(ピッチ、インターバル)の登録
・検査レシピの登録、使用する検査レシピの切替
・撮像した画像に基づく検査
The control unit 9 has, for example, the following functions and roles.
-Outputs a signal for holding / releasing the wafer W to the wafer holding unit 2-Controls the revolver mechanism 34 to switch the objective lens (imaging magnification) to be used-Outputs an imaging trigger to the imaging camera 35 Driving control of the relative moving unit 4: a function of outputting a driving signal while monitoring the current positions of the X-axis slider 41, the Y-axis slider 42, and the rotating mechanism 43. An imaging position, an imaging route T, an imaging interval (pitch) , Interval), registration of inspection recipes, switching of inspection recipes to be used, inspection based on captured images
 より具体的には、制御部9は、コンピュータCNやプログラマブルロジックコントローラ等(つまり、ハードウェア)と、その実行プログラム等(つまり、ソフトウェア)を備えている。また、検査レシピ登録部5は、コンピュータCNの記憶部(レジスタ、メモリー、HDD、SSDなど)の一部にて構成されている。 More specifically, the control unit 9 includes a computer CN, a programmable logic controller and the like (that is, hardware), and an execution program and the like (that is, software). The inspection recipe registration unit 5 is configured by a part of a storage unit (register, memory, HDD, SSD, etc.) of the computer CN.
 さらに制御部9は、検査レシピに基づいて撮像部3および相対移動部4を制御するものであり、周辺領域検査モードと、デバイス領域検査モードと呼ばれる動作モードを設定する手段(例えば、設定画面など)と実行手段(コンピュータCNと制御機器など)を備えている。 Further, the control unit 9 controls the imaging unit 3 and the relative moving unit 4 based on the inspection recipe, and sets a peripheral area inspection mode and an operation mode called a device area inspection mode (for example, a setting screen or the like). ) And execution means (computer CN and control equipment, etc.).
 図3は、本発明を具現化する形態の一例における概念図である。図3には、周辺領域検査モードにおける撮像ルートTや撮像領域Fが例示されている。 FIG. 3 is a conceptual diagram showing an example of an embodiment of the present invention. FIG. 3 illustrates an imaging route T and an imaging region F in the peripheral region inspection mode.
 周辺領域検査モードとは、所定の撮像倍率(比較的、高倍率)でダイシングされたウエーハWのダイシングラインDLが含まれるように当該ダイシングラインDLに沿いながら撮像を行い、デバイスチップCの周辺領域Reを検査する動作モードのことである。 In the peripheral area inspection mode, an image is taken along the dicing line DL so as to include the dicing line DL of the wafer W diced at a predetermined imaging magnification (relatively high magnification), and the peripheral area of the device chip C is taken. This is an operation mode for checking Re.
 具体的には、周辺領域検査モードでは、図3(a)に示す様に、X方向に延びるダイシングラインDLに沿うように撮像領域Fを相対移動させる撮像ルートTで撮像を行い、次に図3(b)に示す様に、Y方向に延びるダイシングラインDLに沿うように撮像領域Fを相対移動させる撮像ルートTで撮像を行いながら、ウエーハWの全面に亘ってダイシングラインDLに潜むクラックやチッピングなどの欠陥を確実に検出できる程度の所定の撮像倍率(比較的、高倍率)で周辺領域Reの検査が行われる。 Specifically, in the peripheral region inspection mode, as shown in FIG. 3A, imaging is performed along an imaging route T that relatively moves the imaging region F along a dicing line DL extending in the X direction. As shown in FIG. 3 (b), while performing imaging along the imaging route T that relatively moves the imaging region F along the dicing line DL extending in the Y direction, cracks that lie in the dicing line DL over the entire surface of the wafer W The inspection of the peripheral region Re is performed at a predetermined imaging magnification (relatively high magnification) enough to reliably detect a defect such as chipping.
 より具体的には、周辺領域検査モードでは、エッジ抽出処理を行ってデバイスチップCのチップ端部(つまり、稜線)を検出し、当該稜線の一部が予め設定した侵入禁止エリアに入り込んでいないかどうか、当該稜線から延びたクラックやチッピングなどが侵入禁止エリアに入り込んでいないかどうか等が検査される。 More specifically, in the peripheral area inspection mode, an edge extraction process is performed to detect a chip end portion (that is, a ridge line) of the device chip C, and a part of the ridge line does not enter a preset intrusion prohibition area. It is checked whether cracks, chippings, etc. extending from the ridge line have entered the intrusion prohibited area.
 なお、図3に示す実施例では、隣り合って配置された複数のデバイスチップの周辺領域Reが、ダイシングラインDLを跨ぐような位置関係で同時に撮像されるように、撮像倍率や撮像領域F、撮像ルートT等が検査レシピ登録部5に設定されている。 In the embodiment illustrated in FIG. 3, the imaging magnification and the imaging region F, the peripheral region Re of a plurality of device chips arranged adjacent to each other are simultaneously imaged in a positional relationship straddling the dicing line DL. The imaging route T and the like are set in the inspection recipe registration unit 5.
 図4は、本発明を具現化する形態の一例における概念図である。図4には、デバイス領域検査モードにおける撮像ルートT、撮像領域Fが例示されている。 FIG. 4 is a conceptual diagram showing an example of an embodiment of the present invention. FIG. 4 illustrates an imaging route T and an imaging region F in the device area inspection mode.
 デバイス領域検査モードとは、周辺領域検査モードにおける撮像倍率よりも低い撮像倍率で、ダイシングされたウエーハWのダイシングラインDLをスキップするように撮像領域Fを相対移動させる撮像ルートTで撮像を行い、ウエーハWの全面に亘ってデバイスチップCのデバイス領域Rcを検査する動作モードのことである。 In the device region inspection mode, imaging is performed at an imaging route T that relatively moves the imaging region F so as to skip the dicing line DL of the diced wafer W at an imaging magnification lower than the imaging magnification in the peripheral region inspection mode, This is an operation mode for inspecting the device region Rc of the device chip C over the entire surface of the wafer W.
 具体的には、デバイス領域検査モードでは、デバイス領域Rc上に異物や傷などがついていないか、明らかなパターン崩れや成膜不良などが発生していないか等の判別ができる程度の所定倍率(比較的、低倍率)でデバイス領域Rcの撮像・検査が行われる。 Specifically, in the device region inspection mode, a predetermined magnification (eg, a predetermined magnification (eg, a predetermined magnification factor) is used to determine whether a foreign object or a scratch is present on the device region Rc, whether a clear pattern collapse, a film formation failure, or the like has occurred. The imaging / inspection of the device region Rc is performed at a relatively low magnification.
 より具体的には、デバイス領域検査モードは、デバイス領域Rcに異物や傷、パターン崩れや成膜不良などが発生していない状態の画像(いわゆる、教示画像)が予め登録されており、当該教示画像とこれから検査するために撮像したデバイス領域Rcの画像とを比較して、デバイス領域Rcに異物や傷、パターン崩れや成膜不良などが発生していないかどうか検査される。 More specifically, in the device region inspection mode, an image (a so-called teaching image) in which no foreign matter, scratch, pattern collapse, film formation failure, or the like has occurred in the device region Rc is registered in advance. By comparing the image with the image of the device region Rc taken for inspection from now on, the device region Rc is inspected for foreign matter, scratches, pattern collapse, film formation failure, and the like.
 なお、図4に示す実施例では、デバイス領域検査モードで撮像される所定領域が、周辺領域検査モードで撮像された所定領域をスキップするように、撮像倍率や撮像領域F、撮像ルートT等が検査レシピ登録部5に設定されている。 In the embodiment shown in FIG. 4, the imaging magnification, the imaging region F, the imaging route T, and the like are set such that the predetermined region imaged in the device region inspection mode skips the predetermined region imaged in the peripheral region inspection mode. This is set in the inspection recipe registration unit 5.
 図5は、本発明を具現化する形態の一例におけるフロー図である。図5には、ダイシングチップ検査装置1を用いてウエーハWに配置されているデバイスチップCのデバイス領域Rcおよび周辺領域Reを撮像・検査する構成が、一連のフローとしてステップ毎に示されている。 FIG. 5 is a flowchart showing an example of an embodiment embodying the present invention. FIG. 5 shows a configuration for imaging and inspecting the device region Rc and the peripheral region Re of the device chip C arranged on the wafer W using the dicing chip inspection device 1 as a series of flows for each step. .
 先ず、検査レシピを設定し(ステップs11)、ウエーハWの検査モードや順序を決定する。次に、ウエーハWをダイシングチップ検査装置1のウエーハ載置台20に載置し(ステップs12)、ウエーハW上に形成されている基準マーク(不図示)の読み取り位置へ移動し、アライメントを行う(ステップs13)。 First, an inspection recipe is set (step s11), and an inspection mode and an order of the wafer W are determined. Next, the wafer W is mounted on the wafer mounting table 20 of the dicing chip inspection apparatus 1 (step s12), and is moved to a reading position of a reference mark (not shown) formed on the wafer W to perform alignment ( Step s13).
 続いて、検査レシピに基づいて、周辺領域検査モードに切り替え(ステップs21)、高倍率のレンズが選択されるようにレボルバー機構34を回転させる(ステップs22)。そして、撮像部3と相対移動部4を相対移動させながら撮像・検査を行う(ステップs23)。このモードでの撮像が全て終了したかどうかを判別し(ステップ24)、終了していなければ撮像・検査を続ける。撮像が終了していれば、他の検査モードを実行するか判別する(ステップs25)。 Next, the mode is switched to the peripheral area inspection mode based on the inspection recipe (step s21), and the revolver mechanism 34 is rotated so that a high-magnification lens is selected (step s22). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s23). It is determined whether or not all imaging in this mode has been completed (step 24), and if not completed, imaging and inspection are continued. If the imaging has been completed, it is determined whether to execute another inspection mode (step s25).
 そして、他の検査モード(つまり、デバイス領域検査モード)を実行するのであれば、デバイス領域検査モードに切り替え(ステップs31)、低倍率のレンズが選択されるようにレボルバー機構34を回転させる(ステップs32)。そして、撮像部3と相対移動部4を相対移動させながら撮像・検査を行う(ステップs33)。このモードでの撮像が全て終了したかどうかを判別し(ステップ34)、終了していなければ撮像・検査を続ける。撮像が終了していれば、ウエーハWを装置外に払い出す(ステップs41)。なお、上記ステップ25で他の検査モードを実行しない場合も、ウエーハWを装置外に払い出す(ステップs41)。 If another inspection mode (that is, a device area inspection mode) is to be executed, the mode is switched to the device area inspection mode (step s31), and the revolver mechanism 34 is rotated so that a low-magnification lens is selected (step s31). s32). Then, imaging and inspection are performed while the imaging unit 3 and the relative moving unit 4 are relatively moved (step s33). It is determined whether or not all imaging in this mode has been completed (step 34), and if not completed, imaging and inspection are continued. If the imaging has been completed, the wafer W is paid out of the apparatus (step s41). It should be noted that the wafer W is paid out of the apparatus even when another inspection mode is not executed in step 25 (step s41).
 そして、次のウエーハWの撮像・検査を行うかどうかを判別し(ステップs42)、撮像・検査を行う場合は上述のステップs12~s41を繰り返す。一方、撮像・検査を行わない場合は、検査を終了する。 {Circle around (2)} Then, it is determined whether or not to perform imaging / inspection of the next wafer W (step s42). On the other hand, when imaging and inspection are not performed, the inspection ends.
 なお上述では、先に周辺領域検査モードを実行し、その後にデバイス領域検査モードを実行する手順を例示した。しかし、本発明を具現化する上で、これら検査モードの順序は逆であっても良い。また、これら検査モードは、一連の動作フローや状態を示すものであり、検査レシピに明示された状態で登録されている場合に限らず、明示されずに異なる撮像倍率や撮像ルートT等が登録されている場合も含む。 In the above description, the procedure for executing the peripheral area inspection mode first and then executing the device area inspection mode has been exemplified. However, in implementing the present invention, the order of these inspection modes may be reversed. In addition, these inspection modes indicate a series of operation flows and states, and are not limited to those registered in a state specified in the inspection recipe, and different imaging magnifications and imaging routes T are registered without being specified. Includes cases where
 なお、制御部9から撮像部3への撮像トリガの出力は、下記の様な方式が例示できる。
・X方向やY方向ににスキャン相対移動させながら、所定距離移動する毎に照明光L1を極短時間発光(いわゆる、ストロボ発光)させる方式。
・或いは、所定位置に相対移動および静止させ、静止状態で照明光L1を照射して撮像する(いわゆる、ステップ&リピート)方式。
The output of the imaging trigger from the control unit 9 to the imaging unit 3 can be exemplified by the following method.
A method in which the illumination light L1 is emitted for a very short time (so-called strobe light) each time the scanning light is moved a predetermined distance while being relatively moved in the X and Y directions.
-Alternatively, a relative position and a stationary state are set at a predetermined position, and the illumination light L1 is irradiated in a stationary state to capture an image (so-called step & repeat).
 また、撮像トリガとは、撮像カメラ35や画像処理装置(不図示)に対する画像取り込み指示、照明光L1の発光指示などを意味する。具体的には、撮像トリガとして、(ケース1)撮像カメラ35で撮像可能な時間(いわゆる、露光時間)の間に、照明光L1をストロボ発光させたり、(ケース2)照明光L1が照射されている時間内に、撮像させたり、する。或いは、撮像トリガは、撮像カメラ35に対する指示に限らず、(ケース3)画像を取得する画像処理装置に対する画像取込指示でも良い。そうすることで、撮像カメラ35から映像信号や映像データが逐次出力される形態にも対応できる。 撮 像 The imaging trigger means an image capturing instruction to the imaging camera 35 or an image processing device (not shown), an emission instruction of the illumination light L1, and the like. Specifically, as an imaging trigger, (case 1) the illumination light L1 is strobed during the time during which the imaging camera 35 can capture an image (so-called exposure time), or (case 2) the illumination light L1 is irradiated. Within a certain period of time. Alternatively, the imaging trigger is not limited to the instruction to the imaging camera 35, and (case 3) may be an image capturing instruction to an image processing apparatus that acquires an image. By doing so, it is possible to cope with a mode in which video signals and video data are sequentially output from the imaging camera 35.
 本発明に係るダイシングチップ検査装置1は、この様な構成をしているため、周辺領域検査モードにてダイシングラインに沿った領域(つまり、周辺領域Re)を高倍率の視野サイズで撮像し、クラックやチッピングなどの欠陥を確実に検出(つまり、検査)することができる。一方、デバイス領域検査モードでは、デバイスチップCのデバイス領域Rcを比較的低い倍率の視野サイズで撮像して検査時間を短縮することができる。つまり、ダイシングチップ検査装置1は、デバイス領域Rcと周辺領域Reの双方を所定時間内に所定精度で検査できる。 Since the dicing chip inspection device 1 according to the present invention has such a configuration, in the peripheral region inspection mode, an area along the dicing line (that is, the peripheral region Re) is imaged with a high magnification field size, Defects such as cracks and chippings can be reliably detected (ie, inspected). On the other hand, in the device area inspection mode, the inspection time can be shortened by imaging the device area Rc of the device chip C with a relatively small magnification field of view. That is, the dicing chip inspection device 1 can inspect both the device region Rc and the peripheral region Re with a predetermined accuracy within a predetermined time.
 [別の形態] 
 なお上述では、隣り合って配置された複数のデバイスチップCの周辺領域Rcが、ダイシングラインDLを跨ぐような位置関係で同時に撮像されるように、撮像倍率や撮像領域F、撮像ルートT等が検査レシピ登録部5に設定されている構成を例示した。
[Another form]
In the above description, the imaging magnification, the imaging region F, the imaging route T, and the like are set so that the peripheral regions Rc of the plurality of device chips C arranged adjacent to each other are simultaneously imaged in a positional relationship that straddles the dicing line DL. The configuration set in the inspection recipe registration unit 5 has been exemplified.
 この様な構成であれば、撮像回数を減らすことができ、ウエーハWの1枚当たりに費やす検査時間を短縮できるため好ましい。 (4) Such a configuration is preferable because the number of times of imaging can be reduced, and the inspection time per wafer W can be reduced.
 しかし、撮像領域Fに対してダイシングラインDLの幅が太く、周辺領域Reの稜線が視野から外れやすい場合や、検出すべき割れや欠けが小さく、撮像倍率を上げるとダイシングラインDLを跨ぐような位置関係で同時に撮像できない場合には、1つのデバイスチップCの周辺領域Rcを撮像する形態であっても良い。 However, when the width of the dicing line DL is large with respect to the imaging region F, the ridge line of the peripheral region Re is likely to be out of the field of view, or cracks or chips to be detected are small, and if the imaging magnification is increased, the dicing line DL may be straddled. If the images cannot be captured simultaneously due to the positional relationship, the peripheral region Rc of one device chip C may be captured.
  1  ダイシングチップ検査装置
  2  ウエーハ保持部
  3  撮像部
  4  相対移動部
  5  検査レシピ登録部
  9  制御部
  1f 装置フレーム
  20 ウエーハ載置台
  30 鏡筒
  31 照明部
  32 ハーフミラー
  33a,33b 対物レンズ
  34 レボルバー機構
  35 撮像カメラ
  41 X軸スライダー
  42 Y軸スライダー
  43 回転機構
  W  ウエーハ
  C  デバイスチップ
  DL ダイシングライン(溝/隙間)
  F  撮像領域(視野)
  Rc デバイス領域
  Re 周辺領域(稜線近傍)
  L1 照明光
  L2 ウエーハ側から入射した光(反射光、散乱光)
  T  撮像ルート
REFERENCE SIGNS LIST 1 dicing chip inspection device 2 wafer holding unit 3 imaging unit 4 relative movement unit 5 inspection recipe registration unit 9 control unit 1f device frame 20 wafer mounting table 30 lens barrel 31 illumination unit 32 half mirror 33a, 33b objective lens 34 revolver mechanism 35 imaging Camera 41 X-axis slider 42 Y-axis slider 43 Rotation mechanism W Wafer C Device chip DL Dicing line (groove / gap)
F Imaging area (field of view)
Rc device area Re peripheral area (near ridge line)
L1 Illumination light L2 Light incident from the wafer side (reflected light, scattered light)
T imaging route

Claims (2)

  1.  ダイシングされたウエーハに配置されているデバイスチップのデバイス領域および周辺領域を検査するダイシングチップ検査装置において、
     前記ウエーハを保持するウエーハ保持部と、
     前記ウエーハに設定された所定領域を所定の撮像倍率で撮像する撮像部と、
     前記ウエーハと前記撮像部とを相対移動させる相対移動部と、
     前記相対移動部における相対移動の方向および速度、ならびに、前記撮像部における前記撮像倍率および撮像位置を検査レシピとして登録する検査レシピ登録部と、
     前記検査レシピに基づいて前記撮像部および相対移動部を制御する制御部を備え、
     前記制御部は、
    所定の撮像倍率で前記ダイシングされたウエーハのダイシングラインが含まれるように当該ダイシングラインに沿いながら撮像を行い、前記デバイスチップの前記周辺領域を検査する周辺領域検査モードと、
    前記周辺領域検査モードにおける撮像倍率よりも低い撮像倍率で、前記ダイシングラインをスキップするように撮像を行い、前記デバイス領域を検査するデバイス領域検査モードとを備え、
     前記検査レシピ登録部には、前記デバイス領域検査モードおよび前記周辺領域検査モードの少なくとも一方を実行するための前記検査レシピが登録されている
    ことを特徴とする、ダイシングチップ検査装置。
    In a dicing chip inspection device for inspecting a device region and a peripheral region of a device chip arranged on a diced wafer,
    A wafer holding unit for holding the wafer,
    An imaging unit that images a predetermined area set on the wafer at a predetermined imaging magnification,
    A relative moving unit that relatively moves the wafer and the imaging unit;
    An inspection recipe registration unit that registers the direction and speed of the relative movement in the relative movement unit, and the imaging magnification and the imaging position in the imaging unit as an inspection recipe,
    A control unit that controls the imaging unit and the relative movement unit based on the inspection recipe,
    The control unit includes:
    A peripheral area inspection mode for performing imaging along the dicing line so as to include a dicing line of the diced wafer at a predetermined imaging magnification and inspecting the peripheral area of the device chip;
    At an imaging magnification lower than the imaging magnification in the peripheral area inspection mode, imaging is performed so as to skip the dicing line, and a device area inspection mode for inspecting the device area,
    A dicing chip inspection apparatus, wherein the inspection recipe for executing at least one of the device area inspection mode and the peripheral area inspection mode is registered in the inspection recipe registration unit.
  2.  前記検査レシピ登録部には、
     隣り合って配置された複数の前記デバイスチップの前記周辺領域が、前記ダイシングラインを跨ぐような位置関係で同時に撮像されるように設定されている
    ことを特徴とする、請求項1に記載のダイシングチップ検査装置。
    In the inspection recipe registration section,
    2. The dicing device according to claim 1, wherein the peripheral regions of the plurality of device chips arranged adjacent to each other are set so as to be simultaneously imaged in a positional relationship across the dicing line. 3. Chip inspection device.
PCT/JP2019/023572 2018-07-06 2019-06-13 Dicing-tip inspection apparatus WO2020008838A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201980036796.7A CN112204384A (en) 2018-07-06 2019-06-13 Cut chip inspection device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018128666A JP7007993B2 (en) 2018-07-06 2018-07-06 Dicing tip inspection device
JP2018-128666 2018-07-06

Publications (1)

Publication Number Publication Date
WO2020008838A1 true WO2020008838A1 (en) 2020-01-09

Family

ID=69060203

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/023572 WO2020008838A1 (en) 2018-07-06 2019-06-13 Dicing-tip inspection apparatus

Country Status (4)

Country Link
JP (1) JP7007993B2 (en)
CN (1) CN112204384A (en)
TW (1) TWI815913B (en)
WO (1) WO2020008838A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11462439B2 (en) * 2019-10-10 2022-10-04 Disco Corporation Wafer processing method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022061127A (en) * 2020-10-06 2022-04-18 東レエンジニアリング株式会社 Exterior appearance inspection device and method

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57167651A (en) * 1981-04-07 1982-10-15 Mitsubishi Electric Corp Inspecting device for surface of semiconductor wafer
JPH03144568A (en) * 1989-10-31 1991-06-19 Fujitsu Ltd Reticule inspecting device
JP2004177377A (en) * 2002-11-29 2004-06-24 Hitachi Ltd Inspecting method and inspecting apparatus
JP2008139202A (en) * 2006-12-04 2008-06-19 Tokyo Electron Ltd Apparatus and method for detecting defect, apparatus and method for processing information, and its program
JP2009162718A (en) * 2008-01-10 2009-07-23 Olympus Corp Substrate inspection apparatus and method for setting inspection area
US20130082257A1 (en) * 2011-10-03 2013-04-04 St Microelectronics, Inc. Via chains for defect localization
JP2017111147A (en) * 2015-12-18 2017-06-22 ウルトラテック インク Full-wafer inspection methods having selectable pixel density
JP2017161236A (en) * 2016-03-07 2017-09-14 東レエンジニアリング株式会社 Defect inspection device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3144568B2 (en) 1991-09-25 2001-03-12 マツダ株式会社 Vehicle noise control device
JPH0755711A (en) * 1993-08-12 1995-03-03 Sumitomo Electric Ind Ltd Semiconductor-device inspecting apparatus
JP3349339B2 (en) * 1996-04-24 2002-11-25 シャープ株式会社 Dicing machine with visual inspection function
US6324298B1 (en) * 1998-07-15 2001-11-27 August Technology Corp. Automated wafer defect inspection system and a process of performing such inspection
JP5187505B2 (en) * 2008-04-07 2013-04-24 株式会社東京精密 Dicing method
JP5544894B2 (en) * 2010-01-21 2014-07-09 カシオ計算機株式会社 Wafer inspection apparatus and wafer inspection method
CN102053093A (en) * 2010-11-08 2011-05-11 北京大学深圳研究生院 Method for detecting surface defects of chip cut from wafer surface
JP5978162B2 (en) * 2013-03-29 2016-08-24 株式会社日立ハイテクノロジーズ Defect inspection method and defect inspection apparatus
JP6617050B2 (en) * 2016-02-22 2019-12-04 東京エレクトロン株式会社 Substrate imaging device
KR102195029B1 (en) * 2016-05-24 2020-12-28 주식회사 히타치하이테크 Defect Classification Device and Defect Classification Method
JP2018054429A (en) * 2016-09-28 2018-04-05 株式会社Screenホールディングス Detection method and detection device
CN206557129U (en) * 2016-11-17 2017-10-13 哈尔滨理工大学 A kind of lens defects detecting system

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57167651A (en) * 1981-04-07 1982-10-15 Mitsubishi Electric Corp Inspecting device for surface of semiconductor wafer
JPH03144568A (en) * 1989-10-31 1991-06-19 Fujitsu Ltd Reticule inspecting device
JP2004177377A (en) * 2002-11-29 2004-06-24 Hitachi Ltd Inspecting method and inspecting apparatus
JP2008139202A (en) * 2006-12-04 2008-06-19 Tokyo Electron Ltd Apparatus and method for detecting defect, apparatus and method for processing information, and its program
JP2009162718A (en) * 2008-01-10 2009-07-23 Olympus Corp Substrate inspection apparatus and method for setting inspection area
US20130082257A1 (en) * 2011-10-03 2013-04-04 St Microelectronics, Inc. Via chains for defect localization
JP2017111147A (en) * 2015-12-18 2017-06-22 ウルトラテック インク Full-wafer inspection methods having selectable pixel density
JP2017161236A (en) * 2016-03-07 2017-09-14 東レエンジニアリング株式会社 Defect inspection device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11462439B2 (en) * 2019-10-10 2022-10-04 Disco Corporation Wafer processing method

Also Published As

Publication number Publication date
CN112204384A (en) 2021-01-08
TWI815913B (en) 2023-09-21
JP2020008383A (en) 2020-01-16
TW202016532A (en) 2020-05-01
JP7007993B2 (en) 2022-01-25

Similar Documents

Publication Publication Date Title
US6432800B2 (en) Inspection of defects on the circumference of semiconductor wafers
JP5002961B2 (en) Defect inspection apparatus and defect inspection method
US7636156B2 (en) Wafer inspection system and method
JP4545412B2 (en) Board inspection equipment
US20110141272A1 (en) Apparatus and method for inspecting an object surface defect
JP2016197702A (en) Processing apparatus
JP2006329714A (en) Lens inspection apparatus
WO2020008838A1 (en) Dicing-tip inspection apparatus
WO2022075041A1 (en) Appearance inspection device and method
JP7368141B2 (en) Wafer appearance inspection device and method
JP5134603B2 (en) Light beam adjusting method and light beam adjusting apparatus
JP5210056B2 (en) Laser processing equipment
US20040150814A1 (en) Inspecting device for semiconductor wafer
JP2003294419A (en) Measuring instrument for infinitesimal dimension
JP6671309B2 (en) Inspection device and inspection method
JP2010123700A (en) Test apparatus
KR19990034411A (en) Inspection device and inspection method for semiconductor wafers.
JP7293046B2 (en) Wafer visual inspection apparatus and method
JP3076187B2 (en) Appearance inspection device and appearance inspection method
JP6775389B2 (en) Visual inspection equipment and visual inspection method
JP2000028535A (en) Defect inspecting device
WO2023119882A1 (en) Wafer external appearance inspecting device
JP2008139088A (en) Visual examination method
JP2000088760A (en) Work-inspecting device
KR100272240B1 (en) Testing method and pattern testing apparatus of image device with reqular minuteness pattern

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19830638

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19830638

Country of ref document: EP

Kind code of ref document: A1