WO2019227635A1 - 一种阵列基板的制作方法、阵列基板、显示面板及装置 - Google Patents

一种阵列基板的制作方法、阵列基板、显示面板及装置 Download PDF

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Publication number
WO2019227635A1
WO2019227635A1 PCT/CN2018/096512 CN2018096512W WO2019227635A1 WO 2019227635 A1 WO2019227635 A1 WO 2019227635A1 CN 2018096512 W CN2018096512 W CN 2018096512W WO 2019227635 A1 WO2019227635 A1 WO 2019227635A1
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WO
WIPO (PCT)
Prior art keywords
array substrate
layer
common electrode
substrate
touch common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/096512
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English (en)
French (fr)
Inventor
曹志浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US16/211,517 priority Critical patent/US20190369429A1/en
Publication of WO2019227635A1 publication Critical patent/WO2019227635A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133357Planarisation layers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present application relates to the field of display technology, and in particular, to a method for manufacturing an array substrate, an array substrate, a display panel, and a device.
  • the touch common electrode In the field of touch display, the touch common electrode is generally divided into a checkerboard shape to sense the finger touch signal corresponding to the checkerboard.
  • the touch common electrode is covered with a dielectric layer to insulate.
  • the touch common electrode is separated, resulting in an uneven cross section After the product is formed into a box, the product is deformed by the influence of its own gravity, which easily leads to uneven gaps after the box is formed, resulting in abnormal display.
  • the main problem solved by the present application is to provide an array substrate manufacturing method, an array substrate, a display panel and a device, which can effectively improve display abnormalities caused by uneven display panel gaps.
  • the technical solution adopted in the present application is to provide an array substrate.
  • the array substrate includes a flat layer and a touch common electrode located on the flat layer.
  • the flat layer has a plurality of raised areas and a plurality of convex areas distributed in an array. In the recessed area, the touch common electrode is disposed in the recessed area.
  • the method for fabricating the array substrate includes: providing a substrate; sequentially fabricating a flat layer and a touch common on the substrate.
  • the electrodes form an array substrate; wherein the flat layer has a plurality of raised areas and a plurality of recessed areas, and the touch common electrode is disposed in the recessed areas.
  • a display panel including: an array substrate, a color filter substrate, and a liquid crystal layer disposed between the color filter substrate and the array substrate;
  • the array substrate includes The flat layer and the touch common electrode located on the flat layer;
  • the flat layer has a plurality of raised areas and a plurality of recessed areas, and the touch common electrodes are disposed in the recessed areas;
  • the shape of the color filter substrate corresponds to the shape of the array substrate.
  • the beneficial effect of the present application is that the array substrate includes a stacked flat layer and a touch common electrode; the flat layer has a plurality of raised regions and a plurality of recessed regions distributed in an array, so that the touch common electrode is disposed in the recess Within the area; because the flat layer has a raised area, the distance between the flat layer and the color film substrate of the display panel at the raised area can be reduced, so the unevenness of the color film substrate after box formation due to gravity can be improved, thereby It can effectively improve display abnormality caused by uneven display panel gaps.
  • FIG. 1 is a schematic structural diagram of a display panel in the prior art
  • FIG. 2 is a schematic structural diagram of an embodiment of an array substrate provided by the present application.
  • FIG. 3 is a schematic structural diagram of another embodiment of an array substrate provided by the present application.
  • FIG. 4 is a schematic flowchart of an embodiment of a manufacturing method of an array substrate provided by the present application.
  • FIG. 5 is a schematic structural diagram of an array substrate in an embodiment of an array substrate manufacturing method provided by the present application.
  • FIG. 6 is a schematic flowchart of another embodiment of a manufacturing method of an array substrate provided by the present application.
  • FIG. 7 is a schematic structural diagram of forming a substrate, a flat layer, and a photoresist in another embodiment of a manufacturing method of an array substrate provided by the present application;
  • FIG. 8 is a schematic structural diagram of an array substrate manufacturing method according to another embodiment of the present invention after exposure and etching;
  • FIG. 9 is a schematic structural diagram of an array substrate in another embodiment of an array substrate manufacturing method provided by the present application.
  • FIG. 10 is a schematic structural diagram of an embodiment of a display panel provided by the present application.
  • FIG. 11 is a schematic structural diagram of an embodiment of a display device provided by the present application.
  • a touch display device is a device that can implement both display and touch.
  • touch display devices generally include a touch display panel, and a touch display panel generally includes a display panel and a touch panel. Since the in-cell touch display panel (In-cell) is convenient for manufacturing thin and light products, it has been widely studied and applied.
  • In-cell in-cell touch display panel
  • the in-cell touch display panel integrates touch and display functions, that is, both the touch circuit and the display circuit are made on the thin film transistor array substrate, which is conducive to the improvement of penetration and can enable electronic display devices such as mobile phones. Made thinner.
  • FIG. 1 A schematic structural diagram of a display panel in the prior art is shown in FIG. 1.
  • the display panel includes a color filter substrate 11, support pillars 12, and an array substrate 13.
  • the array substrate 13 includes a dielectric layer 131, a touch common electrode 132, and a flat layer 133. Because the touch common electrode 132 is separated, the dielectric layer 131 at the adjacent touch common electrode 132 is recessed, resulting in an uneven cross-section. After the product is boxed, it is affected by its own gravity.
  • the color film substrate 11 occurs at the recess of the dielectric layer 131. Deformation, resulting in abnormal display.
  • FIG. 2 is a schematic structural diagram of an embodiment of an array substrate provided in the present application.
  • the array substrate includes a flat layer 21 and a touch common electrode 22 on the flat layer 21.
  • the flat layer 21 has a plurality of raised regions 211 and a plurality of recessed regions 212 distributed in an array.
  • the touch common electrode 22 is disposed in the recessed regions 212.
  • a substrate below the flat layer 21 are a substrate, a gate layer, an active layer, a source / drain layer, and an insulating layer (not shown in the figure).
  • the flat layer 21 has a raised area 211, it is used to improve the defect that the gap between the color film substrate 22 and the unevenness after the box is formed due to gravity, so that the gap between the gaps around the display panel after the box is reduced, and the touch display is guaranteed.
  • the performance and yield of the panel can effectively improve the display abnormality caused by uneven display panel gaps.
  • the planar layer of the array substrate is designed to have a plurality of raised regions and a plurality of recessed regions distributed in an array, so that the touch common electrode is disposed in the recessed regions;
  • the raised area can reduce the distance between the flat layer at the raised area and the color film substrate of the display panel, so that the unevenness of the color film substrate after the box is formed due to gravity can effectively improve the unevenness of the display panel.
  • the display is abnormal.
  • FIG. 3 is a schematic structural diagram of another embodiment of an array substrate provided in the present application.
  • the array substrate includes a flat layer 33 and a touch common electrode 32 on the flat layer 33.
  • the flat layer 33 has a plurality of raised areas 331 and a plurality of recessed areas 332 distributed in an array.
  • the touch common electrode 32 is disposed in the recessed areas 332, and the thickness of the touch common electrode 32 is the same as the height of the raised area 331.
  • the raised region 331 may be a part of the flat layer 33 itself, and is formed by etching, or may not be a part of the flat layer 33 itself, and other filling materials may be additionally filled to form the raised region 331.
  • the material of the touch common electrode 32 may be indium tin oxide (Indium Tin Oxide). Oxide (ITO), and the thickness of the touch common electrode 32 may be 60 nm.
  • the array substrate further includes a dielectric layer 31 which covers the flat layer 32 and the touch common electrode 33.
  • the thickness of the touch common electrode 32 is the same as the height of the raised area 331, the surface of the array substrate is flat, which prevents the defect of uneven gap after the box is formed by the color film substrate due to gravity, and the display panel after the box
  • the gaps everywhere can be guaranteed to be consistent, ensuring the performance and yield of the touch display panel, and effectively avoiding display anomalies caused by uneven display panel gaps.
  • this embodiment provides an array substrate.
  • a flat layer By setting a flat layer to have a structure with a plurality of raised regions and a plurality of recessed regions distributed in an array, and the touch common electrode is arranged in the recessed regions. , Keep the thickness of the touch common electrode the same as the height of the raised area; so that the surface of the dielectric layer is flat, which can effectively prevent the color film substrate from unevenness after the box is formed due to gravity, and can effectively avoid the display panel Display irregularities caused by uneven gaps.
  • FIG. 4 is a schematic flowchart of an embodiment of a manufacturing method of an array substrate provided by the present application.
  • the manufacturing method of the array substrate includes:
  • Step 41 Provide a substrate.
  • Step 42 A planar layer and a touch common electrode are sequentially formed on the substrate to form an array substrate.
  • a flat layer 52 and a touch common electrode 53 are sequentially formed on the substrate 51 to form an array substrate.
  • the flat layer 52 has a plurality of raised regions 521 and a plurality of recessed regions 522.
  • the manufacturing method of the array substrate provided in this embodiment firstly provides a substrate; then, a flat layer and a touch common electrode are sequentially formed on the substrate to form an array substrate; The structure of the raised area and multiple recessed areas.
  • the touch common electrode is arranged in the recessed area to improve the unevenness of the surface of the array substrate, which can effectively improve the unevenness of the color film substrate after the box is formed due to gravity, thereby improving Display irregularities caused by uneven display panel gaps.
  • FIG. 6 is a schematic flowchart of another embodiment of a manufacturing method of an array substrate provided in the present application.
  • the manufacturing method of the array substrate includes:
  • Step 61 Provide a substrate.
  • Step 62 A flat layer is formed on the substrate.
  • Step 63 Coating a photoresist on the top surface of the flat layer.
  • a flat layer 72 is formed on the substrate 71, and a photoresist 73 is coated on the upper surface of the flat layer 72.
  • the photoresist 73 is a forward photoresist, and the photoresist 73 may be a transparent material.
  • Step 64 Cover the photoresist with a mask, perform exposure processing, and perform etching.
  • a mask 74 is covered on the photoresist 73.
  • the mask 74 has an array distribution pattern.
  • the photoresist 73 corresponding to the light transmitting area of the mask 74 is developed. It will be developed away, and the flat layer 72 not protected by the photoresist 73 will be etched away. After the etching, the flat layer 72 has a plurality of raised areas 721 and a plurality of recessed areas 722; as shown in FIG. 8.
  • Step 65 The photoresist is peeled off, and a touch common electrode is formed in the recessed area of the flat layer.
  • the photoresist 73 is peeled off, and a touch common electrode 74 is formed in the recessed region 722 area of the flat layer 72, as shown in FIG. 9.
  • the touch common electrode 74 is disposed in the recessed area 722, and the thickness of the touch common electrode 74 is the same as the height of the raised area 721 of the flat layer 72; the material of the touch common electrode 74 may be indium tin oxide, and the touch common electrode The thickness of 74 may be 60 nm.
  • Step 66 A dielectric layer is formed on the flat layer and the touch common electrode.
  • a dielectric layer 75 is formed on the flat layer 72 and the touch common electrode 74 to finally form an array substrate.
  • the manufacturing method of the array substrate provided in this embodiment is to set the flat layer to have a structure with a plurality of raised areas and a plurality of recessed areas, and set the touch common electrode in the recessed area so that The thickness of the touch common electrode is the same as the height of the raised area of the flat layer; therefore, the surface of the array substrate is flat, which can effectively avoid display abnormalities caused by uneven display panel gaps.
  • FIG. 10 is a schematic structural diagram of an embodiment of a display panel provided in the present application.
  • the display panel includes an array substrate 101, a color filter substrate 102, and a liquid crystal layer 103 disposed between the color filter substrate 102 and the array substrate 101.
  • the array substrate 101 is an array substrate in the above embodiment, or an array substrate manufactured by using the array substrate manufacturing method in the above embodiment.
  • the shape of the color filter substrate 102 corresponds to the shape of the array substrate 101.
  • the array substrate 101 includes a flat layer 1013, a touch common electrode 1012, and a dielectric layer 1011.
  • the flat layer 1013 has a plurality of raised regions 10131 and a plurality of recessed regions 10132 distributed in an array.
  • the touch common electrode 1012 is disposed in the recessed regions 10132.
  • the color filter substrate 102 includes a substrate layer 1021, a color filter layer 1022, and a protective layer 1023 that are disposed in a stack.
  • the protective layer 1023 is disposed adjacent to the liquid crystal layer 103.
  • a support pillar 104 needs to be provided between the color filter substrate 102 and the array substrate 101.
  • the color film substrate 102 is provided with a plurality of support pillars 104.
  • the support pillars 104 are disposed between the dielectric layer 1011 and the color film substrate 102. At least a part of the support pillars 104 is located in the convex area 10131, and at least another part of the support pillars 104 is located in the touch area. The area where the common electrode 1012 is located.
  • the supporting pillar 104 can effectively provide a certain support force when it is bumped by a hard object, preventing the bump of the hard object from causing the inner film layer. Cracks are generated, thereby improving the anti-bumping ability of the display panel.
  • a liquid crystal layer 103 is injected between the color filter substrate 102 and the array substrate 101 to implement a display function.
  • the thickness of the touch common electrode 1012 is substantially the same as the height of the raised area 10131, the surface of the array substrate 101 is substantially flat, preventing the color film substrate 102 from causing unevenness after the box is formed due to gravity.
  • the gaps around the display panel can be basically guaranteed to be consistent, ensuring the performance and yield of the touch display panel, and effectively avoiding display anomalies caused by uneven display panel gaps.
  • FIG. 11 is a schematic structural diagram of a display device according to an embodiment of the present application.
  • the display device 110 includes a backlight module 111 and a display panel 112.
  • the display panel 112 is the display panel in the above embodiment.

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Abstract

本申请公开了一种阵列基板的制作方法、阵列基板、显示面板及装置,该阵列基板包括平坦层和位于平坦层上的触控公共电极;其中,平坦层具有阵列分布的多个凸起区域和多个凹陷区域,触控公共电极设置于凹陷区域内。通过上述方式,本申请能够有效改善显示面板间隙不均导致的显示异常。

Description

一种阵列基板的制作方法、阵列基板、显示面板及装置
【技术领域】
本申请涉及显示技术领域,具体涉及一种阵列基板的制作方法、阵列基板、显示面板及装置。
【背景技术】
在触控显示领域一般把触控公共电极分隔成棋盘格状,以感应对应棋盘格处手指触控信号,触控公共电极上方覆盖介质层绝缘,因触控公共电极被分隔,导致截面不平坦,在产品成盒之后受自身重力影响发生形变,容易导致成盒之后间隙不均,从而导致显示异常。
【发明内容】
本申请主要解决的问题是提供一种阵列基板的制作方法、阵列基板、显示面板及装置,能够有效改善显示面板间隙不均导致的显示异常。
为解决上述技术问题,本申请采用的技术方案是提供一种阵列基板,该阵列基板包括平坦层和位于平坦层上的触控公共电极;平坦层具有阵列分布的多个凸起区域和多个凹陷区域,触控公共电极设置于凹陷区域内。
为解决上述技术问题,本申请采用的另一技术方案是提供一种阵列基板的制作方法,该阵列基板的制作方法包括:提供一衬底;在衬底上依序制作平坦层和触控公共电极以形成阵列基板;其中,平坦层具有多个凸起区域和多个凹陷区域,触控公共电极设置于凹陷区域内。
为解决上述技术问题,本申请采用的另一技术方案是提供一种显示面板,该显示面板包括:阵列基板、彩膜基板以及设置于彩膜基板和阵列基板之间的液晶层;阵列基板包括平坦层和位于平坦层上的触控公共电极;平坦层具有多个凸起区域和多个凹陷区域,触控公共电极设置于凹陷区域内;彩膜基板的形状与阵列基板的形状对应。
通过上述方案,本申请的有益效果是:该阵列基板包括层叠的平坦层和触控公共电极;平坦层具有阵列分布的多个凸起区域和多个凹陷区域,使得触控公共电极设置于凹陷区域内;由于平坦层具有凸起区域,可以减小凸起区域处平坦层与显示面板的彩膜基板之间的距离,因此可以改善彩膜基板因重力原因导致成盒之后间隙不均,从而可以有效地改善显示面板间隙不均导致的显示异常。
【附图说明】
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。其中:
图1是现有技术中显示面板的结构示意图;
图2是本申请提供的阵列基板一实施例的结构示意图;
图3是本申请提供的阵列基板另一实施例的结构示意图;
图4是本申请提供的阵列基板的制作方法一实施例的流程示意图;
图5是本申请提供的阵列基板的制作方法一实施例中的阵列基板的结构示意图;
图6是本申请提供的阵列基板的制作方法另一实施例的流程示意图;
图7是本申请提供的阵列基板的制作方法另一实施例中形成衬底、平坦层和光阻的结构示意图;
图8是本申请提供的阵列基板的制作方法另一实施例中曝光和蚀刻后的结构示意图;
图9是本申请提供的阵列基板的制作方法另一实施例中阵列基板的结构示意图;
图10是本申请提供的显示面板一实施例的结构示意图;
图11是本申请提供的显示装置一实施例的结构示意图。
【具体实施方式】
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
触控显示装置是一种可以既可以实现显示又可以实现触控的装置,目前触控显示装置通常包括触控显示面板,触控显示面板通常包括显示面板和触控面板。由于内嵌式触控显示面板(In-cell)便于制造轻薄化的产品,因而得到广泛的研究和应用。
因为内嵌式触控显示面板将触控与显示功能集成在一起,即将触控电路和显示电路均做在薄膜晶体管阵列基板上,有利于穿透度的提升,且可以使手机等电子显示设备做的更加轻薄。
现有技术中显示面板的结构示意图如图1所示,该显示面板包括彩膜基板11、支撑柱12和阵列基板13,阵列基板13包括介质层131、触控公共电极132和平坦层133。因触控公共电极132被分隔,相邻触控公共电极132处的介质层131凹陷下去导致截面不平坦,在产品成盒之后受自身重力影响,彩膜基板11在介质层131凹陷下去处发生形变,从而导致显示异常。
参阅图2,图2是本申请提供的阵列基板一实施例的结构示意图,该阵列基板包括平坦层21和位于平坦层21上的触控公共电极22。
平坦层21具有阵列分布的多个凸起区域211和多个凹陷区域212,触控公共电极22设置于凹陷区域212内。
平坦层21以下为衬底、栅极层、有源层、源/漏极层以及绝缘层(图中未示出)。
由于平坦层21具有凸起区域211,用以改善彩膜基板22因重力原因导致成盒之后间隙不均的缺陷,使得成盒后的显示面板各处间隙的差距减小,保证了触控显示面板的性能和良率,可以有效改善显示面板间隙不均导致的显示异常。
区别于现有技术,本实施例将阵列基板的平坦层设计成具有阵列分布的多个凸起区域和多个凹陷区域的结构,使得触控公共电极设置于凹陷区域内;由于平坦层具有凸起区域,可以减小凸起区域处平坦层与显示面板的彩膜基板之间的距离,因此可以改善彩膜基板因重力原因导致成盒之后间隙不均,可以有效地改善显示面板间隙不均导致的显示异常。
参阅图3,图3是本申请提供的阵列基板另一实施例的结构示意图,该阵列基板包括平坦层33和位于平坦层33上的触控公共电极32。
平坦层33具有阵列分布的多个凸起区域331和多个凹陷区域332,触控公共电极32设置于凹陷区域332内,且触控公共电极32的厚度与凸起区域331的高度相同。
其中,凸起区域331可以是平坦层33本身的一部分,利用蚀刻形成,也可以不是平坦层33本身的一部分,可以另外填入其他填充材料以形成凸起区域331。
优选地,触控公共电极32的材料可以为氧化铟锡(Indium Tin Oxide,ITO),触控公共电极32的厚度可以为60nm。
阵列基板还包括介质层31,介质层31覆盖平坦层32和触控公共电极33。
由于触控公共电极32的厚度与凸起区域331的高度相同,因而阵列基板的表面是平坦的,防止彩膜基板因重力原因导致成盒之后产生间隙不均的缺陷,成盒后的显示面板各处间隙均能保证一致,保证了触控显示面板的性能和良率,可以有效地避免显示面板间隙不均导致的显示异常。
区别于现有技术,本实施例提供了一种阵列基板,通过将平坦层设置为具有阵列分布的多个凸起区域和多个凹陷区域的结构,并使得触控公共电极设置于凹陷区域内,保持触控公共电极的厚度与凸起区域的高度相同;从而使得介质层的表面是平坦的,可以有效地防止彩膜基板因重力原因导致成盒之后间隙不均,可以有效地避免显示面板间隙不均导致的显示异常。
参阅图4和图5,图4是本申请提供的阵列基板的制作方法一实施例的流程示意图,该阵列基板的制作方法包括:
步骤41:提供一衬底。
步骤42:在衬底上依序制作平坦层和触控公共电极以形成阵列基板。
在衬底51上依序制作平坦层52和触控公共电极53以形成阵列基板;其中,平坦层52具有多个凸起区域521和多个凹陷区域522。
区别于现有技术,本实施例提供的阵列基板的制作方法,首先提供一衬底;然后在衬底上依序制作平坦层和触控公共电极以形成阵列基板;由于平坦层为具有多个凸起区域和多个凹陷区域的结构,将触控公共电极设置于凹陷区域内,改善阵列基板的表面的不平坦,可以有效改善彩膜基板因重力原因导致成盒之后间隙不均,从而改善显示面板间隙不均导致的显示异常。
参阅图6至图9,图6是本申请提供的阵列基板的制作方法另一实施例的流程示意图,该阵列基板的制作方法包括:
步骤61:提供一衬底。
步骤62:在衬底上形成平坦层。
步骤63:在平坦层的上表面涂布一层光阻。
在衬底71上形成平坦层72,并在平坦层72的上表面涂布一层光阻73;其中,光阻73为正向光阻,光阻73可以为透明材料。
步骤64:在光阻上覆盖一掩膜,进行曝光处理,并进行蚀刻。
在完成涂布光阻后73,在光阻73上覆盖一掩膜74,掩膜74具有阵列分布的图案,在进行曝光处理后,掩膜74的透光区域对应的光阻73在显影后就会被显影掉,并把没有光阻73保护的平坦层72蚀刻掉,蚀刻后平坦层72具有多个凸起区域721和多个凹陷区域722;如图8所示。
步骤65:将光阻剥离,并在平坦层的凹陷区域形成触控公共电极。
对光阻73进行剥离,并在平坦层72的凹陷区722域形成触控公共电极74,如图9所示。
触控公共电极74设置于凹陷区域722内,且触控公共电极74的厚度与平坦层72的凸起区域721的高度相同;触控公共电极74的材料可以为氧化铟锡,触控公共电极74的厚度可以为60nm。
步骤66:在平坦层和触控公共电极上形成介质层。
在平坦层72和触控公共电极74上形成介质层75,最终形成阵列基板。
区别于现有技术,本实施例提供的阵列基板的制作方法,通过将平坦层设置为具有多个凸起区域和多个凹陷区域的结构,并将触控公共电极设置于凹陷区域内,使得触控公共电极的厚度与平坦层的凸起区域的高度相同;从而致使阵列基板的表面是平坦的,可以有效地避免显示面板间隙不均导致的显示异常。
参阅图10,图10是本申请提供的显示面板一实施例的结构示意图;该显示面板包括阵列基板101、彩膜基板102以及设置于彩膜基板102和阵列基板101之间的液晶层103。
其中,阵列基板101是上述实施例中的阵列基板,或者采用上述实施例中的阵列基板的制作方法制作得到的阵列基板,彩膜基板102的形状与阵列基板101的形状对应。
阵列基板101包括层叠设置的平坦层1013、触控公共电极1012和介质层1011。
其中,平坦层1013具有阵列分布的多个凸起区域10131和多个凹陷区域10132,触控公共电极1012设置于凹陷区域10132内。
彩膜基板102包括层叠设置的衬底层1021、彩膜层1022和保护层1023,保护层1023邻近液晶层103设置。
为了维持液晶显示面板的成盒后的厚度,保证良好的显示效果,需要在彩膜基板102和阵列基板101之间设置支撑柱104。
彩膜基板102上设置有多个支撑柱104,支撑柱104设置于介质层1011与彩膜基板102之间,且至少一部分支撑柱104位于凸起区域10131,至少另一部分支撑柱104位于触控公共电极1012所在区域。
由于设置的支撑柱104的材料硬度大于该支撑柱104所在的有机层的材料硬度,因而在有硬物磕碰时,支撑柱104可以有效地提供一定的支撑力,防止硬物磕碰使内部膜层产生裂纹,进而提高了显示面板抗磕碰的能力。
彩膜基板102与阵列基板101成盒后,会在彩膜基板102与阵列基板101之间注入液晶层103,从而实现显示功能。
由于触控公共电极1012的厚度与凸起区域10131的高度基本相同,因而阵列基板101的表面基本上是平坦的,防止彩膜基板102因重力原因导致成盒之后间隙不均,成盒后的显示面板各处间隙均能基本保证一致,保证了触控显示面板的性能和良率,可以有效避免显示面板间隙不均导致的显示异常。
参阅图11,图11是本申请提供的显示装置一实施例的结构示意图,该显示装置110包括背光模组111与显示面板112,显示面板112为上述实施例中的显示面板。
以上仅为本申请的实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。

Claims (20)

  1. 一种阵列基板,其中,所述阵列基板包括平坦层和位于所述平坦层上的触控公共电极;所述平坦层具有多个凸起区域和多个凹陷区域,所述触控公共电极设置于所述凹陷区域内。
  2. 根据权利要求1所述的阵列基板,其中,
    所述触控公共电极的厚度与所述凸起区域的高度相同。
  3. 根据权利要求1所述的阵列基板,其中,
    所述阵列基板还包括介质层,所述介质层覆盖所述平坦层和所述触控公共电极。
  4. 根据权利要求1所述的阵列基板,其中,
    所述触控公共电极的材料为氧化铟锡,所述触控公共电极的厚度为60nm。
  5. 根据权利要求1所述的阵列基板,其中,
    所述阵列基板还包括层叠衬底、栅极层、有源层、源/漏极层以及绝缘层,所述平坦层设置于所述绝缘层上。
  6. 一种阵列基板的制作方法,其中,
    提供一衬底;
    在所述衬底上依序制作平坦层和触控公共电极以形成阵列基板;
    其中,所述平坦层具有多个凸起区域和多个凹陷区域,所述触控公共电极设置于所述凹陷区域内。
  7. 根据权利要求6所述的阵列基板的制作方法,其中,
    所述在所述衬底上依序制作平坦层和触控公共电极以形成阵列基板的步骤,包括:
    在所述衬底上形成所述平坦层;
    在所述平坦层的上表面涂布一层光阻;
    在所述光阻上覆盖一掩膜,进行曝光处理,并进行蚀刻;
    将所述光阻剥离,并在所述平坦层的凹陷区域形成所述触控公共电极。
  8. 根据权利要求7所述的阵列基板的制作方法,其中,
    所述光阻为正向光阻,所述掩膜具有阵列分布的图案。
  9. 根据权利要求7所述的阵列基板的制作方法,其中,
    所述将所述光阻剥离,并在所述平坦层的凹陷区域形成所述触控公共电极的步骤之后,还包括:
    在所述平坦层和所述触控公共电极上形成介质层。
  10. 根据权利要求6所述的阵列基板的制作方法,其中,
    所述触控公共电极的厚度与所述凸起区域的高度相同。
  11. 根据权利要求6所述的阵列基板的制作方法,其中,
    所述触控公共电极的材料为氧化铟锡,所述触控公共电极的厚度为60nm。
  12. 根据权利要求6所述的阵列基板的制作方法,其中,
    所述在所述衬底上形成所述平坦层的步骤,包括:
    在所述衬底上依次形成栅极层、有源层、源/漏极层、绝缘层以及所述平坦层。
  13. 一种显示面板,其中,包括阵列基板、彩膜基板以及设置于所述彩膜基板和所述阵列基板之间的液晶层;所述阵列基板包括平坦层和位于所述平坦层上的触控公共电极;所述平坦层具有多个凸起区域和多个凹陷区域,所述触控公共电极设置于所述凹陷区域内;所述彩膜基板的形状与所述阵列基板的形状对应。
  14. 根据权利要求13所述的显示面板,其中,
    所述触控公共电极的厚度与所述凸起区域的高度相同。
  15. 根据权利要求13所述的显示面板,其中,
    所述阵列基板还包括介质层,所述介质层覆盖所述平坦层和所述触控公共电极。
  16. 根据权利要求15所述的显示面板,其中,
    所述彩膜基板上设置有多个支撑柱,所述支撑柱设置于所述介质层与所述彩膜基板之间。
  17. 根据权利要求16所述的显示面板,其中,
    所述多个支撑柱中至少一部分对应于所述凸起区域,至少另一部分对应于所述触控公共电极所在区域。
  18. 根据权利要求13所述的显示面板,其中,
    所述触控公共电极的材料为氧化铟锡,所述触控公共电极的厚度为60nm。
  19. 根据权利要求13所述的显示面板,其中,
    所述阵列基板还包括层叠衬底、栅极层、有源层、源/漏极层以及绝缘层,所述平坦层设置于所述绝缘层上。
  20. 根据权利要求13所述的显示面板,其中,
    所述彩膜基板包括层叠设置的衬底层、彩膜层和保护层,所述保护层邻近所述液晶层设置。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011148689A1 (ja) * 2010-05-24 2011-12-01 シャープ株式会社 液晶表示パネル
CN105404418A (zh) * 2015-11-03 2016-03-16 京东方科技集团股份有限公司 触控屏及其制备方法、显示面板和显示装置
CN105552077A (zh) * 2016-02-16 2016-05-04 武汉华星光电技术有限公司 薄膜晶体管阵列基板及其制备方法、触摸显示面板
CN106125972A (zh) * 2016-06-12 2016-11-16 京东方科技集团股份有限公司 保护层的制作方法、阵列基板及其制作方法和触摸屏

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106773222A (zh) * 2017-02-17 2017-05-31 武汉华星光电技术有限公司 内嵌式触控面板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011148689A1 (ja) * 2010-05-24 2011-12-01 シャープ株式会社 液晶表示パネル
CN105404418A (zh) * 2015-11-03 2016-03-16 京东方科技集团股份有限公司 触控屏及其制备方法、显示面板和显示装置
CN105552077A (zh) * 2016-02-16 2016-05-04 武汉华星光电技术有限公司 薄膜晶体管阵列基板及其制备方法、触摸显示面板
CN106125972A (zh) * 2016-06-12 2016-11-16 京东方科技集团股份有限公司 保护层的制作方法、阵列基板及其制作方法和触摸屏

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