WO2019210618A1 - 掩膜版及其制作方法 - Google Patents

掩膜版及其制作方法 Download PDF

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Publication number
WO2019210618A1
WO2019210618A1 PCT/CN2018/101764 CN2018101764W WO2019210618A1 WO 2019210618 A1 WO2019210618 A1 WO 2019210618A1 CN 2018101764 W CN2018101764 W CN 2018101764W WO 2019210618 A1 WO2019210618 A1 WO 2019210618A1
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WO
WIPO (PCT)
Prior art keywords
layer
mask
substrate
mask pattern
forming
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Application number
PCT/CN2018/101764
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English (en)
French (fr)
Inventor
刘孟彬
罗海龙
Original Assignee
中芯集成电路（宁波）有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 中芯集成电路（宁波）有限公司 filed Critical 中芯集成电路（宁波）有限公司
Priority to US16/206,617 priority Critical patent/US20190341265A1/en
Publication of WO2019210618A1 publication Critical patent/WO2019210618A1/zh

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present invention relates to the field of semiconductor manufacturing, and in particular, to a mask and a method of fabricating the same.
  • PVD Physical vapor deposition Vapor Deposition
  • evaporation process is the main way to form a functional film layer on the surface of the substrate, and the evaporation process refers to heating and melting the evaporation source (for example, metal, alloy or compound to be plated) in a vacuum evaporator. It is a method of escaping in a molecular or atomic state, depositing onto the surface of a substrate to form a solid film or coating.
  • the vapor deposition process mainly uses a metal mask having a predetermined pattern of through holes, and the metal mask is fixed on the substrate during the evaporation process.
  • the surface to be vapor-deposited of the substrate is opposed to the vapor deposition source, and the film-forming material from the vapor deposition source is vapor-deposited through the through holes on the surface to be vapor-deposited to form a film of a predetermined pattern.
  • metal masks of OLED Organic Light-Emitting Diode
  • Invar also known as Invar
  • metal masks of OLED are usually prepared by using Invar (INVAR, also known as Invar) from 30 ⁇ m to 50 ⁇ m and by chemical etching, first in Inwa
  • the surface of the alloy is coated with a photoresist or a photosensitive dry film, and the fine pattern of the mask is transferred onto the photosensitive film by exposure, and then a fine metal mask is formed by development and chemical etching, by which the method
  • the accuracy is usually on the order of micrometers, and the minimum can only be 25 ⁇ m to 40 ⁇ m, so the quality and precision of the fabricated metal mask can not meet the requirements of the process.
  • the problem solved by the present invention is to provide a mask and a manufacturing method thereof, which improve the quality and precision of the mask.
  • the present invention provides a mask comprising: a substrate including a first surface and a second surface opposite to the first surface, the substrate having a through a plurality of openings of the substrate, the substrate being capable of being patterned using a semiconductor etch process; a mask pattern layer on the first surface, the mask pattern layer including adjacent pattern regions and occlusion regions, The pattern area has at least one through hole penetrating the mask pattern layer, wherein the opening exposes the pattern area, and each pattern area corresponds to the opening; and a protective layer is located in the mask pattern layer On the surface of the occlusion region facing away from the side of the substrate; a first sacrificial layer is located between the mask pattern layer and the protective layer.
  • the present invention also provides a method of fabricating a mask, comprising: providing a substrate, the substrate comprising a first surface and a second surface opposite the first surface; Forming a mask material layer thereon; patterning the mask material layer to form a pattern region and an occlusion region adjacent to the pattern region, and forming at least one through hole penetrating the mask material layer in the pattern region, And patterning the remaining mask material layer as a mask pattern layer; forming a first sacrificial layer covering the mask pattern layer, the first sacrificial layer further filling the via hole; in the occlusion region Forming a protective layer on a sacrificial layer; after forming the protective layer, etching a second surface of the substrate, forming a plurality of openings penetrating the substrate and exposing the pattern region in the substrate, and Each opening corresponds to the pattern area; after the opening is formed, the first sacrifice of the pattern area is removed by using the protective layer and the substrate as a mask.
  • the mask material layer is patterned to form a mask pattern layer having via holes, and forming a first sacrifice covering the mask pattern layer a layer, and a protective layer on a surface of the first sacrificial layer, etching a second surface of the substrate, forming a plurality of openings in the substrate exposing the pattern region, followed by the protective layer And using the substrate as a mask to remove the first sacrificial layer of the pattern region;
  • the mask of the present invention is formed by a semiconductor process such as deposition, photolithography and etching, and is formed by using a conventional chemical etching method.
  • the semiconductor process can improve the quality and through-hole precision of the mask, and is also advantageous for reducing the size of the via and the mask.
  • the thickness of the pattern layer is reduced to meet the feature size of the semiconductor structure, and the size of the via hole and the thickness of the mask pattern layer are improved to limit the evaporation process; further, the mask pattern layer is formed by a semiconductor process
  • the lining on the substrate The mask pattern layer can be supported and fixed, and the mask pattern layer and the layer can be prevented compared with the scheme of soldering the metal mask to the metal mask frame by laser welding.
  • the substrate is displaced; therefore, the mask of the present invention has higher quality and precision, which is advantageous for improving the precision of the evaporation process.
  • the mask pattern layer includes a third surface facing the first surface of the substrate, and a fourth surface opposite to the third surface, the mask plate further comprising a metal layer,
  • the metal layer covers the fourth surface and sidewalls of the via, or covers the third surface, or covers the third surface and the fourth surface; the metal layer may be opposite to the mask pattern layer Supporting, reducing the probability of bending deformation or fracture of the mask pattern layer, and at the same time, after the evaporation process is completed, the mask is usually cleaned, and the metal layer can also be in the cleaning process.
  • the mask pattern layer is protected to prevent the mask pattern layer from being corroded by the cleaning solution, thereby facilitating an increase in the service life of the mask.
  • FIG. 1 is a schematic structural view of an embodiment of a mask of the present invention.
  • FIG. 2 is a schematic structural view of another embodiment of a mask of the present invention.
  • FIG. 10 are schematic structural diagrams corresponding to respective steps in the first embodiment of the method for fabricating a mask according to the present invention.
  • FIG. 11 to FIG. 15 are schematic structural views corresponding to respective steps in the second embodiment of the method for fabricating the mask of the present invention.
  • FIG. 16 and FIG. 17 are schematic structural diagrams corresponding to respective steps in the third embodiment of the method for fabricating the mask of the present invention.
  • FIG. 18 to FIG. 21 are schematic diagrams showing the corresponding steps in the fourth embodiment of the method for fabricating the mask of the present invention.
  • the present invention uses a semiconductor process such as deposition, photolithography, and etching to form a mask, which can improve the semiconductor process compared to a metal mask formed by conventional chemical etching.
  • the quality of the mask and the accuracy of the through-holes improve the quality and precision of the mask, which is beneficial to improve the precision of the evaporation process.
  • Figure 1 is a schematic view showing the structure of an embodiment of a mask of the present invention.
  • the mask includes: a substrate 10 including a first surface 12 and a second surface 13 opposite the first surface 12, the substrate 10 having a through surface a plurality of first openings 11 of the substrate 10, the substrate 10 can be patterned by a semiconductor etching process; a mask pattern layer 30 on the first surface 12, the mask pattern layer 30 includes An adjacent pattern area I and an occlusion area II having at least one through hole 31 penetrating the mask pattern layer 30, wherein the first opening 11 exposes the pattern area I, and each The pattern area I corresponds to the first opening 11.
  • the mask plate is a mask for vapor deposition, and the mask plate is formed by a semiconductor process such as deposition, photolithography and etching, and is formed by a metal mask plate formed by a conventional chemical etching method.
  • the semiconductor process can improve the quality of the mask and the accuracy of the via 31; and the mask pattern layer 30 is formed on the substrate 10 by a semiconductor process, and the substrate 10 can be
  • the mask pattern layer 30 functions as a support and a fixing, and the conventional metal mask is usually soldered to the metal mask frame by laser welding, and the metal mask is easily appeared during the soldering process.
  • the present embodiment can prevent the above described compared with the conventional metal reticle
  • the mask pattern layer 30 and the substrate 10 are displaced; therefore, the mask and the mask of the embodiment have higher quality and precision.
  • the substrate 10 can be patterned by a semiconductor etching process, and the first opening 11 is formed by a semiconductor etching process.
  • the substrate 10 is a semiconductor substrate.
  • Semiconductor substrates are of the type commonly used in semiconductor processes.
  • the substrate 10 is a silicon substrate.
  • the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be a silicon substrate or insulator on the insulator.
  • Other types of semiconductor substrates such as germanium substrates.
  • the material of the substrate 10 may be a material suitable for process needs or easy to integrate.
  • the substrate may be other materials that can be patterned by using a semiconductor etching process.
  • the substrate may also be a silicon oxide substrate or the like.
  • the first surface 12 of the substrate 10 provides a process platform for the formation of the mask pattern layer 30, and the second surface 13 of the substrate 10 provides a process for forming the first opening 11 platform.
  • the substrate 10 is a planar substrate in order to reduce the process difficulty of fabricating the mask and to facilitate the practical use of the mask.
  • the number of the first openings 11 is plural, the first openings 11 exposing the pattern area I, and each of the pattern areas I corresponds to the first openings 11, so that during the evaporation process, A film of a predetermined pattern is formed through the first opening 11 and the through hole 31 of the mask pattern layer 30.
  • the present embodiment for convenience of illustration, only one first opening 11 and a pattern area I corresponding to the first opening 11 are illustrated.
  • the projection of the first opening 11 on the mask pattern layer 30 coincides with the pattern area I; correspondingly, the substrate 10 covers the occlusion area II, the substrate A projection on the mask pattern layer 30 coincides with the occlusion region II.
  • the surface of the mask pattern layer 30 facing away from the substrate 10 faces the surface to be vapor-deposited, and the mask pattern layer 30 faces the lining.
  • the surface of the bottom 10 side faces the vapor deposition source, and the film forming material from the vapor deposition source is vapor-deposited through the first opening 11 and the through hole 31 to the surface to be vapor-deposited, the occlusion area II
  • the substrate 100 is used to occlude the area to be vapor-deposited which is not desired to be formed into a film, thereby forming a film of a predetermined pattern.
  • three through holes 31 in the mask pattern layer 30 of the pattern area I are taken as an example for description.
  • the number of the through holes is not limited to three, and the number of the through holes may be determined according to actual process requirements.
  • a material with a common process and high process integration is selected as the material of the mask pattern layer 30.
  • the material of the mask pattern layer 30 is silicon nitride.
  • the hardness of the silicon nitride material is large, so that the mechanical strength of the mask pattern layer 30 can be improved, and the probability of bending deformation or fracture of the mask pattern layer 30 can be reduced, thereby facilitating the improvement of the quality of the mask pattern. And the accuracy of the through hole 31.
  • the material of the mask pattern layer may also be silicon oxide, silicon oxynitride, silicon carbonitride, polysilicon or aluminum.
  • the through hole 31 is The depth T1 should not be too small and should not be too large. If the depth T1 of the through hole 31 is too small, that is, the thickness of the mask pattern layer 30 is too small, the problem that the mask pattern layer 30 is insufficient in mechanical strength is easily caused, thereby reducing the quality of the mask.
  • the depth T1 of the through hole 31 is 2 ⁇ m to 10 ⁇ m, that is, the thickness (not shown) of the mask pattern layer 30 is 2 ⁇ m to 10 ⁇ m.
  • the present embodiment forms the mask by a semiconductor manufacturing process, thereby facilitating the reduction of the opening size of the through hole 31, thereby satisfying the requirement that the feature size of the semiconductor structure is continuously reduced.
  • the through hole 31 has a circular shape. In other embodiments, the through holes may have other shapes depending on the actual film topography requirements.
  • the mask further includes: a protective layer 45 on the surface of the occlusion region II on the side of the mask pattern layer 30 facing away from the substrate 10; the first sacrificial layer 40, located between the mask pattern layer 30 and the protective layer 45.
  • the first sacrificial layer 40 and the protective layer 45 have a second opening 41 exposing the mask pattern layer 30 of the pattern area I.
  • the mask is made by a semiconductor process such as deposition, photolithography, and etching.
  • the first sacrificial layer 40 Before the first opening 11 is formed by etching, the first sacrificial layer 40 generally covers the mask pattern layer 30.
  • the first sacrificial layer 40 is used to provide support for the mask pattern layer 30 during the process of etching the substrate 10 to form the first opening 11, thereby reducing the occurrence of the mask pattern layer 30.
  • the probability of falling off or breaking which in turn helps to further improve the quality and precision of the mask.
  • the first sacrificial layer 40 can prevent the polymer formed during etching from adhering to the sidewall of the via hole 31, thereby avoiding the etching.
  • the process causes an etch loss to the substrate 10 through the via 31.
  • the step of fabricating the mask generally further comprises removing the first sacrificial layer 40 of the pattern region I, thereby Forming a second opening 41 exposing the mask pattern layer 30 of the pattern region I in the first sacrificial layer 40 and the protective layer 45, thereby further connecting the first opening 11, the through hole 31 and the second opening 41 .
  • the material of the first sacrificial layer 40 and the material of the mask pattern layer 30 and the substrate 10 have a higher etching selectivity ratio, and the material of the first sacrificial layer 40 is a material that is easily removed. Thereby reducing the process difficulty of etching the first sacrificial layer 40 and reducing damage to the substrate 10 and the mask pattern layer 30 by the process of etching the first sacrificial layer 40.
  • the material of the first sacrificial layer 40 and the material of the mask pattern layer 30 are different.
  • the material of the first sacrificial layer 40 is silicon oxide.
  • the material of the first sacrificial layer may also be silicon nitride, amorphous carbon or germanium.
  • the thickness T2 of the first sacrificial layer 40 the greater the mechanical strength of the first sacrificial layer 40, but the thickness T2 of the first sacrificial layer 40 should not be too small, and should not be too large. . If the thickness T2 of the first sacrificial layer 40 is too small, the problem that the first sacrificial layer 40 is insufficient in mechanical strength is easily caused, thereby reducing the supporting effect of the first sacrificial layer 40 on the mask pattern layer 30.
  • the thickness T2 of the first sacrificial layer 40 is 2 ⁇ m to 10 ⁇ m.
  • the protective layer 45 can function as an etch mask to protect the first sacrificial layer 40 of the occlusion region II. Acting to prevent the first sacrificial layer 40 of the occlusion region II from being excessively removed or completely removed, so that the remaining first sacrificial layer 40 can still support the mask pattern layer 30, thereby further reducing the The detachment occurs between the substrate 10 and the mask pattern layer 30, and the probability that the mask pattern layer 30 is broken.
  • the first sacrificial layer 40 and the protective layer 45 have a higher etching selectivity ratio, and in order to reduce the process difficulty of fabricating the mask, the selection process is common, and the mask effect is good.
  • a material having a high degree of process integration is used as the material of the protective layer 45.
  • the material of the protective layer 45 is polysilicon. In other embodiments, the material of the protective layer may also be silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride or aluminum.
  • the thickness T3 of the protective layer 45 should not be too small or too large. If the thickness T3 of the protective layer 45 is too small, the protection effect of the protective layer 45 on the first sacrificial layer 40 is likely to be poor; if the thickness T3 of the protective layer 45 is too large, it is easy to cause The distance from the surface of the mask pattern layer 30 toward the side of the first sacrificial layer 40 to the surface to be vapor-deposited is too large, thereby deteriorating the shadow effect during the evaporation process, and the morphology of the film formed by the evaporation is generated. Bad effects. Therefore, in the embodiment, the protective layer 45 has a thickness T3 of 2 ⁇ m to 10 ⁇ m.
  • the mask further includes: a second sacrificial layer 20 between the substrate 10 and the mask pattern layer 30.
  • the second sacrificial layer 20 covers the first surface 12 of the substrate 10, and the first opening 11 is etched.
  • the substrate 10 is formed by using the second sacrificial layer 20 to protect the mask pattern layer 30 during the etching process, thereby reducing the mask pattern layer 30.
  • the probability of being etched by the etch is further advantageous to further improve the quality of the reticle.
  • the step of fabricating the mask in order to enable the first opening 11 to expose the through hole 31, the step of fabricating the mask generally further comprises removing the exposed first opening 11.
  • the second sacrificial layer 20 is configured to penetrate the first opening 11 and the through hole 31, thereby realizing the normal use function of the mask.
  • the material of the second sacrificial layer 20 and the material of the mask pattern layer 30 and the substrate 10 have a higher etching selectivity ratio, and the material of the second sacrificial layer 20 is a material that is easily removed. , thereby reducing the process difficulty of removing the second sacrificial layer 20 exposed by the first opening 11, and reducing damage to the substrate 10 and the mask pattern layer 30 by the process of removing the second sacrificial layer 20. .
  • the material of the second sacrificial layer 20 is different from the material of the mask pattern layer 30, and in order to remove the second sacrificial layer 20 and the first sacrificial layer 40 in the same process step, The process steps are simplified, and the fabrication efficiency of the mask is improved.
  • the material of the second sacrificial layer 20 is the same as the material of the first sacrificial layer 40.
  • the material of the first sacrificial layer 40 is silicon oxide
  • the material of the second sacrificial layer 20 is correspondingly silicon oxide.
  • the material of the second sacrificial layer may also be silicon nitride, amorphous carbon or germanium.
  • FIG. 2 there is shown a schematic view of another embodiment of a mask of the present invention.
  • the present embodiment is different from the foregoing embodiment in that the mask further includes a metal layer 75 for improving the mechanical strength of the mask pattern layer 70.
  • the mask pattern layer 70 includes a third surface 72 facing the first surface 52 of the substrate 50 and a fourth surface 73 opposite the third surface 72, the metal layer 75 may be covered The third surface 72 and the fourth surface 73, or the metal layer 75 covers the fourth surface 73 and the sidewall of the through hole 71, or the metal layer 75 covers only the third surface 72.
  • the metal layer 75 can support the mask pattern layer 70, can reduce the probability of bending deformation or fracture of the mask pattern layer 70, and improve the mechanical strength of the mask pattern layer 70, thereby further The mechanical strength of the mask is increased, thereby improving the quality of the mask and the accuracy of the through hole 71.
  • the mask is usually cleaned, and the metal layer 75 can also protect the mask pattern layer 70 during the cleaning process to prevent the mask pattern.
  • Layer 70 is corroded by the cleaning solution to facilitate increasing the useful life of the mask.
  • the metal layer 75 has high mechanical strength and corrosion resistance.
  • the material of the metal layer 75 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al.
  • the third surface 72 and the fourth surface 73 are covered by the metal layer 75 as an example.
  • the metal layer 75 covers the opposite surfaces of the mask pattern layer 70, so that the mechanical strength of the mask pattern layer 70 can be significantly improved; moreover, the metal layer 75 can be prevented from occupying the space of the through hole 71.
  • the problem can reduce the impact on the evaporation process and film quality.
  • the through hole 71 has a circular shape. In other embodiments, the through holes may have other shapes depending on the actual film topography requirements.
  • the thickness T4 of the metal layer 75 is smaller than the radius (not labeled) of the through hole 71.
  • the thickness of the metal layer 75 located at the sidewall of the through hole 71 is smaller than the radius of the through hole 71.
  • the metal layer 75 has a high mechanical strength, and the metal layer 75 having a small thickness can further improve the mechanical strength of the mask, thereby ensuring the quality of the mask and the through hole 71.
  • the thickness of the mask pattern layer 70 (not labeled) or the thickness of the first sacrificial layer 80 (not labeled) may be appropriately reduced on the premise that the accuracy is not affected, thereby facilitating the reduction of the mask.
  • the overall thickness of the plate improves the shadowing effect during evaporation.
  • the present invention also provides a method for fabricating a mask.
  • FIG. 3 to FIG. 10 are schematic structural views corresponding to respective steps in the first embodiment of the method for fabricating the mask of the present invention.
  • a substrate 100 is provided that includes a first surface 120 and a second surface 130 opposite the first surface 120.
  • the substrate 100 is used to support and fix the mask pattern layer of the mask.
  • the substrate 100 can be patterned by a semiconductor etching process, so that a first opening can be formed in the substrate 100 by an etching process in a subsequent process.
  • the substrate 100 is a semiconductor substrate.
  • Semiconductor substrates are of the type commonly used in semiconductor processes.
  • the substrate 100 is a silicon substrate.
  • the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be a silicon substrate or insulator on the insulator. Other types of semiconductor substrates such as germanium substrates.
  • the material of the substrate may be a material suitable for the process or easy to integrate.
  • the substrate may be other materials that can be patterned by using a semiconductor etching process.
  • the substrate may also be a silicon oxide substrate or the like.
  • the first surface 120 is used to provide a process platform for subsequently forming a mask pattern layer
  • the second surface 130 is used to provide a process platform for subsequently forming a first opening in the substrate 100.
  • the substrate 100 is a planar substrate.
  • a mask material layer 205 is formed on the first surface 120.
  • the mask material layer 205 is used to provide a process basis for subsequently forming a mask pattern layer having via holes, that is, to subsequently form the mask pattern layer by patterning the mask material layer 205.
  • a material with a common process and high process integration is selected as the material of the mask material layer 205.
  • the material of the mask material layer 205 is silicon nitride.
  • the hardness of the silicon nitride material is large, so that the mechanical strength of the subsequently formed mask pattern layer can be improved, and the probability of bending deformation or fracture of the mask pattern layer is reduced, thereby facilitating the improvement of the quality of the mask pattern and The accuracy of the through hole.
  • the material of the mask material layer may also be silicon oxide, silicon oxynitride, silicon carbonitride, polysilicon or aluminum.
  • the thickness H1 of the mask material layer 205 should not be too small or too large. If the thickness H1 of the mask material layer 205 is too small, the thickness of the mask pattern layer is correspondingly too small, which easily causes a problem of insufficient mechanical strength of the mask, thereby reducing the quality of the mask.
  • the mask material layer 205 has a thickness H1 of 2 ⁇ m to 10 ⁇ m.
  • the mask material layer 205 (shown in FIG. 4) is patterned to form a pattern area I and an occlusion area II adjacent to the pattern area I, and at least one through-hole is formed in the pattern area I.
  • the via 210 of the mask material layer 205 is described, and the patterned remaining mask material layer 205 is used as the mask pattern layer 200.
  • the surface of the mask pattern layer 200 facing away from the substrate 100 faces the surface to be evaporated, and the mask pattern layer 200 faces the lining.
  • the surface on the side of the bottom 100 faces the vapor deposition source, and the film forming material from the vapor deposition source is vapor-deposited on the surface to be vapor-deposited through the through hole 210 to form a film of a predetermined pattern.
  • three through holes 210 are formed in the mask pattern layer 200 of the pattern area I as an example for description.
  • the number of the through holes is not limited to three, and the number of the through holes may be determined according to actual process requirements.
  • the through hole 210 has a circular shape. In other embodiments, the through holes may have other shapes depending on the actual film topography requirements.
  • the material of the mask material layer 205 is silicon nitride.
  • the material of the mask pattern layer 200 is silicon nitride.
  • the material of the mask pattern layer may also be silicon oxide, silicon oxynitride, silicon carbonitride, polysilicon or aluminum.
  • the thickness H1 (shown in FIG. 4) of the mask material layer 205 is 2 ⁇ m to 10 ⁇ m, and correspondingly, the thickness (not labeled) of the mask pattern layer 200 is 2 ⁇ m to 10 ⁇ m.
  • the depth (not shown) of the via 210 is 2 ⁇ m to 10 ⁇ m.
  • the mask is formed by the semiconductor process in the embodiment, thereby facilitating the reduction of the opening of the through hole 210.
  • the mask is formed by the semiconductor process in the embodiment, thereby facilitating the reduction of the opening of the through hole 210.
  • the step of forming the mask pattern layer 200 includes: forming a first photoresist layer (not shown) on the mask material layer 205, and having an exposed portion in the first photoresist layer a first pattern opening (not shown) of the pattern region I mask material layer 205; etching the mask material layer 205 along the first pattern opening, in a portion of the mask region 205 of the pattern region I A via hole 210 penetrating the mask material layer 205 is formed, and the etched remaining mask material layer 205 is used as the mask pattern layer 200; the first photoresist layer is removed.
  • the mask material layer 205 is etched by dry etching, thereby facilitating the improvement of the topography quality of the through hole 210.
  • a first sacrificial layer 160 covering the mask pattern layer 200 is formed, and the first sacrificial layer 160 further fills the via hole 210 (as shown in FIG. 5).
  • the first sacrificial layer 160 is used to provide support for the mask pattern layer 200 during the subsequent etching of the substrate 100 to form a first opening, thereby reducing the mask pattern layer 200 from falling off.
  • the probability of bending deformation or fracture which in turn helps to further improve the quality of the mask produced.
  • the subsequent step further includes forming a protective layer on the first sacrificial layer 160 by a deposition and etching process, wherein the first sacrificial layer 160 can prevent etching during an etching process of forming the protective layer
  • the formed polymer is attached to the sidewall of the via hole 210, thereby preventing the etching process from causing etching loss to the substrate 100 through the via hole 210.
  • the first sacrificial layer 160 of the pattern region I is further removed to form a second opening penetrating the first sacrificial layer 160, so that the first opening, the through hole 210 and the second opening are formed.
  • the material of the first sacrificial layer 160 and the material of the mask pattern layer 200 and the substrate 100 have a higher etching selectivity ratio, and
  • the material of the first sacrificial layer 160 is a material that is easily removed, thereby reducing the process difficulty of removing the first sacrificial layer 160 of the pattern region I, and reducing the process of removing the first sacrificial layer 160 to the liner. Damage to the bottom 100 and mask pattern layer 200.
  • the material of the first sacrificial layer 160 is different from the material of the mask pattern layer 200.
  • the material of the first sacrificial layer 160 is silicon oxide.
  • the process of removing the silicon oxide material is relatively simple, and the cost of the silicon oxide material is low, so that it is also advantageous to reduce the manufacturing cost of the mask.
  • the material of the first sacrificial layer may also be silicon nitride, amorphous carbon or germanium.
  • the thickness H2 of the first sacrificial layer 160 on the mask pattern layer 200 the greater the supporting force of the first sacrificial layer 160 on the mask pattern layer 200.
  • the mechanical strength of the resulting mask is also greater, and the protective effect of the first sacrificial layer 160 on the substrate 100 is also better, but the thickness H2 should not be too small or too large.
  • the thickness H2 is too small, the supporting effect of the first sacrificial layer 160 on the mask pattern layer 200 and the protective effect on the substrate 100 are easily reduced; if the thickness of the first sacrificial layer 160 is If the H2 is too large, the distance between the surface of the mask pattern layer 200 facing the first sacrificial layer 160 and the surface to be vapor-deposited is too large, thereby deteriorating the shadow effect during the evaporation process, and the evaporation is performed. The morphology of the formed film has an adverse effect. To this end, in the embodiment, the thickness H2 of the first sacrificial layer 160 on the mask pattern layer 200 is 2 ⁇ m to 10 ⁇ m.
  • the method further includes: forming a second sacrificial layer 150 on the first surface 120 of the substrate 100.
  • the mask material layer 205 is formed on the second sacrificial layer 150.
  • the second sacrificial layer 150 is used to protect the mask pattern layer 200 (shown in FIG. 5) during the subsequent etching of the substrate 100, thereby reducing the mask pattern.
  • the probability of the layer 200 being etched by the etch is further beneficial to improve the quality of the reticle that is subsequently made.
  • the first opening in the substrate 100 and the through hole 210 in the mask pattern layer 200 are required (see FIG. 5).
  • the second sacrificial layer 150 exposed by the first opening is subsequently removed; therefore, the material of the second sacrificial layer 150 and the mask pattern layer 200 and the substrate
  • the material of 100 has a higher etching selectivity ratio, and the material of the second sacrificial layer 150 is a material that is easy to be removed, thereby reducing the process difficulty of subsequently removing the second sacrificial layer 150 exposed by the first opening, and The damage of the substrate 100 and the mask pattern layer 200 by the process of removing the second sacrificial layer 150 is reduced.
  • the material of the second sacrificial layer 150 is different from the material of the mask pattern layer 200, and the second sacrificial layer 150 and the first sacrificial layer 160 can be removed in the same process step for subsequent ( As shown in FIG. 6 , the material of the second sacrificial layer 150 is the same as the material of the first sacrificial layer 160 in order to simplify the process steps and improve the fabrication efficiency of the mask.
  • the material of the first sacrificial layer 160 is silicon oxide
  • the material of the second sacrificial layer 150 is silicon oxide
  • the material of the second sacrificial layer may also be silicon nitride, amorphous carbon or germanium.
  • a protective layer 170 (shown in FIG. 8) is formed on the surface of the first sacrificial layer 160 on the occlusion region II.
  • the protective layer 170 is used to etch the mask when the first sacrificial layer 160 is subsequently etched, and can also protect the first sacrificial layer 160 of the occlusion region II.
  • the first sacrificial layer 160 of the occlusion region II is excessively removed or completely removed, so that the remaining sacrificial layer 160 can still support the mask pattern layer 200 after etching, thereby facilitating the reduction of the The peeling occurs between the substrate 100 and the mask pattern layer 200, and the probability that the mask pattern layer 200 is bent or broken.
  • the protective layer 170 and the first sacrificial layer 160 have a higher etching selectivity ratio, and in order to reduce the process difficulty of fabricating the mask, the process is commonly used and the process integration is high.
  • a material is used as the material of the protective layer 170.
  • the material of the protective layer 170 is polysilicon.
  • the material of the protective layer may also be silicon nitride, silicon oxide, silicon oxynitride, silicon carbonitride or aluminum.
  • the thickness H3 (shown in FIG. 8) of the protective layer 170 should not be too small or too large. If the thickness H3 of the protective layer 170 is too small, the protection effect of the protective layer 170 on the first sacrificial layer 160 is likely to be poor; if the thickness H3 of the protective layer 170 is too large, it is easy to cause The distance from the surface of the mask pattern layer 200 toward the side of the first sacrificial layer 160 to the surface to be vapor-deposited is too large, thereby deteriorating the shadow effect during the evaporation process, and the morphology of the film formed by the evaporation is generated. Bad effects. Therefore, in the embodiment, the protective layer 170 has a thickness H3 of 2 ⁇ m to 10 ⁇ m.
  • the step of forming the protective layer 170 includes: forming a protective film 175 on the first sacrificial layer 160 (as shown in FIG. 7); patterning the protective film 175 to expose the pattern area I A sacrificial layer 160 and a patterned remaining protective film 175 serve as the protective layer 170.
  • the protective film 175 is patterned by dry etching, thereby facilitating the improvement of the cross-sectional quality of the protective layer 170.
  • the second surface 130 of the substrate 100 is etched, and a plurality of patterns penetrating the substrate 100 and exposing the pattern region I are formed in the substrate 100.
  • An opening 110, and each of the first openings 110 corresponds to the pattern area I.
  • the substrate 100 is used to support and fix the mask pattern layer 200.
  • the normal use function of the prepared mask is realized by connecting the first opening 110 and the through hole 210 (as shown in FIG. 5).
  • the number of the first openings 110 is plural, the first opening 110 exposes the graphic area I, and each graphic area I corresponds to the first opening 110, in actual use of the mask
  • a film forming material from the evaporation source is sequentially evaporated on the surface to be vapor-deposited through the first opening 110 and the through hole 210 to form a film of a predetermined pattern.
  • only one first opening 11 and a pattern area I corresponding to the first opening 11 are illustrated.
  • the projection of the first opening 110 on the mask pattern layer 200 coincides with the pattern area I
  • the projection of the substrate 100 on the mask pattern layer 200 and the The occlusion zone II coincides.
  • the second surface 130 on the pattern area I is etched.
  • the second sacrificial layer 150 is further formed on the first surface 120 of the substrate 100. Accordingly, after the first opening 110 is formed, the first opening 110 exposes the second surface. Sacrificial layer 150.
  • the first sacrificial layer 160 of the pattern region I is removed by using the protective layer 170 and the substrate 100 as a mask.
  • a second opening 180 penetrating the protective layer 170 and the first sacrificial layer 160 is formed by removing the first sacrificial layer 160 of the pattern region I, thereby causing the first opening 110, the via hole 210, and the second opening 180 Through the penetration, the normal use function of the mask is realized.
  • the first sacrificial layer 160 exposed by the first opening 110 is removed by a wet etching process.
  • the material of the first sacrificial layer 160 is silicon oxide, and the etching solution used in the wet etching process is correspondingly a hydrofluoric acid solution.
  • an ashing process may also be employed to remove the first sacrificial layer exposed by the first opening.
  • the first opening 110 exposes the second sacrificial layer 150 , so as shown in FIG. 10 , in order to make the first opening 110
  • the through hole 210 and the second opening 180 are connected to each other, and further includes: removing the second sacrificial layer 150 of the pattern region I by using the protective layer 170 and the substrate 100 as a mask.
  • the materials of the first sacrificial layer 160 and the second sacrificial layer 150 are both silicon oxide, so the first sacrificial layer 160 of the pattern region I can be removed in the same wet etching process step.
  • the second sacrificial layer 150 is silicon oxide
  • the first sacrificial layer and the second portion of the pattern region may be removed in the same ashing process step.
  • a sacrificial layer when the materials of the first sacrificial layer and the second sacrificial layer are different, the first sacrificial layer and the second sacrificial layer may be separately removed by using different processes.
  • the mask is made by a semiconductor process such as deposition, photolithography, and etching, and the semiconductor process can improve the pass compared with a metal mask made by a conventional chemical etching method.
  • the opening size and the thickness of the mask pattern layer 200 are limited by the evaporation process.
  • the mask pattern layer 200 is formed on the substrate 100 by a semiconductor process, and the substrate 100 can support and fix the mask pattern layer 200, and metal is laser welded. Compared with the scheme in which the mask is soldered on the metal mask frame, the problem that the mask pattern layer 200 and the substrate 100 are displaced can be prevented; therefore, the quality of the mask according to the embodiment And higher precision, which is conducive to improving the accuracy of the evaporation process.
  • 11 to 15 are schematic views showing the corresponding steps in the second embodiment of the method for fabricating the mask of the present invention.
  • the same points of the embodiment are the same as those of the first embodiment, and details are not described herein again.
  • the embodiment is different from the first embodiment in that a metal layer is formed on a surface of the mask pattern layer 400 facing away from the substrate 300 and a sidewall of the through hole 410 as shown in FIG. 420.
  • the metal layer 420 can support the mask pattern layer 400, can reduce the probability of bending deformation or fracture of the mask pattern layer 400, and improve the mechanical strength of the mask pattern layer 400, thereby further The mechanical strength of the mask is increased, thereby improving the quality of the mask and the accuracy of the through hole 410 (shown in FIG. 15).
  • the mask is usually cleaned, and the metal layer 420 can also protect the mask pattern layer 400 during the cleaning process to prevent the mask pattern.
  • Layer 400 is corroded by the cleaning solution to facilitate increasing the useful life of the mask.
  • the manufacturing method of the mask includes:
  • a metal film 425 is formed on the mask pattern layer 400 on the sidewalls and the bottom of the via hole 410.
  • the metal film 425 is used to provide a process basis for the subsequent formation of the metal layer, that is, to subsequently form the metal layer by patterning the metal film 425.
  • the metal film 425 has High mechanical strength and corrosion resistance.
  • the material of the metal film 425 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al, and may be vapor deposited,
  • the metal film 425 is formed by sputtering or electroplating.
  • the thickness H4 of the metal film 425 is smaller than the radius (not labeled) of the through hole 410.
  • a metal film 425 (shown in FIG. 11) at the bottom of the via 410 is etched, and the etched remaining metal film 425 is used as the metal layer 420.
  • the material of the metal film 425 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al, and correspondingly,
  • the material of the metal layer 420 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al.
  • the thickness of the metal layer 420 is smaller than the radius of the through hole 410 (not shown).
  • the thickness of the metal layer 420 on the sidewall of the through hole 410 is smaller than the radius of the through hole.
  • the step of forming the metal layer 420 includes: forming a second photoresist layer 430 on the metal film 425, the second photoresist layer 430 covering the metal on the mask pattern layer 400 a film 425 and a metal film 425 on the sidewall of the through hole 410, and exposing the metal film 425 at the bottom of the through hole 410; using the second photoresist layer 430 as a mask, etching and removing the through hole a metal film 425 at the bottom of the 410, retaining the metal film 425 on the mask pattern layer 400 and the sidewall of the through hole 410 as the metal layer 420; after forming the metal layer 420, removing the second light The glue layer 430.
  • the formed metal layer 420 covers the surface of the mask pattern layer 400 facing away from the side of the substrate 300 and the through hole 410.
  • the sidewalls support the mask pattern layer 400, thereby increasing the mechanical strength of the mask pattern layer 400.
  • the metal layer 420 has high mechanical strength, and the metal layer 420 having a small thickness can further improve the mechanical strength of the mask, thereby ensuring the quality of the mask and the pass. Under the premise that the accuracy of the hole 410 is not affected, the thickness of the mask pattern layer 400 can be appropriately reduced, thereby facilitating reducing the overall thickness of the mask and improving the shadow effect in the evaporation process.
  • a first sacrificial layer 360 covering the metal layer 420 is formed, and the first sacrificial layer 360 further fills the through hole 410 (as shown in FIG. 12).
  • a surface of the first sacrificial layer 360 on the occlusion region II is formed with a protective layer 370; after forming the protective layer 370, referring to FIG. 14, the second surface 330 of the substrate 300 is etched at the substrate 300. Forming a plurality of first openings 310 penetrating the substrate 300 and exposing the pattern area I, and each of the first openings 310 corresponds to the pattern area I; and referring to FIG.
  • 16 and 17 are schematic views showing the corresponding steps in the third embodiment of the method for fabricating the mask of the present invention.
  • This embodiment is different from the second embodiment in that, as shown in FIG. 17, the metal layer 620 covers only the surface of the mask pattern layer 600 toward the side of the substrate 500.
  • a metal film 625 is formed on the first surface before a mask material layer is formed on the first surface (not labeled) of the substrate 500.
  • a second sacrificial layer 550 is formed on the first surface of the substrate 500, and correspondingly, the metal film 625 is formed on the second sacrificial layer 550.
  • the material of the metal film 625 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al, which may be evaporated, sputtered, or plated.
  • the metal film 625 is formed in a manner.
  • the mask material layer is patterned to form a pattern area I and an occlusion area II adjacent to the pattern area I, and at least one through-hole is formed in the pattern area I.
  • the via hole 610 of the mask material layer and the patterned remaining mask material layer serve as the mask pattern layer 600.
  • the metal film 625 (shown in FIG. 16) at the bottom of the via hole 610 is etched, and the etched remaining metal film 625 is used as the metal layer 620.
  • the first opening formed in the substrate 500 can be penetrated through the through hole 610, thereby realizing the normal use function of the mask. .
  • the metal layer 620 covers the surface of the mask pattern layer 600 toward the side of the substrate 500, thereby preventing the metal layer 620 from occupying while improving the mechanical strength of the mask pattern layer 600.
  • the problem of the space of the through hole 610 can further reduce the influence on the vapor deposition process and the film formation quality.
  • FIG. 18 to FIG. 21 are schematic diagrams showing the corresponding steps in the fourth embodiment of the method for fabricating the mask of the present invention.
  • the present embodiment is different from the second embodiment in that, as shown in FIG. 21, the metal layer 820 covers a surface of the mask pattern layer 800 facing the side of the substrate 700, and the mask pattern. Layer 800 faces away from the surface of one side of substrate 700.
  • the mechanical strength of the mask pattern layer 800 can be significantly improved; moreover, the metal layer 820 can be prevented from occupying the through holes.
  • the problem of the 810 space can correspondingly reduce the impact on the evaporation process and film quality.
  • a first metal film 825 is formed on a first surface (not labeled) of the substrate 700; a mask material layer 850 is formed on the first metal film 825; A second metal film 835 is formed on the film material layer 850.
  • a second sacrificial layer 750 is formed on the first surface of the substrate 700, and correspondingly, the first metal film 825 is formed on the second sacrificial layer 750.
  • the material of the first metal film 825 may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al
  • the second metal film 835 The material may be one or more of Ni, Ag, Au, Cu, Pt, Cr, Mo, Ti, Ta, Sn, W, and Al.
  • the material of the second metal film 835 and the material of the first metal film 825 are the same.
  • the second metal film 835 is etched to expose a portion of the mask material layer 850.
  • Subsequent steps include patterning the mask material layer 850, forming at least one via hole through the mask material layer 850 in the mask material layer 850, and thus etching the second metal film 835, remaining The second metal film 835 exposes the mask material layer 850 of the region corresponding to the via hole.
  • the mask material layer 850 (shown in FIG. 19) is patterned to form a pattern area I and an occlusion area II adjacent to the pattern area I, At least one via 810 penetrating the mask material layer 850 is formed in the pattern region I, and the patterned remaining mask material layer 850 is used as the mask pattern layer 800.
  • the remaining second metal film 835 exposes the mask material layer 850 of the corresponding region of the via hole 810, so that the remaining second metal film 835 can cover the mask.
  • the film pattern layer 800 faces away from the surface on one side of the substrate 700.
  • a first metal film 825 at the bottom of the via hole 810 is etched, and the remaining first metal film 825 and the remaining second metal film 835 are etched as a metal.
  • Layer 820 is etched.
  • the via hole 810 exposes the second sacrificial layer 750, so that the first formed in the substrate 700 can be subsequently formed.
  • the opening is penetrated with the through hole 810 to realize the normal use function of the mask; and after the first metal film 825 at the bottom of the through hole 810 is etched, the remaining second metal film 835 can cover the cover.
  • the film pattern layer 800 faces the surface of one side of the substrate 700 such that the metal layer 820 covers the opposite surfaces of the mask pattern layer 800.

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Abstract

一种掩膜版，包括：衬底（100），包括第一表面（120）以及与第一表面（120）相背的第二表面（130），衬底（100）内具有贯穿衬底的多个开口，衬底（100）能够利用半导体刻蚀工艺进行图形化；位于第一表面（120）的掩膜图形层（200），包括相邻的图形区（I）和遮挡区（II），图形区（I）具有至少一个贯穿掩膜图形层（200）的通孔（210），开口露出图形区（I）且每一图形区（I）与开口相对应；保护层（170），位于掩膜图形层（200）背向衬底一侧的遮挡区（II）表面上；第一牺牲层（160），位于掩膜图形层（200）和保护层（170）之间。还包括一种掩膜版的制作方法。

Description

掩膜版及其制作方法 技术领域
本发明涉及半导体制造领域，尤其涉及一种掩膜版及其制作方法。
 背景技术
物理气相沉积(Physical Vapor Deposition，PVD)技术主要分为蒸镀(Evaporation)工艺和溅镀(Sputtering) 工艺两种。其中，蒸镀工艺是在基板表面形成功能膜层的主要方式，蒸镀工艺是指在真空蒸镀机(Vacuum Evaporator)中将蒸镀源（例如待镀金属、合金或化合物）加热熔化，使其呈分子或原子状态逸出，沉积至基板表面而形成固态薄膜或涂层的方法。
目前，蒸镀工艺主要采用金属掩膜版（Metal Mask），所述金属掩膜版具有预设图案的通孔，在蒸镀工艺过程中，所述金属掩膜版固定于基板上，所述基板的待蒸镀面与蒸镀源相对，使来自所述蒸镀源的成膜材料通过所述通孔蒸镀于所述待蒸镀面，以形成预设图案的薄膜。
目前OLED（Organic Light-Emitting Diode，有机发光显示）的金属掩膜版通常使用30μm至50μm厚的因瓦合金（INVAR，又称殷钢）并通过化学刻蚀的方法来制备，首先在因瓦合金表面涂覆光刻胶或感光干膜，通过曝光的方式将掩膜版的精细图案转移在感光膜上，再通过显影和化学刻蚀的方式制成精细金属掩膜版，通过该方法其精度通常在微米级，一般最小只能做到25μm至40μm，因此制成的金属掩膜版的质量和精准度不能很好的满足工艺需求要求。
 技术问题
本发明解决的问题是提供一种掩膜版及其制作方法，提高掩膜版的质量和精准度。
 技术解决方案
为解决上述问题，本发明提供一种掩膜版，包括：衬底，所述衬底包括第一表面以及与所述第一表面相背的第二表面，所述衬底内具有贯穿所述衬底的多个开口，所述衬底能够利用半导体刻蚀工艺进行图形化；位于所述第一表面的掩膜图形层，所述掩膜图形层包括相邻的图形区和遮挡区，所述图形区具有至少一个贯穿所述掩膜图形层的通孔，其中，所述开口露出所述图形区，且每一图形区与所述开口相对应；保护层，位于所述掩膜图形层背向所述衬底一侧的遮挡区表面上；第一牺牲层，位于所述掩膜图形层和所述保护层之间。
相应的，本发明还提供一种掩膜版的制作方法，包括：提供衬底，所述衬底包括第一表面以及与所述第一表面相背的第二表面；在所述第一表面上形成掩膜材料层；图形化所述掩膜材料层，形成图形区以及与所述图形区相邻的遮挡区，在所述图形区形成至少一个贯穿所述掩膜材料层的通孔，且图形化后的剩余掩膜材料层作为掩膜图形层；形成覆盖所述掩膜图形层的第一牺牲层，所述第一牺牲层还填充所述通孔；在所述遮挡区的第一牺牲层上形成保护层；形成所述保护层后，刻蚀所述衬底的第二表面，在所述衬底内形成贯穿所述衬底且露出所述图形区的多个开口，且每一开口与所述图形区相对应；形成所述开口后，以所述保护层和衬底为掩膜，去除所述图形区的第一牺牲。
 有益效果
与现有技术相比，本发明的技术方案具有以下优点：
本发明在衬底的第一表面上形成掩膜材料层后，图形化所述掩膜材料层，以形成具有通孔的掩膜图形层，且形成覆盖所述掩膜图形层的第一牺牲层、以及位于所述第一牺牲层表面的保护层后，刻蚀所述衬底的第二表面，在所述衬底内形成露出所述图形区的多个开口，随后以所述保护层和衬底为掩膜，去除所述图形区的第一牺牲层；本发明所述掩膜版采用沉积、光刻和刻蚀等半导体工艺所制成，与采用传统化学刻蚀方式所制成的金属掩膜版（例如精细金属掩膜版）相比，半导体工艺能够提高所述掩膜版的质量和通孔精准度，且还有利于减小所述通孔的尺寸以及所述掩膜图形层的厚度，以满足半导体结构特征尺寸的不断减小，改善所述通孔尺寸和所述掩膜图形层厚度对蒸镀工艺的限制；此外，所述掩膜图形层通过半导体工艺形成于所述衬底上，所述衬底能够对所述掩膜图形层起到支撑和固定作用，与通过激光焊接的方式将金属掩膜版焊接于金属掩膜版框架上的方案相比，还能够防止所述掩膜图形层和所述衬底产生移位；所以，本发明所述掩膜版的质量和精准度更高，有利于提高蒸镀工艺的精度。
可选方案中，所述掩膜图形层包括朝向所述衬底第一表面的第三表面、以及与所述第三表面相背的第四表面，所述掩膜版还包括金属层，所述金属层覆盖所述第四表面以及所述通孔的侧壁，或者覆盖所述第三表面，或者覆盖所述第三表面和第四表面；所述金属层可以对所述掩膜图形层起到支撑作用，能够降低所述掩膜图形层发生弯曲变形或断裂的概率，同时，在蒸镀工艺完成之后，通常需对掩膜版进行清洗，所述金属层还能够在所述清洗过程中对所述掩膜图形层起到保护作用，防止所述掩膜图形层被清洗溶液所腐蚀，从而有利于增加所述掩膜版的使用寿命。
 附图说明
图1是本发明掩膜版一实施例的结构示意图；
图2是本发明掩膜版另一实施例的结构示意图；
图3至图10是本发明掩膜版的制作方法第一实施例中各步骤对应的结构示意图；
图11至图15是本发明掩膜版的制作方法第二实施例中各步骤对应的结构示意图；
图16和图17是本发明掩膜版的制作方法第三实施例中各步骤对应的结构示意图；
图18至图21是本发明掩膜版的制作方法第四实施例中各步骤对应的结构示意图。
 本发明的实施方式
由背景技术可知，金属掩膜版的质量和精准度不能很好的满足工艺需求要求。
为了解决所述技术问题，本发明采用沉积、光刻和刻蚀等半导体工艺制成掩膜版，与采用传统化学刻蚀方式所制成的金属掩膜版相比，半导体工艺能够提高所述掩膜版的质量和通孔精准度，从而提高所述掩膜版的质量和精准度，有利于提高蒸镀工艺的精度。
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。
图1是本发明掩膜版一实施例的结构示意图。
本实施例中，所述掩膜版包括：衬底10，所述衬底10包括第一表面12以及与所述第一表面12相背的第二表面13，所述衬底10内具有贯穿所述衬底10的多个第一开口11，所述衬底10能够利用半导体刻蚀工艺进行图形化；位于所述第一表面12的掩膜图形层30，所述掩膜图形层30包括相邻的图形区I和遮挡区II，所述图形区I具有至少一个贯穿所述掩膜图形层30的通孔31，其中，所述第一开口11露出所述图形区I，且每一图形区I与所述第一开口11相对应。
所述掩膜版为蒸镀用掩膜版，且所述掩膜版采用沉积、光刻和刻蚀等半导体工艺所制成，与采用传统化学刻蚀方式所制成的金属掩膜版相比，半导体工艺能够提高所述掩膜版的质量和所述通孔31的精准度；且所述掩膜图形层30通过半导体工艺形成于所述衬底10上，所述衬底10能够对所述掩膜图形层30起到支撑和固定作用，而传统金属掩膜版通常需通过激光焊接的方式焊接于金属掩膜版框架上才能使用，在焊接过程中，容易出现对所述金属掩膜版施加的张力不均匀或热效应等问题，从而导致所述金属掩膜版和所述金属掩膜版框架产生移位，因此与传统金属掩膜版相比，本实施例还能够防止所述掩膜图形层30和所述衬底10产生移位；因此，本实施例所述掩膜版的质量和精准度较高。
本实施例中，所述衬底10能够利用半导体刻蚀工艺进行图形化，所述第一开口11通过半导体刻蚀工艺所形成。
本实施例中，所述衬底10为半导体衬底。半导体衬底为半导体工艺中常用的衬底类型。
具体地，所述衬底10为硅衬底。在其他实施例中，所述衬底的材料还可以为锗、锗化硅、碳化硅、砷化镓或镓化铟等其他材料，所述衬底还能够为绝缘体上的硅衬底或者绝缘体上的锗衬底等其他类型的半导体衬底。所述衬底10的材料可以是适宜于工艺需要或易于集成的材料。
需要说明的是，在其他实施例中，所述衬底还可以是其他可利用半导体刻蚀工艺进行图形化的材料，例如，所述衬底还可以为氧化硅衬底等。
本实施例中，所述衬底10的第一表面12为所述掩膜图形层30的形成提供工艺平台，所述衬底10的第二表面13为所述第一开口11的形成提供工艺平台。
需要说明的是，为了降低制作所述掩膜版的工艺难度、以及便于所述掩膜版的实际使用，所述衬底10为平面基底。
所述第一开口11的数量为多个，所述第一开口11露出所述图形区I，且每一图形区I与所述第一开口11相对应，从而能够在蒸镀工艺过程中，通过所述第一开口11和掩膜图形层30的通孔31形成预设图案的薄膜。本实施例中，为了便于图示，仅示意出一个第一开口11以及与所述第一开口11对应的图形区I。
本实施例中，所述第一开口11在所述掩膜图形层30上的投影与所述图形区I相重合；相应的，所述衬底10覆盖所述遮挡区II，所述衬底10在所述掩膜图形层30上的投影与所述遮挡区II相重合。
具体地，在所述掩膜版的实际使用过程中，所述掩膜图形层30背向所述衬底10一侧的表面朝向待蒸镀面，所述掩膜图形层30朝向所述衬底10一侧的表面朝向蒸镀源，来自所述蒸镀源的成膜材料依次通过所述第一开口11和所述通孔31蒸镀于所述待蒸镀面，所述遮挡区II的衬底100用于对不希望成膜的待蒸镀面区域进行遮挡，从而形成预设图案的薄膜。
如图1所示，本实施例中，以所述图形区I的掩膜图形层30内具有三个通孔31为例进行说明。在其他实施例中，所述通孔的数量不仅限于三个，所述通孔的数量可以根据实际工艺需求而定。
需要说明的是，为了降低制作所述掩膜版的工艺难度，选取工艺常用且工艺集成度较高的材料作为所述掩膜图形层30的材料。
本实施例中，所述掩膜图形层30的材料为氮化硅。氮化硅材料的硬度较大，因此能够提高所述掩膜图形层30的机械强度，降低所述掩膜图形层30发生弯曲变形或断裂的概率，从而有利于提高所述掩膜版的质量和所述通孔31的精准度。
在其他实施例中，所述掩膜图形层的材料还可以为氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
还需要说明的是，所述通孔31的深度T1越大，所述掩膜图形层30的厚度相应越大，则所述掩膜版的机械强度也越大，但是所述通孔31的深度T1不宜过小，也不宜过大。如果所述通孔31的深度T1过小，即所述掩膜图形层30的厚度过小，则容易引起所述掩膜图形层30机械强度不足的问题，从而降低所述掩膜版的质量，甚至影响所述掩膜版的正常使用；如果所述通孔31的深度T1过大，即所述掩膜图形层30的厚度过大，则容易在蒸镀过程中产生阴影效应，从而对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，所述通孔31的深度T1为2μm至10μm，即所述掩膜图形层30的厚度（未标示）为2μm至10μm。
此外，与传统金属掩膜版相比，本实施例通过半导体制造工艺形成所述掩膜版，从而有利于减小所述通孔31的开口尺寸，进而满足半导体结构特征尺寸不断减小的要求。
本实施例中，所述通孔31的形状为圆形。在其他实施例中，根据实际薄膜形貌的需求，所述通孔还可以为其他形状。
继续参考图1，本实施例中，所述掩膜版还包括：保护层45，位于所述掩膜图形层30背向所述衬底10一侧的遮挡区II表面上；第一牺牲层40，位于所述掩膜图形层30和所述保护层45之间。其中，为了实现所述掩膜版的正常使用功能，所述第一牺牲层40和保护层45内具有露出所述图形区I掩膜图形层30的第二开口41。
所述掩膜版采用沉积、光刻和刻蚀等半导体工艺所制成，在刻蚀形成所述第一开口11之前，所述第一牺牲层40通常覆盖所述掩膜图形层30，所述第一牺牲层40用于在刻蚀所述衬底10以形成所述第一开口11的工艺过程中，为所述掩膜图形层30提供支撑，从而降低所述掩膜图形层30发生脱落或者断裂的概率，进而有利于进一步提高所述掩膜版的质量和精准度。
而且，在形成所述保护层45的刻蚀工艺过程中，所述第一牺牲层40能够防止刻蚀时所形成的聚合物附着于所述通孔31的侧壁，从而避免所述刻蚀工艺通过所述通孔31对所述衬底10造成刻蚀损耗。
相应的，为了实现所述掩膜版的正常使用功能，在形成所述第一开口11后，制作所述掩膜版的步骤通常还包括去除所述图形区I的第一牺牲层40，从而在所述第一牺牲层40和保护层45内形成露出所述图形区I掩膜图形层30的第二开口41，进而使所述第一开口11、通孔31和第二开口41相互贯通。
因此，所述第一牺牲层40的材料和所述掩膜图形层30以及衬底10的材料具有较高的刻蚀选择比，且所述第一牺牲层40的材料为易于被去除的材料，从而降低刻蚀所述第一牺牲层40的工艺难度，并减小刻蚀所述第一牺牲层40的工艺对所述衬底10和掩膜图形层30的损伤。
本实施例中，所述第一牺牲层40的材料和所述掩膜图形层30的材料不同。具体地，所述第一牺牲层40的材料为氧化硅。在其他实施例中，所述第一牺牲层的材料还可以为氮化硅、非晶碳或锗。
需要说明的是，所述第一牺牲层40的厚度T2越大，所述第一牺牲层40的机械强度越大，但是所述第一牺牲层40的厚度T2不宜过小，也不宜过大。如果所述第一牺牲层40的厚度T2过小，则容易引起所述第一牺牲层40机械强度不足的问题，从而降低所述第一牺牲层40对所述掩膜图形层30的支撑效果；如果所述第一牺牲层40的厚度T2过大，则容易导致所述掩膜图形层30朝向所述第一牺牲层40一侧的表面至待蒸镀面的距离过大，从而恶化在蒸镀过程中的阴影效应，对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，所述第一牺牲层40的厚度T2为2μm至10μm。
本实施例中，在去除所述图形区I的第一牺牲层40时，所述保护层45能够起到刻蚀掩膜的作用，对所述遮挡区II的第一牺牲层40起到保护作用，防止所述遮挡区II的第一牺牲层40被过多地去除或完全去除，使得剩余第一牺牲层40仍能对所述掩膜图形层30起到支撑作用，从而进一步降低所述衬底10和所述掩膜图形层30之间发生脱落、以及所述掩膜图形层30发生断裂的概率。
为此，所述第一牺牲层40和所述保护层45之间具有较高的刻蚀选择比，且为了降低制作所述掩膜版的工艺难度，选取工艺常用、掩膜效果较好且工艺集成度较高的材料作为所述保护层45的材料。
本实施例中，所述保护层45的材料为多晶硅。在其他实施例中，所述保护层的材料还可以为氮化硅、氧化硅、氮氧化硅、碳氮化硅或铝。
需要说明的是，所述保护层45的厚度T3不宜过小，也不宜过大。如果所述保护层45的厚度T3过小，则容易导致所述保护层45对所述第一牺牲层40的保护效果不佳；如果所述保护层45的厚度T3过大，则容易导致所述掩膜图形层30朝向所述第一牺牲层40一侧的表面至待蒸镀面的距离过大，从而恶化在蒸镀过程中的阴影效应，对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，所述保护层45的厚度T3为2μm至10μm。
此外，本实施例中，所述掩膜版还包括：第二牺牲层20，位于所述衬底10和所述掩膜图形层30之间。
在所述掩膜版的制作过程中，在形成所述第一开口11之前，所述第二牺牲层20覆盖所述衬底10的第一表面12，且所述第一开口11通过刻蚀所述衬底10的方式所形成，所述第二牺牲层20用于在所述刻蚀工艺过程中，对所述掩膜图形层30起到保护作用，从而降低所述掩膜图形层30受到刻蚀损伤的概率，进而有利于进一步提高所述掩膜版的质量。
相应的，在所述掩膜版的制作过程中，为了使所述第一开口11能够露出所述通孔31，制作所述掩膜版的步骤通常还包括去除所述第一开口11露出的所述第二牺牲层20，从而使所述第一开口11和通孔31相贯通，进而实现所述掩膜版的正常使用功能。
因此，所述第二牺牲层20的材料和所述掩膜图形层30以及衬底10的材料具有较高的刻蚀选择比，且所述第二牺牲层20的材料为易于被去除的材料，从而降低去除所述第一开口11露出的所述第二牺牲层20的工艺难度，并减小去除所述第二牺牲层20的工艺对所述衬底10和掩膜图形层30的损伤。
本实施例中，所述第二牺牲层20的材料和所述掩膜图形层30的材料不同，且为了能够在同一工艺步骤中去除所述第二牺牲层20和第一牺牲层40，以简化工艺步骤、提高所述掩膜版的制作效率，所述第二牺牲层20的材料与所述第一牺牲层40的材料相同。
具体地，所述第一牺牲层40的材料为氧化硅，所述第二牺牲层20的材料相应为氧化硅。在其他实施例中，所述第二牺牲层的材料还可以为氮化硅、非晶碳或锗。
参考图2，示出了本发明掩膜版另一实施例的结构示意图。
本实施例与前述实施例的相同之处，在此不再赘述。本实施例与前述实施例的不同之处在于：所述掩膜版还包括金属层75，用于提高所述掩膜图形层70的机械强度。
具体地，所述掩膜图形层70包括朝向所述衬底50第一表面52的第三表面72、以及与所述第三表面72相背的第四表面73，所述金属层75可以覆盖所述第三表面72和第四表面73，或者，所述金属层75覆盖所述第四表面73以及所述通孔71的侧壁，或者，所述金属层75仅覆盖所述第三表面72。
所述金属层75可以对所述掩膜图形层70起到支撑作用，能够降低所述掩膜图形层70发生弯曲变形或断裂的概率、提高所述掩膜图形层70的机械强度，从而进一步提高所述掩膜版的机械强度，进而提高所述掩膜版的质量和所述通孔71的精准度。
而且，在蒸镀工艺完成之后，通常需对掩膜版进行清洗，所述金属层75还能够在所述清洗过程中对所述掩膜图形层70起到保护作用，防止所述掩膜图形层70被清洗溶液所腐蚀，从而有利于增加所述掩膜版的使用寿命。
因此，所述金属层75具有较高的机械强度以及耐腐蚀性。具体地，所述金属层75的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种。
本实施例中，以所述金属层75覆盖所述第三表面72和第四表面73为例进行说明。
所述金属层75覆盖所述掩膜图形层70相对的两个表面，从而能够显著提高所述掩膜图形层70的机械强度；而且，能够避免所述金属层75占据所述通孔71空间的问题，相应可以减小对蒸镀工艺和成膜质量的影响。
本实施例中，所述通孔71的形状为圆形。在其他实施例中，根据实际薄膜形貌的需求，所述通孔还可以为其他形状。
需要说明的是，所述金属层75的厚度T4越大，防止所述掩膜图形层70发生弯曲变形或断裂的效果越好，所述掩膜版的机械强度越大，但是所述金属层75的厚度T4不宜过小，也不宜过大。如果所述金属层75的厚度T4过小，则提高所述掩膜版机械强度的效果较差；如果所述金属层75的厚度T4过大，则会导致所述掩膜版的整体厚度过大，反而会恶化蒸镀过程中的阴影效应，而且当所述金属层75还覆盖所述通孔71的表面时，相应还会过多地占据所述通孔71的空间，从而影响所述掩膜版的正常使用。为此，本实施例中，所述金属层75的厚度T4小于所述通孔71的半径（未标示）。
相应的，当所述金属层75覆盖所述第四表面73以及所述通孔71的侧壁时，位于所述通孔71侧壁的金属层75厚度小于所述通孔71的半径。
所述金属层75具有较高的机械强度，采用厚度较小的所述金属层75即可进一步提高所述掩膜版的机械强度，因此在保证所述掩膜版质量和所述通孔71精准度不受影响的前提下，可以适当减小所述掩膜图形层70的厚度（未标示）或所述第一牺牲层80的厚度（未标示），从而有利于减小所述掩膜版的整体厚度，改善蒸镀过程中的阴影效应。
相应的，本发明还提供一种掩膜版的制作方法。
图3至图10是本发明掩膜版的制作方法第一实施例中各步骤对应的结构示意图。
参考图3，提供衬底100，所述衬底100包括第一表面120以及与所述第一表面120相背的第二表面130。
所述衬底100用于对所述掩膜版的掩膜图形层起到支撑和固定作用。
本实施例中，所述衬底100能够利用半导体刻蚀工艺进行图形化，从而能够在后续制程中通过刻蚀工艺，在所述衬底100内形成第一开口。
本实施例中，所述衬底100为半导体衬底。半导体衬底为半导体工艺中常用的衬底类型。
具体地，所述衬底100为硅衬底。在其他实施例中，所述衬底的材料还可以为锗、锗化硅、碳化硅、砷化镓或镓化铟等其他材料，所述衬底还能够为绝缘体上的硅衬底或者绝缘体上的锗衬底等其他类型的半导体衬底。所述衬底的材料可以是适宜于工艺需要或易于集成的材料。
需要说明的是，在其他实施例中，所述衬底还可以是其他可利用半导体刻蚀工艺进行图形化的材料，例如，所述衬底还可以为氧化硅衬底等。
本实施例中，所述第一表面120用于为后续形成掩膜图形层提供工艺平台，所述第二表面130用于为后续在所述衬底100内形成第一开口提供工艺平台。为了降低制作所述掩膜版的工艺难度、以及便于所述掩膜版的实际使用，所述衬底100为平面基底。
参考图4，在所述第一表面120上形成掩膜材料层205。
所述掩膜材料层205用于为后续形成具有通孔的掩膜图形层提供工艺基础，即后续通过图形化所述掩膜材料层205以形成所述掩膜图形层。
需要说明的是，为了降低制作所述掩膜版的工艺难度，选取工艺常用且工艺集成度较高的材料作为所述掩膜材料层205的材料。
本实施例中，所述掩膜材料层205的材料为氮化硅。氮化硅材料的硬度较大，因此能够提高后续所形成掩膜图形层的机械强度，降低所述掩膜图形层发生弯曲变形或断裂的概率，从而有利于提高所述掩膜版的质量和所述通孔的精准度。
在其他实施例中，所述掩膜材料层的材料还可以为氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
还需要说明的是，所述掩膜材料层205的厚度H1越大，所形成掩膜图形层的机械强度相应越大，所制成掩膜版的机械强度也越大，但是所述掩膜材料层205的厚度H1不宜过小，也不宜过大。如果所述掩膜材料层205的厚度H1过小，则所述掩膜图形层的厚度相应过小，则容易引起所述掩膜版机械强度不足的问题，从而降低所述掩膜版的质量和所述通孔的精准度；如果所述掩膜材料层205的厚度H1过大，所述通孔的深度相应过大，则容易在蒸镀过程中产生阴影效应，从而对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，所述掩膜材料层205的厚度H1为2μm至10μm。
参考图5，图形化所述掩膜材料层205（如图4所示），形成图形区I以及与所述图形区I相邻的遮挡区II，在所述图形区I形成至少一个贯穿所述掩膜材料层205的通孔210，且图形化后的剩余掩膜材料层205作为掩膜图形层200。
在蒸镀工艺过程中，通过所述掩膜图形层200形成预设图案的薄膜
具体地，在所述掩膜版的实际使用过程中，所述掩膜图形层200背向所述衬底100一侧的表面朝向待蒸镀面，所述掩膜图形层200朝向所述衬底100一侧的表面朝向蒸镀源，来自所述蒸镀源的成膜材料通过所述通孔210蒸镀于所述待蒸镀面，以形成预设图案的薄膜。
本实施例以所述图形区I的掩膜图形层200内形成有三个通孔210为例进行说明。在其他实施例中，所述通孔的数量不仅限于三个，所述通孔的数量可以根据实际工艺需求而定。
本实施例中，所述通孔210的形状为圆形。在其他实施例中，根据实际薄膜形貌的需求，所述通孔还可以为其他形状。
本实施例中，所述掩膜材料层205的材料为氮化硅，相应的，所述掩膜图形层200的材料为氮化硅。在其他实施例中，所述掩膜图形层的材料还可以为氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
本实施例中，所述掩膜材料层205的厚度H1（如图4所示）为2μm至10μm，相应的，所述掩膜图形层200的厚度（未标示）为2μm至10μm，所述通孔210的深度（未标示）为2μm至10μm。
需要说明的是，与传统金属掩膜版（例如精细金属掩膜版）的制作方法相比，本实施例通过半导体工艺制作所述掩膜版，从而有利于减小所述通孔210的开口尺寸，从而满足半导体结构特征尺寸不断减小的要求。
具体地，形成所述掩膜图形层200的步骤包括：在所述掩膜材料层205上形成第一光刻胶层（图未示），所述第一光刻胶层内具有露出部分所述图形区I掩膜材料层205的第一图形开口（图未示）；沿所述第一图形开口刻蚀所述掩膜材料层205，在部分所述图形区I的掩膜材料层205内形成贯穿所述掩膜材料层205的通孔210，刻蚀后的剩余掩膜材料层205作为掩膜图形层200；去除所述第一光刻胶层。
本实施例中，采用干法刻蚀的方式刻蚀所述掩膜材料层205，从而有利于提高所述通孔210的形貌质量。
参考图6，形成覆盖所述掩膜图形层200的第一牺牲层160，所述第一牺牲层160还填充所述通孔210（如图5所示）。
所述第一牺牲层160用于在后续刻蚀所述衬底100以形成第一开口的工艺过程中，为所述掩膜图形层200提供支撑，从而降低所述掩膜图形层200发生脱落、弯曲变形或者断裂的概率，进而有利于进一步提高所制成掩膜版的质量。
而且，后续步骤还包括通过沉积和刻蚀工艺，在所述第一牺牲层160上形成保护层，在形成所述保护层的刻蚀工艺中，所述第一牺牲层160能够防止刻蚀时所形成的聚合物附着于所述通孔210的侧壁，从而避免所述刻蚀工艺通过所述通孔210对所述衬底100造成刻蚀损耗。
需要说明的是，后续还需去除所述图形区I的第一牺牲层160，形成贯穿所述第一牺牲层160的第二开口，从而使所述第一开口、通孔210和第二开口相贯通，进而实现所述掩膜版的正常使用；因此，所述第一牺牲层160的材料和所述掩膜图形层200以及衬底100的材料具有较高的刻蚀选择比，且所述第一牺牲层160的材料为易于被去除的材料，从而降低去除所述图形区I的第一牺牲层160的工艺难度，并减小去除所述第一牺牲层160的工艺对所述衬底100和掩膜图形层200的损伤。
本实施例中，所述第一牺牲层160的材料和所述掩膜图形层200的材料不同。具体地，所述第一牺牲层160的材料为氧化硅。去除氧化硅材料的工艺较为简单，且氧化硅材料的成本较低，因此还有利于降低所述掩膜版的制作成本。
在其他实施例中，所述第一牺牲层的材料还可以为氮化硅、非晶碳或锗。
还需要说明的是，位于所述掩膜图形层200上的所述第一牺牲层160的厚度H2越大，所述第一牺牲层160对所述掩膜图形层200的支撑力越大，所制成掩膜版的机械强度也越大，且所述第一牺牲层160对所述衬底100的保护效果也越好，但是所述厚度H2不宜过小，也不宜过大。如果所述厚度H2过小，则容易降低所述第一牺牲层160对所述掩膜图形层200的支撑效果以及对所述衬底100的保护效果；如果所述第一牺牲层160的厚度H2过大，则容易导致所述掩膜图形层200朝向所述第一牺牲层160一侧的表面至待蒸镀面的距离过大，从而恶化在蒸镀过程中的阴影效应，对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，位于所述掩膜图形层200上的所述第一牺牲层160的厚度H2为2μm至10μm。
继续参考图4，本实施例中，形成所述掩膜材料层205之前，还包括：在所述衬底100的第一表面120上形成第二牺牲层150。
相应的，形成所述掩膜材料层205的步骤中，在所述第二牺牲层150上形成所述掩膜材料层205。
所述第二牺牲层150用于在后续刻蚀所述衬底100的工艺过程中，对所述掩膜图形层200（如图5所示）起到保护作用，从而降低所述掩膜图形层200受到刻蚀损伤的概率，进而有利于提高后续所制成所述掩膜版的质量。
其中，为了实现所述掩膜版的正常使用功能，需使所述衬底100中的第一开口和所述掩膜图形层200（如图5所示）中的通孔210（如图5所示）相贯通，相应的，后续还需去除所述第一开口露出的所述第二牺牲层150；因此，所述第二牺牲层150的材料和所述掩膜图形层200以及衬底100的材料具有较高的刻蚀选择比，且所述第二牺牲层150的材料为易于被去除的材料，从而降低后续去除所述第一开口露出的第二牺牲层150的工艺难度，并减小去除所述第二牺牲层150的工艺对所述衬底100和掩膜图形层200的损伤。
本实施例中，所述第二牺牲层150的材料和所述掩膜图形层200的材料不同，且为了后续能够在同一工艺步骤中去除所述第二牺牲层150和第一牺牲层160（如图6所示），以简化工艺步骤、提高所述掩膜版的制作效率，所述第二牺牲层150的材料与所述第一牺牲层160的材料相同。
本实施例中，所述第一牺牲层160的材料为氧化硅，所述第二牺牲层150的材料相应为氧化硅。在其他实施例中，所述第二牺牲层的材料还可以为氮化硅、非晶碳或锗。
结合参考图7和图8，在所述遮挡区II上的第一牺牲层160表面形成保护层170（如图8所示）。
所述保护层170用于在后续刻蚀所述第一牺牲层160时起到刻蚀掩膜的作用，且还能够对所述遮挡区II的第一牺牲层160起到保护作用，防止所述遮挡区II的第一牺牲层160被过多地去除或完全去除，使刻蚀后剩余第一牺牲层160仍能对所述掩膜图形层200起到支撑作用，从而有利于降低所述衬底100和所述掩膜图形层200之间发生脱落、以及所述掩膜图形层200发生弯曲变形或断裂的概率。
为此，所述保护层170和所述第一牺牲层160之间具有较高的刻蚀选择比，且为了降低制作所述掩膜版的工艺难度，选取工艺常用且工艺集成度较高的材料作为所述保护层170的材料。本实施例中，所述保护层170的材料为多晶硅。在其他实施例中，所述保护层的材料还可以为氮化硅、氧化硅、氮氧化硅、碳氮化硅或铝。
需要说明的是，所述保护层170的厚度H3（如图8所示）不宜过小，也不宜过大。如果所述保护层170的厚度H3过小，则容易导致所述保护层170对所述第一牺牲层160的保护效果不佳；如果所述保护层170的厚度H3过大，则容易导致所述掩膜图形层200朝向所述第一牺牲层160一侧的表面至待蒸镀面的距离过大，从而恶化在蒸镀过程中的阴影效应，对蒸镀所形成的薄膜的形貌产生不良影响。为此，本实施例中，所述保护层170的厚度H3为2μm至10μm。
具体地，形成所述保护层170的步骤包括：在所述第一牺牲层160上形成保护膜175（如图7所示）；图形化所述保护膜175，露出所述图形区I的第一牺牲层160，且图形化后的剩余保护膜175作为保护层170。
本实施例中，采用干法刻蚀的方式图形化所述保护膜175，从而有利于提高所述保护层170的剖面质量。
参考图9，形成所述保护层170后，刻蚀所述衬底100的第二表面130，在所述衬底100内形成贯穿所述衬底100且露出所述图形区I的多个第一开口110，且每一个第一开口110与所述图形区I相对应。
所述衬底100用于对所述掩膜图形层200起到支撑和固定作用。其中，后续通过使所述第一开口110和所述通孔210（如图5所示）相贯通的方式，实现所制成掩膜版的正常使用功能。
所述第一开口110的数量为多个，所述第一开口110露出所述图形区I，且每一图形区I与所述第一开口110相对应，在所述掩膜版的实际使用过程中，来自蒸镀源的成膜材料依次通过所述第一开口110和所述通孔210蒸镀于所述待蒸镀面，以形成预设图案的薄膜。本实施例中，为了便于图示，仅示意出一个第一开口11以及与所述第一开口11对应的图形区I。
本实施例中，所述第一开口110在所述掩膜图形层200上的投影与所述图形区I相重合，所述衬底100在所述掩膜图形层200上的投影与所述遮挡区II相重合。相应的，刻蚀所述衬底100的第二表面130的步骤中，对所述图形区I上的第二表面130进行刻蚀。
需要说明的是，所述衬底100的第一表面120上还形成有所述第二牺牲层150，相应的，形成所述第一开口110后，所述第一开口110露出所述第二牺牲层150。
参考图10，形成所述第一开口110后，以所述保护层170和衬底100为掩膜，去除所述图形区I的第一牺牲层160。
通过去除所述图形区I的第一牺牲层160，形成贯穿所述保护层170和第一牺牲层160的第二开口180，从而使所述第一开口110、通孔210和第二开口180相贯通，进而实现所述掩膜版的正常使用功能。
本实施例中，采用湿法刻蚀工艺，去除所述第一开口110露出的所述第一牺牲层160。具体地，所述第一牺牲层160的材料为氧化硅，所述湿法刻蚀工艺所采用的刻蚀溶液相应为氢氟酸溶液。在其他实施例中，例如当所述第一牺牲层的材料为非晶碳时，还可以采用灰化工艺，去除所述第一开口露出的所述第一牺牲层。
需要说明的是，如图9所示，形成所述第一开口110后，所述第一开口110露出所述第二牺牲层150，因此如图10所示，为了使所述第一开口110、通孔210和第二开口180相贯通，还包括：以所述保护层170和衬底100为掩膜，去除所述图形区I的第二牺牲层150。
本实施例中，所述第一牺牲层160和第二牺牲层150的材料均为氧化硅，因此能够在同一湿法刻蚀工艺步骤中，去除所述图形区I的第一牺牲层160和第二牺牲层150。
在其他实施例中，当所述第一牺牲层和第二牺牲层的材料均为非晶碳时，还可以在同一灰化工艺步骤中，去除所述图形区的第一牺牲层和第二牺牲层；当所述第一牺牲层和第二牺牲层的材料不相同时，还可以采用不同工艺分别去除所述第一牺牲层和第二牺牲层。
本实施例中，所述掩膜版采用沉积、光刻和刻蚀等半导体工艺所制成，与采用传统化学刻蚀方式所制成的金属掩膜版相比，半导体工艺能够提高所述通孔210的质量和精准度，且还有利于减小所述通孔210的开口尺寸以及所述掩膜图形层200的厚度，以满足半导体结构特征尺寸的不断减小，改善所述通孔210的开口尺寸和所述掩膜图形层200厚度对蒸镀工艺的限制。
此外，所述掩膜图形层200通过半导体工艺形成于所述衬底100上，所述衬底100能够对所述掩膜图形层200起到支撑和固定作用，与通过激光焊接的方式将金属掩膜版焊接于金属掩膜版框架上的方案相比，还能够防止所述掩膜图形层200和所述衬底100产生移位的问题；所以，本实施例所述掩膜版的质量和精度更高，有利于提高蒸镀工艺的精度。
图11至图15是本发明掩膜版的制作方法第二实施例中各步骤对应的结构示意图。
本实施例与第一实施例的相同之处，在此不再赘述。本实施例与第一实施例的不同之处在于：如图15所示，在所述掩膜图形层400背向所述衬底300一侧的表面以及所述通孔410侧壁形成金属层420。
所述金属层420可以对所述掩膜图形层400起到支撑作用，能够降低所述掩膜图形层400发生弯曲变形或断裂的概率、提高所述掩膜图形层400的机械强度，从而进一步提高所述掩膜版的机械强度，进而提高所述掩膜版的质量和所述通孔410（如图15所示）的精准度。
而且，在蒸镀工艺完成之后，通常需对掩膜版进行清洗，所述金属层420还能够在所述清洗过程中对所述掩膜图形层400起到保护作用，防止所述掩膜图形层400被清洗溶液所腐蚀，从而有利于增加所述掩膜版的使用寿命。
具体地，所述掩膜版的制作方法包括：
参考图11，形成所述掩膜图形层400后，在所述掩膜图形层400上、所述通孔410的侧壁和底部形成金属膜425。
所述金属膜425用于为后续形成金属层提供工艺基础，即后续通过图形化所述金属膜425，以形成金属层。
为了使所述金属层能有效地对所述掩膜图形层400起到支撑作用，并在掩膜版的清洗过程中对所述掩膜图形层400起到保护作用，所述金属膜425具有较高的机械强度以及耐腐蚀性。本实施例中，所述金属膜425的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种，可以通过蒸镀、溅射或电镀的方式形成所述金属膜425。
需要说明的是，所述金属膜425的厚度H4越大，后续所形成金属层的机械强度越大，提高所述掩膜图形层400的机械强度的效果越好，但是所述金属膜425的厚度H4不宜过小，也不宜过大。如果所述金属膜425的厚度H4过小，则难以降低所述掩膜图形层400发生弯曲变形或断裂的概率；如果所述金属膜425的厚度H4过大，则容易导致所述掩膜版的整体厚度过大，从而影响所述掩膜版的正常使用，容易恶化蒸镀过程中的阴影效应，而且还会降低所述金属膜425在所述通孔410内的形成质量。为此，本实施例中，所述金属膜425的厚度H4小于所述通孔410的半径（未标示）。
还需要说明的是，对形成所述掩膜图形层400以及形成所述掩膜图形层400之前的工艺步骤的具体描述，可参考第一实施例中的相应描述，本实施例在此不再赘述。
参考图12，刻蚀所述通孔410底部的金属膜425（如图11所示），刻蚀后的剩余金属膜425作为金属层420。
本实施例中，所述金属膜425的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种，相应的，所述金属层420的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种。
本实施例中，所述金属层420的厚度小于所述通孔410的半径（未标示），相应的，位于所述通孔410侧壁上的金属层420厚度小于所述通孔的半径。
具体地，形成所述金属层420的步骤包括：在所述金属膜425上形成第二光刻胶层430，所述第二光刻胶层430覆盖位于所述掩膜图形层400上的金属膜425以及位于所述通孔410侧壁的金属膜425，并露出所述通孔410底部的金属膜425；以所述第二光刻胶层430为掩膜，刻蚀去除所述通孔410底部的金属膜425，保留位于所述掩膜图形层400上以及所述通孔410侧壁的金属膜425作为所述金属层420；形成所述金属层420后，去除所述第二光刻胶层430。
本实施例中，刻蚀所述通孔410底部的金属膜425后，所形成的金属层420覆盖所述掩膜图形层400背向所述衬底300一侧的表面以及所述通孔410的侧壁，从而对所述掩膜图形层400起到支撑作用，进而提高所述掩膜图形层400的机械强度。
其中，所述金属层420具有较高的机械强度，采用厚度较小的所述金属层420即可进一步提高所述掩膜版的机械强度，因此在保证所述掩膜版质量和所述通孔410精准度不受影响的前提下，可以适当减小所述掩膜图形层400的厚度，从而有利于减小所述掩膜版的整体厚度，改善蒸镀过程中的阴影效应。
结合参考图13，形成所述金属层420后，形成覆盖所述金属层420的第一牺牲层360，所述第一牺牲层360还填充所述通孔410（如图12所示），在所述遮挡区II上的第一牺牲层360表面形成保护层370；结合参考图14，形成所述保护层370后，刻蚀所述衬底300的第二表面330，在所述衬底300内形成贯穿所述衬底300且露出所述图形区I的多个第一开口310，且每一个第一开口310与所述图形区I相对应；结合参考图15，形成所述第一开口310后，以所述保护层370和衬底300为掩膜，去除所述图形区I的第一牺牲层360和第二牺牲层350，形成贯穿所述保护层370和第一牺牲层360的第二开口380。
对形成所述第一牺牲层360、保护层370、第一开口310和第二开口380的步骤的具体描述，可参考第一实施例中的相应描述，本实施例在此不再赘述。
图16和图17是本发明掩膜版的制作方法第三实施例中各步骤对应的结构示意图。
本实施例与第二实施例的相同之处，在此不再赘述。本实施例与第二实施例的不同之处在于：如图17所示，所述金属层620仅覆盖所述掩膜图形层600朝向所述衬底500一侧的表面。
具体地，参考图16，在所述衬底500的第一表面（未标示）上形成掩膜材料层之前，在所述第一表面上形成金属膜625。
本实施例中，所述衬底500的第一表面上形成有第二牺牲层550，相应的，在所述第二牺牲层550上形成所述金属膜625。
所述金属膜625的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种，可以通过蒸镀、溅射或电镀的方式形成所述金属膜625。
继续参考图16，形成所述金属膜625后，图形化所述掩膜材料层，形成图形区I以及与所述图形区I相邻的遮挡区II，在所述图形区I形成至少一个贯穿所述掩膜材料层的通孔610，且图形化后的剩余掩膜材料层作为掩膜图形层600。
结合参考图17，形成所述掩膜图形层600后，刻蚀所述通孔610底部的金属膜625（如图16所示），刻蚀后的剩余金属膜625作为金属层620。
通过刻蚀所述通孔610底部的金属膜625，从而能够使后续形成于所述衬底500内的第一开口与所述通孔610相贯通，进而实现所述掩膜版的正常使用功能。
而且，所述金属层620覆盖所述掩膜图形层600朝向所述衬底500一侧的表面，从而在提高所述掩膜图形层600的机械强度的同时，避免所述金属层620占据所述通孔610空间的问题，进而能够减小对蒸镀工艺和成膜质量的影响。
对本实施例所述制作方法的具体描述，可结合参考第一实施例和第二实施例中的相应描述，本实施例在此不再赘述。
图18至图21是本发明掩膜版的制作方法第四实施例中各步骤对应的结构示意图。
本实施例与第二实施例的相同之处，在此不再赘述。本实施例与第二实施例的不同之处在于：如图21所示，所述金属层820覆盖所述掩膜图形层800朝向所述衬底700一侧的表面、以及所述掩膜图形层800背向所述衬底700一侧的表面。
通过使所述金属层820覆盖所述掩膜图形层800相对的两个表面，从而能够显著提高所述掩膜图形层800的机械强度；而且，能够避免所述金属层820占据所述通孔810空间的问题，相应可以减小对蒸镀工艺和成膜质量的影响。
具体地，结合参考图18，在所述衬底700的第一表面（未标示）上形成第一金属膜825；在所述第一金属膜825上形成掩膜材料层850；在所述掩膜材料层850上形成第二金属膜835。
本实施例中，所述衬底700的第一表面上形成有第二牺牲层750，相应的，在所述第二牺牲层750上形成所述第一金属膜825。
所述第一金属膜825的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种，所述第二金属膜835的材料可以为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种。本实施例中，为了提高工艺兼容性、降低形成所述金属层的工艺难度，所述第二金属膜835的材料和所述第一金属膜825的材料相同。
参考图19，刻蚀所述第二金属膜835，露出部分掩膜材料层850。
后续步骤包括图形化所述掩膜材料层850，在所述掩膜材料层850内形成至少一个贯穿所述掩膜材料层850的通孔，因此刻蚀所述第二金属膜835后，剩余第二金属膜835露出所述通孔所对应区域的掩膜材料层850。
参考图20，刻蚀所述第二金属膜835后，图形化所述掩膜材料层850（如图19所示），形成图形区I以及与所述图形区I相邻的遮挡区II，在所述图形区I形成至少一个贯穿所述掩膜材料层850的通孔810，且图形化后的剩余掩膜材料层850作为掩膜图形层800。
本实施例中，刻蚀所述第二金属膜835后，剩余第二金属膜835露出所述通孔810所对应区域的掩膜材料层850，因此剩余第二金属膜835能够覆盖所述掩膜图形层800背向所述衬底700一侧的表面。
参考图21，形成所述掩膜图形层800后，刻蚀所述通孔810底部的第一金属膜825，刻蚀后的剩余第一金属膜825和所述剩余第二金属膜835作为金属层820。
本实施例中，刻蚀所述通孔810底部的第一金属膜825后，所述通孔810露出所述第二牺牲层750，从而能够使后续形成于所述衬底700内的第一开口与所述通孔810相贯通，进而实现所述掩膜版的正常使用功能；而且刻蚀所述通孔810底部的第一金属膜825后，剩余第二金属膜835能够覆盖所述掩膜图形层800朝向所述衬底700一侧的表面，从而使所述金属层820覆盖所述掩膜图形层800相对的两个表面。
对本实施例所述制作方法的具体描述，可结合参考第一实施例和第二实施例中的相应描述，本实施例在此不再赘述。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (20)

  1. 一种掩膜版，其特征在于，包括：
    衬底，所述衬底包括第一表面以及与所述第一表面相背的第二表面，所述衬底内具有贯穿所述衬底的多个开口，所述衬底能够利用半导体刻蚀工艺进行图形化；
    位于所述第一表面的掩膜图形层，所述掩膜图形层包括相邻的图形区和遮挡区，所述图形区具有至少一个贯穿所述掩膜图形层的通孔，其中，所述开口露出所述图形区，且每一图形区与所述开口相对应；
    保护层，位于所述掩膜图形层背向所述衬底一侧的遮挡区表面上；
    第一牺牲层，位于所述掩膜图形层和所述保护层之间。
  2. 如权利要求1所述的掩膜版，其特征在于，所述掩膜图形层包括朝向所述第一表面的第三表面、以及与所述第三表面相背的第四表面；
    所述掩膜版还包括金属层，所述金属层覆盖所述第四表面以及所述通孔的侧壁；或者，所述金属层覆盖所述第三表面；或者，所述金属层覆盖所述第三表面和第四表面。
  3. 如权利要求1所述的掩膜版，其特征在于，所述掩膜版还包括：第二牺牲层，位于所述衬底和所述掩膜图形层之间。
  4. 如权利要求1所述的掩膜版，其特征在于，所述掩膜图形层的材料为氮化硅、氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
  5. 如权利要求1所述的掩膜版，其特征在于，所述衬底为硅衬底、锗衬底、锗化硅衬底、碳化硅衬底、砷化镓衬底、镓化铟衬底、绝缘体上的硅衬底或绝缘体上的锗衬底。
  6. 如权利要求2所述的掩膜版，其特征在于，所述通孔为圆形通孔，位于所述通孔侧壁上的金属层厚度小于所述通孔的半径。
  7. 如权利要求1所述的掩膜版，其特征在于，所述通孔的深度为2μm至10μm。
  8. 如权利要求1所述的掩膜版，其特征在于，所述第一牺牲层的厚度为2μm至10μm。
  9. 如权利要求1所述的掩膜版，其特征在于，所述保护层的厚度为2μm至10μm。
  10. 一种掩膜版的制作方法，其特征在于，包括：
    提供衬底，所述衬底包括第一表面以及与所述第一表面相背的第二表面；
    在所述第一表面上形成掩膜材料层；
    图形化所述掩膜材料层，形成图形区以及与所述图形区相邻的遮挡区，在所述图形区形成至少一个贯穿所述掩膜材料层的通孔，且图形化后的剩余掩膜材料层作为掩膜图形层；
    形成覆盖所述掩膜图形层的第一牺牲层，所述第一牺牲层还填充所述通孔；
    在所述遮挡区的第一牺牲层上形成保护层；
    形成所述保护层后，刻蚀所述衬底的第二表面，在所述衬底内形成贯穿所述衬底且露出所述图形区的多个开口，且每一开口与所述图形区相对应；
    形成所述开口后，以所述保护层和衬底为掩膜，去除所述图形区的第一牺牲层。
  11. 如权利要求10所述的掩膜版的制作方法，其特征在于，在所述第一表面上形成掩膜材料层之前，在所述第一表面上形成金属膜；
    形成所述掩膜图形层后，形成所述第一牺牲层之前，刻蚀所述通孔底部的金属膜，刻蚀后的剩余金属膜作为金属层；
    或者，
    在所述第一表面上形成掩膜材料层之前，在所述第一表面上形成第一金属膜；
    在所述第一表面上形成掩膜材料层后，形成所述掩膜图形层之前，在所述掩膜材料层上形成第二金属膜；刻蚀所述第二金属膜，露出所述通孔所对应区域的掩膜材料层；
    形成所述掩膜图形层后，形成所述第一牺牲层之前，刻蚀所述通孔底部的第一金属膜，刻蚀后的剩余第一金属膜和剩余第二金属膜作为金属层；
    或者，
    形成所述掩膜图形层后，形成所述第一牺牲层之前，在所述掩膜图形层上、所述通孔侧壁和底部形成金属膜；刻蚀所述通孔底部的金属膜，刻蚀后的剩余金属膜作为金属层。
  12. 如权利要求10所述的掩膜版的制作方法，其特征在于，在所述第一表面上形成掩膜材料层之前，在所述第一表面上形成第二牺牲层。
  13. 如权利要求12所述的掩膜版的制作方法，其特征在于，形成所述开口后，以所述保护层和衬底为掩膜，去除所述图形区的第二牺牲层。
  14. 如权利要求10所述的掩膜版的制作方法，其特征在于，所述掩膜图形层的材料为氮化硅、氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
  15. 如权利要求12所述的掩膜版的制作方法，其特征在于，所述第二牺牲层的材料为氧化硅、氮化硅、非晶碳或锗。
  16. 如权利要求11所述的掩膜版的制作方法，其特征在于，所述金属层的材料为Ni、Ag、Au、Cu、Pt、Cr、Mo、Ti、Ta、Sn、W和Al中的一种或多种。
  17. 如权利要求10所述的掩膜版的制作方法，其特征在于，所述保护层的材料为氮化硅、氧化硅、氮氧化硅、碳氮化硅、多晶硅或铝。
  18. 如权利要求10所述的掩膜版的制作方法，其特征在于，所述第一牺牲层的材料为氧化硅、氮化硅、非晶碳或锗。
  19. 如权利要求10或18所述的掩膜版的制作方法，其特征在于，去除所述图形区的第一牺牲层的工艺为湿法刻蚀工艺或灰化工艺。
  20. 如权利要求10所述的掩膜版的制作方法，其特征在于，所述衬底为硅衬底、锗衬底、锗化硅衬底、碳化硅衬底、砷化镓衬底、镓化铟衬底、绝缘体上的硅衬底或绝缘体上的锗衬底。
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CN113589638A (zh) * 2020-04-30 2021-11-02 中芯国际集成电路制造(上海)有限公司 掩膜版版图和半导体结构
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