WO2019210516A1 - 发光元件、发光元件阵列及其发光装置 - Google Patents

发光元件、发光元件阵列及其发光装置 Download PDF

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Publication number
WO2019210516A1
WO2019210516A1 PCT/CN2018/085675 CN2018085675W WO2019210516A1 WO 2019210516 A1 WO2019210516 A1 WO 2019210516A1 CN 2018085675 W CN2018085675 W CN 2018085675W WO 2019210516 A1 WO2019210516 A1 WO 2019210516A1
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Prior art keywords
light
emitting element
semiconductor layer
layer
emitting
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PCT/CN2018/085675
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English (en)
French (fr)
Inventor
丁绍滢
范俊峰
李佳恩
徐宸科
Original Assignee
厦门三安光电有限公司
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Application filed by 厦门三安光电有限公司 filed Critical 厦门三安光电有限公司
Priority to CN201880004806.4A priority Critical patent/CN110088919B/zh
Priority to CN202110854096.8A priority patent/CN113644179B/zh
Priority to PCT/CN2018/085675 priority patent/WO2019210516A1/zh
Publication of WO2019210516A1 publication Critical patent/WO2019210516A1/zh
Priority to US16/947,770 priority patent/US11380829B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector

Definitions

  • the present invention relates to the field of semiconductor manufacturing, and in particular to a light-emitting element, a light-emitting element array, and a light-emitting device thereof
  • the present invention proposes a feasible solution to the problem of the background art, by which a high-yield light-emitting element can be obtained.
  • the present invention provides a light-emitting element having a semiconductor layer sequence, the semiconductor layer sequence sequentially including a first type semiconductor layer, a second type semiconductor layer, and a first type semiconductor layer and a second type semiconductor layer
  • the active light-emitting layer, the first electrical contact layer electrically connected to the first type semiconductor layer, and the second electrical contact layer electrically connected to the second type semiconductor layer have a shielding layer distributed around the periphery of the light-emitting element.
  • the shielding layer is distributed in a wing shape with respect to the semiconductor layer sequence.
  • the shielding layer has the function of absorbing or reflecting laser light.
  • the shielding layer comprises a reflective material, and the reflectivity of the reflective material to the laser light is greater than 50%.
  • the material of the shielding layer is the same as the first electrical contact layer and/or the second electrical contact layer.
  • the shielding layer is connected to the first electrical contact layer or the second electrical contact layer.
  • the material of the shielding layer comprises chromium, titanium, nickel, silver, gold, platinum, tin.
  • the region of the shielding layer adjacent to the light emitting element has a stress concentration portion.
  • the stress concentration portion is disposed on the light emitting element or has a distance of less than 1 mm from the light emitting element.
  • the light-emitting element employs a substrate lift-off process
  • the stress concentration portion function includes reducing or preventing the substrate peeling process from remaining on the light-emitting element.
  • the size of the illuminating element is greater than 1 mm*1 mm.
  • the edge region of the light emitting element has a sacrificial structure.
  • the sacrificial structure is away from the side wall of the light emitting element as a flat surface.
  • the light-emitting element has adopted or will adopt a substrate lift-off process
  • the sacrificial structure function includes reducing or preventing cracks generated by peeling during the peeling process from extending into the light-emitting element, resulting in light emission. Loss of component light output.
  • the sacrificial structure is separated from the light emitting element and simultaneously connected to the substrate, or the sacrificial structure is only in contact with the second type semiconductor layer of the light emitting element.
  • the height of the sacrificial structure is from a height lpm smaller than the semiconductor layer sequence height to a height lpm greater than the semiconductor layer sequence height.
  • the width of the sacrificial structure is greater than the height of the sacrificial structure.
  • the area of the sacrificial structure is the area of the light emitting element.
  • the light-emitting element has from 2 [i m to 5 [i m, from 5 [i m to 10 [i m, from 10 [i m to Ij20 [i m, from 20 [ i m to 50 [i m or from 50 [i m to 100 [ xm length].
  • the light-emitting element has from 2 [im to 5 [im, from 5 [im to 10 [im, from 10 [im to Ij20 [i m, from 20 [i m to 50 [ i m or from 50 [i m to 100 [ xm width.
  • the light-emitting element has from 2 [i m to 5 [i m, from 5 [i m to 10 [i m, from 10 [i m to Ij20 [i m, from 20 [ i m to 50 [i m or from 50 [i m to 100 [ xm height].
  • the sidewall of the light-emitting element adjacent to the shielding layer is a flat surface.
  • the present invention also provides an array of light-emitting elements, which is composed of a plurality of any of the above-mentioned light-emitting elements.
  • the present invention also provides a light-emitting device, wherein the shielding layer is disposed at least above the control circuit.
  • control circuit consists of CMOS elements.
  • the illumination device comprises a plurality of illumination elements.
  • the present invention also provides another light-emitting device having a substrate including a control circuit, a light-emitting element connected to the control circuit of the substrate, the light-emitting element having a semiconductor layer sequence, and the semiconductor layer sequence including the first type semiconductor in order from bottom to top a layer, a second type semiconductor layer and an active light emitting layer between the first type semiconductor layer and the second type semiconductor layer, a first electrical contact layer electrically connected to the first type semiconductor layer, and a second type semiconductor layer
  • the electrically connected second electrical contact layer has a shielding layer distributed around the periphery of the light emitting element, the shielding layer being connected to at least a sacrificial structure, the sacrificial structure being in direct or indirect contact with the substrate.
  • a shielding layer is disposed around the light-emitting element, and when the substrate is peeled off by the laser in a subsequent process, damage to the bonded substrate is avoided, and in particular, damage of the control circuit on the substrate by the laser is avoided.
  • the shielding layer is the same as the first electrical contact layer and/or the second electrical contact layer material, and can be fabricated together, which shortens the processing time and improves the manufacturing efficiency.
  • the region of the shielding layer adjacent to the light-emitting element has a stress concentration portion, which ensures that the shielding layer can be broken as much as possible in the region close to the light-emitting element in the subsequent process, and the residual of the shielding layer is reduced.
  • the size of the light-emitting element is larger than lmm*lmm, and the larger size of the light-emitting element can improve the stability at the time of laser peeling and improve the controllability of peeling.
  • the shielding layer transmits the peeling impact force to the semiconductor layer sequence, and the edge region of the light emitting element has a sacrificial structure to avoid damage or collapse of the semiconductor layer sequence caused by the impact force.
  • the sacrificial structure is away from the side wall of the light-emitting element as a flat surface, for example, using ISO (isolation) directly to M
  • the platform created by the ESA (graphical) process removes the platform from being suspended without substrate support and collapses during peeling.
  • the sacrificial structure is separated from the light-emitting element or only in contact with the second-type semiconductor layer of the light-emitting element, and the crack caused by the peeling impact force at the time of peeling is effectively prevented from extending into the semiconductor layer sequence of the light-emitting element.
  • the sacrificial structure is in contact with the substrate, and the supporting force is provided by the substrate to reduce the collapse probability of the sacrificial structure, thereby obtaining a more excellent chip appearance.
  • FIG. 1 is a schematic view of a light-emitting element in Embodiment 1;
  • FIG. 2 is a schematic view of a light-emitting element of a second type of modified embodiment of Embodiment 1;
  • FIG. 3 is a schematic view of a light-emitting element of Embodiment 2;
  • Embodiment 4 is a schematic view of a light-emitting element of some modified embodiments of Embodiment 2;
  • FIG. 5 is a schematic view of a light emitting device of Embodiment 4.
  • FIG. 6 is a schematic view of a light emitting device of Embodiment 5.
  • FIG. 7 is a schematic diagram of a light emitting device according to some modified embodiments of Embodiment 5;
  • FIG. 8 is a schematic view of a light emitting device of Embodiment 6;
  • Embodiment 9 is a schematic diagram of a light emitting device according to some modified embodiments of Embodiment 6;
  • FIG. 10 is a schematic diagram of a light-emitting device after substrate removal according to some modified embodiments of Embodiment 6;
  • FIG. 1 semiconductor layer sequence, 110, first type semiconductor layer, 120, second type semiconductor layer, : 130, active light emitting layer, 140, sidewall, 210, first electrical contact layer, 220, second electrical contact layer, 300, sacrificial structure, 310, sidewall, 320, support structure, 400, substrate, 500, insulating layer, 600, shielding layer, 610, stress concentration portion, 700, substrate, 710, Contact area, 720, control circuit, 800, pixels.
  • a light-emitting element such as a light-emitting diode, having a semiconductor layer sequence, the semiconductor layer sequence is from bottom to top, and includes the first type in sequence. a semiconductor layer, a second type semiconductor layer, and an active light emitting layer between the first type semiconductor layer and the second type semiconductor layer.
  • the first type semiconductor layer is selected as a P type semiconductor layer
  • the second The type semiconductor layer is selected to be an N-type semiconductor layer, a first electrical contact layer electrically connected to the first type semiconductor layer, and a second electrical contact layer electrically connected to the second type semiconductor layer, having a shielding layer distributed around the periphery of the light emitting element,
  • the shielding layer has the function of absorbing or reflecting the laser light.
  • the shielding layer has a lateral wing-like distribution with respect to the semiconductor layer sequence, and the figure only has a single-wing distribution, and a wing-like structure may be disposed around the light-emitting element.
  • the material frequently selected by the shielding layer includes a reflective material and a light absorbing material.
  • the reflective material is selected, it is not easy to generate high temperature due to absorption of laser energy, and the semiconductor layer sequence is burned, so that the reflectance of the reflective material to the laser is greater than 50%. , the heat dissipation effect is better.
  • the material of the shielding layer is the same as that of the first electrical contact layer and/or the second electrical contact layer, and the embodiment may select the shielding layer and the first electrical contact layer or the second The electrical contact layers are connected to form a shielding layer and a first electrical contact layer and/or a second electrical contact layer.
  • First electrical contact layer and/or The two electrical contact layers each have a multilayer structure consisting of a plurality of individual layers of different overlapping metals in a direction perpendicular to the lateral direction, in particular a first electrical contact layer, a second electrical contact layer and
  • the choice of material for the masking layer includes chromium, titanium, nickel, erroneous, silver, gold, platinum, tin, or any combination of the above
  • the light-emitting elements having the shielding layer are not limited to the use of a front-mounted, flip-chip or vertical structure to prevent laser burn of the bonded substrate in the post process.
  • the stress concentration portion is provided in a region where the shielding layer is adjacent to the light emitting element.
  • the stress concentration portion is disposed on the light emitting element in the modified embodiment, or the distance from the light emitting element is less than 1 mm.
  • the illuminating element size is designed to be greater than 1 mm*1 mm, for example, each having a plurality of lateral and/or longitudinal configurations and independently controllable a pixel, each pixel comprising a semiconductor layer sequence having a protrusion and a first electrical contact layer, the second electrical contact layer and the first type semiconductor layer being separated from each other by an electrically insulating layer, the semiconductor layer sequence being along the light emitting element The entire lateral extent extends continuously.
  • a second embodiment of the present invention is provided, in order to solve the problem that when the light-emitting element is bonded to the substrate and the substrate is peeled off, The problem that the shielding layer is transmitted to the semiconductor layer sequence has a large impact force and causes the semiconductor layer sequence to be broken or collapsed.
  • the sacrificial structure is provided in the edge region of the light emitting element, and the sacrificial structure can be combined with the semiconductor layer.
  • the sequences are fabricated together, so the height of the sacrificial structure is from a height smaller than the semiconductor layer sequence: Lpm to a height higher than the semiconductor layer sequence: Lpm, which is more advantageous for the sacrificial structure to be supported by the bonded substrate after bonding.
  • the supporting structure is formed on the sacrificial structure, and the supporting structure and the first electrical contact layer and/or the second electrical contact layer are selected from the same material and are synchronously fabricated. As shown in the figure, the supporting structure 320 is the first embodiment.
  • the extension of the two electrical contact layers, the support structure and the sacrificial structure are separated by an insulating layer, the sacrificial structure itself does not constitute a current loop, the light-emitting element has adopted or will adopt a substrate stripping process, and the sacrificial structure function includes weakening or preventing the peeling process from being Loss of light-emitting properties of the light-emitting element caused by crack extension.
  • the side wall of the sacrificial structure away from the light-emitting element is set as a flat surface, and/or the side wall of the light-emitting element close to the shielding layer is a flat surface, and the platform generated by the MESA pattern is removed, and the flat surface is flattened.
  • the surface has better mechanical stability, is less prone to collapse and damage, and is also supported by the bond contact after subsequent bonding.
  • the sacrificial structure is separated from the light emitting elements.
  • the width of the sacrificial structure is set to be larger than the height of the sacrificial structure, so that the sacrificial structure has more stability.
  • the area of the sacrificial structure is the area of the light-emitting element While taking into account the protective effect, avoid excessive loss of light-emitting area.
  • the masking layer 600 extends over the insulating layer 500 of the raised portion of the semiconductor layer sequence 100 as a support structure 320 that is equal to the first electrical contact layer 210 and the second electrical contact layer 220.
  • the sacrificial structure is only in contact with the second type semiconductor layer of the light emitting element, and similarly, by reducing the contact area of the sacrificial structure with the light emitting element, Effectively preventing the crack generated by the peeling impact force from extending to the semiconductor layer sequence.
  • the light-emitting element is a micro-light-emitting diode having from 2 [im to 5 [im, from 5 [i m to 10 [i m, from 10 [i m to 20 [ i m, from 20 [i m to 50 [i m or from 50 [i m to 100 [i m length], from 2 [i m to 5 [i m, from 5 [i m to 10 [i m, From 10 [i m to 20 [i m, from 20 [i m to 50 [i m or from 50 [i m to 100 [ xm width], from 2 [i m to 5 [i m, from 5 [i m to 10 [i m, from 10 [i m to 20 [i m, from 20 [i m to 50 1 or from 50 pm to lOO ⁇ im height.
  • a light-emitting element array comprising a plurality of the light-emitting elements of any of the above-described Embodiments 1 to 3, wherein the light-emitting element array is bondable to the substrate.
  • a light emitting device having a substrate including a control circuit having a first electrical contact layer thereon a contact area for providing electrical contact with the second electrical contact layer, comprising the light-emitting element of any one of Embodiments 1 to 3, wherein the light-emitting element is connected to a control circuit of the substrate, and during operation, electrons are injected through the contact area
  • the control circuit determines the operating state of the light-emitting element, and has a display function of high pixels.
  • the shielding layer should be disposed at least above the control circuit, particularly in the region without the light-emitting elements, to prevent the laser from passing through the substrate 400 directly to the burn control circuit 720.
  • the control circuit may select an active matrix element having a plurality of switches.
  • Each switch can here be, for example, a transistor, for example a thin film transistor, in particular a field effect transistor.
  • the active matrix component is a metal/oxide/semiconductor component, which is known as a CMOS component.
  • control circuit is composed of CMOS components, and the CMOS component has a plurality of switches, each of which is associated with a pixel and is electrically connectable to the pixel, and in operation, can be individually and independently via the switch The pixel is controlled independently.
  • the contact area on the substrate can simultaneously serve as a cooling light emitting element to efficiently discharge heat generated when the light emitting element operates, for example, via the substrate.
  • the contact area may also have a supporting and stabilizing effect on the light-emitting element, such as, for example, stripping the growth substrate in the semiconductor wafer. Since the growth substrate is stripped to avoid the influence of the growth substrate on the brightness of the pixels, the growth substrate can be used to achieve a good contrast between adjacent pixels.
  • the sacrificial structure can combine the technical features of the above embodiments.
  • the light-emitting element in the light-emitting device employs a substrate stripping process, and the sacrificial structure function includes weakening or preventing the substrate stripping process. Loss of light-emitting properties of the light-emitting element caused by crack propagation.
  • the sacrificial structure in the light-emitting device of the embodiment, is in contact with the substrate, and the sacrificial structure is supported by the substrate, and the substrate provides a supporting force to the sacrificial structure.
  • part of the sacrificial structure is covered with a shielding layer.
  • the light-emitting element since the light-emitting element employs a substrate lift-off process, a stress concentration portion is disposed in the shielding layer, and its main functions include weakening or preventing the substrate peeling process.
  • the light-emitting element has a loss of light-emitting performance caused by the crack extension, and the stress concentration portion is similar to the stress center, and the stress concentration portion includes at least a technical means such as a thickness change, a shape change, or a gap.
  • a sixth embodiment is provided, and the size design of the light-emitting element is larger than For example, individual and independently controllable pixels having a plurality of lateral and/or longitudinal configurations, each pixel comprising a sequence of semiconductor layers having protrusions and a first electrical contact layer, the second electrical contact layer being electrically and electrically
  • the first type of semiconductor layers are spaced apart from each other, and the semiconductor layer sequence extends continuously along the entire lateral extent of the light-emitting element.
  • the light-emitting element is connected to the control circuit of the substrate.
  • the control circuit determines the operating state of the light-emitting element, and has a display function of high pixels.
  • the sacrificial structure is separated from the light emitting elements.
  • the sidewall portion is subjected to a peeling impact force, and the sidewall of the light-emitting element adjacent to the shielding layer is set as a flat surface, that is, the MESA patterned platform surface is removed to avoid the unsupported platform.
  • the surface of the light-emitting element of the present embodiment is relatively close to the side wall of the shielding layer and has relatively strong stability due to direct or indirect contact with the substrate through the second electrical contact layer. Referring to FIG.
  • the sacrificial structure is partially connected to the semiconductor layer sequence, and the sacrificial structure is only in contact with the second type semiconductor layer of the light emitting element, similarly, by reducing the sacrificial structure and The contact area of the light-emitting element can effectively prevent the crack generated by the peeling impact force from extending to the semiconductor layer sequence.
  • the substrate of the light-emitting element of the above modified embodiment is peeled off, and a light-emitting device having good light-emitting performance is obtained, which eliminates the influence of the substrate on the brightness and darkness, and improves the display definition of the display.
  • the shielding layer has a stress concentration portion due to the structural change in the sacrificial structure interface portion. After the substrate is peeled off, the shielding layer is broken at the stress concentration portion, and there is almost no floating residue.

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Abstract

本发明提供了一种发光装置，发光装置具有包括控制电路的基板，发光装置包括发光元件，发光元件具有半导体层序列，半导体层序列包括第一类型半导体层、第二类型半导体层及其位于第一类型半导体层和第二类型半导体层之间的有源发光层，发光装置具有分布在发光元件周边的遮蔽层，发光元件与基板的控制电路连接，发光元件已采用或将要采用激光剥离衬底的工艺，遮蔽层防止衬底剥离时，激光损伤控制电路而导致发光装置出现工作异常。

Description

发光元件、 发光元件阵列及其发光装置
技术领域
[0001] 本发明属于半导体制造领域， 具体涉及发光元件、 发光元件阵列及其发光装置
背景技术
[0002] 在目前市场中， 发光器件呈现出尺寸及间距微小化的趋势， 超小间距的发光装 置具有更高的像素和更良好的市场前景， 而在超小间距发光装置时， 例如制作 具有电路基板之氮化镓薄膜 LED结构， 需使用激光剥离技术移除蓝宝石衬底， 但 在移除时激光能量会穿透蓝宝石衬底， 激光传递至底下的控制电路板而导致线 路损坏， 造成产品良率不佳。
发明概述
技术问题
问题的解决方案
技术解决方案
[0003] 本发明就是针对背景技术的问题提出一种可行的解决方案， 通过此方案可以获 得高良率的发光元件。
[0004] 本发明提供了一种发光元件， 具有半导体层序列， 半导体层序列依次包括第一 类型半导体层、 第二类型半导体层及其位于第一类型半导体层和第二类型半导 体层之间的有源发光层， 与第一类型半导体层电连接的第一电接触层， 与第二 类型半导体层电连接的第二电接触层， 具有分布在发光元件周边的遮蔽层。
[0005] 根据本发明， 优选的， 遮蔽层相对半导体层序列呈翼状分布。
[0006] 根据本发明， 优选的， 遮蔽层具有吸收或者反射激光的作用。
[0007] 根据本发明， 优选的， 遮蔽层包括反射材料， 反射材料对激光的反射率为大于 50%。
[0008] 根据本发明， 优选的， 遮蔽层的材料与第一电接触层和 /或第二电接触层相同 [0009] 根据本发明， 优选的， 遮蔽层与第一电接触层或第二电接触层连接。
[0010] 根据本发明， 优选的， 遮蔽层的材料包括铬、 钛、 镍、 招、 银、 金、 铂、 锡。
[0011] 在本发明的一些实施例中， 优选的， 遮蔽层临近发光元件的区域具有应力集中 部。
[0012] 在该些实施例中， 优选的， 应力集中部设置在发光元件上， 或者离发光元件的 距离小于 1mm。
[0013] 在该些实施例中， 优选的， 发光元件采用了衬底剥离工艺， 应力集中部功能包 括减少或者阻止衬底剥离过程遮蔽层残余在发光元件上。
[0014] 根据本发明， 优选的， 发光元件尺寸大于 1mm* 1mm。
[0015] 在本发明的一些实施例中， 优选的， 发光元件边缘区域具有牺牲结构。
[0016] 在该些实施例的一些变形实施例中， 优选的， 牺牲结构远离发光元件的侧壁为 平整面。
[0017] 在该些变形实施例中， 优选的， 发光元件已采用或将要采用衬底剥离工艺， 牺 牲结构功能包括减少或者阻止剥离过程中剥离产生的裂纹延伸到发光元件内， 而导致的发光元件出光性能损失。
[0018] 在该些变形实施例中， 优选的， 牺牲结构与发光元件分离且同时连接在衬底上 ， 或牺牲结构仅与发光元件第二类型半导体层接触。
[0019] 在该些变形实施例中， 优选的， 牺牲结构的高度为从相比半导体层序列高度小 lpm到相比半导体层序列高度大 lpm。
[0020] 在该些变形实施例中， 优选的， 牺牲结构的宽度大于牺牲结构的高度。
[0021] 在该些变形实施例中， 优选的， 牺牲结构的面积为发光元件面积的
Figure imgf000004_0001
[0022] 在本发明中， 优选的， 发光元件具有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im 至 Ij20[im、 从 20[im到 50[im或从 50[im到 100[xm的长度。
[0023] 在本发明中， 优选的， 发光元件具有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im 至 Ij20[im、 从 20[im到 50[im或从 50[im到 100[xm的宽度。
[0024] 在本发明中， 优选的， 发光元件具有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im 至 Ij20[im、 从 20[im到 50[im或从 50[im到 100[xm的高度。
[0025] 在本发明中， 优选的， 发光元件上靠近遮蔽层的侧壁为平整面。 [0026] 本发明还提供了一种发光元件阵列， 由若干个上述任意一种发光元件组成。
[0027] 为提供一种显屏用的发光装置， 本发明还提供了一种发光装置， 遮蔽层至少设 置于控制电路的上方。
[0028] 根据本发明， 优选的， 控制电路由 CMOS元件组成。
[0029] 根据本发明， 优选的， 发光装置包括若干个发光元件。
[0030] 本发明还提供了另一种发光装置， 具有包括控制电路的基板、 与基板的控制电 路连接的发光元件， 发光元件具有半导体层序列， 半导体层序列从下至上依次 包括第一类型半导体层、 第二类型半导体层及其位于第一类型半导体层和第二 类型半导体层之间的有源发光层， 与第一类型半导体层电连接的第一电接触层 ， 与第二类型半导体层电连接的第二电接触层， 具有分布在发光元件周边的遮 蔽层， 遮蔽层至少连接到一牺牲结构上， 牺牲结构与基板直接或间接接触。
[0031] ( 1) 在发光元件周边设置遮蔽层， 在后续制程工艺利用激光剥离衬底时， 避 免对键合基板的损伤， 特别是避免激光对基板上控制电路的损伤。
[0032] (2) 遮蔽层与第一电接触层和 /或第二电接触层材料相同， 可一并进行制作， 缩短了制程时间， 提高了制作效率。
[0033] (3) 遮蔽层临近发光元件的区域具有应力集中部， 保证在后续制程工艺中遮 蔽层能尽可能在靠近发光元件的区域断裂， 减少遮蔽层的残余。
[0034] (4) 发光元件尺寸大于 lmm*lmm， 较大的发光元件尺寸能提高激光剥离时的 稳定性， 提高剥离的可控性。
[0035] (5) 衬底剥离时， 遮蔽层将剥离冲击力传递到半导体层序列， 发光元件边缘 区域具有牺牲结构避免冲击力造成半导体层序列损伤或者坍塌。
[0036] (6) 牺牲结构远离发光元件的侧壁为平整面， 例如利用 ISO (隔离) 直接将 M
ESA (图形化) 工艺制作出的平台去除， 防止平台没有得到基板支撑而悬空， 在 剥离时出现坍塌。
[0037] (7) 牺牲结构与发光元件分离或仅与发光元件第二类型半导体层接触， 有效 避免剥离时由剥离冲击力产生的破裂延伸到发光元件的半导体层序列中。
[0038] 牺牲结构与基板接触， 由基板提供支撑力， 降低牺牲结构的坍塌概率， 从而获 得更优良的芯片外观。 发明的有益效果
有益效果
[0039] 本发明的其它特征和优点将在随后的说明书中阐述， 并且， 部分地从说明书中 变得显而易见， 或者通过实施本发明而了解。 本发明的目的和其他优点可通过 在说明书、 权利要求书以及附图中所特别指出的结构来实现和获得。
对附图的简要说明
附图说明
[0040] 附图用来提供对本发明的进一步理解， 并且构成说明书的一部分， 与本发明的 实施例一起用于解释本发明， 并不构成对本发明的限制。 此外， 附图数据是描 述概要， 不是按比例绘制。
[0041] 图 1为实施例 1中的发光元件示意图；
[0042] 图 2为实施例 1的第二类变形实施例的发光元件示意图；
[0043] 图 3为实施例 2的发光元件示意图；
[0044] 图 4为实施例 2的一些变形实施例的发光元件示意图；
[0045] 图 5为实施例 4的发光装置示意图；
[0046] 图 6为实施例 5的发光装置示意图；
[0047] 图 7为实施例 5的一些变形实施例的发光装置示意图；
[0048] 图 8为实施例 6的发光装置示意图；
[0049] 图 9为实施例 6的一些变形实施例的发光装置示意图；
[0050] 图 10为实施例 6的一些变形实施例进行衬底去除后的发光装置示意图；
[0051] 图中标示： 100、 半导体层序列， 110、 第一类型半导体层， 120、 第二类型半 导体层， ： 130、 有源发光层， 140、 侧壁， 210、 第一电接触层， 220、 第二电接 触层， 300、 牺牲结构， 310、 侧壁， 320、 支撑结构， 400、 衬底， 500、 绝缘层 ， 600、 遮蔽层， 610、 应力集中部， 700、 基板， 710、 接触区域， 720、 控制电 路， 800、 像素。
发明实施例
本发明的实施方式 [0052] 以下将结合附图及实施例来详细说明本发明的实施方式， 借此对本发明如何应 用技术手段来解决技术问题， 并达成技术效果的实现过程能充分理解并据以实 施。 需要说明的是， 只要不构成冲突， 本发明中的各个实施例以及各实施例中 的各个特征可以相互结合， 所形成的技术方案均在本发明的保护范围之内。
[0053] 应当理解， 本发明所使用的术语仅出于描述具体实施方式的目的， 而不是旨在 限制本发明。 进一步理解， 当在本发明中使用术语“包含”、 ”包括’’时， 用于表明 陈述的特征、 整体、 步骤、 元件、 和 /或的存在， 而不排除一个或多个其他特征 、 整体、 步骤、 元件、 和 /或它们的组合的存在或增加。
[0054] 除另有定义之外， 本发明所使用的所有术语 （包括技术术语和科学术语） 具有 与本发明所属领域的普通技术人员通常所理解的含义相同的含义。 应进一步理 解， 本发明所使用的术语应被理解为具有与这些术语在本说明书的上下文和相 关领域中的含义一致的含义， 并且不应以理想化或过于正式的意义来理解， 除 本发明中明确如此定义之外。
[0055] 参看图 1， 在本发明的第一个实施例中， 提供了一种发光元件， 该发光元件例 如为发光二极管， 具有半导体层序列， 半导体层序列从下至上， 依次包括第一 类型半导体层、 第二类型半导体层及其位于第一类型半导体层和第二类型半导 体层之间的有源发光层， 在本实施例中， 第一类型半导体层选择为 P型半导体层 ， 第二类型半导体层选择为 N型半导体层， 与第一类型半导体层电连接的第一电 接触层， 与第二类型半导体层电连接的第二电接触层， 具有分布在发光元件周 边的遮蔽层， 遮蔽层具有吸收或者反射激光的作用， 如图中所示， 遮蔽层相对 半导体层序列呈横向的翼状分布， 图中仅为单翼状分布， 也可以在发光元件四 周均设置翼状结构。
[0056] 遮蔽层常选择的材料包括反射材料、 吸光材料， 如选择为反射材料时， 不容易 因为吸收激光能量而产生高温， 烧伤半导体层序列， 因此反射材料对激光的反 射率大于 50%时， 散热效果较佳。
[0057] 为了简化制作工艺， 本实施例将遮蔽层的材料设置与第一电接触层和 /或第二 电接触层相同， 本实施例可选择将遮蔽层与第一电接触层或第二电接触层连接 ， 一起制作出遮蔽层及第一电接触层和 /或第二电接触层。 第一电接触层和 /或第 二电接触层在垂直于横向的方向中分别具有一种由复数个重叠之不同金属的个 别层构成之多层构造或由其构成， 具体来说第一电接触层、 第二电接触层和遮 蔽层的材料的选择包括铬、 钛、 镍、 错、 银、 金、 铂、 锡， 或者以上任意组合
[0058] 可以预期的， 具有遮蔽层的发光元件不限于采用正装、 倒装或者垂直结构， 均 可防止激光烧伤在后工艺的键合基板。
[0059] 在第一个实施例的第一类变形实施例中， 在遮蔽层临近发光元件的区域设置应 力集中部。
[0060] 为了减少遮蔽层残余， 该些变形实施例中将应力集中部设置在发光元件上， 或 者离发光元件的距离小于 1mm
[0061] 参看图 2, 在第一个实施例的第二类变形实施例中， 将发光元件尺寸设计大于 1 mm* 1mm, 例如具有复数横向和 /或纵向配置的各别的且可独立控制的像素， 每 个像素包括具有突出部的半导体层序列及第一电接触层， 借由电绝缘层将第二 电接触层和第一类型半导体层相互隔开， 半导体层序列沿着该发光元件之整个 横向范围相连地延伸着。
[0062] 参看图 3 , 在第一个实施例的第二类变形实施例的基础上， 提供本发明的第二 个实施例， 为了解决发光元件键合到基板后， 剥离衬底时， 由遮蔽层传递到半 导体层序列冲击力较大而导致半导体层序列破裂或坍塌的问题， 本实施例在第 一个实施例的基础上在发光元件边缘区域设置有牺牲结构， 牺牲结构可与半导 体层序列一起制作， 因此牺牲结构的高度为从相比半导体层序列高度小: Lpm到相 比半导体层序列高度大: Lpm， 更有利于键合后牺牲结构通过键合基板进行支撑。 在牺牲结构上制作支撑结构， 支撑结构与第一电接触层和 /或第二电接触层可选 择同种材料， 同步制作而成， 如图中所示， 本实施例中支撑结构 320为第二电接 触层的延伸， 支撑结构与牺牲结构间通过绝缘层隔离开， 牺牲结构本身不构成 电流回路， 发光元件已采用或将要采用衬底剥离工艺， 牺牲结构功能包括削弱 或者阻止剥离过程中由裂纹延伸导致的发光元件出光性能损失。
[0063] 出于优化设计的考虑， 在牺牲结构远离发光元件的侧壁设置为平整面， 和 /或 发光元件上靠近遮蔽层的侧壁为平整面， 去除由 MESA图形化产生的平台， 平整 面具有更佳的力学稳定性， 不易坍塌、 损坏， 也在后续键合后由键合接触提供 支撑力。 牺牲结构与发光元件分离。 在本实施例中， 将牺牲结构的宽度设置大 于牺牲结构的高度， 让牺牲结构具有更加的稳定性。 牺牲结构的面积为发光元 件面积的
Figure imgf000009_0001
再兼顾保护效果的同时， 避免损失过大的发光面积。 如图中 所示， 遮蔽层 600延伸覆盖到半导体层序列 100的凸起部的绝缘层 500之上作为与 第一电接触层 210和第二电接触层 220等高的支撑结构 320。
[0064] 参看图 4, 在第二个实施例的一些变形实施例中， 牺牲结构仅与发光元件的第 二类型半导体层接触， 类似地， 通过减小牺牲结构与发光元件的接触面积， 可 以有效阻止由剥离冲击力产生的裂痕向半导体层序列延伸。
[0065] 在本发明的第三个实施例中， 发光元件为微发光二极管， 具有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50[im或从 50[im到 100[im的长度， 具 有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50[im或从 50[im到 100[xm的宽度， 具有从 2[im到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50 1或从 50pm到 lOO^im的高度。
[0066] 本发明的第四个实施例中， 提供了由若干个上述实施例 1到实施例 3中任意一种 发光元件组成的发光元件阵列， 该发光元件阵列可键合于基板上。
[0067] 参看图 5， 以第四个实施例为基础， 在本发明的第五个实施例中， 提供了一种 发光装置， 具有包括控制电路的基板， 基板上具有与第一电接触层、 第二电接 触层提供电接触的接触区域， 包括上述实施例 1到实施例 3中任意一种发光元件 ， 发光元件与基板的控制电路连接， 在操作时， 电子经由该接触区域而注入至 发光元件中， 由控制电路决定发光元件的工作状态， 具有高像素的显示功能。 为提供良好的保护效果， 与控制电路相对应的， 遮蔽层应至少设置于控制电路 的上方， 特别是没有发光元件的区域， 阻止激光穿过衬底 400直接烧伤控制电路 720。 在本实施例中， 该控制电路可选用具有复数个开关的主动矩阵元件。 每一 开关于此例如可以是电晶体， 例如， 薄膜电晶体， 特别是场效电晶体。 例如， 该主动矩阵元件是金属 /氧化物 /半导体组件， 其已为人所知而称为 CMOS组件。 具体来说， 控制电路由 CMOS元件组成， CMOS元件具有复数个开关， 每一开关 配属于一像素且可导电地与该像素相连接， 在操作时， 可经由该开关各别地且 独立地控制该像素。
[0068] 在基板上的接触区域可同时用作冷却发光元件， 以将该发光元件操作时产生的 热有效地例如经由基板排出。 该接触区域亦可对该发光元件具有支撑和稳定的 作用， 这样例如将该半导体晶片中的生长衬底剥离。 由于生长衬底剥离而避免 了生长衬底对像素明暗的影响， 不需该生长衬底亦可在相邻的像素之间达成很 好的明暗对比。
[0069] 参看图 6， 在第五个实施例中， 牺牲结构可兼具上述实施例的技术特征， 发光 装置中发光元件采用了衬底剥离工艺， 牺牲结构功能包括削弱或者阻止衬底剥 离过程中由裂纹延伸而导致的发光元件出光性能损失。 而本实施例为了增强牺 牲结构的稳定性， 在本实施例的发光装置中， 牺牲结构与基板接触， 牺牲结构 由基板支撑， 基板向牺牲结构提供支撑力。 出于简化工艺流程的考虑， 牺牲结 构上部分区域覆盖有遮蔽层。
[0070] 参看图 7 , 在第五个实施例的一些变形实施例中， 由于发光元件采用了衬底剥 离工艺， 在遮蔽层中设置应力集中部， 其主要功能包括削弱或者阻止衬底剥离 过程中由裂纹延伸导致的发光元件出光性能损失， 应力集中部类似应力中心， 应力集中部至少包括厚度变化、 形状变化或者制作缺口等技术手段。
[0071] 参看图 8 , 在第一个实施例的第二类变形实施例的发光元件基础上， 提供第六 个实施例， 将发光元件尺寸设计大于
Figure imgf000010_0001
例如具有复数横向和 /或纵向配 置的各别的且可独立控制的像素， 每个像素包括具有突出部的半导体层序列及 第一电接触层， 借由电绝缘层将第二电接触层和第一类型半导体层相互隔开， 半导体层序列沿着该发光元件之整个横向范围相连地延伸着。 发光元件与基板 的控制电路连接， 在操作时， 电子经由该接触区域而注入至发光元件中， 由控 制电路决定发光元件的工作状态， 具有高像素的显示功能。 在该实施例中， 牺 牲结构与发光元件分离。
[0072] 在该实施例中， 侧壁部分受到剥离冲击力较大， 将发光元件上靠近遮蔽层的侧 壁为设置平整面， 即去除 MESA图形化的平台面， 以避免悬空无支撑的平台面脱 离坍塌， 本实施例的发光元件靠近遮蔽层的侧壁由于得到通过第二电接触层与 基板直接或间接接触而具有比较强的稳定性。 [0073] 参看图 9 , 作为第六个实施例的一些变形实施例， 牺牲结构与半导体层序列部 分连接， 牺牲结构仅与发光元件第二类型半导体层接触， 类似地， 通过减小牺 牲结构与发光元件的接触面积， 可以有效阻止由剥离冲击力产生的裂痕向半导 体层序列延伸。
[0074] 参看图 10, 将上述变形实施例的发光元件的衬底剥离， 得到了具有良好出光性 能的发光装置， 消除了衬底对明暗变化的影响， 提高了显示器的显示清晰度， 从图中可以看出， 遮蔽层因为结构变化而在于牺牲结构交接部具有应力集中部 ， 剥离衬底后， 遮蔽层在应力集中部断裂， 而几乎没有悬空残留。
[0075] 以上所述仅是本发明的优选实施方式， 应当指出， 对于本技术领域的技术人员 ， 在不脱离本发明原理的前提下， 还可以做出若干改进和润饰， 这些改进和润 饰也应视为本发明的保护范围。

Claims

权利要求书
[权利要求 1] 发光元件， 具有半导体层序列， 半导体层序列从下至上依次包括第一 类型半导体层、 第二类型半导体层及其位于第一类型半导体层和第二 类型半导体层之间的有源发光层，
与第一类型半导体层电连接的第一电接触层，
与第二类型半导体层电连接的第二电接触层，
其特征在于， 具有分布在发光元件周边的遮蔽层。
[权利要求 2] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层相对半导体层 序列呈翼状分布。
[权利要求 3] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层具有吸收或者 反射激光的作用。
[权利要求 4] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层包括反射材料 ， 反射材料对激光的反射率为大于 50%。
[权利要求 5] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层的材料与第一 电接触层和 /或第二电接触层相同。
[权利要求 6] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层与第一电接触 层或第二电接触层连接。
[权利要求 7] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层的材料包括铬 、 钦、 镍、 招、 银、 金、 销、 锡。
[权利要求 8] 根据权利要求 1所述的发光元件， 其特征在于， 遮蔽层临近发光元件 的区域具有应力集中部。
[权利要求 9] 根据权利要求 8所述的发光元件， 其特征在于， 应力集中部设置在发 光元件上， 或者离发光元件的距离小于 1mm。
[权利要求 10] 根据权利要求 8所述的发光装置， 其特征在于， 发光元件采用了衬底 剥离工艺， 应力集中部功能包括减少或者阻止衬底剥离过程遮蔽层残 余在发光元件上。
[权利要求 11] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件尺寸大于 lm
Figure imgf000012_0001
[权利要求 12] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件边缘区域具 有牺牲结构。
[权利要求 13] 根据权利要求 12所述的发光元件， 其特征在于， 牺牲结构远离发光元 件的侧壁为平整面。
[权利要求 14] 根据权利要求 12所述的发光元件， 其特征在于， 发光元件已采用或将 要采用衬底剥离工艺， 牺牲结构功能包括减少或者阻止剥离过程中剥 离产生的裂纹延伸到发光元件内， 而导致的发光元件出光性能损失。
[权利要求 15] 根据权利要求 12所述的发光元件， 其特征在于， 牺牲结构与发光元件 分离且同时连接在衬底上， 或牺牲结构仅与发光元件第二类型半导体 层接触。
[权利要求 16] 根据权利要求 12所述的发光元件， 其特征在于， 牺牲结构的高度为从 相比半导体层序列高度小 lpm到相比半导体层序列高度大 lpm。
[权利要求 17] 根据权利要求 12所述的发光元件， 其特征在于， 牺牲结构的宽度大于 牺牲结构的高度。
[权利要求 18] 根据权利要求 12所述的发光元件， 其特征在于， 牺牲结构的面积为发 光元件面积的
Figure imgf000013_0001
[权利要求 19] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件具有从 2pm 到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50[im或从 50[im 到 lOOpm的长度。
[权利要求 20] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件具有从 2pm 到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50[im或从 50[im 到 lOOpm的宽度。
[权利要求 21] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件具有从 2pm 到 5[im、 从 5[im到 10[im、 从 10[im到 20[im、 从 20[im到 50[im或从 50[im 到 lOOpm的高度。
[权利要求 22] 根据权利要求 1所述的发光元件， 其特征在于， 发光元件上靠近遮蔽 层的侧壁为平整面。
[权利要求 23] 发光元件阵列， 其特征在于， 由若干个权利要求 1~22中任意一项所述 的发光元件组成。
[权利要求 24] 发光装置， 具有包括控制电路的基板， 其特征在于， 包括权利要求 1~
22中任意一项所述的发光元件， 发光元件与基板的控制电路连接， 由 控制电路决定发光元件的工作状态。
[权利要求 25] 根据权利要求 24所述的发光装置， 其特征在于， 遮蔽层至少设置于控 制电路的上方。
[权利要求 26] 根据权利要求 24所述的发光装置， 其特征在于， 控制电路由 CMOS元 件组成。
[权利要求 27] 根据权利要求 24所述的发光装置， 其特征在于， 发光装置包括若干个 发光元件。
[权利要求 28] 发光装置， 具有包括控制电路的基板、 与基板的控制电路连接的发光 元件， 发光元件具有半导体层序列， 半导体层序列依次包括第一类型 半导体层、 第二类型半导体层及其位于第一类型半导体层和第二类型 半导体层之间的有源发光层，
与第一类型半导体层电连接的第一电接触层，
与第二类型半导体层电连接的第二电接触层，
其特征在于， 具有分布在发光元件周边的遮蔽层， 遮蔽层至少连接到 一牺牲结构上， 牺牲结构与基板直接或间接接触。
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1645695A (zh) * 2004-01-23 2005-07-27 先锋株式会社 集成半导体发光元件及其制造方法
JP2010278239A (ja) * 2009-05-28 2010-12-09 Kyocera Corp 受発光素子及びその製造方法、並びに受発光素子を備えた光センサ装置
CN107331679A (zh) * 2017-07-05 2017-11-07 广东工业大学 一种csp封装的高压led芯片结构及制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7535028B2 (en) * 2005-02-03 2009-05-19 Ac Led Lighting, L.Lc. Micro-LED based high voltage AC/DC indicator lamp
JP2007103725A (ja) * 2005-10-05 2007-04-19 Toshiba Corp 半導体発光装置
CN100505351C (zh) * 2007-12-24 2009-06-24 厦门市三安光电科技有限公司 一种应用合成分隔法激光剥离GaN基发光器件的制造方法
CN100596289C (zh) * 2008-01-09 2010-03-31 天津大学 整体型大孔氧化硅的制备方法
US8963178B2 (en) * 2009-11-13 2015-02-24 Seoul Viosys Co., Ltd. Light emitting diode chip having distributed bragg reflector and method of fabricating the same
US9461209B2 (en) * 2013-11-27 2016-10-04 Epistar Corporation Semiconductor light-emitting device
CN104465691A (zh) * 2013-09-16 2015-03-25 上海蓝光科技有限公司 一种高压发光二极管结构及其制造方法
JP2015088524A (ja) * 2013-10-28 2015-05-07 株式会社東芝 半導体発光装置
KR20160141063A (ko) * 2015-05-27 2016-12-08 삼성전자주식회사 발광소자 패키지, 그 제조 방법
JP6555043B2 (ja) * 2015-09-18 2019-08-07 日亜化学工業株式会社 発光素子及び発光装置
KR102480220B1 (ko) * 2016-04-08 2022-12-26 삼성전자주식회사 발광 다이오드 모듈 및 이를 구비한 디스플레이 패널
JP2018049971A (ja) * 2016-09-23 2018-03-29 スタンレー電気株式会社 発光装置の製造方法及び発光装置
CN109860364B (zh) * 2017-08-30 2020-09-01 天津三安光电有限公司 发光二极管

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1645695A (zh) * 2004-01-23 2005-07-27 先锋株式会社 集成半导体发光元件及其制造方法
JP2010278239A (ja) * 2009-05-28 2010-12-09 Kyocera Corp 受発光素子及びその製造方法、並びに受発光素子を備えた光センサ装置
CN107331679A (zh) * 2017-07-05 2017-11-07 广东工业大学 一种csp封装的高压led芯片结构及制作方法

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