WO2021129736A1 - 一种Mini LED芯片及其制作方法 - Google Patents

一种Mini LED芯片及其制作方法 Download PDF

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Publication number
WO2021129736A1
WO2021129736A1 PCT/CN2020/138989 CN2020138989W WO2021129736A1 WO 2021129736 A1 WO2021129736 A1 WO 2021129736A1 CN 2020138989 W CN2020138989 W CN 2020138989W WO 2021129736 A1 WO2021129736 A1 WO 2021129736A1
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Prior art keywords
hole
electrode
layer
led chip
mini led
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PCT/CN2020/138989
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English (en)
French (fr)
Inventor
刘英策
李俊贤
刘兆
黄瑄
邬新根
Original Assignee
厦门乾照光电股份有限公司
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Priority claimed from CN201922386858.7U external-priority patent/CN211265505U/zh
Priority claimed from CN201911366387.1A external-priority patent/CN110931620A/zh
Application filed by 厦门乾照光电股份有限公司 filed Critical 厦门乾照光电股份有限公司
Priority to KR1020227025960A priority Critical patent/KR20220123045A/ko
Publication of WO2021129736A1 publication Critical patent/WO2021129736A1/zh
Priority to US17/832,558 priority patent/US20220302352A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0058Processes relating to semiconductor body packages relating to optical field-shaping elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements

Definitions

  • the present invention relates to the technical field of semiconductor devices, and more specifically, to a Mini LED (Mini Light Emitting Diode, Micro Light Emitting Diode) chip and a manufacturing method thereof.
  • Mini LED Mini Light Emitting Diode, Micro Light Emitting Diode
  • LCD Liquid Crystal Display
  • OLED organic light-emitting diode
  • RGB Mini LED With the upgrading of display panels, a new type of display panel-Mini LED (Mini LED) display panel appears on the market. It is also an active light emitting device and has a faster response speed than OLED display panels. , The use of a wider temperature range, higher light source utilization, longer life, lower cost, these advantages make the display panel of the micro LED is expected to become the mainstream of the display panel in the future.
  • the RGB Mini LED chip overcomes the welding and reliability defects of the front-mounted chip, and combines the advantages of COB packaging (Chips on Board) to further reduce the pixel pitch of the display screen, and the visual effect of the corresponding terminal product Significant improvement, while the viewing distance can be greatly reduced, so that the indoor display can further replace the original LCD market.
  • COB packaging Chip on Board
  • the use of RGB Mini LED chips with flexible substrates can also achieve high-quality curved display effects. Coupled with its self-luminous characteristics, it has a very broad market for some special modeling requirements (such as automotive displays).
  • the present invention provides a Mini LED chip and a manufacturing method thereof, which effectively solves the technical problems existing in the prior art, improves the luminous efficiency and reliability of the Mini LED chip, and at the same time ensures that the luminous angle of the Mini LED chip reaches Expected effect.
  • a Mini LED chip including:
  • a growth substrate and a light-emitting epitaxial layer are sequentially stacked, the light-emitting epitaxial layer includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer that are sequentially stacked, wherein the second type semiconductor layer and the light emitting layer have The electrode contacting the hollow that exposes the first type semiconductor layer;
  • An extended electrode located on the side of the transparent conductive layer away from the growth substrate;
  • first bonding electrode and the second bonding electrode located on the side of the insulating isolation reflection layer away from the growth substrate, wherein the first bonding electrode passes through the first through hole and the second bonding electrode A type of semiconductor layer is in contact, and the second bonding electrode is in contact with the extended electrode through the second through hole.
  • At least one of the first bonding electrode and the second bonding electrode has a plurality of holes.
  • the plurality of holes are divided into a first hole group and a second hole group;
  • first hole group and the second hole group are symmetrical with respect to the line connecting the first through hole to the second through hole.
  • the hole is in the shape of a through hole or a blind hole.
  • the aperture of the hole has an increasing trend.
  • the pore diameter ranges from 1 ⁇ m to 10 ⁇ m, including endpoints.
  • the side wall of the hole is a roughened side wall.
  • the roughness Ra of the sidewall of the roughened surface is less than or equal to 50 ⁇ m.
  • the insulating isolation reflective layer also extends to cover the exposed side surface of the light-emitting epitaxial layer.
  • the insulating isolation reflective layer is a DBR insulating isolation reflective layer.
  • the DBR insulating isolation reflective layer is a DBR reflective film layer structure formed by any combination of SiO2, SiN, TiO2, Ta2O5, and MgF.
  • the electrode contact hollow is an electrode contact hole, and the electrode contact hole is located within a coverage area of the second type semiconductor layer and the light-emitting layer.
  • the side walls of the first through hole and/or the second through hole are roughened side walls.
  • the diameter of the first through hole and/or the second through hole has an increasing trend.
  • the material of the extended electrode includes a metal material or an alloy material; the material of at least one of the first bonding electrode and the second bonding electrode includes a metal material or an alloy material.
  • the present invention also provides a method for manufacturing Mini LED chips, including:
  • a light emitting epitaxial layer is grown on the growth substrate, the light emitting epitaxial layer includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer that are sequentially stacked, wherein the second type semiconductor layer and the light emitting layer Having an electrode contact hollow that exposes the first type semiconductor layer;
  • an insulating isolation reflective layer covering the transparent conductive layer and the exposed surface of the extended electrode on the side facing away from the growth substrate and the electrode contact hollows, wherein the insulating isolation reflective layer corresponds to the electrode contact hollows Having a first through hole exposing the first type semiconductor layer, and having a second through hole exposing the extended electrode corresponding to the extended electrode;
  • a first bonding electrode and a second bonding electrode are formed on the side of the insulating isolation reflection layer away from the growth substrate, wherein the first bonding electrode is connected to the first type through the first through hole.
  • the semiconductor layer is in contact, and the second bonding electrode is in contact with the extended electrode through the second through hole.
  • forming an insulating and isolating reflective layer covering the transparent conductive layer and the exposed surface of the extended electrode on the side facing away from the growth substrate and the contact hole of the electrode includes:
  • a DBR insulating isolation reflective layer covering the transparent conductive layer and the exposed surface of the extended electrode away from the growth substrate and the electrode contact hollow is formed.
  • the method for forming the first through hole and the second through hole includes:
  • the interface layer is etched and removed by using a second etching gas.
  • the first etching gas includes CHF3, Ar, and O2, or the first etching gas includes CF4, Ar, and O2;
  • the second etching gas includes BCl3, Cl2, and Ar.
  • the method further includes:
  • a plurality of holes are formed on at least one of the first bonding electrode and the second bonding electrode.
  • the plurality of holes are divided into a first hole group and a second hole group, and a connection between the first through hole and the second through hole is formed.
  • the connection line of is the first hole group and the second hole group that are symmetrical on the axis of symmetry.
  • the technical solution provided by the present invention has at least the following advantages:
  • the present invention provides a Mini LED chip and a manufacturing method thereof, including: a growth substrate and a light-emitting epitaxial layer stacked in sequence, the light-emitting epitaxial layer including a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence , Wherein the second type semiconductor layer and the light-emitting layer have electrode contact hollows that expose the first type semiconductor layer; a transparent conductive layer located on the side of the second type semiconductor layer away from the growth substrate, And the transparent conductive layer corresponding to the electrode contact hollow is correspondingly hollow; the extended electrode located on the side of the transparent conductive layer away from the growth substrate; covering the transparent conductive layer and the extended electrode away from the growth The exposed surface on one side of the substrate and the insulating isolation reflective layer where the electrode contacts the hollow, wherein the insulating isolation reflection layer corresponds to the electrode contact hollow with a first through hole exposing the first type semiconductor layer, and Corresponding to the expansion electrode, there is a second through hole that exposes the expansion
  • the technical solution provided by the present invention is located between the first type semiconductor layer and the first bonding electrode and is not connected by the corresponding auxiliary extended electrode, that is, the auxiliary extended electrode is not made here at the electrode contact hollow.
  • the problem of the area occupied by the enlarged electrode contact hole caused by the existence of the auxiliary extended electrode is avoided, the area of the light-emitting area is large, and the light-emitting efficiency of the Mini LED chip is improved.
  • the technical solution provided by the present invention does not require the production of auxiliary expansion electrodes, the problems of poor flatness of the first bonding electrode and poor coverage of the insulating and isolated reflective layer due to the existence of the auxiliary expansion electrodes are avoided, and the problems of poor coverage of the insulating and isolating reflective layer are avoided.
  • the reliability of the Mini LED chip is improved, and at the same time, the light-emitting angle of the Mini LED chip is guaranteed to achieve the desired effect.
  • Fig. 1 is a schematic structural diagram of a Mini LED chip provided by an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of another Mini LED chip provided by an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of another Mini LED chip provided by an embodiment of the present invention.
  • FIG. 4 is a flowchart of a method for manufacturing a Mini LED chip according to an embodiment of the present invention.
  • 5a to 5f are schematic diagrams of the structure corresponding to each step in FIG. 4.
  • RGB Mini LED As mentioned in the background art, with the upgrading of display panels, a new type of display panel-Mini LED (Mini LED) display panel appears on the market, which is also an active light emitting device and is compared to OLED display panels. , Its faster response speed, wider use temperature range, higher light source utilization, longer life, lower cost, these advantages make the display panel of micro LED is expected to become the mainstream of the future display panel.
  • the RGB Mini LED chip overcomes the welding and reliability defects of the front-mounted chip, and combines the advantages of COB packaging (Chips on Board) to further reduce the pixel pitch of the display screen, and the visual effect of the corresponding terminal product Significant improvement, while the viewing distance can be greatly reduced, so that the indoor display can further replace the original LCD market.
  • COB packaging Chip on Board
  • the use of RGB Mini LED chips with flexible substrates can also achieve high-quality curved display effects. Coupled with its self-luminous characteristics, it has a very broad market for some special modeling requirements (such as automotive displays).
  • the existing Mini LED chip epitaxial structure generally includes an N-type layer, a light-emitting layer, and a P-type layer, and a mesa with a bare N-type layer is etched in the P-type layer and the light-emitting layer; and, the existing Mini LED chip also It includes a P-type extended electrode on the P-type layer, an N-type extended electrode on the N-type layer at the mesa, a reflective layer covering the exposed side of the Mini LED chip on the side of the extended electrode, and a P-type extended electrode on the reflective layer.
  • the P-bonded electrode connected through the via hole and the N-bonded electrode located on the reflective layer and connected with the N-type extended electrode through the via hole.
  • the N-type extended electrode Due to the existence of the N-type extended electrode in the existing Mini LED chip, it is necessary to increase the mesa area of the P-type layer and the exposed N-type layer at the light-emitting layer, which ultimately leads to a reduction in the area of the light-emitting area, resulting in low light-emitting efficiency; In addition, since the N-type extended electrode is formed by evaporation, the side surface is relatively steep, which affects the coverage of the reflective layer, and reduces the reliability of the Mini LED chip. At the same time, the existence of the N-type extended electrode makes the final N The surface of the bonding electrode is uneven, which ultimately affects the bonding effect, and affects the reliability and light-emitting angle of the Mini LED chip.
  • the present invention provides a Mini LED chip and a manufacturing method thereof, which effectively solves the technical problems existing in the prior art, improves the luminous efficiency and reliability of the Mini LED chip, and at the same time ensures that the light-emitting angle of the Mini LED chip reaches the expected Effect.
  • FIG. 1 it is a schematic structural diagram of a Mini LED chip provided by an embodiment of the present invention, where the Mini LED chip includes:
  • the growth substrate 100 and the light-emitting epitaxial layer are sequentially stacked.
  • the light-emitting epitaxial layer includes a first type semiconductor layer 210, a light emitting layer 220, and a second type semiconductor layer 230 that are sequentially stacked, wherein the second type semiconductor layer 230 and The light-emitting layer 220 has an electrode contact hollow that exposes the first type semiconductor layer 210;
  • the transparent conductive layer 300 located on the side of the second type semiconductor layer 230 away from the growth substrate 100, and the transparent conductive layer 300 is hollowed out corresponding to the electrode contact hollows;
  • An extended electrode 400 located on the side of the transparent conductive layer 300 away from the growth substrate 100;
  • the electrode contact hollow is provided with a first through hole exposing the first type semiconductor layer 210, and a second through hole corresponding to the extended electrode 400 is provided with the extended electrode 400;
  • first bonding electrode 610 and the second bonding electrode 620 located on the side of the insulating isolation reflection layer 500 away from the growth substrate 100, wherein the first bonding electrode 610 passes through the first connection
  • the hole is in contact with the first type semiconductor layer 210, and the second bonding electrode 620 is in contact with the expansion electrode 400 through the second through hole.
  • the first type semiconductor layer provided by the present invention may be an N-type semiconductor layer, and the second type semiconductor layer is a P-type semiconductor layer, which is not specifically limited by the present invention.
  • the technical solution provided by the present invention is located between the first type semiconductor layer and the first bonding electrode and is not connected through the corresponding auxiliary extended electrode, that is, the auxiliary extended electrode is not made here at the electrode contact hollow.
  • the problem of the area of the auxiliary extended electrode shielding the light-emitting area is avoided, and the light-emitting efficiency of the Mini LED chip is improved.
  • the technical solution provided by the present invention does not require the production of auxiliary expansion electrodes, the problems of poor flatness of the first bonding electrode and poor coverage of the insulating and isolated reflective layer due to the existence of the auxiliary expansion electrodes are avoided, and the problems of poor coverage of the insulating and isolating reflective layer are avoided.
  • the reliability of the Mini LED chip is improved, and at the same time, the light-emitting angle of the Mini LED chip is guaranteed to achieve the desired effect.
  • FIG. 2 it is a schematic structural diagram of another Mini LED chip provided by an embodiment of the present invention, in which at least one of the first bonding electrode 610 and the second bonding electrode 620 provided by the present invention It has a plurality of holes 630.
  • first bonding electrode and the second bonding electrode are fabricated, a plurality of holes are fabricated. Furthermore, since the first bonding electrode and the second bonding electrode are made into a bonding electrode structure with a plurality of holes, the contact area between the bonding electrode and the solder (such as solder paste) can be increased, and the reflow of the solder paste can be avoided. Die die skew caused by suction occurs.
  • a plurality of holes on the bonding electrode can be optimized to further improve the bonding effect.
  • FIG. 3 is a schematic structural diagram of another Mini LED chip provided by an embodiment of the present invention, in the bonding electrode having the plurality of holes 630, the plurality of holes 630 are divided into a first hole group 631 and the second hole group 632;
  • first hole group 631 and the second hole group 632 are symmetrical with respect to the axis of symmetry X from the first through hole to the second through hole, and the bonding effect is further improved by optimizing the hole layout .
  • the hole provided by the present invention is in the shape of a through hole or a blind hole, that is, the hole may be in the shape of a through hole penetrating the bonding electrode, or the through hole may be isolated from the bonding electrode away from the insulation.
  • the surface of the reflective layer is shaped like a blind hole that does not penetrate the bonding electrode, and the present invention does not specifically limit this.
  • the aperture of the hole has a tendency to increase.
  • the pore size of the hole provided by the present invention can be 1 ⁇ m-10 ⁇ m, including the endpoint value; the pore size can be optimized to 3 ⁇ m-8 ⁇ m, including the endpoint value; and the pore size can be further optimized to 4 ⁇ m-5 ⁇ m, including the endpoint value.
  • the invention is not specifically restricted.
  • the sidewall of the hole of the present invention is a roughened sidewall, which further improves the solidification effect of the hole; wherein, by setting the sidewall of the hole as a roughened sidewall, the solidification effect Improved by at least 30%.
  • the roughness Ra of the sidewall of the roughened surface provided by the embodiment of the present invention is less than or equal to 50 ⁇ m.
  • the insulating isolation reflective layer 500 provided by the embodiment of the present invention also extends to cover the exposed side surface of the light-emitting epitaxial layer, that is, the insulating isolation reflective layer 500 also extends to cover the first type semiconductor layer 210
  • the light emitting layer 220, the second type semiconductor layer 230, and the transparent conductive layer 300 face the exposed surface of the externally connected side surface, thereby ensuring high light output efficiency of the side of the Mini LED chip, and improving the overall light output efficiency of the Mini LED chip.
  • the surface of the growth substrate provided by the present invention facing the light-emitting epitaxial layer is divided into an isolation region surrounding the device region, wherein the device region is grown with a light-emitting epitaxial layer, and the isolation region is an extension of the insulating isolation reflective layer Cut off the interface.
  • the isolation area provided by the embodiment of the present invention may be located in the cutting area defining the single chip, or the isolation area may also be a separately fabricated area, which is not specifically limited by the present invention.
  • the insulating isolation reflective layer provided by the present invention is a DBR (distributed Bragg reflection, distributed Bragg reflector) insulating isolation reflective layer.
  • the DBR insulating isolation reflective layer provided by the present invention is a DBR reflective film layer structure formed by any combination of SiO2, SiN, TiO2, Ta2O5, and MgF.
  • the electrode contact hollow provided by the embodiment of the present invention is an electrode contact hole, and the electrode contact hole is located within the coverage area of the second type semiconductor layer 230 and the light emitting layer 220.
  • the electrode contact hollow provided by the present invention is an electrode contact hole with a hole structure etched at the second type semiconductor layer and the light-emitting layer, so that it is more closely combined with the inner wall of the electrode contact hole when the insulating and isolating reflective layer is made. , Improve the bonding strength of the insulating isolation reflective layer and the light-emitting epitaxial layer.
  • the sidewalls of the first through hole and/or the second through hole provided by the present invention are roughened sidewalls, which can further improve the bonding electrode and the insulating isolation reflective layer.
  • the bonding strength improves the performance of the Mini LED chip; wherein, by setting the sidewalls of the first through hole and/or the second through hole as the roughened sidewall, the bonding strength between the bonding electrode and the insulating isolation reflective layer is increased by at least 30%.
  • the diameter of the first through hole and/or the second through hole shows an increasing trend, thereby enabling the expansion of bonding
  • the contact area between the electrode and the insulating isolation reflective layer further improves the bonding strength of the bonding electrode and the insulating isolation reflective layer.
  • the present invention also provides a method for manufacturing a Mini LED chip.
  • FIG. 4 it is a flowchart of a method for manufacturing a Mini LED chip according to an embodiment of the present invention, wherein the method for manufacturing a Mini LED chip include:
  • the light-emitting epitaxial layer comprising a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence, wherein the second type semiconductor layer and the The light-emitting layer has an electrode contact hollow that exposes the first type semiconductor layer;
  • a growth substrate 100 is provided.
  • the material of the growth substrate provided by the present invention may be Al2O3, SiC, Si, GaN, GaAs, GaP, etc., which is not specifically limited by the present invention.
  • a light-emitting epitaxial layer is grown on the growth substrate 100, and the light-emitting epitaxial layer includes a first type semiconductor layer 210, a light emitting layer 220, and a second type semiconductor layer 230 that are sequentially stacked.
  • the second type semiconductor layer 230 and the light emitting layer 220 have electrode contact hollows that expose the first type semiconductor layer.
  • the electrode contact hollow provided by the present invention can be formed by a photolithography process; that is, a patterned photoresist is formed on the surface of the second type semiconductor layer facing away from the growth substrate, and then the photoresist is exposed. Etching until the first type semiconductor layer is exposed, and finally the photoresist is removed.
  • the electrode contact hollow and before forming the transparent conductive layer it is also possible to etch from the second type semiconductor layer and along the cutting line to define a single chip, wherein, specifically, from the second type semiconductor layer The etching is performed until the exposed growth substrate completes the etching of the cut area (as shown in FIG. 5b), which can also be formed by etching with a photolithography process.
  • a transparent conductive layer 300 is formed on the side of the second type semiconductor layer 230 away from the growth substrate 100, and the transparent conductive layer 300 corresponds to the electrode contact hollow. Hollow out.
  • the material of the transparent conductive layer provided by the present invention can be transparent conductive materials such as ITO, ZnO, GaO, etc., and its thickness can range from 200 angstroms to 2000 angstroms, including endpoints; preferably, it can be 300 angstroms- 1000 angstroms, including the end point value; further, 450 angstroms-700 angstrom, including the end point value.
  • the corresponding hollows of the corresponding electrode contact hollows of the transparent conductive layer provided by the present invention can be made by etching with a photolithography process.
  • an extended electrode 400 is formed on the side of the transparent conductive layer 300 away from the growth substrate 100.
  • the material of the extended electrode provided by the present invention includes metal material or alloy material, so that it has good electrical conductivity characteristics; specifically, the material of the extended electrode can be Au, Al, Cu, Pt, Ti One or more combinations of, Cr, and the present invention does not specifically limit this.
  • an insulating and isolating reflective layer 500 covering the exposed surface of the transparent conductive layer 300 and the extended electrode 400 away from the growth substrate 100 and the electrode contact hollow is formed, wherein
  • the insulating isolation reflective layer 500 has a first through hole that exposes the first type semiconductor layer 210 corresponding to the electrode contact hollow, and has a second through hole that exposes the extended electrode 400 corresponding to the extended electrode 400. hole.
  • the insulating isolation reflective layer 500 provided by the embodiment of the present invention also extends to cover the exposed side surface of the light emitting epitaxial layer, that is, the insulating isolation reflective layer 500 also extends to cover the first type semiconductor layer 210, the light emitting layer 220, and the The second-type semiconductor layer 230 and the transparent conductive layer 300 face the exposed surface of the externally connected side surface, thereby ensuring high light output efficiency from the side surface of the Mini LED chip, and improving the overall light output efficiency of the Mini LED chip.
  • the surface of the growth substrate provided by the present invention facing the light-emitting epitaxial layer is divided into an isolation region surrounding the device region, wherein the device region is grown with a light-emitting epitaxial layer, and the isolation region is an extension of the insulating isolation reflective layer Cut off the interface.
  • the isolation area provided by the embodiment of the present invention may be located in a cutting area defining a single chip.
  • the insulating isolation reflective layer provided by the present invention is a DBR insulating isolation reflective layer; that is, it is formed to cover the transparent conductive layer and the extended electrode on the side of the exposed surface away from the growth substrate and all
  • the insulating isolation reflective layer where the electrode contacts the hollow includes:
  • a DBR insulating isolation reflective layer covering the transparent conductive layer and the exposed surface of the extended electrode away from the growth substrate and the electrode contact hollow is formed.
  • the DBR insulating isolation reflective layer provided by the present invention is a DBR reflective film layer structure formed by any combination of SiO2, SiN, TiO2, Ta2O5, and MgF.
  • the insulating isolation reflective layer provided by the embodiment of the present invention is a DBR insulating isolation reflective layer
  • it can be etched in two steps to form a first through hole and a second through hole.
  • the first step is etching
  • the DBR insulates and isolates the reflective layer
  • the interface layer formed in the upper etching step is etched in the second step to obtain the first through hole and the second through hole.
  • the first etching uses a mixed gas of CHF3/Ar/O2 or CF4/Ar/O2
  • the second etching uses a mixed gas of BCl3/Cl2/Ar.
  • the method for forming the first through hole and the second through hole includes: using a first etching gas to etch the insulating isolation reflective layer corresponding to the first through hole and the second through hole. Etching until the first type semiconductor layer is exposed at the first through hole and the extended electrode is exposed at the second through hole, wherein the insulating isolation reflective layer corresponds to the first through hole and An interface layer is formed on the sidewall of the second through hole; the interface layer is etched and removed by using a second etching gas; wherein, the insulating isolation reflective layer may be a DBR insulating isolation reflective layer.
  • the first etching gas provided by the present invention includes CHF3, Ar, and O2, or the first etching gas includes CF4, Ar, and O2; the second etching gas includes BCl3, Cl2, and Ar .
  • the embodiment of the present invention improves the ohmic contact, reduces the voltage, and improves the light efficiency by making the interface layer and subsequently effectively removing the interface layer. Among them, the interface layer is made and the interface layer is removed afterwards. Process, improving the ohmic contact reduces the voltage by at least 13.9% and increases the light efficiency by at least 5%.
  • a first bonding electrode 610 and a second bonding electrode 620 are formed on the side of the insulating isolation reflection layer 500 away from the growth substrate 100, wherein the first bonding The electrode 610 is in contact with the first type semiconductor layer 210 through the first through hole, and the second bonding electrode 620 is in contact with the expansion electrode 400 through the second through hole.
  • the material of at least one of the first bonding electrode and the second bonding electrode provided by the present invention includes a metal material or an alloy material, so that it has good electrical conductivity characteristics, which may specifically be Au
  • a metal material or an alloy material so that it has good electrical conductivity characteristics, which may specifically be Au
  • One or more combinations of, Al, Cu, Pt, Ti, and Cr are not specifically limited in the present invention.
  • the method further includes:
  • a plurality of holes are formed on at least one of the first bonding electrode and the second bonding electrode.
  • the plurality of holes are divided into a first hole group and a second hole group, and a connection between the first through hole and the second through hole is formed.
  • the connection line of is the first hole group and the second hole group that are symmetrical on the axis of symmetry.
  • the technical solution provided by the present invention has at least the following advantages:
  • the present invention provides a Mini LED chip and a manufacturing method thereof, including: a growth substrate and a light-emitting epitaxial layer stacked in sequence, the light-emitting epitaxial layer including a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence , Wherein the second type semiconductor layer and the light-emitting layer have electrode contact hollows that expose the first type semiconductor layer; a transparent conductive layer located on the side of the second type semiconductor layer away from the growth substrate, And the transparent conductive layer corresponding to the electrode contact hollow is correspondingly hollow; the extended electrode located on the side of the transparent conductive layer away from the growth substrate; covering the transparent conductive layer and the extended electrode away from the growth The exposed surface on one side of the substrate and the insulating isolation reflective layer where the electrode contacts the hollow, wherein the insulating isolation reflection layer corresponds to the electrode contact hollow with a first through hole exposing the first type semiconductor layer, and Corresponding to the expansion electrode, there is a second through hole that exposes the expansion
  • the technical solution provided by the present invention is located between the first type semiconductor layer and the first bonding electrode and is not connected by the corresponding auxiliary extended electrode, that is, the auxiliary extended electrode is not made here at the electrode contact hollow.
  • the problem of the area of the auxiliary extended electrode blocking the light-emitting area is avoided, and the luminous efficiency of the Mini LED chip is improved.
  • the technical solution provided by the present invention does not require the production of auxiliary expansion electrodes, the problems of poor flatness of the first bonding electrode and poor coverage of the insulating and isolated reflective layer due to the existence of the auxiliary expansion electrodes are avoided, and the problems of poor coverage of the insulating and isolating reflective layer are avoided.
  • the reliability of the Mini LED chip is improved, and at the same time, the light-emitting angle of the Mini LED chip is guaranteed to achieve the desired effect.

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Abstract

一种Mini LED芯片及其制作方法,位于第一类型半导体层(210)与第一键合电极(610)之间并没有通过相应辅助扩展电极相连接,即在电极接触镂空处并没有制作辅助扩展电极于此处裸露的第一类型半导体层(210)表面上,进而避免了由于辅助扩展电极存在引起的扩大电极接触镂空占用面积问题,保证了发光区的面积大,提高了Mini LED芯片的发光效率。进一步的,由于无需制作辅助扩展电极,进而避免了由于辅助扩展电极的存在而引入制备的第一键合电极(610)的平整度差及绝缘隔离反射层(500)覆盖效果差的问题,进而提高了Mini LED芯片的可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。

Description

一种Mini LED芯片及其制作方法
本申请要求于2019年12月26日提交中国专利局、申请号为201911366387.1、发明名称为“一种Mini LED芯片及其制作方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
以及,本申请同时要求于2019年12月26日提交中国专利局、申请号为201922386858.7、发明名称为“一种Mini LED芯片”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及半导体器件技术领域,更为具体地说,涉及一种Mini LED(Mini Light Emitting Diode,微发光二极管)芯片及其制作方法。
背景技术
液晶显示面板(Liquid Crystal Display,LCD)具有重量轻、厚度薄、易于驱动、不含有害射线等优点,广泛应用于电视、笔记本电脑、移动电话等现代信息设备。但是,由于LCD自身不发光,因此,需要通过耦合外部光源来实现显示,导致LCD相应显示装置较厚。为了适应显示面板轻薄化的发展趋势,在LCD之后出现了有机电致发光二极管(Organic Light-Emitting Diode,OLED)显示面板,其具备自发光、不需背光源、对比度高、厚度薄、响应速度快、可用于挠曲性面板等优异的特性。
随着显示面板的更新换代,现在市场上出现了一种新型的显示面板-微发光二极管(Mini LED)显示面板,其也属于主动发光器件,且相较于OLED显示面板,其响应速度更快、使用温度范围更宽、光源利用率更高、寿命更长、成本更低、这些优势使得微LED的显示面板有望成为未来显示面板的主流。并且,RGB Mini LED芯片克服了正装芯片的焊接及可靠性的缺陷,同时结合COB封装(Chips on Board,板上芯片封装)的优势,使显示屏点间距进一步缩小,对应的终端产品的视觉效果大幅提升,同时视距能够大幅减小,使得户内显示屏能够进一步取代原有的LCD市场。另一方面,RGB Mini LED芯片搭配柔性基板的使用,也能够实现曲面的高画质显示效果,加上其自发光的特性,在一些特殊造型需求(如汽车显示)方面有极为广阔的市场。
发明内容
有鉴于此,本发明提供了一种Mini LED芯片及其制作方法,有效解决现有技术存在的技术问题,提高了Mini LED芯片的发光效率和可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。
为实现上述目的,本发明提供的技术方案如下:
一种Mini LED芯片,包括:
依次叠加的生长衬底和发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;
位于所述第二类型半导体层背离所述生长衬底一侧的透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;
位于所述透明导电层背离所述生长衬底一侧的扩展电极;
覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;
以及,位于所述绝缘隔离反射层背离所述生长衬底一侧的第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
可选的,所述第一键合电极和所述第二键合电极中至少之一者具有多个孔洞。
可选的,具有所述多个孔洞的键合电极中,所述多个孔洞划分为第一孔洞组和第二孔洞组;
其中,所述第一孔洞组和所述第二孔洞组关于所述第一通孔至所述第二通孔的连线为对称轴对称。
可选的,所述孔洞为通孔状或盲孔状。
可选的,自所述生长衬底至所述发光外延层的方向,所述孔洞的孔径呈增大趋势。
可选的,所述孔洞的孔径范围为1μm-10μm,包括端点值。
可选的,所述孔洞的侧壁为粗化面侧壁。
可选的,所述粗化面侧壁的粗糙度Ra为小于等于50μm。
可选的,所述绝缘隔离反射层还延伸覆盖至所述发光外延层的侧面裸露面处。
可选的,所述绝缘隔离反射层为DBR绝缘隔离反射层。
可选的,所述DBR绝缘隔离反射层为SiO2、SiN、TiO2、Ta2O5、MgF中任意组合形成的DBR反射膜系层结构。
可选的,所述电极接触镂空为电极接触孔,所述电极接触孔位于所述第二类型半导体层和所述发光层的覆盖区域范围内。
可选的,所述第一通孔和/或所述第二通孔的侧壁为粗化面侧壁。
可选的,自所述生长衬底至所述发光外延层的方向,所述第一通孔和/或所述第二通孔的孔径呈增大趋势。
可选的,所述扩展电极的材质包括金属材质或合金材质;所述第一键合电极和第二键合电极至少之一者的材质包括金属材质或合金材质。
相应的,本发明还提供了一种Mini LED芯片的制作方法,包括:
提供生长衬底;
在所述生长衬底上生长发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;
在所述第二类型半导体层背离所述生长衬底一侧形成透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;
在所述透明导电层背离所述生长衬底一侧形成扩展电极;
形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;
在所述绝缘隔离反射层背离所述生长衬底一侧形成第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
可选的,形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧 裸露表面及所述电极接触镂空处的绝缘隔离反射层,包括:
形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的DBR绝缘隔离反射层。
可选的,所述第一通孔和所述第二通孔的形成方法包括:
采用第一刻蚀气体对所述DBR绝缘隔离反射层对应所述第一通孔和所述第二通孔处进行刻蚀,直至在所述第一通孔处裸露所述第一类型半导体层及在所述第二通孔处裸露所述扩展电极,其中,所述DBR绝缘隔离反射层对应所述第一通孔和所述第二通孔的侧壁处形成有界面层;
采用第二刻蚀气体对所述界面层进行刻蚀去除。
可选的,所述第一刻蚀气体包括CHF3、Ar和O2,或者所述第一刻蚀气体包括CF4、Ar和O2;
所述第二刻蚀气体包括BCl3、Cl2和Ar。
可选的,形成所述第一键合电极和所述第二键合电极后,还包括:
在所述第一键合电极和所述第二键合电极中至少之一者上形成多个孔洞。
可选的,具有所述多个孔洞的键合电极中,将所述多个孔洞划分为第一孔洞组和第二孔洞组,且形成关于所述第一通孔至所述第二通孔的连线为对称轴对称的所述第一孔洞组和所述第二孔洞组。
相较于现有技术,本发明提供的技术方案至少具有以下优点:
本发明提供了一种Mini LED芯片及其制作方法,包括:依次叠加的生长衬底和发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;位于所述第二类型半导体层背离所述生长衬底一侧的透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;位于所述透明导电层背离所述生长衬底一侧的扩展电极;覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;以及,位于所述绝缘隔离反射层背离所述生长衬底一侧的第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一 通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
由上述内容可知,本发明提供的技术方案,位于第一类型半导体层与第一键合电极之间并没有通过相应辅助扩展电极相连接,即在电极接触镂空处并没有制作辅助扩展电极于此处裸露的第一类型半导体层表面上,进而避免了由于辅助扩展电极存在引起的扩大电极接触镂空占用面积问题,保证了发光区的面积大,提高了Mini LED芯片的发光效率。进一步的,由于本发明提供的技术方案无需制作辅助扩展电极,进而避免了由于辅助扩展电极的存在而引入制备的第一键合电极的平整度差及绝缘隔离反射层覆盖效果差的问题,进而提高了Mini LED芯片的可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。
附图说明
图1为本发明实施例提供的一种Mini LED芯片的结构示意图;
图2为本发明实施例提供的另一种Mini LED芯片的结构示意图;
图3为本发明实施例提供的又一种Mini LED芯片的结构示意图;
图4为本发明实施例提供的一种Mini LED芯片的制作方法的流程图;
图5a-图5f为图4中各步骤相应的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
正如背景技术所述,随着显示面板的更新换代,现在市场上出现了一种新型的显示面板-微发光二极管(Mini LED)显示面板,其也属于主动发光器件,且相较于OLED显示面板,其响应速度更快、使用温度范围更宽、光源利用率更高、寿命更长、成本更低、这些优势使得微LED的显示面板有望成为未来显示面板的主流。并且,RGB Mini LED芯片克服了正装芯片的焊接及可靠性的缺陷,同时结合COB封装(Chips on Board,板上芯片封装)的优势,使显示屏点间距进一步缩小,对应的终端产品的视觉效果大幅提升,同时视距能够大 幅减小,使得户内显示屏能够进一步取代原有的LCD市场。另一方面,RGB Mini LED芯片搭配柔性基板的使用,也能够实现曲面的高画质显示效果,加上其自发光的特性,在一些特殊造型需求(如汽车显示)方面有极为广阔的市场。
现有的Mini LED芯片外延结构一般包括有N型层、发光层和P型层,且在P型层和发光层中刻蚀有裸露N型层的台面;以及,现有的Mini LED芯片还包括有位于P型层上的P型扩展电极、位于台面处N型层上的N型扩展电极、覆盖Mini LED芯片具有扩展电极一侧裸露面的反射层、位于反射层上与P型扩展电极通过过孔连通的P键合电极及位于反射层上与N型扩展电极通过过孔连通的N键合电极。现有的Mini LED芯片中由于N型扩展电极的存在,因此需要将P型层和发光层处裸露N型层的台面面积增大,最终导致发光区的面积减小而导致发光小效率低;以及,由于N型扩展电极采用蒸镀方式制作形成,使得其侧面较为陡峭而影响反射层的覆盖效果,而降低了Mini LED芯片的可靠性;同时,由于N型扩展电极存在使得最终制作的N键合电极表面凹凸不平,最终影响其键合效果,而影响了Mini LED芯片的可靠性和发光角度。
基于此,本发明提供了一种Mini LED芯片及其制作方法,有效解决现有技术存在的技术问题,提高了Mini LED芯片的发光效率和可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。
为实现上述目的,本发明提供的技术方案如下,具体结合图1至图5f对本发明实施例提供的技术方案进行详细的描述。
参考图1所示,为本发明实施例提供的一种Mini LED芯片的结构示意图,其中,Mini LED芯片包括:
依次叠加的生长衬底100和发光外延层,所述发光外延层包括依次叠加的第一类型半导体层210、发光层220和第二类型半导体层230,其中,所述第二类型半导体层230和所述发光层220具有裸露所述第一类型半导体层210的电极接触镂空;
位于所述第二类型半导体层230背离所述生长衬底100一侧的透明导电层300,且所述透明导电层300对应所述电极接触镂空处相应为镂空;
位于所述透明导电层300背离所述生长衬底100一侧的扩展电极400;
覆盖所述透明导电层300和所述扩展电极400背离所述生长衬底100一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层500,其中,所述绝缘隔离反射层500对应所述电极接触镂空处具有裸露所述第一类型半导体层210的第一通孔,且对应所述扩展电极400处具有裸露所述扩展电极400的第二通孔;
以及,位于所述绝缘隔离反射层500背离所述生长衬底100一侧的第一键合电极610和第二键合电极620,其中,所述第一键合电极610通过所述第一通孔与所述第一类型半导体层210接触,及所述第二键合电极620通过所述第二通孔与所述扩展电极400接触。
在本发明一实施例中,本发明提供的第一类型半导体层可以为N型半导体层,且第二类型半导体层为P型半导体层,对此本发明不做具体限制。
可以理解的,本发明提供的技术方案,位于第一类型半导体层与第一键合电极之间并没有通过相应辅助扩展电极相连接,即在电极接触镂空处并没有制作辅助扩展电极于此处裸露的第一类型半导体层表面上,进而避免了辅助扩展电极遮挡发光区的面积问题,提高了Mini LED芯片的发光效率。进一步的,由于本发明提供的技术方案无需制作辅助扩展电极,进而避免了由于辅助扩展电极的存在而引入制备的第一键合电极的平整度差及绝缘隔离反射层覆盖效果差的问题,进而提高了Mini LED芯片的可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。
由于Mini LED芯片最终需要固晶至线路基板上,为了提高固晶效果而避免固晶歪斜情况发生,本发明提供的第一键合电极和第二键合电极至少之一者设置多个孔洞。参考图2所示,为本发明实施例提供的另一种Mini LED芯片的结构示意图,其中,本发明提供的所述第一键合电极610和所述第二键合电极620中至少之一者具有多个孔洞630。
可以理解的,本发明提供的技术方案优选制作第一键合电极和第二键合电极时,均进行多个孔洞的制作处理。进而,由于第一键合电极和第二键合电极制作为具有多个孔洞的键合电极结构,进而能够增加键合电极与焊料(如锡膏)之间的接触面积,避免由于锡膏回吸而导致的固晶歪斜的情况发生。
进一步的,本发明实施例还可以对键合电极上的多个孔洞进行优化处理,进一步提高固晶效果。参考图3所示,为本发明实施例提供的又一种Mini LED芯片的结构示意图,其中,具有所述多个孔洞630的键合电极中,所述多个孔洞630划分为第一孔洞组631和第二孔洞组632;
其中,所述第一孔洞组631和所述第二孔洞组632关于所述第一通孔至所述第二通孔的连线为对称轴X对称,通过优化孔洞布局而进一步提高固晶效果。
在本发明任意一实施例中,本发明提供的所述孔洞为通孔状或盲孔状,即孔洞可以为贯穿键合电极的通孔状,或者通孔可以为自键合电极背离绝缘隔离反射层的表面起未贯穿键合电极的盲孔状,对此本发明不做具体限制。为了进一步增加键合电极与焊料(如锡膏)之间的接触面积,本发明提供的自所述生长衬底至所述发光外延层的方向,所述孔洞的孔径呈增大趋势。本发明提供的孔洞的孔径大小可以为1μm-10μm,包括端点值;其孔径大小可优化为3μm-8μm,包括端点值;且孔径大小进一步可优化为4μm-5μm,包括端点值,对此本发明不做具体限制。
在本发明一实施例中,本发明所述孔洞的侧壁为粗化面侧壁,进一步提高孔洞的固晶效果;其中,通过将孔洞的侧壁设置为粗化面侧壁,固晶效果提高了至少30%。可选的,本发明实施例提供的所述粗化面侧壁的粗糙度Ra为小于等于50μm。
结合图1所示,本发明实施例提供的所述绝缘隔离反射层500还延伸覆盖至所述发光外延层的侧面裸露面处,即绝缘隔离反射层500还延伸覆至第一类型半导体层210、发光层220、第二类型半导体层230及透明导电层300朝向外接的侧面的裸露面,进而保证Mini LED芯片的侧面出光效率高,提高Mini LED芯片的整体出光效率。
可以理解的,本发明提供的生长衬底朝向发光外延层一侧表面划分有器件区环绕器件区的隔离区,其中,器件区生长有发光外延层,且隔离区则为绝缘隔离反射层的延伸截止界面。本发明实施例提供的隔离区可以位于定义单粒芯片的切割区域内,或者,隔离区还可以为单独制作区域,对此本发明不做具体限制。
在本发明一实施例中,本发明提供的所述绝缘隔离反射层为DBR(distributed Bragg reflection,分布式布拉格反射镜)绝缘隔离反射层。可选的,本发明提供的所述DBR绝缘隔离反射层为SiO2、SiN、TiO2、Ta2O5、MgF中任意组合形成的DBR反射膜系层结构。
参考图1所示,本发明实施例提供的所述电极接触镂空为电极接触孔,所述电极接触孔位于所述第二类型半导体层230和所述发光层220的覆盖区域范围内。
可以理解的,本发明提供的电极接触镂空为在第二类型半导体层和发光层处刻蚀的孔洞结构的电极接触孔,进而在制作绝缘隔离反射层时使其与电极接触孔内壁结合更紧密,提高绝缘隔离反射层与发光外延层的结合强度。
在本发明一实施例中,本发明所提供的所述第一通孔和/或所述第二通孔的侧壁为粗化面侧壁,进而能够提高键合电极与绝缘隔离反射层的结合强度,提高Mini LED芯片的性能;其中,通过将第一通孔和/或第二通孔的侧壁设置为粗化面侧壁,键合电极与绝缘隔离反射层的结合强度提高了至少30%。以及,本发明实施例提供的自所述生长衬底至所述发光外延层的方向,所述第一通孔和/或所述第二通孔的孔径呈增大趋势,进而能够扩大键合电极与绝缘隔离反射层的接触面积,进一步提高键合电极与绝缘隔离反射层的结合强度。
相应的,本发明还提供了一种Mini LED芯片的制作方法,如图4所示,为本发明实施例提供的一种Mini LED芯片的制作方法的流程图,其中,Mini LED芯片的制作方法包括:
S1、提供生长衬底;
S2、在所述生长衬底上生长发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;
S3、在所述第二类型半导体层背离所述生长衬底一侧形成透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;
S4、在所述透明导电层背离所述生长衬底一侧形成扩展电极;
S5、形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;
S6、在所述绝缘隔离反射层背离所述生长衬底一侧形成第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
下面结合各步骤相应的结构对本发明实施例提供的制作方法进行详细的描述,具体结合图5a至图5f所示,分别为图4中各步骤相应的结构示意图。
如图5a所示,对应步骤S1,提供生长衬底100。
在本发明一实施例中,本发明提供的生长衬底的材质可以为Al2O3、SiC、Si、GaN、GaAs、GaP等,对此本发明不做具体限制。
如图5b所示,对应步骤S2,在所述生长衬底100上生长发光外延层,所述发光外延层包括依次叠加的第一类型半导体层210、发光层220和第二类型半导体层230,其中,所述第二类型半导体层230和所述发光层220具有裸露所述第一类型半导体层的电极接触镂空。
在本发明一实施例中,本发明提供的电极接触镂空可以采用光刻工艺形成;即在第二类型半导体层背离生长衬底一侧表面形成图案化的光刻胶,而后对光刻胶裸露处进行刻蚀直至裸露第一类型半导体层,最终将光刻胶去除。
进一步的,在形成电极接触镂空后且形成透明导电层前,还可以自第二类型半导体层、且沿切割线路进行刻蚀而定义出单粒芯片,其中,具体为自第二类型半导体层进行刻蚀直至裸露生长衬底完成切割区域(如图5b所示)的刻蚀,其同样可以采用光刻工艺刻蚀形成。
如图5c所示,对应步骤S3,在所述第二类型半导体层230背离所述生长衬底100一侧形成透明导电层300,且所述透明导电层300对应所述电极接触镂空处相应为镂空。
在本发明一实施例中,本发明提供的透明导电层的材质可以为ITO、ZnO、GaO等透明导电材料,其厚度范围可以为200埃-2000埃,包括端点值;优选可以为300埃-1000埃,包括端点值;进一步可以为450埃-700埃,包括端点值。
同样的,本发明提供的透明导电层对应电极接触镂空处相应的镂空可以采用光刻工艺刻蚀制作而成。
如图5d所示,对应步骤S4,在所述透明导电层300背离所述生长衬底100一侧形成扩展电极400。
在本发明一实施例中,本发明提供的扩展电极的材质包括金属材质或合金材质,使得其具有良好的电传导特性;具体的,扩展电极的材质可以为Au、Al、Cu、Pt、Ti、Cr中一种或多种组合,对此本发明不作具体限制。
如图5e所示,对应步骤S5,形成覆盖所述透明导电层300和所述扩展电极400背离所述生长衬底100一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层500,其中,所述绝缘隔离反射层500对应所述电极接触镂空处具有裸露所述第一类型半导体层210的第一通孔,且对应所述扩展电极400处具有裸露所述扩展电极400的第二通孔。
本发明实施例提供的所述绝缘隔离反射层500还延伸覆盖至所述发光外延层的侧面裸露面处,即绝缘隔离反射层500还延伸覆至第一类型半导体层210、发光层220、第二类型半导体层230及透明导电层300朝向外接的侧面的裸露面,进而保证Mini LED芯片的侧面出光效率高,提高Mini LED芯片的整体出光效率。
可以理解的,本发明提供的生长衬底朝向发光外延层一侧表面划分有器件区环绕器件区的隔离区,其中,器件区生长有发光外延层,且隔离区则为绝缘隔离反射层的延伸截止界面。本发明实施例提供的隔离区可以位于定义单粒芯片的切割区域内。
在本发明一实施例中,本发明提供的所述绝缘隔离反射层为DBR绝缘隔离反射层;即形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,包括:
形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的DBR绝缘隔离反射层。可选的,本发明提供的所述DBR绝缘隔离反射层为SiO2、SiN、TiO2、Ta2O5、MgF中任意组合形成的DBR反射膜系层结构。
可选的,本发明实施例提供的绝缘隔离反射层为DBR绝缘隔离反射层时,可以分两步对其进行刻蚀形成第一通孔和第二通孔,具体的,第一步刻蚀DBR绝缘隔离反射层,而后第二步刻蚀上刻蚀步骤中形成的界面层得到第一通孔和第二通孔。其中,第一步刻蚀采用CHF3/Ar/O2或CF4/Ar/O2的混合气体,第二步刻蚀采用BCl3/Cl2/Ar的混合气体。即,所述第一通孔和所述第二通孔的形成方法包括:采用第一刻蚀气体对所述绝缘隔离反射层对应所述第一通孔和所述第二通孔处进行刻蚀,直至在所述第一通孔处裸露所述第一类型半导体层及在所述第二通孔处裸露所述扩展电极,其中,所述绝缘隔离反射层对应所述第一通孔和所述第二通孔的侧壁处形成有界面层;采用第二刻蚀气体对所述界面层进行刻蚀去除;其中,绝缘隔离反射层可以为DBR绝缘隔离反射层。可选的,本发明提供的所述第一刻蚀气体包括CHF3、Ar和O2,或者所述第一刻蚀气体包括CF4、Ar和O2;所述第二刻蚀气体包括BCl3、Cl2和Ar。本发明实施例通过制作界面层,且后续并对界面层的有效去除,很好的改善了欧姆接触,降低了电压,提高了光效;其中,通过制作界面层且后组对界面层的去除工艺,改善欧姆接触使得电压降低至少13.9%,且光效至少提高至少5%。
如图5e所示,对应步骤S6,在所述绝缘隔离反射层500背离所述生长衬底100一侧形成第一键合电极610和第二键合电极620,其中,所述第一键合电极610通过所述第一通孔与所述第一类型半导体层210接触,及所述第二键合电极620通过所述第二通孔与所述扩展电极400接触。
在本发明一实施例中,本发明提供的第一键合电极和第二键合电极至少之一者的材质包括金属材质或合金材质,使得其具有良好的电传导特性,其具体可以为Au、Al、Cu、Pt、Ti、Cr中的一种或多种组合,对此本发明不做具体限制。
可选的,形成所述第一键合电极和所述第二键合电极后,还包括:
在所述第一键合电极和所述第二键合电极中至少之一者上形成多个孔洞。
可选的,具有所述多个孔洞的键合电极中,将所述多个孔洞划分为第一孔洞组和第二孔洞组,且形成关于所述第一通孔至所述第二通孔的连线为对称轴对称的所述第一孔洞组和所述第二孔洞组。
相较于现有技术,本发明提供的技术方案至少具有以下优点:
本发明提供了一种Mini LED芯片及其制作方法,包括:依次叠加的生长衬底和发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;位于所述第二类型半导体层背离所述生长衬底一侧的透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;位于所述透明导电层背离所述生长衬底一侧的扩展电极;覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;以及,位于所述绝缘隔离反射层背离所述生长衬底一侧的第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
由上述内容可知,本发明提供的技术方案,位于第一类型半导体层与第一键合电极之间并没有通过相应辅助扩展电极相连接,即在电极接触镂空处并没有制作辅助扩展电极于此处裸露的第一类型半导体层表面上,进而避免了辅助扩展电极遮挡发光区的面积问题,提高了Mini LED芯片的发光效率。进一步的,由于本发明提供的技术方案无需制作辅助扩展电极,进而避免了由于辅助扩展电极的存在而引入制备的第一键合电极的平整度差及绝缘隔离反射层覆盖效果差的问题,进而提高了Mini LED芯片的可靠性,且同时保证Mini LED芯片的发光角度达到预期的效果。
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见 的,本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下,在其它实施例中实现。因此,本发明将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (20)

  1. 一种Mini LED芯片,其特征在于,包括:
    依次叠加的生长衬底和发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;
    位于所述第二类型半导体层背离所述生长衬底一侧的透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;
    位于所述透明导电层背离所述生长衬底一侧的扩展电极;
    覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;
    以及,位于所述绝缘隔离反射层背离所述生长衬底一侧的第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
  2. 根据权利要求1所述的Mini LED芯片,其特征在于,所述第一键合电极和所述第二键合电极中至少之一者具有多个孔洞。
  3. 根据权利要求2所述的Mini LED芯片,其特征在于,具有所述多个孔洞的键合电极中,所述多个孔洞划分为第一孔洞组和第二孔洞组;
    其中,所述第一孔洞组和所述第二孔洞组关于所述第一通孔至所述第二通孔的连线为对称轴对称。
  4. 根据权利要求2所述的Mini LED芯片,其特征在于,所述孔洞为通孔状或盲孔状。
  5. 根据权利要求2所述的Mini LED芯片,其特征在于,自所述生长衬底至所述发光外延层的方向,所述孔洞的孔径呈增大趋势。
  6. 根据权利要求2所述的Mini LED芯片,其特征在于,所述孔洞的孔径范围为1μm-10μm,包括端点值。
  7. 根据权利要求2所述的Mini LED芯片,其特征在于,所述孔洞的侧壁为 粗化面侧壁。
  8. 根据权利要求7所述的Mini LED芯片,其特征在于,所述粗化面侧壁的粗糙度Ra为小于等于50μm。
  9. 根据权利要求1所述的Mini LED芯片,其特征在于,所述绝缘隔离反射层还延伸覆盖至所述发光外延层的侧面裸露面处。
  10. 根据权利要求1所述的Mini LED芯片,其特征在于,所述绝缘隔离反射层为DBR绝缘隔离反射层。
  11. 根据权利要求8所述的Mini LED芯片,其特征在于,所述DBR绝缘隔离反射层为SiO2、SiN、TiO2、Ta2O5、MgF中任意组合形成的DBR反射膜系层结构。
  12. 根据权利要求1所述的Mini LED芯片,其特征在于,所述电极接触镂空为电极接触孔,所述电极接触孔位于所述第二类型半导体层和所述发光层的覆盖区域范围内。
  13. 根据权利要求1所述的Mini LED芯片,其特征在于,所述第一通孔和/或所述第二通孔的侧壁为粗化面侧壁。
  14. 根据权利要求1所述的Mini LED芯片,其特征在于,自所述生长衬底至所述发光外延层的方向,所述第一通孔和/或所述第二通孔的孔径呈增大趋势。
  15. 根据权利要求1所述的Mini LED芯片,其特征在于,所述扩展电极的材质包括金属材质或合金材质;所述第一键合电极和第二键合电极至少之一者的材质包括金属材质或合金材质。
  16. 一种Mini LED芯片的制作方法,其特征在于,包括:
    提供生长衬底;
    在所述生长衬底上生长发光外延层,所述发光外延层包括依次叠加的第一类型半导体层、发光层和第二类型半导体层,其中,所述第二类型半导体层和所述发光层具有裸露所述第一类型半导体层的电极接触镂空;
    在所述第二类型半导体层背离所述生长衬底一侧形成透明导电层,且所述透明导电层对应所述电极接触镂空处相应为镂空;
    在所述透明导电层背离所述生长衬底一侧形成扩展电极;
    形成覆盖所述透明导电层和所述扩展电极背离所述生长衬底一侧裸露表 面及所述电极接触镂空处的绝缘隔离反射层,其中,所述绝缘隔离反射层对应所述电极接触镂空处具有裸露所述第一类型半导体层的第一通孔,且对应所述扩展电极处具有裸露所述扩展电极的第二通孔;
    在所述绝缘隔离反射层背离所述生长衬底一侧形成第一键合电极和第二键合电极,其中,所述第一键合电极通过所述第一通孔与所述第一类型半导体层接触,及所述第二键合电极通过所述第二通孔与所述扩展电极接触。
  17. 根据权利要求16所述的Mini LED芯片的制作方法,其特征在于,所述第一通孔和所述第二通孔的形成方法包括:
    采用第一刻蚀气体对所述绝缘隔离反射层对应所述第一通孔和所述第二通孔处进行刻蚀,直至在所述第一通孔处裸露所述第一类型半导体层及在所述第二通孔处裸露所述扩展电极,其中,所述绝缘隔离反射层对应所述第一通孔和所述第二通孔的侧壁处形成有界面层;
    采用第二刻蚀气体对所述界面层进行刻蚀去除。
  18. 根据权利要求17所述的Mini LED芯片的制作方法,其特征在于,所述第一刻蚀气体包括CHF3、Ar和O2,或者所述第一刻蚀气体包括CF4、Ar和O2;
    所述第二刻蚀气体包括BCl3、Cl2和Ar。
  19. 根据权利要求15所述的Mini LED芯片的制作方法,其特征在于,形成所述第一键合电极和所述第二键合电极后,还包括:
    在所述第一键合电极和所述第二键合电极中至少之一者上形成多个孔洞。
  20. 根据权利要求19所述的Mini LED芯片的制作方法,其特征在于,具有所述多个孔洞的键合电极中,将所述多个孔洞划分为第一孔洞组和第二孔洞组,且形成关于所述第一通孔至所述第二通孔的连线为对称轴对称的所述第一孔洞组和所述第二孔洞组。
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