WO2019188105A1 - 転写基板ならびにこれを用いた実装方法および画像表示装置の製造方法 - Google Patents

転写基板ならびにこれを用いた実装方法および画像表示装置の製造方法 Download PDF

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Publication number
WO2019188105A1
WO2019188105A1 PCT/JP2019/009222 JP2019009222W WO2019188105A1 WO 2019188105 A1 WO2019188105 A1 WO 2019188105A1 JP 2019009222 W JP2019009222 W JP 2019009222W WO 2019188105 A1 WO2019188105 A1 WO 2019188105A1
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WIPO (PCT)
Prior art keywords
substrate
transfer substrate
chip component
transfer
chip
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/JP2019/009222
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English (en)
French (fr)
Japanese (ja)
Inventor
靖典 橋本
昇 朝日
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Toray Engineering Co Ltd
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Toray Engineering Co Ltd
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Publication date
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Definitions

  • the present invention relates to a transfer substrate for transferring a chip component, and a mounting method for mounting the chip component on a wiring substrate using the transfer substrate.
  • the chip parts C that are densely formed and diced on the wafer substrate W are rearranged on the wiring board S at a predetermined interval, and are mounted with high speed and high precision (FIG. 8 ( c))
  • FIG. 8 ( c) There are uses.
  • the manufacture of a micro LED display that is attracting attention as an image display device, it is necessary to mount millions of LED chips at predetermined positions on a TFT substrate with a gap therebetween.
  • FIGS. 9A and 9B are enlarged views of FIG. 8B showing a cross section of the wafer substrate W and FIG. 8D showing a cross section of the wiring substrate S.
  • an accuracy of an error of about several ⁇ m is required.
  • the chip components C formed densely on the wafer substrate W as shown in FIG. 8A are spaced apart from the wiring substrate S as shown in FIG. 8C (FIG. 8C).
  • Various processes for mounting with high accuracy have been studied.
  • FIG. 10 shows an example in which the chip component C is transferred from the wafer substrate W to the wiring substrate S by the LLO method.
  • FIG. 10A shows a state in which the leftmost chip component C is irradiated with laser light L and transferred to the wiring board S.
  • the leftmost chip component C is aligned with a predetermined position above the wiring board S.
  • the wavelength of the laser beam L in FIG. 10A is selected from a range suitable for peeling the chip component C from the wafer W. For example, if the wavelength absorbed by the material of the chip component C is used, the chip component C is peeled off from the wafer substrate W by the gas generated by the decomposition of the material as the temperature rises.
  • FIG. 10B shows a state where the leftmost chip component C peeled off from the wafer substrate W by the irradiation of the laser beam L is transferred to the wiring substrate S.
  • the chip component C at the left end is transferred directly below, it is disposed at a predetermined position on the wiring board S. Note that if the moving distance d of the chip component directly under the transfer is made larger than the total height of the chip component C and the bump B, the wafer substrate W can be obtained even if the chip component C is transferred to the wiring substrate S. Can be moved horizontally.
  • FIG. 10C shows a state in which the laser beam L is irradiated after the predetermined positions of the chip component C and the wiring board S to be transferred next are arranged immediately below the laser beam L.
  • the next chip component C is transferred and arranged at a predetermined position on the wiring board S with a space from the previously transferred chip component C.
  • the chip component C to be transferred directly below the laser beam L and the predetermined position (position where the chip component C is to be mounted) of the wiring board S are arranged as needed, and the chip component C is transferred to transfer the chip component C as shown in FIG.
  • the transfer arrangement of the chip component C onto the wiring board S as shown in c) can be performed.
  • the first transfer substrate 1 is brought into close contact with the chip component C of the wafer substrate W, and the chip component C is peeled off by laser light or the like. 1 Transfer to the transfer substrate 1.
  • the first transfer substrate 1 has adhesiveness on the side where the chip component C is held.
  • the chip component C is transferred while being in close contact with the first transfer substrate, the chip component C is transferred to the first transfer substrate 1 without being accelerated.
  • the bump B of the chip component C is in close contact with the first transfer substrate 1, even if the chip component C is transferred from this state to the wiring substrate S, the bump B remains. It cannot be brought into contact with the electrode of the wiring board S. Therefore, the chip component C of the first transfer substrate 1 is transferred again to the second transfer substrate 2 as shown in FIG.
  • the second transfer substrate 2 has adhesiveness on the side that holds the chip component C.
  • the second transfer substrate 2 holds the side opposite to the bump B of the chip component C as shown in FIG.
  • the transfer substrate 2 holding the chip component C as shown in FIG.
  • the impact of the chip component C during transfer can be reduced.
  • the laser beam L is used to surely peel all the chip components from the second transfer substrate 2. It is necessary to set the intensity. For this reason, it is extremely difficult to transfer all the chip components C from the second transfer substrate 2 to the wiring substrate S without damaging them. If the laser light L is intended to have an adhesive force that can be peeled even when the intensity is low, there is a concern that the chip component C may be naturally peeled from the second transfer substrate 2 or may be misaligned during transfer.
  • the present invention has been made in view of the above problems, and when mounting chip components arranged in a dense state on a wiring board at a predetermined interval, the chip components are not damaged without being damaged.
  • the present invention provides a transfer substrate used for securely mounting at a position, a transfer substrate, a mounting method using the transfer substrate, and a method for manufacturing an image display device.
  • the invention according to claim 1 is configured such that a plurality of chip parts having bump electrodes are held from the opposite side of the surface on which the bump electrodes are formed and connected to the bump electrodes.
  • a transfer substrate used for transferring and mounting on a wiring substrate having an electrode comprising: a base substrate; and an adhesive layer that is formed on the base substrate and holds the chip component.
  • the Young's modulus is 1 GPa or more
  • the softening temperature is 200 ° C. or more
  • the thermal conductivity is 1 W / m.
  • the adhesive layer has a melting point of 200 ° C. or more.
  • the transfer substrate is 50% or more and 90% or less.
  • the invention described in claim 2 is the transfer substrate according to claim 1, wherein the adhesive layer uses a silicone resin or an acrylic resin.
  • a chip component having a diced bump electrode is transferred to a first transfer substrate holding the bump electrode side and transferred to a second transfer substrate holding the opposite side of the bump electrode. Then, a mounting method of transferring and mounting on a wiring board having an electrode connected to the bump electrode, wherein the chip is used by using the transfer board according to claim 1 or 2 as the second transfer board.
  • the step of transferring the component from the first transfer substrate to the second transfer substrate the interval between the chip components is changed to the mounting interval on the wiring substrate, and the surface of the second transfer substrate holding the chip components
  • the mounting method is such that the transfer substrate is peeled off from the chip component after being heated while being pressurized from the opposite side.
  • Invention of Claim 4 manufactures an image display apparatus which manufactures an image display apparatus using the mounting method of Claim 3 using an LED chip as said chip component, and a TFT substrate as said wiring board. Is the method.
  • a high-quality image display device can be obtained by mounting the LED chip on the TFT substrate.
  • FIG. 5A is a diagram illustrating a process of transferring a chip component from a wafer substrate to a first transfer substrate
  • FIG. 5B is a diagram illustrating a state in which the chip component is transferred to the first transfer substrate according to the embodiment of the present invention. is there (A) It is a figure which shows the process of peeling a chip
  • FIG. 4 is a diagram illustrating a process of peeling the next chip component from the first transfer substrate, and (d) a diagram illustrating a state in which the next chip component is transferred to the second transfer substrate.
  • FIG. 4 is a diagram showing a state in which (a) a second transfer substrate holding a chip component is arranged on a wiring substrate according to an embodiment of the present invention, and (b) a chip component held by the second transfer substrate on the wiring substrate. It is a figure which shows the state which carries out thermocompression bonding. (C) It is a figure which shows the state after the thermocompression bonding of the chip component to the wiring board is completed, and (d) the second transfer substrate is peeled from the chip component, and the mounting is completed.
  • thermocompression bonding head is placed on the wiring board while holding the second transfer board, and (b) the chip component on the wiring board wiring board. It is a figure which shows the state after thermocompression bonding is completed.
  • thermocompression bonding is completed.
  • FIG. 6 is a diagram showing a step of peeling the next chip component from (d) a state in which the next chip component is transferred to the wiring board.
  • FIG. 10 is a diagram illustrating transfer of a chip component using a transfer substrate, and is a diagram illustrating a process of transferring the chip component from the wafer substrate to the first transfer substrate, and (b) a state in which the chip component is transferred to the first transfer substrate.
  • C) is a diagram showing a process of transferring a chip component from the first transfer substrate to the second transfer substrate, and (d) is a diagram showing a state where the chip component is transferred to the second transfer substrate. .
  • FIG. 1 shows a second transfer substrate 2 which is a transfer substrate according to an embodiment of the present invention, and shows a state in which a chip component C is held.
  • the second transfer substrate 2 has a structure in which an adhesive layer 21 is laminated on a base substrate 20 and the adhesive layer 21 holds a surface opposite to the bump B of the chip component C.
  • the base substrate 20 dominates the mechanical and thermal characteristics of the second transfer substrate 2, and is preferably excellent in dimensional stability, heat resistance and high thermal conductivity. Specifically, it is desirable that the softening temperature is 200 ° C. or higher, the Young's modulus is 1 GPa or higher, and the thermal conductivity is 1 W / m ⁇ K or higher. Any glass, metal, ceramic, or resin may be used as long as this condition is satisfied, and translucency is not required.
  • the adhesive layer 21 holds the chip component C, but a material that is more flexible than the base substrate 20 is used to reduce the impact in the process of transferring the chip component C from the first transfer substrate 1 (details will be described later). .
  • the Reeve hardness obtained by a repulsive hardness tester is 50% or more and 90% or less of the base substrate 20.
  • the melting point is desirably 200 ° C. or higher.
  • a specific main component can be selected from silicone resin and acrylic resin.
  • FIGS. 2A and 2B illustrate the process of transferring the chip component C on the wafer substrate W to the first transfer substrate 1, but FIGS. 12A and 12B. It is not different from the conventional technology shown in.
  • the chip component C is diced to a size of 1 mm or less per side.
  • a GaN-based LED chip is assumed, but a semiconductor integrated circuit chip (IC chip) made of a material such as Si may be used.
  • an LED chip is formed on a GaN layer stacked on a sapphire substrate. For this reason, by irradiating light energy with a laser from the side where the chip component C of the wafer substrate W is not formed, the overheated GaN layer that absorbs light is decomposed to generate nitrogen gas, and the sapphire substrate The GaN layer peels at the interface. At this time, since the first transfer substrate 1 and the chip component C are in close contact with each other, no impact force is applied to the chip component C if the first transfer substrate 1 is fixed.
  • FIG. 7A A top view when the chip component C is transferred from the wafer substrate W to the first transfer substrate 1 is shown in FIG. 7A, and the space between the chip components C is not changed and the dense state is maintained.
  • FIG. 7B is a top view showing the difference in the arrangement of the chip components C on the first transfer substrate 1 and the second transfer substrate.
  • the interval of the chip component C to the second transfer substrate 2 is the same as that of the wiring substrate S.
  • FIG. 3A shows a state where the surface of the first transfer substrate 1 on which the chip component C is arranged and the adhesive layer 21 of the second transfer substrate 2 are opposed to each other with a gap from the leftmost chip component C.
  • a state in which laser light is irradiated and transferred to the second transfer substrate 2 is shown.
  • the distance between the chip component C (non-bump surface thereof) on the first transfer substrate 1 and the adhesive layer 21 needs to be larger than the height of the chip component C including the bump B. This is because the distance between the chip components C is changed between the first transfer substrate 1 and the second transfer substrate 2, and the relative position is changed in the plane direction with the first transfer substrate 1 and the second transfer substrate 2 facing each other. It is necessary to do.
  • the laser light L is emitted from the second transfer substrate 2 by heating the bump surface side of the chip component C, and the wavelength absorbed by GaN constituting the chip component C is preferable.
  • the wavelength of the laser light may be selected according to the material of the adhesive layer.
  • FIG. 3B shows a state in which the chip component C irradiated with the laser light L is emitted from the first transfer substrate 1 and held on the second transfer substrate 2.
  • the chip component C is slightly spaced, the space between the first transfer substrate 1 and the second transfer substrate 2 is accelerated and arrives at the second transfer substrate 2.
  • the adhesive layer 21 needs to reduce the impact when the chip component C arrives. Therefore, as a result of searching for a condition that the chip component C does not break when it arrives at the second transfer substrate 2, the Reeve hardness obtained by the repulsive hardness tester is 50% or more and 90% or less of the base substrate 20 as described above. I found the condition that If this value exceeds 90%, the chip component may be damaged. On the other hand, if it is less than 50%, the chip component will not be damaged, but inconvenience may occur due to viscosity or the like when heating in the subsequent process.
  • FIG. 3C shows the first transfer substrate so that the chip component C to be transferred next and the predetermined position of the second transfer substrate 2 (predetermined distance from the previously transferred chip component C) are arranged immediately below the laser beam.
  • a state in which the laser beam L is irradiated after adjusting the relative position between the first transfer substrate 2 and the second transfer substrate 2 is shown.
  • the next chip component C is transferred and arranged on the second transfer substrate 2 at a predetermined interval from the chip component C transferred and arranged previously (FIG. 3D).
  • the chip component C to be transferred directly below the laser beam L and the predetermined position (on the second transfer substrate 2) are arranged at any time, and the chip component C is transferred as shown in FIG.
  • the chip component C can be obtained on the second transfer substrate 2 on which C is transferred.
  • FIG. 4A shows a state in which the second transfer substrate 2 is disposed in a state where the chip mounting position on the wiring substrate S disposed on the stage 3 and the chip component C are aligned.
  • the chip component arrangement on the second transfer substrate 2 and the chip component mounting position of the wiring substrate S are as shown in the top view in FIG. 7C, and all the chips arranged on the second transfer substrate 2 are shown.
  • the components can be aligned with the mounting position of the wiring board S at the same time.
  • thermocompression bonding head 4 is approached from the base substrate 20 side of the second transfer substrate 2 and thermocompression bonding is performed as shown in FIG. It can also be bonded and mounted mechanically. If a thermosetting adhesive is previously disposed between the chip component C and the wiring board S, the resin sealing of the chip component C can be performed at the same time.
  • the stage 3 may have a heating function.
  • the base substrate 20 constituting the second transfer substrate 2 is required to have a softening temperature of 200 ° C. or higher, a Young's modulus of 1 GPa or higher, and a thermal conductivity of 1 W / m ⁇ K or higher.
  • the adhesive layer 21 is required to have a melting point of 200 ° C. or higher because it is necessary to avoid fusing at the time of thermocompression bonding.
  • FIG. 5C shows a state after the thermocompression bonding of FIG. 4B is completed, in which the thermocompression bonding head 4 is lifted, and then the second transfer substrate is peeled from the chip component C. The state is shown in FIG.
  • FIG. 6 shows an example in which the pressure-bonding head 4 holds the second transfer substrate 2 by suction.
  • FIG. 6A shows a state where the thermocompression bonding head 4 is holding the second transfer substrate 2 by suction and is aligned with the wiring board S.
  • FIG. 6B shows a state after completion of the thermocompression bonding. It shows that the second transfer substrate 2 can be peeled off simultaneously from the chip component C by raising the thermocompression bonding head 4.
  • the transfer of the chip component C from the second transfer substrate 2 to the wiring substrate S is not performed by the LLO method, but the transfer and mounting are simultaneously performed by thermocompression bonding. For this reason, when the chip component C is copied from the second transfer substrate 2 to the wiring substrate S, the chip component C is not shocked. Therefore, even if the material and electrodes of the wiring substrate S are hard, the chip component C can be prevented from being damaged.
  • the LLO method is used for transferring the chip component C from the first transfer substrate 1 to the second transfer substrate 2, but by appropriately selecting the adhesive layer constituting the second transfer substrate 2, The impact at the time of transfer to the transfer substrate 2 can be alleviated to prevent the chip component C from being damaged.
  • the present invention is suitable as a manufacturing method of an image display device using a TFT substrate as a wiring substrate and an LED chip as a chip component, and a manufacturing method of a high quality image display device using millions of LEDs. Is very suitable. *

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  • Wire Bonding (AREA)
  • Led Device Packages (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
PCT/JP2019/009222 2018-03-28 2019-03-08 転写基板ならびにこれを用いた実装方法および画像表示装置の製造方法 Ceased WO2019188105A1 (ja)

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JP2018-061743 2018-03-28
JP2018061743A JP6926018B2 (ja) 2018-03-28 2018-03-28 転写基板ならびにこれを用いた実装方法および画像表示装置の製造方法

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US20220238358A1 (en) * 2021-01-28 2022-07-28 Asti Global Inc., Taiwan Chip-transferring module, and device and method for transferring and bonding chips

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US11749585B2 (en) * 2020-02-28 2023-09-05 Intel Corporation High thermal conductivity, high modulus structure within a mold material layer of an integrated circuit package
KR20220158219A (ko) * 2020-03-23 2022-11-30 토레 엔지니어링 가부시키가이샤 실장 방법, 실장 장치, 및 전사 장치
JP7463153B2 (ja) * 2020-03-23 2024-04-08 東レエンジニアリング株式会社 実装方法および実装装置
JP2022115687A (ja) * 2021-01-28 2022-08-09 東レエンジニアリング株式会社 転写装置

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JP6926018B2 (ja) 2021-08-25
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JP2019175978A (ja) 2019-10-10

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