WO2019169881A1 - 阵列基板及显示面板 - Google Patents

阵列基板及显示面板 Download PDF

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Publication number
WO2019169881A1
WO2019169881A1 PCT/CN2018/112920 CN2018112920W WO2019169881A1 WO 2019169881 A1 WO2019169881 A1 WO 2019169881A1 CN 2018112920 W CN2018112920 W CN 2018112920W WO 2019169881 A1 WO2019169881 A1 WO 2019169881A1
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WO
WIPO (PCT)
Prior art keywords
switch
coupled
substrate
node
pulse signal
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PCT/CN2018/112920
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English (en)
French (fr)
Inventor
单剑锋
Original Assignee
惠科股份有限公司
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Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US16/328,973 priority Critical patent/US10789905B2/en
Publication of WO2019169881A1 publication Critical patent/WO2019169881A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133305—Flexible substrates, e.g. plastics, organic film
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/03—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes specially adapted for displays having non-planar surfaces, e.g. curved displays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit

Definitions

  • the present application relates to a pixel circuit in the display field, and in particular to an array substrate and a display panel.
  • planar liquid crystal display driver circuit is mainly composed of a panel externally connected chip, but this method cannot reduce the cost of the product and can not make the panel thinner.
  • a liquid crystal display device usually has a gate driving circuit, a source driving circuit, and a pixel array.
  • the pixel array has a plurality of pixel circuits, each of which is turned on and off according to a scan signal provided by the gate driving circuit, and displays a data picture according to the data signal provided by the source driving circuit.
  • the gate driving circuit usually has a multi-stage shift register, and the first-order shift register is transferred to the next-stage shift register to output the scanning signal to the pixel array.
  • the pixel circuit is sequentially turned on to enable the pixel circuit to receive the data signal.
  • the gate driving circuit is directly fabricated on the array substrate instead of the driving chip fabricated by the external connection IC.
  • This is called Gate On Array (GOA) technology.
  • GAA Gate On Array
  • the curved display panel has been favored by various manufacturers in recent years because of its better viewing effect and visual experience.
  • the GOA technology is applied to a curved display panel, it is set to display according to the degree of the surface of the display panel.
  • the active switching elements in the panel will also have different degrees of deformation, affecting its structure and performance, which in turn leads to certain differences in the output of the GOA circuit, accompanied by the phenomenon of bright and dark lines, which affects product quality.
  • an object of the present application is to provide an array substrate and a display panel.
  • An array substrate includes: a substrate; a plurality of active switches disposed on the substrate; and a shift temporary storage circuit disposed on the substrate and located at a side edge of the substrate
  • the shift register circuit has a multi-stage shift register, and each stage shift register includes: a first switch, a control end of the first switch is coupled to the first node, and the first end is coupled to the frequency signal The second end is coupled to the output pulse signal; the second switch is configured to be coupled to the input pulse signal by the control end and the first end of the second switch, the second end is coupled to the first node, and the third switch is configured to be The control end of the third switch is coupled to the second node, the first end is coupled to the output pulse signal, the second end is coupled to the low preset potential, and the fourth switch is coupled to the control end of the fourth switch a second node, the first end is coupled to the first node, and the second end is coupled to the low preset potential
  • the shift register further includes a compensation circuit, including: a fifth switch, the control end of the fifth switch is coupled to the output pulse signal, and the first end is coupled to the output a pulse signal, the second end is coupled to the low preset potential.
  • a width of the first end and the second end of the fifth switch is greater than a width of the first end and the second end of the active switch.
  • the first switch, the second switch, the third switch, the fourth switch, and the fifth switch have the same width of the first end and the second end.
  • the compensation circuit reduces a potential difference between the control terminal and the first terminal of the fourth switch.
  • the shift register further includes a sub-pull circuit coupled to the first node, the output pulse signal, and the low preset potential.
  • the shift register further includes a sub-pull circuit controller coupled to the low preset potential and the sub-down pull circuit.
  • an array substrate comprising: a substrate; a plurality of active switches disposed on the substrate; and a shift temporary storage circuit disposed on the substrate and located on the substrate a side edge, wherein the shift register circuit has a multi-stage shift register, each stage shift register includes: a first switch, a control end of the first switch is coupled to the first node, and the first end is coupled a frequency signal, the second end is coupled to the output pulse signal; the second switch, the control end and the first end of the second switch are coupled to the input pulse signal, the second end is coupled to the first node; the third switch The control end of the third switch is coupled to the second node, the first end is coupled to the output pulse signal, the second end is coupled to the low preset potential, and the fourth switch is coupled to the control end of the fourth switch a second node, the first end is coupled to the first node, the second end is coupled to the low preset potential, and the fifth switch is coupled to the output pulse signal by the control end of the fifth switch,
  • a further object of the present application is a display panel comprising: a first substrate; and an array substrate as described above, disposed opposite the first substrate.
  • the first substrate and the array substrate are flexible substrates, and the flexible substrate is such that the display panel can be a curved display panel.
  • the display panel is closer to the first switch on the side edge of the array substrate, the second switch, the third switch, the fourth switch, and the first The width of the first end and the second end of the five switches is larger.
  • the display panel, the first switch, the second switch, the third switch, the fourth switch, and the first and second ends of the fifth switch are equal.
  • the present application can solve the poor switching electrical performance of the shift register circuit caused by the curvature change of the flexible display panel, and the bright and dark line problem caused by the problem .
  • Figure 1a is a schematic diagram of an exemplary display device.
  • FIG. 1b is a schematic diagram of still another exemplary display device.
  • 2a-2b are schematic diagrams showing an exemplary active switch structure.
  • 2c is a schematic diagram of an exemplary active switch structure for a curved display panel.
  • FIG. 3 is a schematic structural diagram of an active switch according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a pixel circuit according to an embodiment of the present application.
  • the word “comprising” is to be understood to include the component, but does not exclude any other component.
  • “on” means located above or below the target component, and does not mean that it must be on the top based on the direction of gravity.
  • FIG. 1a is a schematic diagram of an exemplary display device.
  • a display device 10 includes a color filter substrate 100, an active array substrate 110, and a driving chip 103 for driving the circuit.
  • FIG. 1b is a schematic diagram of still another exemplary display device.
  • a display device 11 having a gate array driving includes a color filter substrate 100, an active array substrate 110, and a gate.
  • the array driver 105 is configured to form a gate driving circuit on the array substrate 110.
  • FIG. 2a-2b are schematic diagrams of an exemplary active switch structure
  • FIG. 2c is a schematic diagram of an exemplary active switch structure on a curved display panel.
  • FIG. 1b, FIG. 2a, FIG. 2b and FIG. 2c when the display device of the GOA is applied to a curved display device, the curvature of the edge of the curved display panel may be greatly changed compared to the flat display device.
  • the structure of the active switch T0 located here is changed accordingly. As shown in FIG.
  • the control end 10a of the active switch T0, the first end 10b and the second end 20c are deformed due to the curvature change of the display panel, and the active switch
  • the width D1 of the first end and the second end changes due to the change in curvature, affecting the structure and performance of the active switch T0.
  • the electrical properties also vary with the curvature of the display panel to varying degrees, resulting in output differences, accompanied by bright and dark lines, or color shifts.
  • FIG. 3 is a schematic structural diagram of an active switch according to an embodiment of the present application
  • FIG. 4 is a schematic diagram of an array substrate according to an embodiment of the present application.
  • an array substrate includes: a substrate (not shown); and a plurality of active switches (not shown) disposed on the substrate; a shift register circuit 300 is disposed on the substrate and located at a side edge of the active switch, wherein the shift register circuit 300 has a multi-stage shift register, and each shift register includes: a switch T10, the control terminal 101a of the first switch T10 is coupled to the first node P1(n), the first end 101b of the first switch T10 is coupled to the frequency signal CK, and the second switch T10 is second.
  • the terminal 101c is coupled to the output pulse signal Gn; the second switch T20, the control terminal 201a of the second switch T20 is coupled to the input pulse signal ST, and the first end 201b of the second switch T20 is coupled to the input pulse signal ST.
  • the second end 201c of the second switch T20 is coupled to the first node P1(n); the third switch T30, the control end 301a of the third switch T30 is coupled to the second node P2(n).
  • the first end 301b of the third switch T30 is coupled to the output pulse signal Gn, and the second end 301c of the third switch T30 is coupled to the low preset.
  • the control terminal 401a of the fourth switch T40 is coupled to the second node P2(n), and the first end 401b of the fourth switch T40 is coupled to the first node P1 (n), the second end 401c of the fourth switch T40 is coupled to the low preset potential Vss; wherein the first switch T10, the second switch T20, the third switch T30, and the The width D2 of the first end and the second end of the fourth switch T40 are both greater than the width D1 of the first end and the second end of the active switch.
  • a compensation circuit is further included, including: a fifth switch T50, the control end 501a of the fifth switch T50 is coupled to the output pulse signal Gn, and the first switch The terminal 501b is coupled to the output pulse signal Gn, and the second end of the fifth switch is coupled to the low preset potential.
  • the width D2 of the first end and the second end of the fifth switch T50 is greater than the width D1 of the first end and the second end of the active switch.
  • the compensation circuit is configured to reduce a potential difference between the control terminal 401a and the first terminal 401b in the fourth switch T40.
  • a sub-down circuit 220 is further coupled to the first node P1(n), the output pulse signal Gn, and the low preset potential Vss.
  • a sub-drain circuit controller 210 is further coupled to the low preset potential Vss and the sub-pull circuit.
  • the distance L between the first end 30b and the second end 30c of the switch T1 has a width of D2 and is greater than The width of the first end and the second end of the active switch.
  • the projected area of the first end 30b and the second end 30c on the control end 30a and the first of the active switch are increased by increasing the width D2 of the first end 30b and the second end 30c of the switch T1.
  • the widths of the end and the second end are the same or close to each other, and even larger than the width of the active switch, so that the switch T1 can maintain good electrical performance, prevent the malfunction of the shift register circuit due to poor electrical performance, and the problem of bright and dark lines. .
  • a display panel includes a first substrate, and an array substrate as described above, disposed opposite to the first substrate.
  • the first substrate and the array substrate are flexible substrates.
  • the first switch T10, the second switch T20, the third switch T30, the fourth switch T40, and the first switch and the second switch T50 are first and second.
  • the projected area of the width D2 of the end on the horizontal plane is equal.
  • the display panel of the present application may be, for example, a liquid crystal display panel, such as a VA (Vertical Alignment) type display panel, which may include a TFT (Thin Film Transistor) substrate, a color film (CF, Color). Filter) a substrate and a liquid crystal layer formed between the substrates.
  • a liquid crystal display panel such as a VA (Vertical Alignment) type display panel, which may include a TFT (Thin Film Transistor) substrate, a color film (CF, Color). Filter) a substrate and a liquid crystal layer formed between the substrates.
  • the active array (TFT) and the color filter layer (CF) of the present application may be formed on the same substrate.
  • the display panel of the present application is a curved display panel.
  • the electrical defect caused by the sudden change of the curvature of the panel edge can be overcome, and the electrical defect is improved. Display effects and panel quality.
  • the display panel of the present application may also be, for example, TN (Twisted Nematic), STN (Super Twisted Nematic), OCB (Optically Compensated Birefringence) display panel. Or an OLED (Organic Light Emitting Diode) display panel and a plasma display panel.
  • TN Transmission Nematic
  • STN Super Twisted Nematic
  • OCB Optically Compensated Birefringence
  • OLED Organic Light Emitting Diode
  • the application increases the width D2 of the first end and the second end of the switch (T10, T20, T30, T40, T50) of the shift register circuit, and the switches of different curvature ranges of the display panel also have different widths.
  • the design can solve the poor electrical conductivity of the flexible display panel due to the curvature change, and the bright and dark line problem caused by the switch.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种阵列基板及显示面板，阵列基板包括：基板；主动开关；移位暂存电路（300），位于基板侧缘，具有多级移位寄存器，包括：第一开关（T10），第二开关（T20），第三开关（T30），第四开关（T40）和第五开关（T50）；其中，移位寄存器的多个开关的第一端和第二端的宽度大于主动开关的第一端和第二端的宽度。通过加大移位寄存器中多个开关的第一端和第二端的宽度，可以解决柔性显示面板因曲率变化导致的移位暂存电路（300）的开关电性不良，及其所引起的亮暗线问题。

Description

阵列基板及显示面板 技术领域
本申请涉及显示领域的像素电路，特别是涉及一种阵列基板及显示面板。
背景技术
近年来，随着科技的进步，平面液晶显示器逐渐普及化，其具有轻薄等优点。目前平面液晶显示器驱动电路主要是由面板外连接芯片来组成，但是此方法无法将产品的成本降低、也无法使面板更薄型化。
且液晶显示设备中通常具有栅极驱动电路、源极驱动电路和像素阵列。像素阵列中具有多个像素电路，每一个像素电路依据栅极驱动电路提供的扫描讯号开启和关闭，并依据源极驱动电路提供的数据讯号，显示数据画面。以栅极驱动电路来说，栅极驱动电路通常具有多级移位寄存器，并借由一级移位寄存器传递至下一级移位寄存器的方式，来输出扫描讯号到像素阵列中，以依序地开启像素电路，使像素电路接收数据讯号。
因此在驱动电路的制程中，便直接将栅极驱动电路制作在阵列基板上，来取代由外连接IC制作的驱动芯片，此种被称为栅极阵列驱动(Gate On Array，GOA)技术的应用可直接做在面板周围，减少制作程序、降低产品成本且使面板更薄型化。
而曲面型显示面板因其具有更佳的欣赏效果及视觉体验，在近年得到各产商的青睐，但是当GOA技术应用于曲面型显示面板时，随着显示面板的曲面程度不同，设置于显示面板中的主动开关元件亦会有不同程度的形变，影响其结构及性能，进而导致GOA电路在输出时存在一定的差异，伴随出现亮暗线纹的现象，影响产品质量。
发明内容
为了解决上述技术问题，本申请的目的在于，提供一种阵列基板及显示面板。
本申请的目的及解决其技术问题是采用以下技术方案来实现的。依据本申请提出的一种阵列基板，包括：一基板；多个主动开关，设置于所述基板上；以及一移位暂存电路，设置于所述基板上，并位于所述基板的侧缘，其中，所述移位暂存电路具有多级移位寄存器，每一级移位寄存器包括：第一开关，所述第一开关的控制端耦接第一节点，第一端耦接频率讯号，第二端耦接输出脉冲讯号；第二开关，所述第二开关的控制端和第一端耦接输入脉冲讯号，第二端耦接所述第一节点；第三开关，所述第三开关的控制端耦接第二节点，第一端耦接所述输出脉冲讯号，第二端耦接低预设电位；以及第四开关，所述第四开关的控制端耦接所述第二节点，第一端耦接所述第一节点，第二端耦接所述低预设电位；其中，所述第一开 关，所述第二开关，所述第三开关及所述第四开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度。
在本申请的一实施例中，所述移位寄存器更包括一补偿电路，包括：第五开关，所述第五开关的控制端耦接所述输出脉冲讯号，第一端耦接所述输出脉冲讯号，第二端耦接所述低预设电位。
在本申请的一实施例中，所述第五开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度。
在本申请的一实施例中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端的宽度相同。
在本申请的一实施例中，所述补偿电路降低所述第四开关中的控制端与第一端的电位差。
在本申请的一实施例中，所述移位寄存器更包括一子下拉电路，耦接所述第一节点、所述输出脉冲讯号及所述低预设电位。
在本申请的一实施例中，所述移位寄存器更包括一子下拉电路控制器，耦接所述低预设电位及所述子下拉电路。
本申请的目的及解决其技术问题还可采用以下技术措施进一步实现。
本申请的另一目的为一种阵列基板，包括：一基板；多个主动开关，设置于所述基板上；以及一移位暂存电路，设置于所述基板上，并位于所述基板的侧缘，其中，所述移位暂存电路具有多级移位寄存器，每一级移位寄存器包括：第一开关，所述第一开关的控制端耦接第一节点，第一端耦接频率讯号，第二端耦接输出脉冲讯号；第二开关，所述第二开关的控制端和第一端耦接输入脉冲讯号，第二端耦接所述第一节点；第三开关，所述第三开关的控制端耦接第二节点，第一端耦接所述输出脉冲讯号，第二端耦接低预设电位；第四开关，所述第四开关的控制端耦接所述第二节点，第一端耦接所述第一节点，第二端耦接所述低预设电位；第五开关，所述第五开关的控制端耦接所述输出脉冲讯号，第一端耦接所述输出脉冲讯号，第二端耦接所述低预设电位；其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端的宽度相同，且所述第一开关的第一端的宽度大于所述主动开关的第一端的宽度；其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端于水平面上的投影面积相等。
本申请的又一目的为一种显示面板，包括：第一基板；以及如上所述的阵列基板，与所述第一基板相对设置。其中，所述第一基板及所述阵列基板为柔性基板，所述柔性基板使得所述显示面板可为曲面型显示面板。
在本申请的一实施例中，所述显示面板，越靠近所述阵列基板侧缘的所述第一开关，所述第二开关，所述第三开关，所述第四开关及所述第五开关的第一端和第二端的宽度越大。
在本申请的一实施例中，所述显示面板，所述第一开关，所述第二开关，所述第三开关，所述第四开关及所述第五开关的第一端和第二端于水平面上的投影面积为相等。
本申请通过加大移位寄存器中多个开关的第一端和第二端的宽度，可以解决柔性显示面板因曲率变化导致的移位寄存电路的开关电性不良，及其所引起的亮暗线问题。
附图说明
图1a为一范例性的显示装置示意图。
图1b为又一范例性的显示装置示意图。
图2a～图2b为范例性的主动开关结构示意图。
图2c为范例性的主动开关结构于曲面型显示面板的示意图。
图3为本申请一实施例的主动开关结构示意图。
图4为本申请一实施例的像素电路示意图。
具体实施方式
以下各实施例的说明是参考附加的图式，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。
附图和说明被认为在本质上是示出性的，而不是限制性的。在图中，结构相似的单元是以相同标号表示。另外，为了理解和便于描述，附图中示出的每个组件的尺寸和厚度是任意示出的，但是本申请不限于此。
在附图中，为了清晰起见，夸大了层、膜、面板、区域等的厚度。在附图中，为了理解和便于描述，夸大了一些层和区域的厚度。将理解的是，当例如层、膜、区域或基底的组件被称作“在”另一组件“上”时，所述组件可以直接在所述另一组件上，或者也可以存在中间组件。
另外，在说明书中，除非明确地描述为相反的，否则词语“包括”将被理解为意指包括所述组件，但是不排除任何其它组件。此外，在说明书中，“在......上”意指位于目标组件上方或者下方，而不意指必须位于基于重力方向的顶部上。
为更进一步阐述本申请为达成预定申请目的所采取的技术手段及功效，以下结合附图及较佳实施例，对依据本申请提出的一种阵列基板及显示面板，其具体实施方式、结构、特征及其功效，详细说明如后。
图1a为一范例性的显示装置示意图。请参照图1a，一种显示装置10，包括一彩色滤光片基板100、一主动阵列基板110及一驱动芯片103，用以驱动电路。
图1b为又一范例性的显示装置示意图。请参照图1b，在本申请一实施例中，一种具有栅极阵列驱动(GOA，Gate on Array)的显示装置11，包括一彩色滤光片基板100、一主动阵列基板110及一栅极阵列驱动105，用以将栅极驱动电路制作在阵列基板110上。
图2a～2b为范例性的主动开关结构示意图，及图2c为范例性的主动开关结构于曲面型显示面板的示意图。请参考图1b、图2a、图2b和图2c，当GOA的显示装置应用于曲面型显示装置时，其较之平面型显示装置，由于曲面型显示面板边缘侧的曲率变化，极大可能会使得位于此处的主动开关T0的结构随之改变，如图2c所示，主动开关T0的控制端10a，第一端10b和第二端20c因显示面板的曲率变化而发生形变，主动开关的第一端和第二端的宽度D1因曲率变化而改变，影响主动开关T0的结构和性能。相应地，其电性亦会随显示面板的曲率变化而在不同程度上产生差异，进而导致输出差异，伴随着会出现亮暗线纹、或色偏等的现象。
图3为本申请一实施例的主动开关结构示意图，图4为本申请一实施例的阵列基板示意图。请参考图3和图4，在本申请的一实施例中，一种阵列基板，包括：一基板(图未示)；多个主动开关(图未示)，设置于所述基板上；以及一移位暂存电路300，设置于所述基板上，并位于所述主动开关的侧缘，其中，所述移位暂存电路300具有多级移位寄存器，每一移位寄存器包括：第一开关T10，所述第一开关T10的控制端101a耦接第一节点P1(n)，所述第一开关T10的第一端101b耦接频率讯号CK，所述第一开关T10的第二端101c耦接输出脉冲讯号Gn；第二开关T20，所述第二开关T20的控制端201a耦接输入脉冲讯号ST，所述第二开关T20的第一端201b耦接所述输入脉冲讯号ST，所述第二开关T20的第二端201c耦接所述第一节点P1(n)；第三开关T30，所述第三开关T30的控制端301a耦接第二节点P2(n)，所述第三开关T30的第一端301b耦接所述输出脉冲讯号Gn，所述第三开关T30的第二端301c耦接低预设电位Vss；以及第四开关T40，所述第四开关T40的控制端401a耦接所述第二节点P2(n)，所述第四开关T40的第一端401b耦接所述第一节点P1(n)，所述第四开关T40的第二端401c耦接所述低预设电位Vss；其中，所述第一开关T10，所述第二开关T20，所述第三开关T30及所述第四开关T40的第一端和第二端的宽度D2均大于所述主动开关的第一端和第二端的宽度D1。
在本申请的一实施例中，更包括一补偿电路，包括：第五开关T50，所述第五开关T50的控制端501a耦接所述输出脉冲讯号Gn，所述第五开关T50的第一端501b耦接所述输出脉冲讯号Gn，所述第五开关的第二端耦接所述低预设电位。
在本申请的一实施例中，所述第五开关T50的第一端和第二端的宽度D2大于所述主动开关的第一端和第二端的宽度D1。
在本申请的一实施例中，所述补偿电路用以降低所述第四开关T40中的控制端401a与第一端401b的电位差。
在本申请的一实施例中，更包括一子下拉电路220，耦接所述第一节点P1(n)、所述输出脉冲讯号Gn及所述低预设电位Vss。
在本申请的一实施例中，更包括一子下拉电路控制器210，耦接所述低预设电位Vss及所述子下拉电路。
请再参考图3，以开关T1作为T10，T20，T30，T40和T50的例示，所述开关T1第一端30b和第二端30c之间的距离的L，其宽度为D2，且大于所述主动开关的第一端和第二端的宽度。于曲面型显示面板中，通过加大开关T1的第一端30b和第二端30c的宽度D2，使第一端30b和第二端30c在控制端30a上的投影面积与主动开关的第一端和第二端的宽度相同或相接近，甚至大于主动开关的宽度，可以使得所述开关T1保持良好电性性能，防止因电性性能不良，导致移位寄存电路失常，以及亮暗线问题的产生。
请同时参考图3和图4，在本申请的一实施例中，一种显示面板，包括第一基板，以及如上所述的阵列基板，与所述第一基板相对设置。其中，所述第一基板及所述阵列基板为柔性基板。
在本申请的一实施例中，越靠近所述阵列基板侧缘的所述第一开关T10，所述第二开关T20，所述第三开关T30，所述第四开关T40及所述第五开关T50的第一端和第二端的宽度D2越大。
在本申请的一实施例中，所述第一开关T10，所述第二开关T20，所述第三开关T30，所述第四开关T40及所述第五开关T50的第一端和第二端的宽度D2于水平面上的投影面积为相等。
在一些实施例中，本申请的显示面板可例如为液晶显示面板，如VA(垂直配向，Vertical Alignment)型显示面板，其可包括阵列(TFT，Thin Film Transistor)基板、彩膜(CF，Color Filter)基板与形成于两基板之间的液晶层。在一实施例中，本申请的主动阵列(TFT)及彩色滤光层(CF)可形成于同一基板上。
在一些实施例中，本申请的显示面板为曲面型显示面板。
在一些实施例中，通过加大移位寄存电路300的开关的第一端和第二端的宽度D2，使其于曲面型显示面板上，可以克服面板边缘曲率突变所造成的电性不良，提高显示效果和面板质量。
在一些实施例中，本申请的显示面板亦可例如为TN(扭曲向列，Twisted Nematic)、STN(超扭曲向列，Super Twisted Nematic)、OCB(光学补偿弯曲排列，Optically Compensated Birefringence)显示面板，或OLED(有机发光二极管，Organic Light Emitting Diode)显示面板及等离子体显示面板。
本申请通过加大移位寄存电路的开关(T10，T20，T30，T40，T50)的第一端和第二端的宽度D2，且使其于显示面板的不同曲率范围的开关亦有不同宽度的设计，可以解决柔性显示面板因曲率变化导致的开关电性不良，及其所引起的亮暗线问题。
“在一些实施例中”及“在各种实施例中”等用语被重复地使用。所述用语通常不是指相同的实施例；但它也可以是指相同的实施例。“包含”、“具有”及“包括”等用词是同义词，除非其前后文意显示出其它意思。
以上所述，仅是本申请的实施例，并非对本申请作任何形式上的限制，虽然本申请已以具体的实施例揭露如上，然而并非用以限定本申请，任何熟悉本专业的技术人员，在不脱离本申请技术方案范围内，当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本申请技术方案的内容，依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本申请技术方案的范围内。

Claims (15)

  1. 一种阵列基板，包括：
    一基板；
    多个主动开关，设置于所述基板上；以及
    一移位暂存电路，设置于所述基板上，并位于所述基板的侧缘，其中，所述移位暂存电路具有多级移位寄存器，每一级移位寄存器包括：
    第一开关，所述第一开关的控制端耦接第一节点，第一端耦接频率讯号，第二端耦接输出脉冲讯号；
    第二开关，所述第二开关的控制端和第一端耦接输入脉冲讯号，第二端耦接所述第一节点；
    第三开关，所述第三开关的控制端耦接第二节点，第一端耦接所述输出脉冲讯号，第二端耦接低预设电位；以及
    第四开关，所述第四开关的控制端耦接所述第二节点，第一端耦接所述第一节点，第二端耦接所述低预设电位；以及
    补偿电路，具有第五开关，所述第五开关的控制端耦接所述输出脉冲讯号，第一端耦接所述输出脉冲讯号，第二端耦接所述低预设电位；
    其中，所述第一开关，所述第二开关，所述第三开关及所述第四开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度。
  2. 如权利要求1所述的阵列基板，其中，所述第五开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度。
  3. 如权利要求1所述的阵列基板，其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端的宽度相同。
  4. 如权利要求1所述的阵列基板，其中，所述补偿电路降低所述第四开关中的控制端与第一端的电位差。
  5. 如权利要求1所述的阵列基板，其中，所述移位寄存器更包括一子下拉电路，耦接所述第一节点、所述输出脉冲讯号及所述低预设电位。
  6. 如权利要求5所述的阵列基板，其中，所述移位寄存器更包括一子下拉电路控制器，耦接所述低预设电位及所述子下拉电路。
  7. 一种阵列基板，包括：
    一基板；
    多个主动开关，设置于所述基板上；以及
    一移位暂存电路，设置于所述基板上，并位于所述基板的侧缘，其中，所述移位暂存电路具有多级移位寄存器，每一级移位寄存器包括：
    第一开关，所述第一开关的控制端耦接第一节点，第一端耦接频率讯号，第二端耦接输出脉冲讯号；
    第二开关，所述第二开关的控制端和第一端耦接输入脉冲讯号，第二端耦接所述第一节点；
    第三开关，所述第三开关的控制端耦接第二节点，第一端耦接所述输出脉冲讯号，第二端耦接低预设电位；
    第四开关，所述第四开关的控制端耦接所述第二节点，第一端耦接所述第一节点，第二端耦接所述低预设电位；以及
    补偿电路，具有第五开关，所述第五开关的控制端耦接所述输出脉冲讯号，第一端耦接所述输出脉冲讯号，第二端耦接所述低预设电位；
    其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端的宽度相同，且所述第一开关的第一端的宽度大于所述主动开关的第一端的宽度；
    其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端于水平面上的投影面积相等。
  8. 一种显示面板，包括：
    第一基板；以及
    阵列基板，与所述第一基板相对设置，所述阵列基板包括：
    一基板；
    多个主动开关，设置于所述基板上；以及
    一移位暂存电路，设置于所述基板上，并位于所述基板的侧缘，其中，所述移位暂存电路具有多级移位寄存器，每一级移位寄存器包括：
    第一开关，所述第一开关的控制端耦接第一节点，第一端耦接频率讯号，第二端耦接输出脉冲讯号；
    第二开关，所述第二开关的控制端和第一端耦接输入脉冲讯号，第二端耦接所述第一节点；
    第三开关，所述第三开关的控制端耦接第二节点，第一端耦接所述输出脉冲讯号，第二端耦接低预设电位；以及
    第四开关，所述第四开关的控制端耦接所述第二节点，第一端耦接所述第一节点，第二 端耦接所述低预设电位；以及
    补偿电路，具有第五开关，所述第五开关的控制端耦接所述输出脉冲讯号，第一端耦接所述输出脉冲讯号，第二端耦接所述低预设电位；
    其中，所述第一开关，所述第二开关，所述第三开关及所述第四开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度；
    其中，所述第一基板及所述阵列基板为柔性基板。
  9. 如权利要求8所述的显示面板，其中，越靠近所述阵列基板侧缘的所述第一开关，所述第二开关，所述第三开关，所述第四开关及所述第五开关的第一端和第二端的宽度越大。
  10. 如权利要求9所述的显示面板，其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关及所述第五开关的第一端和第二端于水平面上的投影面积相等。
  11. 如权利要求8所述的显示面板，其中，所述第五开关的第一端和第二端的宽度大于所述主动开关的第一端和第二端的宽度。
  12. 如权利要求8所述的显示面板，其中，所述第一开关，所述第二开关，所述第三开关，所述第四开关和所述第五开关的第一端和第二端的宽度相同。
  13. 如权利要求8所述的显示面板，其中，所述补偿电路降低所述第四开关中的控制端与第一端的电位差。
  14. 如权利要求8所述的显示面板，其中，所述移位寄存器更包括一子下拉电路，耦接所述第一节点、所述输出脉冲讯号及所述低预设电位。
  15. 如权利要求14所述的显示面板，其中，所述移位寄存器更包括一子下拉电路控制器，耦接所述低预设电位及所述子下拉电路。
PCT/CN2018/112920 2018-03-08 2018-10-31 阵列基板及显示面板 WO2019169881A1 (zh)

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