WO2016149995A1 - 电容分压式低色偏像素电路 - Google Patents

电容分压式低色偏像素电路 Download PDF

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WO2016149995A1
WO2016149995A1 PCT/CN2015/078827 CN2015078827W WO2016149995A1 WO 2016149995 A1 WO2016149995 A1 WO 2016149995A1 CN 2015078827 W CN2015078827 W CN 2015078827W WO 2016149995 A1 WO2016149995 A1 WO 2016149995A1
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capacitor
data signal
electrically connected
sub
main
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PCT/CN2015/078827
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English (en)
French (fr)
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徐洪远
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深圳市华星光电技术有限公司
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Priority to KR1020177022689A priority Critical patent/KR102107885B1/ko
Priority to JP2017545378A priority patent/JP6472066B2/ja
Priority to US14/758,956 priority patent/US9633619B2/en
Priority to GB1711833.2A priority patent/GB2550307B/en
Publication of WO2016149995A1 publication Critical patent/WO2016149995A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G09G2300/0447—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations for multi-domain technique to improve the viewing angle in a liquid crystal display, such as multi-vertical alignment [MVA]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a capacitor voltage division type low color shift pixel circuit.
  • LCD Liquid crystal display
  • PDAs personal digital assistants
  • digital cameras computer screens or laptop screens, etc.
  • liquid crystal displays which include a casing, a liquid crystal display panel disposed in the casing, and a backlight module disposed in the casing.
  • the liquid crystal display panel is the main component of the liquid crystal display, but the liquid crystal display panel itself does not emit light, and the light source provided by the backlight module needs to be used to display the image normally.
  • the liquid crystal display panel comprises a color filter substrate (CF), a thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate), and a liquid crystal layer (Liquid Crystal Layer) disposed between the two substrates.
  • the pixel electrode and the common electrode are respectively disposed on opposite sides of the two substrates, and the liquid crystal molecules are controlled to change direction by applying a voltage, and the light of the backlight module is refracted to generate a picture.
  • the liquid crystal display includes a Twisted Nematic (TN) mode, an Electronically Controlled Birefringence (ECB) mode, a Vertical Alignment (VA), and the like, wherein the VA mode is high.
  • TN Twisted Nematic
  • EB Electronically Controlled Birefringence
  • VA Vertical Alignment
  • Common display modes such as contrast, wide viewing angle, and no need for friction alignment.
  • the VA mode uses vertically rotating liquid crystals, the difference in birefringence of liquid crystal molecules is relatively large, resulting in a serious color shift problem at a large viewing angle.
  • the mainstream method for solving the color shift of the VA mode liquid crystal display is to adopt a multi-domain, such as a pixel design of an 8-domain display, so that the four domains and the sub-regions of the main sub-pixel within the same sub-pixel (sub) 4
  • the liquid crystal molecules of the domains have different rotation angles, thereby improving the color shift.
  • the color shift improvement technologies mainly include capacitive coupling (CC) technology, charge sharing (CS) technology, common electrode voltage (Vcom) modulation technology, and 2D1G/2G1D technology.
  • FIG. 1 is a diagram of a conventional pixel structure using 2D1G technology. As shown in FIG. 1 , a plurality of sub-pixels distributed in an array are included in a liquid crystal panel, and each sub-pixel is divided into areas. The main area Main and the sub-area Sub, the main area Main and the sub-sub Sub in the same row share a scanning line Gn, and the same column sub-pixel uses two different voltage data signal lines Data1, Data2 to input to the main area Main and the sub-area Sub respectively. Data signal.
  • FIG. 2 is a circuit diagram of a sub-pixel in the structure shown in FIG. 1. As shown in FIG.
  • the main area Main includes a first thin film transistor T1, a first liquid crystal capacitor Clc1, and a first storage capacitor Cst1; and the sub-region Sub includes a second thin film transistor T2, a second liquid crystal capacitor Clc2, and a second Storage capacitor Cst2.
  • the gate of the first thin film transistor T1 is electrically connected to the scan line Gn, and the source is electrically connected to the first data signal line Data1; the first liquid crystal capacitor Clc1 is connected in parallel with the first storage capacitor Cst1.
  • the other end is electrically connected to a constant voltage; in the sub-region Sub, the gate of the second thin film transistor T2 is electrically connected to the scan line Gn, and the source is electrically
  • the second liquid crystal capacitor Clc2 is connected in parallel with the second storage capacitor Cst2.
  • the other end is electrically connected to the drain of the second thin film transistor T2, and the other end is electrically connected to a constant voltage.
  • An object of the present invention is to provide a capacitive voltage division type low color shift pixel circuit, which can improve the color shift problem of the VA mode liquid crystal display without increasing the number of data signal lines and the number of COFs, and reduce the manufacturing cost of the liquid crystal panel.
  • the present invention provides a capacitive voltage division type low color shift pixel circuit in which a plurality of sub-pixel arrays are arranged in a liquid crystal panel, and each sub-pixel is divided into a main area and a sub-area; Connecting and providing a scan signal to the main area and the sub-area; a data signal line is electrically connected and provides a main data signal voltage to the main area, and the data signal line is electrically connected to the first capacitor and the second capacitor in series Connected to the common electrode line; a trace is drawn between the first capacitor and the second capacitor, electrically connected and provides a secondary data signal voltage different from the main data signal voltage to the secondary region.
  • the main area includes a first thin film transistor, a first liquid crystal capacitor, and a first storage capacitor; a gate of the first thin film transistor is electrically connected to the scan line, and a source is electrically connected to the data signal line; The first liquid crystal capacitor is electrically connected to the drain of the first thin film transistor in parallel with the first storage capacitor, and the other end is electrically connected to a constant voltage.
  • the second region includes a second thin film transistor, a second liquid crystal capacitor, and a second storage capacitor; a gate of the second thin film transistor is electrically connected to the scan line, and a source is electrically connected to the trace; Two liquid crystal capacitors are connected in parallel with the second storage capacitor, and one end is electrically connected to the second thin film transistor The drain is electrically connected to a constant voltage.
  • the primary and secondary regions respectively comprise four domains.
  • the data signal line provides a main data signal voltage to four domains in the main region, the trace providing a sub-data signal voltage to four domains in the sub-region, and a voltage division between the first capacitor and the second capacitor Under the action, the relationship between the main data signal voltage and the secondary data signal voltage is:
  • Vsub (C1/(C1+C2)) ⁇ (Vmain-Vcom)+Vcom
  • Vsub represents the secondary data signal voltage
  • Vmain represents the primary data signal voltage
  • C1 represents the first capacitance
  • C2 represents the second capacitance
  • Vcom represents the common electrode voltage
  • the first capacitor and the second capacitor are formed by the second metal layer and the first metal layer.
  • the first capacitor and the second capacitor are formed by the ITO pixel electrode and the first metal layer.
  • the sizes of the first capacitor and the second capacitor are respectively determined by the areas of the first capacitor and the second capacitor.
  • the capacitive voltage division type low color shift pixel circuit changes the data signal voltage difference between the main area and the sub area by changing the area of the first capacitor and the second capacitor.
  • the invention also provides a capacitor voltage division type low color shift pixel circuit, wherein a plurality of sub-pixel arrays are arranged in the liquid crystal panel, each sub-pixel is divided into a main area and a sub-area; a scan line is electrically connected at the same time and provides scanning Transmitting a signal to the main area and the sub-area; a data signal line is electrically connected and providing a main data signal voltage to the main area, and the data signal line is electrically connected to the common via the first capacitor and the second capacitor connected in series An electrode line; a trace is drawn between the first capacitor and the second capacitor, electrically connected and provides a secondary data signal voltage different from the main data signal voltage to the secondary region;
  • the main area includes a first thin film transistor, a first liquid crystal capacitor, and a first storage capacitor; a gate of the first thin film transistor is electrically connected to the scan line, and a source is electrically connected to the data signal line; The first liquid crystal capacitor is electrically connected to the drain of the first thin film transistor in parallel with the first storage capacitor, and the other end is electrically connected to a constant voltage;
  • the second region includes a second thin film transistor, a second liquid crystal capacitor, and a second storage capacitor; a gate of the second thin film transistor is electrically connected to the scan line, and a source is electrically connected to the trace; The second liquid crystal capacitor is electrically connected to the drain of the second thin film transistor in parallel with the second storage capacitor, and the other end is electrically connected to a constant voltage.
  • the present invention provides a capacitive voltage division type low color shift pixel circuit electrically connected through a data signal line and providing a main data signal voltage to a main area of a sub-pixel, and the data signal line
  • the first capacitor and the second capacitor are electrically connected to the common electrode line through a series, and a trace is drawn between the first capacitor and the second capacitor to electrically connect and provide a secondary data signal voltage to the sub-pixel.
  • the secondary data signal voltage is different from the main data signal voltage, and can be implemented by setting a strip
  • the data signal line inputs different data signal voltages to the main area and the sub-area of the sub-pixel for multi-domain display, improves the color shift problem of the VA mode liquid crystal display, and does not increase the number of data signal lines and the number of COFs, and reduces The manufacturing cost of the liquid crystal display panel.
  • Figure 1 is a conventional pixel structure diagram using 2D1G technology
  • 2 is a conventional pixel circuit diagram using 2D1G technology
  • FIG. 3 is a circuit diagram of a capacitive voltage division type low color shift pixel circuit of the present invention.
  • the present invention provides a capacitor voltage division type low color shift pixel circuit.
  • a plurality of sub-pixel arrays are arranged in the liquid crystal panel, and each sub-pixel is divided into a main area Main and a sub-area Sub.
  • a scan line Gn is electrically connected at the same time and provides a scan signal to the main area Main and the sub-area Sub.
  • a data signal line Data is electrically connected and provides a main data signal voltage to the main area Main, and the data signal line Data is electrically connected to the common electrode line Com via the first capacitor C1 and the second capacitor C2 connected in series.
  • a trace L is drawn between the first capacitor C1 and the second capacitor C2, electrically connected and provides a secondary data signal voltage to the sub-region Sub.
  • the first transistor C1 and the second capacitor C2 may Formed by the second metal layer and the first metal layer, or formed by the ITO pixel electrode and the first metal layer, the structure and position of the specific first metal layer, the second metal layer and the pixel electrode are prior art, no longer Detailed.
  • the sizes of the first capacitor C1 and the second capacitor C2 are respectively determined by the areas of the first capacitor C1 and the second capacitor C2.
  • the main area Main includes a first thin film transistor T1, a first liquid crystal capacitor Clc1, and a first storage capacitor Cst1.
  • the gate of the first thin film transistor T1 is electrically connected to the scan line Gn, and the source is electrically connected to the data signal line Data; the first liquid crystal capacitor Clc1 and the first storage capacitor
  • the Cst1 is connected in parallel with one end electrically connected to the drain of the first thin film transistor T1, and the other end is electrically connected to a constant voltage.
  • the sub-region Sub includes a second thin film transistor T2, a second liquid crystal capacitor Clc2, and a second storage capacitor Cst2.
  • the gate of the second thin film transistor T2 is electrically connected to the scan line Gn, and the source is electrically connected to the trace L; the second liquid crystal capacitor Clc2 is connected in parallel with the second storage capacitor Cst2, and one end is electrically connected to the second
  • the drain of the thin film transistor T2 is electrically connected to a constant voltage.
  • main area Main and the sub-area Sub respectively include multiple domains, for example, the main area Main and the sub-area Sub respectively include four domains, and the data signal line Data provides the main domain to four domains in the main area Main.
  • the trace L provides a secondary data signal voltage to the four domains in the sub-region Sub, and the main data signal voltage and the second voltage C1 under the partial pressure of the first capacitor C1 and the second capacitor C2
  • the relationship between the data signal voltages is:
  • Vsub (C1/(C1+C2)) ⁇ (Vmain-Vcom)+Vcom (1)
  • Vsub represents the secondary data signal voltage
  • Vmain represents the primary data signal voltage
  • C1 represents the first capacitance
  • C2 represents the second capacitance
  • Vcom represents the common electrode voltage
  • the secondary data signal voltage is different from the main data signal voltage, and the pixel circuit can only input one data signal line Data to input different data signal voltages to the main area Main and the sub area Sub of the sub-pixel, which can be performed more.
  • the domain display improves the color shift problem of the VA mode liquid crystal display, and does not increase the number of data signal lines and the number of COFs, thereby reducing the manufacturing cost of the liquid crystal display panel.
  • the main data is known.
  • the difference between the signal voltage and the secondary data signal voltage that is, the voltage difference between the data signals of the main area Main and the sub-sub Sub is affected by the magnitudes of the first capacitor C1 and the second capacitor C2, by changing the first capacitor C1 and the second
  • the area of the capacitor C2 can change the voltage difference of the data signals of the main area Main and the sub area Sub.
  • the capacitive voltage division type low color shift pixel circuit of the present invention is electrically connected through a data signal line and provides a main data signal voltage to the main area of the sub-pixel, and the data signal line is connected in series.
  • a capacitor and a second capacitor are electrically connected to the common electrode line, and are electrically connected between the first capacitor and the second capacitor by providing a trace, electrically connecting and providing a secondary data signal voltage to the sub-pixel sub-region;
  • the voltage of the secondary data signal is different from the voltage of the primary data signal by the voltage division of the first capacitor and the second capacitor, and can input different data signals to the primary and secondary regions of the sub-pixel by setting a data signal line.
  • the voltage is used for multi-domain display to improve the color shift problem of the VA mode liquid crystal display, and does not increase the number of data signal lines and the number of COFs, thereby reducing the manufacturing cost of the liquid crystal display panel.

Abstract

一种电容分压式低色偏像素电路，通过一数据信号线(Data)电性连接并提供主数据信号电压至子像素的主区(Main)，并将所述数据信号线(Data)经由串联的第一电容(C1)与第二电容(C2)电性连接至公共电极线(Com)，通过设置一走线(L)由所述第一电容(C1)与第二电容(C2)之间引出，电性连接并提供次数据信号电压至子像素的次区(Sub)；在所述第一电容(C1)与第二电容(C2)的分压作用下，所述次数据信号电压不同于主数据信号电压，能够实现通过设置一条数据信号线(Data)向子像素的主区(Main)与次区(Sub)输入不同的数据信号电压，以进行多畴显示，改善VA模式液晶显示器的色偏问题，且不增加数据信号线的条数与COF数目。

Description

电容分压式低色偏像素电路 技术领域
本发明涉及显示技术领域，尤其涉及一种电容分压式低色偏像素电路。
背景技术
液晶显示器(Liquid Crystal Display，LCD)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。如：液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括壳体、设于壳体内的液晶显示面板及设于壳体内的背光模组。液晶显示面板是液晶显示器的主要组件，但液晶显示面板本身不发光，需要借由背光模组提供的光源来正常显示影像。
通常液晶显示面板由一彩色滤光片基板(Color Filter，CF)、一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成，并分别在两基板的相对内侧设置像素电极、公共电极，通过施加电压控制液晶分子改变方向，将背光模组的光线折射出来产生画面。
液晶显示器包括扭曲向列(Twisted Nematic，TN)模式、电子控制双折射(Electrically Controlled Birefringence，ECB)模式、垂直配向(Vertical Alignment，VA)等多种显示模式，其中，VA模式是一种具有高对比度、宽视野角、无须摩擦配向等优势的常见显示模式。但由于VA模式采用垂直转动的液晶，液晶分子双折射率的差异比较大，导致大视角下的色偏(color shift)问题比较严重。
降低色偏是VA模式液晶显示器的发展要求。目前解决VA模式液晶显示器色偏的主流方法是采用多畴(multi domain)，如8畴显示的像素设计，使同一个子像素内主区(main)的4个畴与次区(sub)的4个畴的液晶分子转动角度不一样，从而改善色偏。色偏改善技术主要有电容耦合(CC)技术、电荷分享(CS)技术、公共电极电压(Vcom)调制技术、2D1G/2G1D技术等。
请参阅图1，图1为传统的采用2D1G技术的像素结构图。如图1所示，在液晶面板中包括多个呈阵列分布的子像素，且每一子像素分为面积不等 的主区Main与次区Sub，同一行的主区Main与次区Sub共用一条扫描线Gn，同一列子像素采用两条不同电压的数据信号线Data1、Data2分别向主区Main与次区Sub输入数据信号。请参阅图2，图2为图1所示结构中一个子像素的电路图。如图2所示，主区Main中包括第一薄膜晶体管T1、第一液晶电容Clc1、及第一存储电容Cst1；次区Sub中包括第二薄膜晶体管T2、第二液晶电容Clc2、及第二存储电容Cst2。主区Main中，所述第一薄膜晶体管T1的栅极电性连接于扫描线Gn，源极电性连接于第一数据信号线Data1；第一液晶电容Clc1与第一存储电容Cst1并联后一端电性连接于第一薄膜晶体管T1的漏极，另一端电性连接于一恒定电压；次区Sub中，所述第二薄膜晶体管T2的栅极电性连接于扫描线Gn，源极电性连接于第二数据信号线Data2；第二液晶电容Clc2与第二存储电容Cst2并联后一端电性连接于第二薄膜晶体管T2的漏极，另一端电性连接于一恒定电压。如图1、图2所示的传统像素电路设计虽然能够实现多畴显示，改善色偏，但这种设计需要将数据信号线的数目增加一倍，同样数据信号线的覆晶薄膜(Chip on Film，COF)的数目也需增倍，面板成本会增高。
发明内容
本发明的目的在于提供一种电容分压式低色偏像素电路，在不增加数据信号线条数与COF数目的前提下改善VA模式液晶显示器的色偏问题，降低液晶面板的制造成本。
为实现上述目的，本发明提供一种电容分压式低色偏像素电路，多个子像素阵列排布于液晶面板中，每一子像素均分为主区与次区；一扫描线同时电性连接并提供扫描信号至所述主区与次区；一数据信号线电性连接并提供主数据信号电压至所述主区，且所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线；一走线由所述第一电容与第二电容之间引出，电性连接并提供不同于主数据信号电压的次数据信号电压至所述次区。
所述主区中包括第一薄膜晶体管、第一液晶电容、及第一存储电容；所述第一薄膜晶体管的栅极电性连接于扫描线，源极电性连接于数据信号线；所述第一液晶电容与第一存储电容并联后一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于一恒定电压。
所述次区中包括第二薄膜晶体管、第二液晶电容、及第二存储电容；所述第二薄膜晶体管的栅极电性连接于扫描线，源极电性连接于走线；所述第二液晶电容与第二存储电容并联后一端电性连接于第二薄膜晶体管的 漏极，另一端电性连接于一恒定电压。
所述主区与次区分别包括4个畴。
所述数据信号线向主区内的4个畴提供主数据信号电压，所述走线向次区内的4个畴提供次数据信号电压，在所述第一电容与第二电容的分压作用下，所述主数据信号电压与次数据信号电压的关系为：
Vsub＝(C1/(C1+C2))×(Vmain-Vcom)+Vcom
其中，Vsub表示次数据信号电压，Vmain表示主数据信号电压，C1表示第一电容，C2表示第二电容，Vcom表示公共电极电压。
通过第二金属层与第一金属层形成所述第一电容、及第二电容。
通过ITO像素电极与第一金属层形成所述第一电容、及第二电容。
所述第一电容、第二电容的大小分别由所述第一电容、第二电容的面积确定。
所述电容分压式低色偏像素电路，通过改变第一电容与第二电容的面积来改变主区与次区的数据信号电压差。
本发明还提供一种电容分压式低色偏像素电路，多个子像素阵列排布于液晶面板中，每一子像素均分为主区与次区；一扫描线同时电性连接并提供扫描信号至所述主区与次区；一数据信号线电性连接并提供主数据信号电压至所述主区，且所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线；一走线由所述第一电容与第二电容之间引出，电性连接并提供不同于主数据信号电压的次数据信号电压至所述次区；
其中，所述主区中包括第一薄膜晶体管、第一液晶电容、及第一存储电容；所述第一薄膜晶体管的栅极电性连接于扫描线，源极电性连接于数据信号线；所述第一液晶电容与第一存储电容并联后一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于一恒定电压；
其中，所述次区中包括第二薄膜晶体管、第二液晶电容、及第二存储电容；所述第二薄膜晶体管的栅极电性连接于扫描线，源极电性连接于走线；所述第二液晶电容与第二存储电容并联后一端电性连接于第二薄膜晶体管的漏极，另一端电性连接于一恒定电压。
本发明的有益效果：本发明提供的一种电容分压式低色偏像素电路，通过一数据信号线电性连接并提供主数据信号电压至子像素的主区，并将所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线，通过设置一走线由所述第一电容与第二电容之间引出，电性连接并提供次数据信号电压至子像素的次区；在所述第一电容与第二电容的分压作用下，所述次数据信号电压不同于主数据信号电压，能够实现通过设置一条 数据信号线向子像素的主区与次区输入不同的数据信号电压，以进行多畴显示，改善VA模式液晶显示器的色偏问题，且不增加数据信号线的条数与COF数目，降低了液晶显示面板的制造成本。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为传统的采用2D1G技术的像素结构图；
图2为传统的采用2D1G技术的像素电路图；
图3为本发明的电容分压式低色偏像素电路的电路图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图3，本发明提供一种电容分压式低色偏像素电路。多个子像素阵列排布于液晶面板中，每一子像素均分为主区Main与次区Sub。一扫描线Gn同时电性连接并提供扫描信号至所述主区Main与次区Sub。一数据信号线Data电性连接并提供主数据信号电压至所述主区Main，且所述数据信号线Data经由串联的第一电容C1与第二电容C2电性连接至公共电极线Com。一走线L由所述第一电容C1与第二电容C2之间引出，电性连接并提供次数据信号电压至所述次区Sub。
具体地，由于液晶显示面板的薄膜晶体管阵列基板包括第一金属层、第二金属层、及氧化铟锡(Indium Tin Oxide，ITO)像素电极，所述第一电容C1、及第二电容C2可以通过第二金属层与第一金属层形成，也可以通过ITO像素电极与第一金属层形成，具体的第一金属层、第二金属层和像素电极的结构及位置为现有技术，不再详述。所述第一电容C1、第二电容C2的大小分别由所述第一电容C1、第二电容C2的面积确定。
所述主区Main中包括第一薄膜晶体管T1、第一液晶电容Clc1、及第一存储电容Cst1。所述第一薄膜晶体管T1的栅极电性连接于扫描线Gn，源极电性连接于数据信号线Data；所述第一液晶电容Clc1与第一存储电容 Cst1并联后一端电性连接于第一薄膜晶体管T1的漏极，另一端电性连接于一恒定电压。
所述次区Sub中包括第二薄膜晶体管T2、第二液晶电容Clc2、及第二存储电容Cst2。所述第二薄膜晶体管T2的栅极电性连接于扫描线Gn，源极电性连接于走线L；所述第二液晶电容Clc2与第二存储电容Cst2并联后一端电性连接于第二薄膜晶体管T2的漏极，另一端电性连接于一恒定电压。
进一步地，所述主区Main与次区Sub分别包括多畴，例如所述主区Main与次区Sub分别包括4个畴，所述数据信号线Data向主区Main内的4个畴提供主数据信号电压，所述走线L向次区Sub内的4个畴提供次数据信号电压，在所述第一电容C1与第二电容C2的分压作用下，所述主数据信号电压与次数据信号电压的关系为：
Vsub＝(C1/(C1+C2))×(Vmain-Vcom)+Vcom    (1)
其中，Vsub表示次数据信号电压，Vmain表示主数据信号电压，C1表示第一电容，C2表示第二电容，Vcom表示公共电极电压。
由此可见，所述次数据信号电压不同于主数据信号电压，该像素电路仅设置一条数据信号线Data即可向子像素的主区Main与次区Sub输入不同的数据信号电压，能够进行多畴显示，改善VA模式液晶显示器的色偏问题，且不增加数据信号线的条数与COF数目，能够降低液晶显示面板的制造成本。
值得一提的是，由于所述第一电容C1、第二电容C1、C2的大小分别由所述第一电容C1、第二电容C2的面积确定，根据(1)式可知：所述主数据信号电压与次数据信号电压之间的差值，即主区Main与次区Sub的数据信号电压差受到第一电容C1与第二电容C2的大小的影响，通过改变第一电容C1与第二电容C2的面积即可改变主区Main与次区Sub的数据信号电压差。
综上所述，本发明的电容分压式低色偏像素电路，通过一数据信号线电性连接并提供主数据信号电压至子像素的主区，并将所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线，通过设置一走线由所述第一电容与第二电容之间引出，电性连接并提供次数据信号电压至子像素的次区；在所述第一电容与第二电容的分压作用下，所述次数据信号电压不同于主数据信号电压，能够实现通过设置一条数据信号线向子像素的主区与次区输入不同的数据信号电压，以进行多畴显示，改善VA模式液晶显示器的色偏问题，且不增加数据信号线的条数与COF数目，降低了液晶显示面板的制造成本。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (16)

  1. 一种电容分压式低色偏像素电路，多个子像素阵列排布于液晶面板中，每一子像素均分为主区与次区；一扫描线同时电性连接并提供扫描信号至所述主区与次区；一数据信号线电性连接并提供主数据信号电压至所述主区，且所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线；一走线由所述第一电容与第二电容之间引出，电性连接并提供不同于主数据信号电压的次数据信号电压至所述次区。
  2. 如权利要求1所述的电容分压式低色偏像素电路，其中，所述主区中包括第一薄膜晶体管、第一液晶电容、及第一存储电容；所述第一薄膜晶体管的栅极电性连接于扫描线，源极电性连接于数据信号线；所述第一液晶电容与第一存储电容并联后一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于一恒定电压。
  3. 如权利要求1所述的电容分压式低色偏像素电路，其中，所述次区中包括第二薄膜晶体管、第二液晶电容、及第二存储电容；所述第二薄膜晶体管的栅极电性连接于扫描线，源极电性连接于走线；所述第二液晶电容与第二存储电容并联后一端电性连接于第二薄膜晶体管的漏极，另一端电性连接于一恒定电压。
  4. 如权利要求1所述的电容分压式低色偏像素电路，其中，所述主区与次区分别包括4个畴。
  5. 如权利要求4所述的电容分压式低色偏像素电路，其中，所述数据信号线向主区内的4个畴提供主数据信号电压，所述走线向次区内的4个畴提供次数据信号电压，在所述第一电容与第二电容的分压作用下，所述主数据信号电压与次数据信号电压的关系为：
    Vsub＝(C1/(C1+C2))×(Vmain-Vcom)+Vcom
    其中，Vsub表示次数据信号电压，Vmain表示主数据信号电压，C1表示第一电容，C2表示第二电容，Vcom表示公共电极电压。
  6. 如权利要求1所述的电容分压式低色偏像素电路，其中，通过第二金属层与第一金属层形成所述第一电容、及第二电容。
  7. 如权利要求1所述的电容分压式低色偏像素电路，其中，通过ITO像素电极与第一金属层形成所述第一电容、及第二电容。
  8. 如权利要求1所述的电容分压式低色偏像素电路，其中，所述第一电容、第二电容的大小分别由所述第一电容、第二电容的面积确定。
  9. 如权利要求8所述的电容分压式低色偏像素电路，其中，通过改变第一电容与第二电容的面积来改变主区与次区的数据信号电压差。
  10. 一种电容分压式低色偏像素电路，多个子像素阵列排布于液晶面板中，每一子像素均分为主区与次区；一扫描线同时电性连接并提供扫描信号至所述主区与次区；一数据信号线电性连接并提供主数据信号电压至所述主区，且所述数据信号线经由串联的第一电容与第二电容电性连接至公共电极线；一走线由所述第一电容与第二电容之间引出，电性连接并提供不同于主数据信号电压的次数据信号电压至所述次区；
    其中，所述主区中包括第一薄膜晶体管、第一液晶电容、及第一存储电容；所述第一薄膜晶体管的栅极电性连接于扫描线，源极电性连接于数据信号线；所述第一液晶电容与第一存储电容并联后一端电性连接于第一薄膜晶体管的漏极，另一端电性连接于一恒定电压；
    其中，所述次区中包括第二薄膜晶体管、第二液晶电容、及第二存储电容；所述第二薄膜晶体管的栅极电性连接于扫描线，源极电性连接于走线；所述第二液晶电容与第二存储电容并联后一端电性连接于第二薄膜晶体管的漏极，另一端电性连接于一恒定电压。
  11. 如如权利要求10所述的电容分压式低色偏像素电路，其中，所述主区与次区分别包括4个畴。
  12. 如权利要求11所述的电容分压式低色偏像素电路，其中，所述数据信号线向主区内的4个畴提供主数据信号电压，所述走线向次区内的4个畴提供次数据信号电压，在所述第一电容与第二电容的分压作用下，所述主数据信号电压与次数据信号电压的关系为：
    Vsub＝(C1/(C1+C2))×(Vmain-Vcom)+Vcom
    其中，Vsub表示次数据信号电压，Vmain表示主数据信号电压，C1表示第一电容，C2表示第二电容，Vcom表示公共电极电压。
  13. 如权利要求10所述的电容分压式低色偏像素电路，其中，通过第二金属层与第一金属层形成所述第一电容、及第二电容。
  14. 如权利要求10所述的电容分压式低色偏像素电路，其中，通过ITO像素电极与第一金属层形成所述第一电容、及第二电容。
  15. 如权利要求10所述的电容分压式低色偏像素电路，其中，所述第一电容、第二电容的大小分别由所述第一电容、第二电容的面积确定。
  16. 如权利要求15所述的电容分压式低色偏像素电路，其中，通过改变第一电容与第二电容的面积来改变主区与次区的数据信号电压差。
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