WO2016176894A1 - Tft阵列基板 - Google Patents

Tft阵列基板 Download PDF

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Publication number
WO2016176894A1
WO2016176894A1 PCT/CN2015/081723 CN2015081723W WO2016176894A1 WO 2016176894 A1 WO2016176894 A1 WO 2016176894A1 CN 2015081723 W CN2015081723 W CN 2015081723W WO 2016176894 A1 WO2016176894 A1 WO 2016176894A1
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Prior art keywords
sub
pixels
main
region
pixel
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PCT/CN2015/081723
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English (en)
French (fr)
Inventor
曹尚操
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深圳市华星光电技术有限公司
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Priority to US14/771,205 priority Critical patent/US20160351151A1/en
Publication of WO2016176894A1 publication Critical patent/WO2016176894A1/zh

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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Definitions

  • the present invention relates to the field of display technologies, and in particular, to a TFT array substrate.
  • LCD Liquid crystal display
  • PDAs personal digital assistants
  • digital cameras computer screens or laptop screens, etc.
  • the liquid crystal display panel comprises a color filter substrate (CF), a thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate), and a liquid crystal layer (Liquid Crystal Layer) disposed between the two substrates.
  • the pixel electrode and the common electrode are respectively disposed on opposite sides of the two substrates, and the liquid crystal molecules are controlled to change direction by applying a voltage, and the light of the backlight module is refracted to generate a picture.
  • a plurality of R, G, and B sub-pixels arranged in an array, a plurality of scanning lines, and a plurality of data lines are formed on the TFT array substrate. Each sub-pixel receives a scan signal through a corresponding scan line and receives a data signal through a corresponding data line to display an image.
  • the VA type liquid crystal display panel has extremely high contrast ratio compared with other types of liquid crystal display panels, and has a very wide application in large-size display, such as television.
  • the VA type liquid crystal display panel adopts a vertically rotating liquid crystal, the difference in birefringence of the liquid crystal molecules is relatively large, resulting in a serious color shift problem at a large viewing angle, so that the VA type liquid crystal display panel is seen from different angles. The difference in brightness is large, causing distortion of the picture.
  • a TFT array substrate using 2D1G technology includes a plurality of sub-pixels arranged in an array, and each sub-pixel is divided into a main area Main and a sub-sub Sub, and a main area of each sub-pixel.
  • Main is connected to a main area TFT
  • the sub-area Sub of each sub-pixel is connected to the primary area TFT
  • one scanning line Gate is set corresponding to each row of sub-pixels, and the sub-area data lines respectively located on the left and right sides of each sub-pixel are set.
  • the sub-region TFT supplies the sub-data signal Sdata to the sub-region Sub
  • the main-region data line supplies the main data signal Mdata to the main region Main through the main-region TFT.
  • the potential difference between the main data signal Mdata and the common voltage COM is greater than the potential difference between the secondary data signal Sdata and the common voltage COM, so that the charging rates of the main area Main and the sub-region Sub are different. In order to improve the color reproduction degree and improve the color shift from different perspectives.
  • An object of the present invention is to provide a TFT array substrate capable of improving the color shift problem of a VA liquid crystal display panel without reducing the number of data lines and reducing the cost of the liquid crystal display panel.
  • the present invention provides a TFT array substrate, including: a display area and a non-display area;
  • the display area is provided with:
  • Each sub-pixel is divided into a main area and a sub-area; a main area of each sub-pixel is connected to a main area TFT, and a sub-area of each sub-pixel is connected to the primary area TFT;
  • an upper scan line and a lower scan line respectively located on the upper and lower sides of the row of sub-pixels;
  • one data line between the adjacent two columns of sub-pixels is disposed;
  • the data lines include: a main data line, a sub-data line, the main data line, and a sub-data line edge
  • the horizontal direction is alternately arranged in sequence; the main area of each sub-pixel located on each side of each main data line is electrically connected to the main data line through the corresponding main area TFT, and each sub-pixel located on each side of each sub-data line
  • the secondary region is electrically connected to the secondary data line through the corresponding secondary region TFT;
  • the non-display area is provided with:
  • a source driver located above the display area, a first GOA driving circuit respectively located on the left and right sides of the display area, and a second GOA driving circuit;
  • the source driver generates a main data signal, and corresponds to the secondary data signal and transmits the data to the primary data line and the secondary data line;
  • the first GOA driving circuit and the second GOA driving circuit respectively drive all the scanning lines bilaterally on the left and right sides of the display area.
  • the gate of the main-region TFT corresponding to each sub-pixel is connected to the upper scan line or the lower scan line, and the gate of the sub-region TFT is connected to another scan line different from the scan line connected to the main-region TFT gate.
  • a scan line is connected to the gate of the main-region TFT corresponding to each sub-pixel.
  • the sub-pixels of each adjacent two columns are arranged in the same manner, and both the main area is located above the sub-area, or the sub-area is located above the main area.
  • the sub-pixels of each adjacent two columns are arranged differently, wherein one column of sub-pixels sets the main area above the sub-area, and another column of sub-pixels sets the sub-area above the main area.
  • one of the main-region TFTs has a gate connection corresponding to the upper scan line of the row of sub-pixels, and the other main-region TFT The gate connection corresponds to the lower scan line of the row of sub-pixels.
  • the gate connection of the corresponding main-region TFT corresponds to the upper scan line of the row of sub-pixels; for the sub-pixels whose sub-region is located above the main region, correspondingly The gate of the main area TFT is connected to the lower scan line of the row of sub-pixels.
  • the plurality of sub-pixels arranged in the array include: red sub-pixels, green sub-pixels, and blue sub-pixels which are alternately arranged in the horizontal direction.
  • the gates of all the main-region TFTs connected to the red sub-pixel main region are connected to the upper scan lines of the sub-pixels, and the gate connections of all the sub-region TFTs connected to the red sub-pixel sub-regions are corresponding.
  • the upper scan line of the sub-pixel, the gate of the main-region TFT connected to the main region of the green sub-pixel is connected to the lower scan line of the sub-pixel, and the gate connection of all the sub-region TFTs connected to the sub-region of the green sub-pixel corresponds to The lower scan line of the sub-pixel causes the red sub-pixel to charge prior to the green sub-pixel.
  • the gates of all the main-region TFTs connected to the green sub-pixel main region are connected to the upper scan lines of the sub-pixels, and the gate connections of all the sub-region TFTs connected to the sub-regions of the green sub-pixels are corresponding.
  • the upper scan line of the sub-pixel, the gate of the main-region TFT connected to the main region of the red sub-pixel is connected to the lower scan line of the sub-pixel, and the gate connection of all the sub-region TFTs connected to the red sub-pixel sub-region corresponds to
  • the lower scan line of the sub-pixel causes the green sub-pixel to charge prior to the red sub-pixel.
  • a potential difference between the main data signal and a common voltage is greater than a potential difference between the secondary data signal and a common voltage.
  • the invention also provides a TFT array substrate, comprising: a display area and a non-display area;
  • the display area is provided with:
  • Each sub-pixel is divided into a main area and a sub-area; the main area of each sub-pixel is connected to a main area TFT, a sub-region of each sub-pixel is connected to the primary region TFT;
  • an upper scan line and a lower scan line respectively located on the upper and lower sides of the row of sub-pixels;
  • one data line between the adjacent two columns of sub-pixels is disposed;
  • the data lines include: a main data line, a sub-data line, the main data line, and a sub-data line edge
  • the horizontal direction is alternately arranged in sequence; the main area of each sub-pixel located on each side of each main data line is electrically connected to the main data line through the corresponding main area TFT, and each sub-pixel located on each side of each sub-data line
  • the secondary region is electrically connected to the secondary data line through the corresponding secondary region TFT;
  • the non-display area is provided with:
  • a source driver located above the display area, a first GOA driving circuit respectively located on the left and right sides of the display area, and a second GOA driving circuit;
  • the source driver generates a main data signal, and corresponds to the secondary data signal and transmits the data to the primary data line and the secondary data line;
  • the first GOA driving circuit and the second GOA driving circuit respectively perform bilateral driving on all scanning lines on the left and right sides of the display area;
  • the gate of the main-region TFT corresponding to each sub-pixel is connected to the upper scan line or the lower scan line, and the gate connection of the sub-region TFT is different from the scan line connected to the main-area TFT gate.
  • the plurality of sub-pixels arranged in the array include: red sub-pixels, green sub-pixels, and blue sub-pixels which are alternately arranged in the horizontal direction;
  • the potential difference between the main data signal and the common voltage is greater than the potential difference between the secondary data signal and the common voltage.
  • the number of scan lines is increased by half, and the data lines are divided into main data, compared with the conventional TFT array substrate using 2D1G technology.
  • the line and the secondary data line are controlled by the main data line to control the main area of the sub-pixels on both sides thereof, and the secondary data line controls the sub-area of the sub-pixels on both sides thereof, and a GOA is respectively set on the left and right sides of the display area.
  • the driving circuit performs bilateral driving on all the scanning lines, which can improve the color shift problem of the VA type liquid crystal display panel, ensure the charging efficiency, and reduce the cost of the liquid crystal panel.
  • 1 is a schematic view of a conventional TFT array substrate using 2D1G technology
  • FIG. 2 is a waveform diagram corresponding to the primary and secondary data signals in FIG. 1;
  • FIG. 3 is a schematic structural view of a TFT array substrate of the present invention.
  • FIG. 4 is a schematic view showing a first embodiment of a display area of a TFT array substrate of the present invention.
  • FIG. 5 is a schematic view showing a second embodiment of a display area of a TFT array substrate of the present invention.
  • FIG. 6 is a schematic view showing a third embodiment of a display area of a TFT array substrate of the present invention.
  • Figure 7 is a schematic view showing a fourth embodiment of the display region of the TFT array substrate of the present invention.
  • the invention provides a TFT array substrate.
  • the TFT array substrate includes: a display area 1, and a non-display area 2 disposed around the display area 1.
  • the display area 1 is provided with: a plurality of vertical data lines arranged in parallel and arranged in sequence, a plurality of horizontal scanning lines arranged in parallel and arranged in sequence, and a plurality of sub-pixels arranged in an array.
  • Each sub-pixel is divided into a main area (illustrated by a rectangle having a small area) and a sub-area (illustrated by a rectangle having a larger area); a main area of each sub-pixel is connected to a main area TFTTM, each sub-pixel The secondary zone is connected to the primary zone TFT TS.
  • the sub-pixels of each adjacent two columns are arranged in the same manner, and the main area is disposed above the sub-area, and of course, the sub-area is located in the main area. Above (not shown).
  • an upper scan line Gate and a lower scan line Gate' respectively located on the upper and lower sides of the row of sub-pixels, and the upper scan line Gate control corresponding to the main-region TFT TM and the sub-region TFT TS connected thereto
  • the lower scan line Gate' controls the main area TFTTM and the sub-region TFT TS connected thereto.
  • a data line between the adjacent two columns of sub-pixels is disposed; the data lines include: a main data line MD, a sub-data line SD, the main data line MD, and a second The data lines SD are alternately arranged in the horizontal direction.
  • a main area of each sub-pixel located on each side of each main data line MD is electrically connected to the main data line MD through a corresponding main area TFT TM, and a sub-area of each sub-pixel located on each side of each sub-data line SD
  • the secondary data line SD is electrically connected to the corresponding secondary region TFT TS.
  • the gate of the main region TFTTM corresponding to each sub-pixel is connected to the upper scan line Gate or the lower scan line Gate', and the gate connection of the sub-region TFT TS is different from the scan line connected to the gate of the main-region TFTTM.
  • Another scan line further, in the same row of sub-pixels, correspondingly connected to two main regions TFTTM of each adjacent two columns of sub-pixel main regions, wherein a gate connection of one main region TFTTM corresponds to the row of sub-pixels
  • the upper scan line Gate, the gate of the other main region TFTTM is connected to the lower scan line Gate' of the row of sub-pixels. For example, in the sub-pixel of the first row and the first column of FIG.
  • the gate of the corresponding main-region TFT TM is electrically connected to the upper scan line Gate
  • the gate of the sub-region TFT TS is electrically connected to the lower scan line Gate.
  • the sub-pixels of the first row and the second column in FIG. 4 are electrically connected to the gate of the corresponding main-region TFT TM to the lower scan line Gate'
  • the gate of the sub-region TFT TS is electrically connected to the upper portion. Scan line Gate.
  • the non-display area 2 is provided with a source driver 22 located above the display area 1, a first GOA driving circuit 21 located on the left and right sides of the display area 1, and a second GOA driving circuit 23.
  • the source driver 22 generates a main data signal Main data and a secondary data signal Sub data, and is correspondingly transmitted to the main data line MD and the secondary data line SD.
  • the potential difference between the main data signal Main data and the common voltage is set to be larger than the sub-data signal Sub data and the The potential difference between the common voltages.
  • the first GOA driving circuit 21 and the second GOA driving circuit 23 respectively perform bilateral driving on all the scanning lines on the left and right sides of the display area 1, that is, the first GOA driving circuit 21 performs all scanning lines from left to right. At the same time, the second GOA driving circuit 23 drives all the scanning lines from right to left.
  • the TFT array substrate of the present invention increases the number of scan lines to halve the number of data lines, and divides the data lines into the main data line MD and the sub data line SD.
  • the main data line MD controls the main area of the sub-pixels on both sides thereof, and the sub-area of the sub-pixels on both sides thereof is controlled by the sub-data line SD, and the first GOA driving circuit 21 and the left and right sides of the display area 1 are respectively disposed.
  • the second GOA driving circuit 23 performs bilateral driving on all the scanning lines, thereby improving the color shift problem of the VA type liquid crystal display panel, ensuring charging efficiency, and reducing the cost of the liquid crystal panel.
  • FIG. 5 is a second embodiment of a display area 1 of a TFT array substrate according to the present invention.
  • the second embodiment differs from the first embodiment in that, in the same row of sub-pixels, each adjacent two columns The sub-pixels are arranged in a different manner, wherein one column of sub-pixels sets the main area above the sub-area, and another column of sub-pixels sets the sub-area above the main area.
  • the gate connection of the corresponding main-area TFT TM corresponds to the upper scan line Gate of the row of sub-pixels
  • the sub-region TFT The gate connection of the TS corresponds to the lower scan line Gate' of the row of sub-pixels; for the sub-pixels whose sub-region is above the main area, the gate connection of the corresponding main-region TFTTM corresponds to the lower scan line Gate of the row of sub-pixels ', and the gate connection of the sub-region TFT TS corresponds to the upper scan line Gate of the row of sub-pixels.
  • the second embodiment has the advantages of minimizing the lead of each of the main region TFT TM and the sub-region TFT TS and the corresponding main region and the sub-region, and the flexible arrangement is high in the case of high resolution.
  • the method does not cause abnormality of the picture, but also increases the aperture ratio and reduces the resistance delay. The rest are the same as the first embodiment, and will not be described again here.
  • FIG. 6 is a third embodiment of the display area 1 of the TFT array substrate of the present invention.
  • the plurality of sub-pixels arranged in the array includes: red sub-pixels R and green sub-pixels G which are alternately arranged in the horizontal direction. And blue sub-pixel B.
  • all the gates of the main-region TFTs connected to the main region of the red sub-pixel R are connected to the upper scan line Gate corresponding to the sub-pixels, and the gates of the sub-regions TFT TS connected to the R sub-region of the red sub-pixel are connected.
  • the poles are connected to the upper scan line Gate corresponding to the sub-pixels, and the gates of the main-region TFTs connected to the main region of the green sub-pixel G are connected to the lower scan line Gate' of the sub-pixels, and all the green sub-pixels are connected to the G sub-region.
  • the gate of the sub-region TFT TS is connected to the lower scan line Gate' of the sub-pixel.
  • the first GOA driving circuit 21 and the second GOA driving circuit 23 bilaterally drive all the scanning lines in order from top to bottom, so that the red sub-pixel R is charged before the green sub-pixel G. The rest is the same as the first embodiment, and details are not described herein again.
  • This third embodiment is applicable to a precharged TFT array substrate and is capable of reducing flicker.
  • FIG. 7 is a fourth embodiment of the display area 1 of the TFT array substrate of the present invention, which is different from the third embodiment in that all the sub-pixels of the same row are connected to the main area of the green sub-pixel G.
  • the gate of the main region TFTTM is connected to the upper scan line Gate corresponding to the sub-pixels
  • the gates of the sub-regions TFT TS connected to the G sub-region of the green sub-pixel are connected to the upper scan line Gate corresponding to the sub-pixels, all connected red
  • the gate of the main region TFTTM of the main region of the sub-pixel R is connected to the lower scan line Gate' of the sub-pixel
  • the gate of the sub-region TFT TS connected to the R sub-region of the red sub-pixel is corresponding to the sub-pixel.
  • the first GOA driving circuit 21 and the second GOA driving circuit 23 bilaterally drive all the scanning lines in order from top to bottom, so that the green sub-pixel G is charged before the red sub-pixel R.
  • This fourth embodiment is equally applicable to a precharged TFT array substrate, which is capable of reducing flicker.
  • the selection of the third and fourth embodiments may be performed in accordance with the optical density (OD) value of the color resist material or the modulation of the programmable gamma correction buffer circuit chip (P-gamma).
  • the TFT array substrate of the present invention increases the number of scan lines by half the number of data lines compared to the conventional TFT array substrate using the 2D1G technology, and divides the data lines into main data lines, and times.
  • a data line controls the main area of the sub-pixels on both sides thereof
  • the data line controls the sub-regions of the sub-pixels on both sides thereof
  • a GOA driving circuit is respectively disposed on the left and right sides of the display area to drive all the scanning lines bilaterally, which can improve the color shift problem of the VA-type liquid crystal display panel, and It can ensure charging efficiency and reduce the cost of the liquid crystal panel.

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Abstract

一种TFT阵列基板，相比于现有的采用2D1G技术的TFT阵列基板，增加了扫描线的数目使得数据线数目减半，将数据线分为主数据线(MD)、与次数据线(SD)，由主数据线(MD)控制位于其两侧子像素的主区，由次数据线(SD)控制位于其两侧子像素的次区，并在显示区的左、右两边分别设置一GOA驱动电路对所有扫描线进行双边驱动，既能够改善VA型液晶显示面板的色偏问题，又能够保证充电效率，降低液晶面板的成本。

Description

TFT阵列基板 技术领域
本发明涉及显示技术领域，尤其涉及一种TFT阵列基板。
背景技术
液晶显示器(Liquid Crystal Display，LCD)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。如：液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
通常液晶显示面板由一彩色滤光片基板(Color Filter，CF)、一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成，并分别在两基板的相对内侧设置像素电极、公共电极，通过施加电压控制液晶分子改变方向，将背光模组的光线折射出来产生画面。TFT阵列基板上形成有多个呈阵列式排布的R、G、B子像素、多条扫描线、及多条数据线。每一子像素分别通过对应的扫描线来接收扫描信号、通过对应的数据线来接收数据信号，以显示影像。
就目前主流市场上的LCD显示面板而言，可分为三种类型，分别是扭曲向列(Twisted Nematic，TN)或超扭曲向列(Super Twisted Nematic，STN)型，平面转换(In-Plane Switching，IPS)型、及垂直配向(Vertical Alignment，VA)型。其中，VA型液晶显示面板相比其他种类的液晶显示面板具有极高的对比度，在大尺寸显示，如电视等方面具有非常广的应用。但由于VA型液晶显示面板采用垂直转动的液晶，液晶分子双折射率的差异比较大，导致大视角下的色偏(color shift)问题比较严重，使得VA型液晶显示面板从不同角度看到的亮度差异较大，造成画面失真。
2D1G、2G1D、或电阻分压技术是目前解决VA型液晶显示面板色偏问题的常用技术。请参阅图1，现有的一种采用2D1G技术的TFT阵列基板，包括阵列式排布的多个子像素，每一子像素均分为主区Main与次区Sub，每一子像素的主区Main连接一主区TFT，每一子像素的次区Sub连接一次区TFT，对应每一行子像素设置一条扫描线Gate，对应每一列子像素设置分别位于其左、右两侧的次区数据线、与主区数据线，所述次区数据线通 过次区TFT提供次数据信号Sdata至所述次区Sub，所述主区数据线通过主区TFT提供主数据信号Mdata至所述主区Main。如图2所示，所述主数据信号Mdata与公共电压COM之间的电位差大于所述次数据信号Sdata与公共电压COM之间的电位差，使得主区Main与次区Sub的充电率不同，从而在不同的视角下提高色彩还原度，改善色偏。
上述现有的采用2D1G技术的TFT阵列基板虽然能够改善色偏，但这种设计需要将数据线的数目增加一倍，不仅使驱动IC的成本增加，还会造成扇出区(Fanout)拥挤，加剧阻容延迟(RC)，降低充电效率，影响产品的竞争力。
发明内容
本发明的目的在于提供一种TFT阵列基板，能够在不增加数据线数目的前提下改善VA型液晶显示面板的色偏问题，降低液晶显示面板的成本。
为实现上述目的，本发明提供一种TFT阵列基板，包括：显示区、非显示区；
所述显示区内设有：
多条相互平行并依次排列的竖直的数据线、多条相互平行并依次排列的水平的扫描线、及呈阵列式排布的多个子像素；
每一子像素均分为主区与次区；每一子像素的主区连接一主区TFT，每一子像素的次区连接一次区TFT；
对应每一行子像素设置分别位于该行子像素上、下两侧的上扫描线、与下扫描线；
对应每相邻的两列子像素设置位于该相邻的两列子像素之间的一条数据线；所述数据线包括：主数据线、与次数据线，所述主数据线、与次数据线沿水平方向依次交替排列；位于每条主数据线两侧的各子像素的主区通过对应的主区TFT共同电性连接于该主数据线，位于每条次数据线两侧的各子像素的次区通过对应的次区TFT共同电性连接于该次数据线；
所述非显示区内设有：
位于所述显示区上方的源极驱动器、分别位于所述显示区左、右两边的第一GOA驱动电路、与第二GOA驱动电路；
所述源极驱动器产生主数据信号、与次数据信号并对应传递给主数据线、与次数据线；
所述第一GOA驱动电路与第二GOA驱动电路分别于显示区左、右两边对所有扫描线进行双边驱动。
在同一行子像素中，对应于每一子像素的主区TFT的栅极连接上扫描线或下扫描线，而次区TFT的栅极连接不同于主区TFT栅极所连接扫描线的另一扫描线。
在同一行子像素中，每相邻两列的子像素的排列方式相同，均设置主区位于次区上方，或次区位于主区上方。
在同一行子像素中，每相邻两列的子像素的排列方式不同，其中一列子像素设置主区位于次区上方，另一列子像素设置次区位于主区上方。
在同一行子像素中，对应连接每相邻两列子像素主区的两个主区TFT，其中一个主区TFT的栅极连接对应于该行子像素的上扫描线，另一个主区TFT的栅极连接对应于该行子像素的下扫描线。
在同一行子像素中，对于主区位于次区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的上扫描线；对于次区位于主区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的下扫描线。
所述阵列排列的多个子像素包括：沿水平方向依次交替排列的红色子像素、绿色子像素、及蓝色子像素。
在同一行子像素中，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素的下扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得红色子像素先于绿色子像素充电。
在同一行子像素中，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的下扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得绿色子像素先于红色子像素充电。
所述主数据信号与公共电压之间的电位差大于所述次数据信号与公共电压之间的电位差。
本发明还提供一种TFT阵列基板，包括：显示区、与非显示区；
所述显示区内设有：
多条相互平行并依次排列的竖直的数据线、多条相互平行并依次排列的水平的扫描线、及呈阵列式排布的多个子像素；
每一子像素均分为主区与次区；每一子像素的主区连接一主区TFT， 每一子像素的次区连接一次区TFT；
对应每一行子像素设置分别位于该行子像素上、下两侧的上扫描线、与下扫描线；
对应每相邻的两列子像素设置位于该相邻的两列子像素之间的一条数据线；所述数据线包括：主数据线、与次数据线，所述主数据线、与次数据线沿水平方向依次交替排列；位于每条主数据线两侧的各子像素的主区通过对应的主区TFT共同电性连接于该主数据线，位于每条次数据线两侧的各子像素的次区通过对应的次区TFT共同电性连接于该次数据线；
所述非显示区内设有：
位于所述显示区上方的源极驱动器、分别位于所述显示区左、右两边的第一GOA驱动电路、与第二GOA驱动电路；
所述源极驱动器产生主数据信号、与次数据信号并对应传递给主数据线、与次数据线；
所述第一GOA驱动电路与第二GOA驱动电路分别于显示区左、右两边对所有扫描线进行双边驱动；
其中，在同一行子像素中，对应于每一子像素的主区TFT的栅极连接上扫描线或下扫描线，而次区TFT的栅极连接不同于主区TFT栅极所连接扫描线的另一扫描线；
其中，所述阵列排列的多个子像素包括：沿水平方向依次交替排列的红色子像素、绿色子像素、及蓝色子像素；
其中，所述主数据信号与公共电压之间的电位差大于所述次数据信号与公共电压之间的电位差。
本发明的有益效果：本发明提供的一种TFT阵列基板，相比于现有的采用2D1G技术的TFT阵列基板，增加了扫描线的数目使得数据线数目减半，将数据线分为主数据线、与次数据线，由主数据线控制位于其两侧子像素的主区，由次数据线控制位于其两侧子像素的次区，并在显示区的左、右两边分别设置一GOA驱动电路对所有扫描线进行双边驱动，既能够改善VA型液晶显示面板的色偏问题，又能够保证充电效率，降低液晶面板的成本。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有的一种采用2D1G技术的TFT阵列基板的示意图；
图2为对应图1中主、次数据信号的波形示意图；
图3为本发明的TFT阵列基板的结构示意图；
图4为本发明的TFT阵列基板的显示区的第一实施例的示意图；
图5为本发明的TFT阵列基板的显示区的第二实施例的示意图；
图6为本发明的TFT阵列基板的显示区的第三实施例的示意图；
图7为本发明的TFT阵列基板的显示区的第四实施例的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明提供一种TFT阵列基板。请参阅图3，并结合图4，为本发明的第一实施例，该TFT阵列基板包括：显示区1、与设在显示区1周围的非显示区2。
所述显示区1内设有：多条相互平行并依次排列的竖直的数据线、多条相互平行并依次排列的水平的扫描线、及呈阵列式排布的多个子像素。
每一子像素均分为主区(以面积较小的矩形示意)与次区(以面积较大的矩形示意)；每一子像素的主区连接一主区TFT TM，每一子像素的次区连接一次区TFT TS。在图4所示的第一实施例中，在同一行子像素中，每相邻两列的子像素的排列方式相同，均设置主区位于次区上方，当然也可设置次区位于主区上方(未图示)。
对应每一行子像素设置分别位于该行子像素上、下两侧的上扫描线Gate、与下扫描线Gate’，所述上扫描线Gate控制对应与其连接的主区TFT TM与次区TFT TS，所述下扫描线Gate’控制对应与其连接的主区TFT TM与次区TFT TS。
对应每相邻的两列子像素设置位于该相邻的两列子像素之间的一条数据线；所述数据线包括：主数据线MD、与次数据线SD，所述主数据线MD、与次数据线SD沿水平方向依次交替排列。位于每条主数据线MD两侧的各子像素的主区通过对应的主区TFT TM共同电性连接于该主数据线MD，位于每条次数据线SD两侧的各子像素的次区通过对应的次区TFT TS共同电性连接于该次数据线SD。在图4所示的第一实施例中，在同一行子 像素中，对应于每一子像素的主区TFT TM的栅极连接上扫描线Gate或下扫描线Gate’，而次区TFT TS的栅极连接不同于主区TFT TM栅极所连接扫描线的另一扫描线，进一步地，在同一行子像素中，对应连接每相邻两列子像素主区的两个主区TFT TM，其中一个主区TFT TM的栅极连接对应于该行子像素的上扫描线Gate，另一个主区TFT TM的栅极连接对应于该行子像素的下扫描线Gate’。例如在图4中第一行第一列的子像素，与其对应的主区TFT TM的栅极电性连接于上扫描线Gate，则次区TFT TS的栅极电性连接于下扫描线Gate’，而在图4中第一行第二列的子像素，与其对应的主区TFT TM的栅极电性连接于下扫描线Gate’，次区TFT TS的栅极则电性连接于上扫描线Gate。
所述非显示区2内设有：位于显示区1上方的源极驱动器22、分别位于所述显示区1左、右两边的第一GOA驱动电路21、与第二GOA驱动电路23。
所述源极驱动器22产生主数据信号Main data、与次数据信号Sub data，并对应传递给主数据线MD、与次数据线SD。为了使得每个子像素的主区与次区的充电率不同，仍如图2所示，设置所述主数据信号Main data与公共电压之间的电位差大于所述次数据信号Sub data与所述公共电压之间的电位差。
所述第一GOA驱动电路21与第二GOA驱动电路23分别于显示区1左、右两边对所有扫描线进行双边驱动，即所述第一GOA驱动电路21从左至右对所有扫描线进行驱动，于此同时，所述第二GOA驱动电路23从右至左对所有扫描线进行驱动。
相比于现有的采用2D1G技术的TFT阵列基板，本发明的TFT阵列基板增加了扫描线的数目使得数据线数目减半，将数据线分为主数据线MD、与次数据线SD，由主数据线MD控制位于其两侧子像素的主区，由次数据线SD控制位于其两侧子像素的次区，并在显示区1的左、右两边分别设置第一GOA驱动电路21与第二GOA驱动电路23对所有扫描线进行双边驱动，既能够改善VA型液晶显示面板的色偏问题，又能够保证充电效率，降低液晶面板的成本。
请参阅图5，图5为本发明TFT阵列基板的显示区1的第二实施例，该第二实施例与第一实施例的区别在于，在同一行子像素中，每相邻两列的子像素的排列方式不同，其中一列子像素设置主区位于次区上方，另一列子像素设置次区位于主区上方。对于主区位于次区上方的子像素，相应的主区TFT TM的栅极连接对应于该行子像素的上扫描线Gate，而次区TFT  TS的栅极连接对应于该行子像素的下扫描线Gate’；对于次区位于主区上方的子像素，相应的主区TFT TM的栅极连接对应于该行子像素的下扫描线Gate’，而次区TFT TS的栅极连接对应于该行子像素的上扫描线Gate。相比于实施例一，该实施例二的优点在于使得各个主区TFT TM与次区TFT TS与相应主区与次区的引线最短，在分辨率较高的情况下，这种灵活的排列方式不会造成画面的异常，还能提高开口率，减小阻容延迟。其余均与第一实施例相同，此处不再赘述。
请参阅图6，图6为本发明的TFT阵列基板的显示区1的第三实施例：所述阵列排列的多个子像素包括：沿水平方向依次交替排列的红色子像素R、绿色子像素G、及蓝色子像素B。在同一行子像素中，所有连接红色子像素R主区的主区TFT TM的栅极连接对应该行子像素的上扫描线Gate，所有连接红色子像素R次区的次区TFT TS的栅极连接对应该行子像素的上扫描线Gate，所有连接绿色子像素G主区的主区TFT TM的栅极连接对应该行子像素的下扫描线Gate’，所有连接绿色子像素G次区的次区TFT TS的栅极连接对应该行子像素的下扫描线Gate’。所述第一GOA驱动电路21与第二GOA驱动电路23按照从上至下的顺序对所有扫描线进行双边驱动，使得红色子像素R先于绿色子像素G充电。其余与第一实施例相同，此处不再赘述。该第三实施例适用于预充电的TFT阵列基板，能够降低闪烁。
请参阅图7，图7为本发明的TFT阵列基板的显示区1的第四实施例，其与第三实施例的区别在于，在同一行子像素中，所有连接绿色子像素G主区的主区TFT TM的栅极连接对应该行子像素的上扫描线Gate，所有连接绿色子像素G次区的次区TFT TS的栅极连接对应该行子像素的上扫描线Gate，所有连接红色子像素R主区的主区TFT TM的栅极连接对应该行子像素的下扫描线Gate’，所有连接红色子像素R次区的次区TFT TS的栅极连接对应该行子像素的下扫描线Gate’。所述第一GOA驱动电路21与第二GOA驱动电路23按照从上至下的顺序对所有扫描线进行双边驱动，使得绿色子像素G先于红色子像素R充电。该第四实施例同样适用于预充电的TFT阵列基板，能够降低闪烁。
对于第三、第四实施例的选择可依据色阻材料的光密度(OD)值或可编程伽玛校正缓冲电路芯片(P-gamma)的调制来进行。
综上所述，本发明的TFT阵列基板，相比于现有的采用2D1G技术的TFT阵列基板，增加了扫描线的数目使得数据线数目减半，将数据线分为主数据线、与次数据线，由主数据线控制位于其两侧子像素的主区，由次 数据线控制位于其两侧子像素的次区，并在显示区的左、右两边分别设置一GOA驱动电路对所有扫描线进行双边驱动，既能够改善VA型液晶显示面板的色偏问题，又能够保证充电效率，降低液晶面板的成本。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (17)

  1. 一种TFT阵列基板，包括：显示区、与非显示区；
    所述显示区内设有：
    多条相互平行并依次排列的竖直的数据线、多条相互平行并依次排列的水平的扫描线、及呈阵列式排布的多个子像素；
    每一子像素均分为主区与次区；每一子像素的主区连接一主区TFT，每一子像素的次区连接一次区TFT；
    对应每一行子像素设置分别位于该行子像素上、下两侧的上扫描线、与下扫描线；
    对应每相邻的两列子像素设置位于该相邻的两列子像素之间的一条数据线；所述数据线包括：主数据线、与次数据线，所述主数据线、与次数据线沿水平方向依次交替排列；位于每条主数据线两侧的各子像素的主区通过对应的主区TFT共同电性连接于该主数据线，位于每条次数据线两侧的各子像素的次区通过对应的次区TFT共同电性连接于该次数据线；
    所述非显示区内设有：
    位于所述显示区上方的源极驱动器、分别位于所述显示区左、右两边的第一GOA驱动电路、与第二GOA驱动电路；
    所述源极驱动器产生主数据信号、与次数据信号并对应传递给主数据线、与次数据线；
    所述第一GOA驱动电路与第二GOA驱动电路分别于显示区左、右两边对所有扫描线进行双边驱动。
  2. 如权利要求1所述的TFT阵列基板，其中，在同一行子像素中，对应于每一子像素的主区TFT的栅极连接上扫描线或下扫描线，而次区TFT的栅极连接不同于主区TFT栅极所连接扫描线的另一扫描线。
  3. 如权利要求2所述的TFT阵列基板，其中，在同一行子像素中，每相邻两列的子像素的排列方式相同，均设置主区位于次区上方，或次区位于主区上方。
  4. 如权利要求2所述的TFT阵列基板，其中，在同一行子像素中，每相邻两列的子像素的排列方式不同，其中一列子像素设置主区位于次区上方，另一列子像素设置次区位于主区上方。
  5. 如权利要求3所述的TFT阵列基板，其中，在同一行子像素中，对应连接每相邻两列子像素主区的两个主区TFT，其中一个主区TFT的栅极 连接对应于该行子像素的上扫描线，另一个主区TFT的栅极连接对应于该行子像素的下扫描线。
  6. 如权利要求4所述的TFT阵列基板，其中，在同一行子像素中，对于主区位于次区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的上扫描线；对于次区位于主区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的下扫描线。
  7. 如权利要求1所述的TFT阵列基板，其中，所述阵列排列的多个子像素包括：沿水平方向依次交替排列的红色子像素、绿色子像素、及蓝色子像素。
  8. 如权利要求7所述的TFT阵列基板，其中，在同一行子像素中，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素的下扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得红色子像素先于绿色子像素充电。
  9. 如权利要求7所述的TFT阵列基板，其中，在同一行子像素中，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的下扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得绿色子像素先于红色子像素充电。
  10. 如权利要求1所述的TFT阵列基板，其中，所述主数据信号与公共电压之间的电位差大于所述次数据信号与公共电压之间的电位差。
  11. 一种TFT阵列基板，包括：显示区、与非显示区；
    所述显示区内设有：
    多条相互平行并依次排列的竖直的数据线、多条相互平行并依次排列的水平的扫描线、及呈阵列式排布的多个子像素；
    每一子像素均分为主区与次区；每一子像素的主区连接一主区TFT，每一子像素的次区连接一次区TFT；
    对应每一行子像素设置分别位于该行子像素上、下两侧的上扫描线、与下扫描线；
    对应每相邻的两列子像素设置位于该相邻的两列子像素之间的一条数据线；所述数据线包括：主数据线、与次数据线，所述主数据线、与次数据线沿水平方向依次交替排列；位于每条主数据线两侧的各子像素的主区 通过对应的主区TFT共同电性连接于该主数据线，位于每条次数据线两侧的各子像素的次区通过对应的次区TFT共同电性连接于该次数据线；
    所述非显示区内设有：
    位于所述显示区上方的源极驱动器、分别位于所述显示区左、右两边的第一GOA驱动电路、与第二GOA驱动电路；
    所述源极驱动器产生主数据信号、与次数据信号并对应传递给主数据线、与次数据线；
    所述第一GOA驱动电路与第二GOA驱动电路分别于显示区左、右两边对所有扫描线进行双边驱动；
    其中，在同一行子像素中，对应于每一子像素的主区TFT的栅极连接上扫描线或下扫描线，而次区TFT的栅极连接不同于主区TFT栅极所连接扫描线的另一扫描线；
    其中，所述阵列排列的多个子像素包括：沿水平方向依次交替排列的红色子像素、绿色子像素、及蓝色子像素；
    其中，所述主数据信号与公共电压之间的电位差大于所述次数据信号与公共电压之间的电位差。
  12. 如权利要求11所述的TFT阵列基板，其中，在同一行子像素中，每相邻两列的子像素的排列方式相同，均设置主区位于次区上方，或次区位于主区上方。
  13. 如权利要求11所述的TFT阵列基板，其中，在同一行子像素中，每相邻两列的子像素的排列方式不同，其中一列子像素设置主区位于次区上方，另一列子像素设置次区位于主区上方。
  14. 如权利要求12所述的TFT阵列基板，其中，在同一行子像素中，对应连接每相邻两列子像素主区的两个主区TFT，其中一个主区TFT的栅极连接对应于该行子像素的上扫描线，另一个主区TFT的栅极连接对应于该行子像素的下扫描线。
  15. 如权利要求13所述的TFT阵列基板，其中，在同一行子像素中，对于主区位于次区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的上扫描线；对于次区位于主区上方的子像素，相应的主区TFT的栅极连接对应于该行子像素的下扫描线。
  16. 如权利要求11所述的TFT阵列基板，其中，在同一行子像素中，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素 的下扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得红色子像素先于绿色子像素充电。
  17. 如权利要求11所述的TFT阵列基板，其中，在同一行子像素中，所有连接绿色子像素主区的主区TFT的栅极连接对应该行子像素的上扫描线，所有连接绿色子像素次区的次区TFT的栅极连接对应该行子像素的上扫描线，所有连接红色子像素主区的主区TFT的栅极连接对应该行子像素的下扫描线，所有连接红色子像素次区的次区TFT的栅极连接对应该行子像素的下扫描线，使得绿色子像素先于红色子像素充电。
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Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104882105B (zh) * 2015-05-28 2017-05-17 武汉华星光电技术有限公司 一种液晶驱动电路及液晶显示装置
CN105404066B (zh) * 2015-12-28 2018-11-23 深圳市华星光电技术有限公司 阵列基板及液晶显示器
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CN105609077B (zh) * 2016-01-28 2018-03-30 深圳市华星光电技术有限公司 像素驱动电路
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CN106297629B (zh) * 2016-08-22 2018-06-15 武汉华星光电技术有限公司 扫描驱动电路及具有该电路的平面显示装置
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CN106371257B (zh) * 2016-11-02 2020-05-05 深圳市华星光电技术有限公司 液晶面板及显示装置
CN106531106B (zh) * 2016-12-27 2017-11-10 惠科股份有限公司 液晶显示器及其驱动方法
CN106681074B (zh) * 2017-02-24 2019-10-25 深圳市华星光电半导体显示技术有限公司 阵列基板及液晶显示面板
CN106896598A (zh) * 2017-02-27 2017-06-27 武汉华星光电技术有限公司 一种goa驱动面板
CN107154242A (zh) * 2017-06-19 2017-09-12 惠科股份有限公司 显示面板的驱动方法及显示面板
CN107358931B (zh) * 2017-09-04 2019-12-24 深圳市华星光电半导体显示技术有限公司 Goa电路
CN107395006B (zh) * 2017-09-13 2020-07-03 深圳市华星光电技术有限公司 过流保护电路及液晶显示器
TWI685698B (zh) * 2019-01-03 2020-02-21 友達光電股份有限公司 畫素陣列基板及其驅動方法
CN110673413B (zh) * 2019-08-29 2022-04-12 福建华佳彩有限公司 一种显示面板结构
CN111061106B (zh) * 2020-01-02 2022-09-09 福州京东方光电科技有限公司 一种阵列基板及显示面板
CN111916033A (zh) * 2020-08-19 2020-11-10 惠科股份有限公司 显示装置及其驱动方法
CN111816138A (zh) * 2020-08-19 2020-10-23 惠科股份有限公司 显示装置及其驱动方法
CN112419977B (zh) * 2020-11-27 2021-12-10 云谷（固安）科技有限公司 显示面板和显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6922183B2 (en) * 2002-11-01 2005-07-26 Chin-Lung Ting Multi-domain vertical alignment liquid crystal display and driving method thereof
CN101140747A (zh) * 2007-10-16 2008-03-12 友达光电股份有限公司 双边栅极驱动式液晶显示器及像素结构
US20080074601A1 (en) * 2006-09-26 2008-03-27 Samsung Electronics Co., Ltd. Liquid crystal display
US20080100555A1 (en) * 2006-11-01 2008-05-01 Samsung Electronics Co., Ltd. Array substrate and display panel having the same
US20090002583A1 (en) * 2007-06-29 2009-01-01 Samsung Electronics Co., Ltd. Display aparatus and driving method thereof
US20090021509A1 (en) * 2007-07-20 2009-01-22 Samsung Electronics Co., Ltd. Flat panel crystal display employing simultaneous charging of main and subsidiary pixel electrodes

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3999081B2 (ja) * 2002-01-30 2007-10-31 シャープ株式会社 液晶表示装置
US6775157B2 (en) * 2002-06-25 2004-08-10 International Rectifier Corporation Closed loop active EMI filter for reducing common or differential noise based on an error value
KR20070028836A (ko) * 2005-09-08 2007-03-13 삼성전자주식회사 액정 표시 장치
EP1930750A1 (en) * 2005-09-09 2008-06-11 Nitto Denko Corporation Polarizing plate with optical compensation layer, liquid crystal panel using polarizing plate with optical compensation layer, and image display unit
KR101182771B1 (ko) * 2005-09-23 2012-09-14 삼성전자주식회사 액정 표시 패널과 그의 구동 방법 및 그를 이용한 액정표시 장치
CN102629053A (zh) * 2011-08-29 2012-08-08 京东方科技集团股份有限公司 阵列基板及显示装置
AU2013316621B2 (en) * 2012-09-13 2016-04-14 Sharp Kabushiki Kaisha Liquid crystal display device
KR102198250B1 (ko) * 2014-01-20 2021-01-05 삼성디스플레이 주식회사 표시 장치 및 그것의 구동 방법
CN104698645A (zh) * 2015-03-31 2015-06-10 合肥京东方光电科技有限公司 一种显示面板及其驱动方法、液晶显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6922183B2 (en) * 2002-11-01 2005-07-26 Chin-Lung Ting Multi-domain vertical alignment liquid crystal display and driving method thereof
US20080074601A1 (en) * 2006-09-26 2008-03-27 Samsung Electronics Co., Ltd. Liquid crystal display
US20080100555A1 (en) * 2006-11-01 2008-05-01 Samsung Electronics Co., Ltd. Array substrate and display panel having the same
US20090002583A1 (en) * 2007-06-29 2009-01-01 Samsung Electronics Co., Ltd. Display aparatus and driving method thereof
US20090021509A1 (en) * 2007-07-20 2009-01-22 Samsung Electronics Co., Ltd. Flat panel crystal display employing simultaneous charging of main and subsidiary pixel electrodes
CN101140747A (zh) * 2007-10-16 2008-03-12 友达光电股份有限公司 双边栅极驱动式液晶显示器及像素结构

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