WO2019144669A1 - 像素电路的检测方法、显示面板的驱动方法和显示装置 - Google Patents

像素电路的检测方法、显示面板的驱动方法和显示装置 Download PDF

Info

Publication number
WO2019144669A1
WO2019144669A1 PCT/CN2018/112954 CN2018112954W WO2019144669A1 WO 2019144669 A1 WO2019144669 A1 WO 2019144669A1 CN 2018112954 W CN2018112954 W CN 2018112954W WO 2019144669 A1 WO2019144669 A1 WO 2019144669A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
driving transistor
data voltage
data
sensing
Prior art date
Application number
PCT/CN2018/112954
Other languages
English (en)
French (fr)
Inventor
宋丹娜
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP18882298.5A priority Critical patent/EP3748618A4/en
Priority to US16/467,022 priority patent/US11776438B2/en
Publication of WO2019144669A1 publication Critical patent/WO2019144669A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • Embodiments of the present disclosure relate to a method of detecting a pixel circuit, a method of driving a display panel, and a display device.
  • Organic Light Emitting Diode (OLED) display panels are gradually gaining people's advantages due to their wide viewing angle, high contrast ratio, fast response speed, higher light-emitting brightness and lower driving voltage than inorganic light-emitting display devices. Wide attention. Due to the above characteristics, the organic light emitting diode (OLED) display panel can be applied to a device having a display function such as a mobile phone, a display, a notebook computer, a digital camera, an instrument meter, and the like.
  • At least one embodiment of the present disclosure provides a method for detecting a pixel circuit, the pixel circuit including a driving transistor, the detecting method including: applying a first data voltage to a gate of the driving transistor in a first charging cycle, Obtaining a first sensing voltage at a first pole of the driving transistor and determining whether the first sensing voltage is equal to a first duration after the first data voltage is applied and before the driving transistor is turned off a reference sensing voltage; applying a second data voltage to a gate of the driving transistor in a second charging period, a second duration after the applying the second data voltage, and before the driving transistor is turned off, The first pole of the driving transistor acquires a second sensing voltage, and determines whether the second sensing voltage is equal to a second reference sensing voltage.
  • K represents the current current coefficient of the driving transistor
  • Vth represents the current threshold voltage of the driving transistor
  • Vd1 represents the first data voltage
  • Vd2 represents the second data voltage
  • L1 represents the first brightness value
  • L2 represents the first The two brightness values, the first brightness value and the second brightness value are both specified normalized brightness values.
  • the detecting method provided by an embodiment of the present disclosure further includes: applying a first reference data voltage to a gate of the driving transistor in the first reference charging period, after the applying the first reference data voltage a first time period, the first reference sensing voltage is acquired at a first pole of the driving transistor; and a second reference data voltage is applied to a gate of the driving transistor in a second reference charging period, The second duration after the second reference data voltage, the second reference sense voltage is acquired at a first pole of the drive transistor.
  • Vdr1 denotes the first reference data voltage
  • Vdr2 denotes the second reference data voltage
  • Kr denotes a reference current coefficient of the drive transistor
  • Vthr denotes a reference threshold voltage of the drive transistor.
  • the detecting method provided by an embodiment of the present disclosure further includes: in a third charging period, a gate to the driving transistor in a case where the first sensing voltage is not equal to the first reference sensing voltage A third data voltage is applied to the pole, and a third sense voltage is acquired at the first pole of the drive transistor at the first duration after the application of the third data voltage. Selecting the third data voltage such that a difference between the third sensing voltage and the first reference sensing voltage is less than between the first sensing voltage and the first reference sensing voltage Difference.
  • the detecting method provided by an embodiment of the present disclosure further includes: in a fourth charging period, a gate to the driving transistor in a case where the second sensing voltage is not equal to the second reference sensing voltage A fourth data voltage is applied to the pole, and the fourth sense voltage is acquired at the first pole of the drive transistor for the second duration after the application of the fourth data voltage. Selecting the fourth data voltage such that a difference between the fourth sensing voltage and the second reference sensing voltage is less than between the second sensing voltage and the first reference sensing voltage Difference.
  • the third data voltage is made larger than the first data voltage. Taking a value; in a case where the first sensing voltage is greater than the first reference sensing voltage, the third data voltage is made smaller than a value of the first data voltage.
  • the fourth data voltage in a case where the second sensing voltage is smaller than the second reference sensing voltage, the fourth data voltage is made larger than the second data voltage. Taking a value; in a case where the second sensing voltage is greater than the second reference sensing voltage, the fourth data voltage is made smaller than a value of the second data voltage.
  • Vd3 represents the third data voltage
  • Vd4 represents the fourth data voltage.
  • the detecting method provided by an embodiment of the present disclosure further includes acquiring the reference threshold voltage and the reference current coefficient.
  • the acquiring the reference threshold voltage includes: applying a shutdown data voltage to a gate of the driving transistor in a shutdown charging cycle of a shutdown state, and acquiring at a first pole of the driving transistor after the driving transistor is turned off Shutdown sensing voltage; a reference threshold voltage of the driving transistor is equal to a difference between the shutdown data voltage and the shutdown sensing voltage.
  • the shutdown charging cycle is the same as the first reference charging cycle, and the shutdown data voltage is equal to the first reference data voltage.
  • the shutdown charging cycle is the same as the second reference charging cycle, and the shutdown data voltage is equal to the second reference data voltage.
  • the first charging cycle, the second charging cycle, the third charging cycle, and the fourth charging cycle are located between display cycles.
  • the first duration is the same as the second duration.
  • At least one embodiment of the present disclosure further provides a driving method of a display panel, the display panel includes a pixel circuit, and the driving method includes: performing detection of any one of the pixel circuits provided by the embodiment of the present disclosure on the pixel circuit a method for obtaining a current threshold voltage and a current current coefficient of a drive transistor of the pixel circuit.
  • Vc denotes the compensation data voltage
  • K denotes the current current coefficient
  • Vth denotes the current threshold voltage
  • L denotes a normalized luminance value to be displayed by the pixel circuit.
  • At least one embodiment of the present disclosure also provides a display device including a pixel circuit and a control circuit.
  • the pixel circuit includes a driving transistor; the control circuit is configured to perform a detecting method of a pixel circuit provided by an embodiment of the present disclosure.
  • control circuit is further configured to: apply a first reference data voltage to a gate of the driving transistor in a first reference charging cycle, The first period of time after the first reference data voltage, the first reference sense voltage is acquired at a first pole of the drive transistor; and in a second reference charge period, a gate is applied to a gate of the drive transistor And a second reference data voltage, the second reference sensing voltage is acquired at a first pole of the driving transistor at the second duration after the applying the second reference data voltage.
  • Vdr1 denotes the first reference data voltage
  • Vdr2 denotes the second reference data voltage
  • Kr denotes a reference current coefficient of the drive transistor
  • Vthr denotes a reference threshold voltage of the drive transistor.
  • a display device further includes a data driving circuit and a detecting circuit.
  • the data driving circuit is configured to output the first reference data voltage, the second reference data voltage, the first data voltage, and the second data voltage.
  • the pixel circuit is further configured to receive the first reference data voltage, the second reference data voltage, the first data voltage, and the second data voltage, and apply to a gate of the drive transistor.
  • the detecting circuit is configured to read the first reference sensing voltage, the second reference sensing voltage, the first sensing voltage, and the second sensing voltage from a first pole of the driving transistor .
  • the control circuit is also configured to control the data drive circuit and the detection circuit.
  • the pixel circuit further includes a light emitting element and a sensing switch transistor.
  • the second pole and the first pole of the driving transistor are configured to be respectively connected to the first power voltage terminal and the first pole of the light emitting element, and the second pole of the light emitting component is connected to the second power voltage terminal,
  • a first pole of the sense switching transistor is electrically coupled to the first pole of the drive transistor, and a second pole of the sense switch transistor is electrically coupled to the detection circuit.
  • the pixel circuit further includes a sensing line electrically connecting the second pole of the sensing switching transistor to the detecting circuit.
  • the pixel circuit further includes a data write transistor and a storage capacitor.
  • the data write transistor is configured to acquire a data voltage from the data drive circuit, write the data voltage to a gate of the drive transistor, and the storage capacitor stores the data voltage.
  • control circuit includes a processor and a storage medium, and the storage medium is configured to store computer instructions executable for execution by the processor, and the computer instructions The detection method is implemented when executed by the processor.
  • 1A is a schematic diagram of a pixel circuit
  • 1B is a schematic diagram of another pixel circuit
  • 1C is a schematic diagram of still another pixel circuit
  • Figure 1D is a graph of a sense voltage as a function of time
  • FIG. 2A is a graph of a sense voltage as a function of time in a first charging cycle and a second charging cycle in a method of detecting a pixel circuit according to an embodiment of the present disclosure
  • FIG. 2B is a graph of sensing voltage changes with time in a first charging period and a second charging period when the first duration and the second duration are the same in the detecting method of the pixel circuit provided by the embodiment of the present disclosure
  • 2C is a graph of a sense voltage as a function of time in a first reference charge period and a second reference charge period in a method of detecting a pixel circuit provided by an embodiment of the present disclosure
  • FIG. 3A is a graph of a sense voltage as a function of time in a first charging cycle, a third charging cycle, and a first reference charging cycle in a method of detecting a pixel circuit according to an embodiment of the present disclosure
  • FIG. 3B is a graph of a sense voltage as a function of time in a second charging period, a fourth charging period, and a second reference charging period in a method of detecting a pixel circuit according to an embodiment of the present disclosure
  • FIG. 4A is a graph of sensing voltage changes with time when a third charging cycle is repeated a plurality of times in a method of detecting a pixel circuit according to an embodiment of the present disclosure
  • FIG. 4B is a graph of sensing voltage changes with time when a plurality of fourth charging cycles are repeated repeatedly in the detecting method of the pixel circuit provided by the embodiment of the present disclosure
  • FIG. 5A is a graph of a sense voltage in a shutdown charging cycle as a function of time in a method of detecting a pixel circuit according to an embodiment of the present disclosure
  • FIG. 5B is a graph of sensing voltage as a function of time when the shutdown charging cycle is the same as the first reference charging cycle in the detecting method of the pixel circuit provided by the embodiment of the present disclosure
  • FIG. 5C is a graph of sensing voltage changes with time when the shutdown charging cycle is the same as the second reference charging cycle in the detecting method of the pixel circuit provided by the embodiment of the present disclosure
  • FIG. 6A is a schematic diagram of a pixel circuit according to an embodiment of the present disclosure.
  • FIG. 6B is a schematic diagram of another pixel circuit according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic flowchart of a driving method of a display panel according to an embodiment of the present disclosure.
  • FIG. 8 is an exemplary structural diagram of a display device according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram of a control circuit in a display device according to an embodiment of the present disclosure.
  • the pixel circuit in the OLED display device generally adopts a matrix driving method, and is divided into an active matrix driving and a passive matrix driving according to whether or not a switching component is introduced in each pixel unit.
  • AMOLED Active Matrix OLED
  • the basic pixel circuit used in the AMOLED display device is usually a 2T1C pixel circuit, that is, a function of driving the OLED to emit light by using two thin film transistors (TFTs) and one storage capacitor Cst.
  • TFTs thin film transistors
  • 1A and 1B show schematic diagrams of two 2T1C pixel circuits, respectively.
  • a 2T1C pixel circuit includes a switching transistor T0, a driving transistor N0, and a storage capacitor Cst.
  • the gate of the switching transistor T0 is connected to the scan line to receive the scan signal Scan1; for example, the source of the switching transistor T0 is connected to the data line to receive the data signal Vdata; the drain of the switching transistor T0 is connected to the driving transistor N0.
  • the 2T1C pixel circuit is driven by two TFTs and a storage capacitor Cst to control the brightness and darkness (grayscale) of the pixel.
  • the data signal Vdata input by the data driving circuit through the data line can charge the storage capacitor Cst through the switching transistor T0, whereby the data signal Vdata can be stored in the storage capacitor Cst And the stored data signal Vdata can control the degree of conduction of the driving transistor N0, thereby controlling the magnitude of the current flowing through the driving transistor N0 to drive the OLED to emit light, that is, the current determines the gray level of the pixel illumination.
  • the switching transistor T0 is an N-type transistor and the driving transistor N0 is a P-type transistor.
  • another 2T1C pixel circuit also includes a switching transistor T0, a driving transistor N0, and a storage capacitor Cst, but the connection mode thereof is slightly changed, and the driving transistor N0 is an N-type transistor.
  • the difference of the pixel circuit of FIG. 1B with respect to FIG. 1A includes that the positive terminal of the OLED is connected to the first voltage terminal to receive the first voltage Vdd (high voltage), and the negative terminal is connected to the drain of the driving transistor N0, the driving transistor The source of N0 is connected to the second voltage terminal to receive the second voltage Vss (low voltage, such as ground voltage).
  • the operation mode of the 2T1C pixel circuit is basically the same as that of the pixel circuit shown in FIG. 1A, and details are not described herein again.
  • the switching transistor T0 is not limited to the N-type transistor, and may be a P-type transistor, and only the control scan signal Scan1 needs to be changed accordingly.
  • An OLED display device typically includes a plurality of pixel units arranged in an array, each of which may include, for example, the above-described pixel circuits.
  • the output current I OLED of the driving transistor N0 in the pixel circuit in a saturated state can be obtained by the following formula:
  • I OLED 1/2*K(Vg-Vs-Vth) 2
  • K W / L * C * ⁇
  • W / L is the width to length ratio of the channel of the driving transistor N0 (that is, the ratio of the width to the length)
  • ⁇ is the electron mobility
  • C is the capacitance per unit area
  • Vs is the voltage of the source of the driving transistor N0
  • Vth is the threshold voltage of the driving transistor N0.
  • K is referred to as a current coefficient of a driving transistor in the pixel circuit, and the following embodiments are the same as those described herein, and are not described again.
  • the threshold voltage Vth of the driving transistor in each pixel circuit may be different due to the fabrication process, and the threshold voltage Vth of the driving transistor may cause a drift phenomenon due to, for example, a change in temperature.
  • the current coefficient K of the driving transistor also ages over time. Therefore, the difference between the threshold voltage Vth and the current coefficient K of each of the driving transistors and aging may cause display failure (for example, display unevenness), so it is necessary to compensate the threshold voltage Vth and the current coefficient K.
  • a data signal eg, data voltage
  • Vdata may charge the storage capacitor Cst, and since the data signal Vdata may cause the driving transistor N0 to be turned on,
  • the voltage Vs of the source or the drain of the driving transistor N0 electrically connected to one end of the storage capacitor Cst may be changed correspondingly.
  • FIG. 1C shows a pixel circuit (that is, a 3T1C circuit) that can detect a threshold voltage of a driving transistor, and the driving transistor N0 is an N-type transistor.
  • the sensing transistor S0 can be introduced on the basis of the 2T1C circuit.
  • the first end of the sense transistor S0 is coupled to the source of the drive transistor N0, and the second end of the sense transistor S0 is coupled to the sense circuit (not shown in FIG. 1C) via a sense line.
  • the detecting circuit can be charged via the sensing transistor S0 such that the source potential of the driving transistor N0 changes.
  • the driving transistor N0 When the voltage Vs of the source of the driving transistor N0 is equal to the difference between the gate voltage Vg of the driving transistor N0 and the threshold voltage Vth of the driving transistor N0, the driving transistor N0 is turned off. At this time, after the driving transistor N0 is turned off, the sensing voltage (ie, the voltage Vb of the source after the driving transistor N0 is turned off) can be acquired from the source of the driving transistor N0 via the turned-on sensing transistor S0.
  • the sensing voltage ie, the voltage Vb of the source after the driving transistor N0 is turned off
  • FIG. 1D shows a graph of a sense voltage as a function of time taken from the source of the drive transistor N0 via the turned-on sense transistor S0.
  • the inventor has noticed that, after the data signal Vdata is applied, in the process of charging the detection circuit via the sensing line, as the charging time for the storage capacitor Cst or the like increases, the charging speed is correspondingly lowered (ie, the sensing voltage is increased). The speed is lowered) (see FIG. 1D), because the charging current will decrease as the sensing voltage (ie, the voltage Vs of the source of the driving transistor N0) increases.
  • the output current I OLED of the driving transistor N0 in a saturated state can be obtained by the following formula:
  • I OLED 1/2*K(Vg-Vs-Vth) 2
  • K W / L * C * ⁇
  • W / L is the aspect ratio (i.e., the ratio of the width to the length) of the channel of the driving transistor N0
  • ⁇ is the electron mobility
  • C is the capacitance per unit area.
  • At least one embodiment of the present disclosure provides a method for detecting a pixel circuit, which can detect a threshold voltage and a current coefficient of a pixel circuit during startup, thereby improving a compensation effect and brightness uniformity. At least one embodiment of the present disclosure also provides a driving method and a display device of a display panel corresponding to the above detecting method.
  • One embodiment of the present disclosure provides a method of detecting a pixel circuit, which may be used to detect a current threshold voltage Vth and a current current coefficient K of a driving transistor in a pixel circuit.
  • the detection method of the pixel circuit provided in this embodiment will be specifically described below with reference to FIG. 2A to FIG. 2C.
  • the pixel circuit may include a drive transistor (eg, drive transistor T3 in FIG. 6A or 6B).
  • the gate voltage applied to the drive transistor is denoted as DATA.
  • the detection method of the pixel circuit may include the following operations.
  • Step S110 in the first charging cycle, applying a first data voltage Vd1 to the gate of the driving transistor, acquiring the first electrode after the first data voltage Vd1 and before the driving transistor is turned off, acquiring at the first pole of the driving transistor The first sensing voltage Vs1, and determining whether the first sensing voltage Vs1 is equal to the first reference sensing voltage Vsr1;
  • Step S120 in the second charging cycle, applying a second data voltage Vd2 to the gate of the driving transistor, and acquiring the first electrode after the second data voltage Vd2 is applied and before the driving transistor is turned off, at the first pole of the driving transistor The second sensing voltage Vs2, and determining whether the second sensing voltage Vs2 is equal to the second reference sensing voltage Vsr2;
  • K represents the current current coefficient of the driving transistor
  • Vth represents the current threshold voltage of the driving transistor
  • Vd1 represents the first data voltage
  • Vd2 represents the second data voltage
  • L1 represents the first brightness value
  • L2 represents the second brightness value
  • Both the first brightness value and the second brightness value are specified normalized brightness values.
  • FIG. 2A shows a graph C1 of a voltage (ie, a sense voltage) of a first pole of a driving transistor in a first charging period as a function of time and a voltage of a first pole of a driving transistor in a second charging period ( That is, the graph of the sense voltage) as a function of time C2.
  • a voltage ie, a sense voltage
  • step S110 for example, at the start time t0 of the first charging cycle, the first data voltage Vd1 is applied to the gate of the driving transistor, and then the first time period after the application of the first data voltage Vd1 ( That is, t1-t0), the first sensing voltage Vs1 is obtained at the first pole of the driving transistor, and it is determined whether the first sensing voltage Vs1 is equal to the first reference sensing voltage Vsr1.
  • step S120 for example, a second data voltage Vd2 is applied to the gate of the driving transistor at the start time t0 of the second charging cycle, and then a second time period after the application of the first data voltage Vd2 ( That is, t2-t0), the second sensing voltage Vs2 is obtained at the first pole of the driving transistor, and it is determined whether the second sensing voltage Vs2 is equal to the second reference sensing voltage Vsr2.
  • the second data voltage Vd2 is greater than the first data voltage Vd1, and the embodiment of the present disclosure includes but is not limited thereto, for example, the second data voltage Vd2 may be smaller than the first. Data voltage Vd1.
  • the first brightness value L1 and the second brightness value L2 are all specified (ie, preset) normalized brightness values, for example, corresponding to the maximum data voltage.
  • the maximum brightness value is 1 for normalization.
  • the first duration (t1-t0) and the second duration (t2-t0) may be set to be different, for example, as shown in FIG. 2A, an embodiment of the present disclosure.
  • the first duration (t1-t0) and the second duration (t2-t0) may also be set to be the same.
  • applying the first data voltage Vd1 or the second data voltage Vd2 to the gate of the driving transistor means that the data voltage supplied via the data line of the pixel circuit (for example, the data line Vdat in FIG. 6A or FIG. 6B) is the first data.
  • the first pole of the driving transistor refers to a pole electrically connected to the sensing switching transistor T2, which may be a source or a drain according to a specific pixel circuit design.
  • the first sensing voltage Vs1 is acquired in the first charging cycle and it is determined whether the first sensing voltage Vs1 is equal to the first reference sensing voltage Vsr1; and the second sensing is acquired in the second charging cycle.
  • the voltage Vs2 is determined whether the second sensing voltage Vs2 is equal to the second reference sensing voltage Vsr2; if the first sensing voltage Vs1 is equal to the first reference sensing voltage Vsr1, the second sensing voltage Vs2 is equal to the second reference sensing voltage Vsr2
  • the current current coefficient K of the driving transistor and the current threshold voltage Vth can be respectively obtained according to the first formula and the second formula, thereby completing the compensation detection of the pixel circuit, and improving the compensation effect and brightness of the display panel using the detecting method of the pixel circuit.
  • the sensing voltage is acquired at the first pole of the driving transistor before the driving transistor is turned off (first sensing)
  • the voltage Vs1 and the second sensing voltage Vs2) can shorten the time taken for the detection and improve the detection efficiency.
  • the first sensing voltage Vs1 being equal to the first reference sensing voltage Vsr1 may mean that the first sensing voltage Vs1 is completely equal to the first reference sensing voltage Vsr1, thereby making it possible for each
  • the compensation data established by the pixel circuit is more accurate; for example, the first sensing voltage Vs1 is equal to the first reference sensing voltage Vsr1, and the difference between the first sensing voltage Vs1 and the first reference sensing voltage Vsr1 is less than a certain value. (for example, less than 1% of the average value of the first sensing voltage Vs1 and the first reference sensing voltage Vsr1), whereby the time of pixel circuit detection can be shortened.
  • the description about the second sensing voltage Vs2 and the second reference sensing voltage Vsr2 is the same as that, and will not be described again.
  • the detection method provided by the embodiment of the present disclosure further includes the following operations.
  • Step S210 applying a first reference data voltage Vdr1 to the gate of the driving transistor in the first reference charging period, and acquiring the first reference at the first pole of the driving transistor at a first time after the first reference data voltage Vdr1 is applied Sense voltage Vsr1;
  • Step S220 applying a second reference data voltage Vdr2 to the gate of the driving transistor in the second reference charging period, and acquiring a second reference at the first pole of the driving transistor for a second duration after the application of the second reference data voltage Vdr2 Sense voltage Vsr2;
  • Vdr1 denotes a first reference data voltage
  • Vdr2 denotes a second reference data voltage
  • Kr denotes a reference current coefficient of the driving transistor
  • Vthr denotes a reference threshold voltage of the driving transistor
  • L1 denotes a first luminance value
  • L2 denotes a second luminance value.
  • FIG. 2C shows a graph C1' of the voltage of the first pole of the driving transistor in the first reference charging period and a voltage of the first pole of the driving transistor in the second reference charging period as a function of time.
  • Graph C2' shows a graph C1' of the voltage of the first pole of the driving transistor in the first reference charging period and a voltage of the first pole of the driving transistor in the second reference charging period as a function of time.
  • step S210 for example, the first reference data voltage Vdr1 is applied to the gate of the driving transistor at the start time t0 of the first reference charging cycle, and then the first reference data voltage Vdr1 is applied. For a period of time (ie, t1-t0), the first reference sense voltage Vsr1 is acquired at the first pole of the drive transistor.
  • step S220 for example, the second reference data voltage Vdr2 is applied to the gate of the driving transistor at the start time t0 of the second reference charging cycle, and then after the application of the second reference data voltage Vdr2
  • the second duration ie, t2-t0
  • applying the first reference data voltage Vdr1 or the second reference data voltage Vdr2 to the gate of the driving transistor means that the voltage supplied through the data line of the pixel circuit is the first reference data voltage Vdr1 or the second reference data voltage Vdr2. .
  • the first reference charging cycle is prior to the first charging cycle.
  • the first reference charging cycle may be in a shutdown state of the corresponding display device during the shutdown process, and the first charging cycle may be located during the first power-on period of the corresponding display device after the first reference charging cycle, that is, after the corresponding display device is powered on.
  • the first reference charging period may also be in a power-on state when the corresponding display device is powered on, that is, during the startup period after the power-on to the normal display, the first charging period may be located after the first reference charging period. period.
  • the first charging period may be between the display periods of the normal display of the corresponding display device; the display period may be selected as various appropriate periods, which are not specifically limited herein.
  • the detecting method of the pixel circuit may further include the following operations.
  • Step S140 in the third charging cycle, applying a third data voltage Vd3 to the gate of the driving transistor, and acquiring a third sensing voltage Vs3 at the first pole of the driving transistor for the first time after the application of the third data voltage Vd3 .
  • FIG. 3A illustrates that in a case where the first sensing voltage Vs1 is not equal to the first reference sensing voltage Vsr1 (eg, the first sensing voltage Vs1 is smaller than the first reference sensing voltage Vsr1), the first reference charging period a graph of the voltage of the first pole of the driving transistor as a function of time, a graph of the voltage of the first pole of the driving transistor in the first charging period as a function of time, and a first pole of the driving transistor in the third charging period A graph of voltage versus time.
  • the third data voltage Vd3 is applied to the gate of the driving transistor at the start time t0 of the third charging cycle, and then the same first duration (ie, t1-t0) after the application of the third data voltage Vd3, at the driving transistor
  • the first pole acquires the third sensing voltage Vs3.
  • applying the third data voltage Vd3 to the gate of the driving transistor means that the data voltage supplied through the data line of the pixel circuit is the third data voltage Vd3.
  • the third data voltage Vd3 may be selected such that the difference between the third sensing voltage Vs3 and the first reference sensing voltage Vsr1 is smaller than the first sensing voltage Vs1 and the first reference sensing. The difference between the voltages Vsr1.
  • the difference between the third sensing voltage Vs3 and the first reference sensing voltage Vsr1 refers to the absolute value of the difference between the third sensing voltage Vs3 and the first reference sensing voltage Vsr1
  • ; the difference between the first sensing voltage Vs1 and the first reference sensing voltage Vsr1 is the absolute value of the difference between the first sensing voltage Vs1 and the first reference sensing voltage Vsr1
  • the difference between the third sensing voltage Vs3 and the first reference sensing voltage Vsr1 is smaller than the difference between the first sensing voltage Vs1 and the first reference sensing voltage Vsr1.
  • the specific method may be set according to actual conditions, and the embodiment of the present disclosure does not limit this.
  • the following method may be employed such that the difference
  • that is, in the case where the first sensing voltage Vs1 is smaller than the first reference sensing voltage Vsr1, the third data voltage Vd3 is made larger than the value of the first data voltage Vd1; In a case where the voltage Vs1 is greater than the first reference sensing voltage Vsr1, the third data voltage Vd3 is made smaller than the value of the first data voltage Vd1.
  • the sensing voltage Vs1 can be increased by increasing the data voltage. Therefore, in the third charging cycle, the third sensing voltage Vs3 can be increased by making the third data voltage Vd3 larger than the first data voltage Vd1, so that the third sensing voltage Vs3 and the first reference sensing voltage Vsr1 can be made.
  • is smaller than the difference
  • the third data voltage Vd3 may be made smaller than the value of the first data voltage Vd1, such that the third sensing voltage Vs3 is the first.
  • between the reference sensing voltages Vsr1 is smaller than the difference
  • the detecting method of the pixel circuit may further include the following operations.
  • Step S150 in the fourth charging cycle, applying a fourth data voltage Vd4 to the gate of the driving transistor, and acquiring a fourth sensing voltage Vs4 at the first pole of the driving transistor for a second duration after the fourth data voltage Vd4 is applied.
  • FIG. 3B illustrates that in the case where the second sensing voltage Vs2 is not equal to the second reference sensing voltage Vsr2 (eg, the second sensing voltage Vs2 is smaller than the second reference sensing voltage Vsr2), the second reference charging period a graph of the voltage of the first pole of the driving transistor as a function of time, a graph of the voltage of the first pole of the driving transistor in the second charging period as a function of time, and a first pole of the driving transistor in the fourth charging period A graph of voltage versus time.
  • the fourth data voltage Vd4 is applied to the gate of the driving transistor at the start time t0 of the fourth charging cycle, and then the same second duration (ie, t2-t0) after the application of the fourth data voltage Vd4, at the driving transistor
  • the first pole acquires the fourth sensing voltage Vs4. It should be noted that applying the fourth data voltage Vd4 to the gate of the driving transistor means that the data voltage supplied through the data line of the pixel circuit is the fourth data voltage Vd4.
  • the fourth data voltage Vd4 may be selected such that the difference between the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2 is smaller than the second sensing voltage Vs2 and the second reference sensing The difference between the voltages Vsr2.
  • the difference between the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2 refers to the absolute value of the difference between the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2
  • the difference between the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2 is smaller than the difference between the second sensing voltage Vs2 and the second reference sensing voltage Vsr2
  • the specific method may be set according to actual conditions, and the embodiment of the present disclosure does not specifically limit this.
  • the following method may be adopted such that the difference
  • the fourth sensing voltage Vs4 can be increased by making the fourth data voltage Vd4 larger than the second data voltage Vd2, so that the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2 can be made.
  • is smaller than the difference
  • the fourth data voltage Vd4 may be made smaller than the value of the second data voltage Vd2 such that the fourth sensing voltage Vs4 and the second
  • between the reference sensing voltages Vsr2 is smaller than the difference
  • the first charging period and the third charging period may be between display periods in the power-on state.
  • the third charging cycle can be after the first charging cycle.
  • the first charging cycle and the time interval between the two sets of different frame images may be respectively performed.
  • the third charging cycle may be located to display the nth frame image and display the n+1th (n is an integer greater than 3) The time gap between frame images. In this way, the time gap between different frame images can be fully utilized for detection.
  • the first charging cycle and the first charging cycle may be sequentially performed in time intervals between different frame images.
  • Three charging cycles For example, in the time gap between the display of the third frame image and the display of the fourth frame image, the first charging cycle and the third charging cycle are sequentially performed. In this way, the detection efficiency can be improved.
  • the second charging period and the fourth charging period may be between display periods in the power-on state.
  • the fourth charging cycle can be located after the second charging cycle.
  • the second charging cycle and the time interval between the two different frame images may be respectively performed.
  • the fourth charging cycle in a case where the second charging cycle is between displaying the third frame image and displaying the fourth frame image, the fourth charging cycle may be located to display the nth frame image and display the n+1th (n is an integer greater than 3)
  • n is an integer greater than 3
  • the second charging cycle and the second charging cycle may be sequentially performed in time intervals between different frame images.
  • Four charge cycles For example, in the time gap between the display of the third frame image and the display of the fourth frame image, the second charging cycle and the fourth charging cycle are sequentially performed. In this way, the detection efficiency can be improved.
  • the detecting method provided by the embodiment of the present disclosure may further include the following operations.
  • Step S160 in the case that the third sensing voltage Vs3 is still not equal to the first reference sensing voltage Vsr1, then repeating the third charging cycle until the third sensing voltage Vs3 is equal to the first reference sensing voltage Vsr1;
  • Step S170 in a case where the fourth sensing voltage Vs4 is still not equal to the second reference sensing voltage Vsr2, repeating the fourth charging cycle until the fourth sensing voltage Vs4 is equal to the second reference sensing voltage Vsr2;
  • the sixth formula: Vth (Vd4 * L1 1/2 - Vd3 * L2 1/2 ) / (L1 1/2 - L2 1/2 ), obtains the current threshold voltage of the driving transistor.
  • step S160 as shown in Fig. 4A, the applied third data voltage Vd3 may be continuously adjusted by successive approximation until a sensing voltage equal to the first reference sensing voltage Vsr1 is finally obtained.
  • repeating the third charging cycle means applying the adjusted third data voltage Vd3 to the gate of the driving transistor in the other third charging cycle (for example, adjusting from Vd31 to Vd32, and adjusting from Vd32 to Vd33..
  • the third sensing voltages Vs3 are Vs31, Vs32, and Vs33, respectively, to continuously reduce the difference between the third sensing voltage Vs3 and the first reference sensing voltage Vsr1.
  • the third data voltage may be determined based on the difference
  • the amount of change of Vd3 is ⁇ Vd3.
  • step S170 the successive approximation method can also be used to continuously adjust the applied fourth data voltage Vd4 until finally obtaining a sensing voltage equal to the second reference sensing voltage Vsr2.
  • repeating the fourth charging cycle means applying the adjusted fourth data voltage Vd4 to the gate of the driving transistor in the other fourth charging cycle (for example, adjusting from Vd41 to Vd42, and adjusting from Vd42 to Vd43..
  • the fourth sensing voltages Vs4 are Vs41, Vs42, and Vs43, respectively, to continuously reduce the difference between the fourth sensing voltage Vs4 and the second reference sensing voltage Vsr2.
  • the following operations may also be included.
  • Step S310 Acquire a reference threshold voltage Vthr and a reference current coefficient Kr.
  • the method for obtaining the reference threshold voltage Vthr and the reference current coefficient Kr of the driving transistor can be set according to the actual situation, which is not limited by the embodiment of the present disclosure.
  • the method of acquiring the reference threshold voltage Vthr and the reference current coefficient Kr will be exemplarily described below with reference to FIGS. 5A to 5C.
  • acquiring the reference threshold voltage Vthr may include the following operations.
  • obtaining the reference current coefficient Kr may include the following operations.
  • the shutdown charge cycle may be made to be a different charge cycle than the first reference charge cycle or the second reference charge cycle, whereby only the acquired reference threshold voltage Vthr may be saved.
  • the shutdown data voltage Vdc may not be equal to the first reference data voltage Vdr1 or the second reference data voltage Vdr2.
  • the shutdown charging cycle may be the same as the first reference charging cycle, that is, the same charging cycle.
  • the shutdown data voltage Vdc and the first reference data voltage Vdr1 may be Equal, thereby simplifying the detection method of the pixel circuit.
  • the shutdown charging cycle may be the same as the second reference charging cycle, that is, the same charging cycle.
  • the shutdown data voltage Vdc and the second reference data voltage Vdr2 are It can be equal, whereby the detection method of the pixel circuit can be simplified.
  • the first reference sensing voltage Vsr1 with the first sensing voltage Vs1 obtained by applying the first data voltage Vd1
  • comparing the second reference sensing voltage Vsr2 with the applying The second sensing voltage Vs2 obtained by the second duration after the data voltage Vd2 can acquire the current current coefficient K of the pixel circuit while acquiring the current threshold voltage Vth of the pixel circuit, thereby completing the compensation detection of the pixel circuit, which can be improved.
  • the detecting method of the pixel circuit provided by the embodiment of the present disclosure may be used to detect the threshold voltage and current coefficient of the driving transistor T3 (N-type transistor) in the pixel circuit illustrated in FIG. 6A, but embodiments of the present disclosure are not limited thereto.
  • the detecting method of the pixel circuit provided by the embodiment of the present disclosure can also be used to detect the threshold voltage and current coefficient of the driving transistor T3 (P-type transistor) in the pixel circuit shown in FIG. 6B.
  • the specific structure of the pixel circuit will be specifically described below by taking the pixel circuit shown in FIG. 6A as an example, but the embodiment of the present disclosure does not limit this.
  • the pixel circuit includes a driving transistor T3.
  • the pixel circuit may further include a light emitting element EL and a sensing switching transistor T2.
  • the light emitting element EL may be an organic light emitting diode, but embodiments of the present disclosure are not limited thereto, and may be, for example, a quantum dot light emitting diode (QLED) or the like.
  • QLED quantum dot light emitting diode
  • the second pole of the driving transistor T3 may be configured to be connected to the first power voltage terminal VDD to receive the first voltage provided by the first power voltage terminal VDD, the first voltage may be, for example, a constant positive voltage; the driving transistor T3 The first pole may be configured to be connected to the first pole of the light emitting element EL.
  • the second pole of the light emitting element EL is connected to the second power voltage terminal VSS, the second power voltage terminal VSS can provide a constant voltage, for example, and the voltage supplied by the second power voltage terminal VSS can be, for example, smaller than the voltage supplied by the first power voltage terminal VDD.
  • the second power supply voltage terminal VSS can be grounded, for example, but the embodiment of the present disclosure does not limit this.
  • the first pole (source) of the sense switching transistor T2 is electrically coupled to the first pole of the drive transistor T3.
  • the pixel circuit further includes a sensing line SEN, and the second electrode of the sensing switching transistor T2 is electrically connected to the sensing line SEN, for example, and the detecting circuit (not shown in FIG. 6A). Electrical connection.
  • FIG. 6A shows that as shown in FIG. 6A, the first pole (source) of the sense switching transistor T2 is electrically coupled to the first pole of the drive transistor T3.
  • the pixel circuit further includes a sensing line SEN, and the second electrode of the sensing switching transistor T2 is electrically connected to the sensing line SEN, for example, and the detecting circuit (not shown in FIG. 6A). Electrical connection.
  • the pixel circuit may further include a data writing transistor T1 and a storage capacitor Cst, and the data writing transistor T1 is configured to write a data signal to the gate of the driving transistor T3 (for example, the first data voltage, the first The second data voltage, the first reference data voltage, and the second reference data voltage, etc., the storage capacitor Cst is configured to store the data signal.
  • the pixel circuit may further include a data line Vdat, and the first electrode of the data writing transistor T1 is electrically connected to the data line Vdat.
  • At least one embodiment of the present disclosure also provides a driving method of a display panel.
  • the display panel may include pixel circuits, and the pixel circuits included in the display panel are arranged, for example, in an array.
  • the pixel circuit included in the display panel may be the pixel circuit shown in FIG. 6A or 6B.
  • the driving method may include the following operations.
  • Step S410 Perform a detection method of the pixel circuit provided by any one of the embodiments of the present disclosure for obtaining a current threshold voltage Vth and a current current coefficient K of the driving transistor T3 of the pixel circuit.
  • the method for detecting the pixel circuit can be referred to the corresponding description in the foregoing embodiment, and details are not described herein again.
  • the driving method of the display panel provided by the embodiment of the present disclosure may further include the following operations.
  • Vc represents the compensation data voltage
  • K represents the current current coefficient
  • Vth represents the current threshold voltage
  • L represents the normalized luminance value to be displayed by the pixel circuit.
  • the current threshold voltage and the current current coefficient of the driving transistor T3 of the pixel circuit may be detected row by row, and then, the current threshold voltage and the current current coefficient of the driving transistor T3 of all the pixel circuits of the display panel are acquired. Thereafter, a compensation data voltage can be established for each pixel circuit. Finally, data compensation is performed on the display panel based on the established compensation data voltage, thereby completing one cycle of data compensation.
  • the detection method of the pixel circuit provided by any embodiment of the present disclosure may be performed on the pixel circuit located in the first row, and the current threshold voltage and the current current coefficient of the driving transistor T3 of the pixel circuit located in the first row are acquired;
  • the detecting method of the pixel circuit provided by any one of the embodiments of the present disclosure may be performed on the pixel circuit located in the second row, and the current threshold voltage and the current current coefficient of the driving transistor T3 of the pixel circuit located in the second row may be acquired;
  • the pixel circuits of the display panel located in other rows perform line-by-line detection until the threshold voltage and current current coefficient of the driving transistor T3 of all the pixel circuits of the display panel are acquired; finally, the compensation data voltage is established for each pixel circuit, and the display panel is Perform data compensation.
  • a compensation data voltage is established for each pixel circuit of the row, and then the pixels located in the row are The circuit performs data compensation. For example, the detection may be performed for the pixel circuit of the first row, the compensation data voltage is established, and the data compensation is performed. Then, the pixel circuit of the fifth row may be detected, the compensation data voltage is established, and the data compensation is performed.
  • the second row may be The pixel circuit performs detection, establishes compensation data voltage, and performs data compensation until all pixel circuits in the display panel are detected, the compensation data voltage is established, and data compensation is performed, thereby realizing one cycle of data compensation for the display panel.
  • the driving method of the display panel provided by the embodiment of the present disclosure can implement detection of the current threshold voltage of the driving transistor T3 and the current current coefficient during power-on (for example, between adjacent display periods), thereby realizing real-time
  • the compensation can further improve the compensation effect and the brightness uniformity of the display panel to which the driving method is applied.
  • At least one embodiment of the present disclosure also provides a display device including a pixel circuit and a control circuit.
  • the pixel circuit may be the pixel circuit shown in FIG. 6A or 6B.
  • the display device provided by the embodiment of the present disclosure is specifically described below by taking the pixel circuit shown in FIG. 6A as an example, but the embodiment of the present disclosure is not limited thereto.
  • FIG. 8 shows a schematic diagram of a display panel 10.
  • the display device 10 includes a pixel circuit 110 and a control circuit 120, and the pixel circuit 110 includes a driving transistor T3.
  • the control circuit 120 is configured to perform the detection method of the pixel circuit provided by the embodiment of the present disclosure, that is, the control circuit 120 may be configured to perform or partially perform steps S110, S120, S130, S140, S150, S160 in the above embodiment. S170, S180, S210, S220, S230, S310, S301, S302, and the like.
  • the display device 10 may further include a data driving circuit 130, a detecting circuit 140, and a scan driving circuit (not shown in FIG. 8).
  • control circuit 120 can also be configured to control data drive circuit 130 and detection circuit 140.
  • the data driving circuit 130 is configured to output a first reference data voltage, a second reference data voltage, a first data voltage, a second data voltage, a third data voltage, and a fourth data voltage, etc., at different times.
  • the scan driving circuit outputs a scan signal for the data write transistor T1 and the sense transistor T2.
  • the scan drive circuit can be connected to the gate G1 of the write transistor T1 and the gate G2 of the sense transistor T2 to provide a corresponding scan signal. Thereby controlling the turn-on and turn-off of the data write transistor T1 and the sense transistor T2.
  • the pixel circuit is further configured to receive the first reference data voltage, the second reference data voltage, the first data voltage, the second data voltage, the third data voltage, and the fourth data voltage, etc., and apply to the gate of the driving transistor T3 .
  • the detection circuit 140 is configured to read the first reference sensing voltage, the second reference sensing voltage, the first sensing voltage, the second sensing voltage, the third sensing voltage, and the first electrode from the first pole of the driving transistor T3 Four sense voltages, etc.
  • the data driving circuit 130 may be further configured to provide a shutdown data voltage
  • the pixel circuit may be further configured to receive the shutdown data voltage and apply the shutdown data voltage to the gate of the driving transistor T3, and the detecting circuit 140 may also be configured as a slave driver.
  • the first pole of transistor T3 reads the cut-off sense voltage.
  • the pixel circuit may further include a light emitting element EL and a sensing switching transistor T2, and the light emitting element EL may be, for example, an organic light emitting diode, but embodiments of the present disclosure are not limited thereto, and may be, for example, a quantum dot light emitting diode (QLED) or the like.
  • the second pole and the first pole of the driving transistor T3 may be configured to be respectively connected to the first power voltage terminal VDD and the first pole of the light emitting element EL, and the second pole of the light emitting element EL is connected to the second power voltage terminal VSS.
  • the first pole of the sense switching transistor T2 is electrically connected to the first pole of the driving transistor T3, and the second pole of the sensing switching transistor T2 is electrically connected to the detecting circuit 140.
  • the pixel circuit may further include a sensing line SEN that electrically connects the second electrode of the sensing switching transistor T2 with the detecting circuit 140.
  • the pixel circuit may further include a data writing transistor T1 and a storage capacitor Cst.
  • the data writing transistor T1 is configured to acquire a data voltage from the data driving circuit 130, and write the data voltage to the gate of the driving transistor T3.
  • the storage capacitor Cst Store the data voltage.
  • the pixel circuit may further include a data line Vdat to which the first electrode of the data writing transistor T1 is connected.
  • control circuit 120 can include a processor 121 configured to store computer instructions that are adaptable for execution by the processor 121, and a storage medium 122 that is implemented when executed by the processor 121.
  • the detection method provided by the disclosed embodiments.
  • the processor 121 is, for example, a central processing unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, for example, the processor can be implemented as a general purpose processor, or can also be implemented as a single chip microcomputer. , microprocessors, digital signal processors, dedicated image processing chips, field programmable logic arrays, etc.
  • CPU central processing unit
  • the processor can be implemented as a general purpose processor, or can also be implemented as a single chip microcomputer. , microprocessors, digital signal processors, dedicated image processing chips, field programmable logic arrays, etc.
  • storage medium 122 can include volatile memory and/or nonvolatile memory, and can include, for example, read only memory (ROM), a hard disk, flash memory, and the like.
  • the storage medium can be implemented as one or more computer program products, which can include various forms of computer readable storage media, on which one or more can be stored Execution code (for example, computer program instructions).
  • the processor can execute the program instruction to perform the detection method provided by the embodiment of the present disclosure, thereby obtaining the current threshold voltage and the current current coefficient of the driving transistor of the pixel circuit included in the display device, thereby implementing the display device Data compensation function.
  • the storage medium can also store various other applications and various data, such as reference threshold voltages and/or reference current coefficients for each pixel circuit, as well as various data used and/or generated by the application, and the like.
  • the display device provided by the embodiment of the present disclosure can implement detection of the current threshold voltage of the driving transistor and the current current coefficient during power-on (for example, between adjacent display periods), thereby being performed during startup of the display device
  • Real-time detection and real-time compensation can improve the compensation effect and brightness uniformity of the display device.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素电路的检测方法、显示面板的驱动方法和显示装置。该像素电路包括驱动晶体管(T3)，该像素电路的检测方法包括：在第一充电周期中，向驱动晶体管(T3)的栅极施加第一数据电压(Vd1)，在施加第一数据电压(Vd1)后的第一时长且在驱动晶体管(T3)截止之前，在驱动晶体管(T3)的第一极获取第一感测电压(Vs1)，并判断第一感测电压(Vs1)是否等于第一参考感测电压(Vsr1)；在第二充电周期中，向驱动晶体管(T3)的栅极施加第二数据电压(Vd2)，在施加第二数据电压(Vd2)后的第二时长且在驱动晶体管(T3)截止之前，在驱动晶体管(T3)的第一极获取第二感测电压(Vs2)，并判断第二感测电压(Vs2)是否等于第二参考感测电压(Vsr2)。该检测方法可以在开机状态实现像素电路的补偿检测，进而提升补偿效果和亮度均匀度。

Description

像素电路的检测方法、显示面板的驱动方法和显示装置
本申请要求于2018年1月29日递交的中国专利申请第201810085782.1号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开的实施例涉及一种像素电路的检测方法、显示面板的驱动方法和显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)显示面板由于具有视角宽、对比度高、响应速度快以及相比于无机发光显示器件的更高的发光亮度、更低的驱动电压等优势而逐渐受到人们的广泛关注。由于上述特点，有机发光二极管(OLED)显示面板可以适用于手机、显示器、笔记本电脑、数码相机、仪器仪表等具有显示功能的装置。
发明内容
本公开至少一实施例提供一种像素电路的检测方法，所述像素电路包括驱动晶体管，所述检测方法包括：在第一充电周期中，向所述驱动晶体管的栅极施加第一数据电压，在施加所述第一数据电压后的第一时长且在所述驱动晶体管截止之前，在所述驱动晶体管的第一极获取第一感测电压，并判断所述第一感测电压是否等于第一参考感测电压；在第二充电周期中，向所述驱动晶体管的栅极施加第二数据电压，在施加所述第二数据电压后的第二时长且在所述驱动晶体管截止之前，在所述驱动晶体管的第一极获取第二感测电压，并判断所述第二感测电压是否等于第二参考感测电压。如果所述第一感测电压等于所述第一参考感测电压，所述第二感测电压等于所述第二参考感测电压，则根据所述第一数据电压和所述第二数据电压并根据第一公式：K＝(Vd1-Vd2)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前电流系数；根据第二公式：Vth＝(Vd2*L1 1/2–Vd1*L2 1/2)/ (L1 1/2–L2 1/2)，获取所述驱动晶体管的当前阈值电压。K表示所述驱动晶体管的当前电流系数，Vth表示所述驱动晶体管的当前阈值电压，Vd1表示所述第一数据电压，Vd2表示所述第二数据电压，L1表示第一亮度值，L2表示第二亮度值，所述第一亮度值和所述第二亮度值均是指定的归一化的亮度值。
例如，本公开一实施例提供的检测方法还包括：在第一参考充电周期中，向所述驱动晶体管的栅极施加第一参考数据电压，在施加所述第一参考数据电压后的所述第一时长，在所述驱动晶体管的第一极获取所述第一参考感测电压；在第二参考充电周期中，向所述驱动晶体管的栅极施加第二参考数据电压，在施加所述第二参考数据电压后的所述第二时长，在所述驱动晶体管的第一极获取所述第二参考感测电压。由第三公式：Vdr1＝Kr*L1 1/2+Vthr，获得所述第一参考数据电压，由第四公式：Vdr2＝Kr*L2 1/2+Vthr，获得所述第二参考数据电压。Vdr1表示所述第一参考数据电压，Vdr2表示所述第二参考数据电压，Kr表示所述驱动晶体管的参考电流系数，Vthr表示所述驱动晶体管的参考阈值电压。
例如，本公开一实施例提供的检测方法还包括：在所述第一感测电压不等于所述第一参考感测电压的情况下，在第三充电周期中，向所述驱动晶体管的栅极施加第三数据电压，在施加所述第三数据电压后的所述第一时长，在所述驱动晶体管的第一极获取第三感测电压。选择所述第三数据电压以使得所述第三感测电压与所述第一参考感测电压之间的差值小于所述第一感测电压与所述第一参考感测电压之间的差值。
例如，本公开一实施例提供的检测方法还包括：在所述第二感测电压不等于所述第二参考感测电压的情况下，在第四充电周期中，向所述驱动晶体管的栅极施加第四数据电压，在施加所述第四数据电压后的所述第二时长，在所述驱动晶体管的第一极获取第四感测电压。选择所述第四数据电压以使得所述第四感测电压与所述第二参考感测电压之间的差值小于所述第二感测电压与所述第一参考感测电压之间的差值。
例如，在本公开一实施例提供的检测方法中，在所述第一感测电压小于所述第一参考感测电压的情况下，使得所述第三数据电压大于所述第一数据电压的取值；在所述第一感测电压大于所述第一参考感测电压的情况下，使得所述第三数据电压小于所述第一数据电压的取值。
例如，在本公开一实施例提供的检测方法中，在所述第二感测电压小于所述第二参考感测电压的情况下，使得所述第四数据电压大于所述第二数据电压的取值；在所述第二感测电压大于所述第二参考感测电压的情况下，使得所述第四数据电压小于所述第二数据电压的取值。
例如，本公开一实施例提供的检测方法还包括：在所述第三感测电压仍然不等于所述第一参考感测电压的情况下，则重复进行所述第三充电周期，直至所述第三感测电压等于所述第一参考感测电压；在所述第四感测电压仍然不等于所述第二参考感测电压的情况下，则重复进行所述第四充电周期，直至所述第四感测电压等于所述第二参考感测电压；以及根据所述第三数据电压和所述第四数据电压并根据第五公式：K＝(Vd3–Vd4)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前电流系数；根据第六公式：Vth＝(Vd4*L1 1/2–Vd3*L2 1/2)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前阈值电压。Vd3表示所述第三数据电压，Vd4表示所述第四数据电压。
例如，本公开一实施例提供的检测方法还包括获取所述参考阈值电压和所述参考电流系数。所述获取所述参考阈值电压包括：在关机状态的关机充电周期中，向所述驱动晶体管的栅极施加关机数据电压且在所述驱动晶体管截止之后，在所述驱动晶体管的第一极获取关机感测电压；所述驱动晶体管的参考阈值电压等于所述关机数据电压与所述关机感测电压的差值。所述获取所述参考电流系数包括：使所述像素电路的归一化的亮度值达到最大值1，获取此时施加在所述驱动晶体管的栅极上的数据电压Vmax，然后根据第七公式：Vmax＝Kr+Vthr，获取所述参考电流系数。
例如，在本公开一实施例提供的检测方法中，所述关机充电周期与所述第一参考充电周期相同，且所述关机数据电压与所述第一参考数据电压相等。或者，所述关机充电周期与所述第二参考充电周期相同，且所述关机数据电压与所述第二参考数据电压相等。
例如，在本公开一实施例提供的检测方法中，所述第一充电周期、所述第二充电周期、所述第三充电周期和所述第四充电周期位于显示周期之间。
例如，在本公开一实施例提供的检测方法中，所述第一时长与所述第二时长相同。
本公开至少一实施例还提供一种显示面板的驱动方法，所述显示面板包括像素电路，所述驱动方法包括：对所述像素电路执行本公开的实施例提供的任一项像素电路的检测方法，以用于获得所述像素电路的驱动晶体管的当前阈值电压和当前电流系数。
例如，本公开一实施例提供的驱动方法还包括：根据获得的所述当前阈值电压和所述当前电流系数并根据第八公式：Vc＝K*L 1/2+Vth，建立所述像素电路的补偿数据电压。Vc表示所述补偿数据电压，K表示所述当前电流系数，Vth表示所述当前阈值电压，L表示所述像素电路要显示的归一化的亮度值。
本公开至少一实施例还提供一种显示装置，包括像素电路和控制电路。所述像素电路包括驱动晶体管；所述控制电路配置为执行本公开的实施例提供的像素电路的检测方法。
例如，在本公开一实施例提供的显示装置中，所述控制电路还配置为执行：在第一参考充电周期中，向所述驱动晶体管的栅极施加第一参考数据电压，在施加所述第一参考数据电压后的所述第一时长，在所述驱动晶体管的第一极获取所述第一参考感测电压；在第二参考充电周期中，向所述驱动晶体管的栅极施加第二参考数据电压，在施加所述第二参考数据电压后的所述第二时长，在所述驱动晶体管的第一极获取所述第二参考感测电压。由第三公式：Vdr1＝Kr*L1 1/2+Vthr，获得所述第一参考数据电压，由第四公式：Vdr2＝Kr*L2 1/2+Vthr，获得所述第二参考数据电压。Vdr1表示所述第一参考数据电压，Vdr2表示所述第二参考数据电压，Kr表示所述驱动晶体管的参考电流系数，Vthr表示所述驱动晶体管的参考阈值电压。
例如，本公开一实施例提供的显示装置还包括数据驱动电路和检测电路。所述数据驱动电路配置为输出所述第一参考数据电压、所述第二参考数据电压、所述第一数据电压和所述第二数据电压。所述像素电路还配置为接收所述第一参考数据电压、所述第二参考数据电压、所述第一数据电压和所述第二数据电压，并施加至所述驱动晶体管的栅极。所述检测电路配置为从所述驱动晶体管的第一极读取所述第一参考感测电压、所述第二参考感测电压、所述第一感测电压和所述第二感测电压。所述控制电路还配置为控制所述数据驱动电路和所述检测电路。
例如，在本公开一实施例提供的显示装置中，所述像素电路还包括发光元件和感测开关晶体管。所述驱动晶体管的第二极和第一极配置为分别连接至第一电源电压端以及所述发光元件的第一极，所述发光元件的第二极连接到第二电源电压端，所述感测开关晶体管的第一极与所述驱动晶体管的第一极电连接，且所述感测开关晶体管的第二极与所述检测电路电连接。
例如，在本公开一实施例提供的显示装置中，所述像素电路还包括感测线，所述感测线将所述感测开关晶体管的第二极与所述检测电路电连接。
例如，在本公开一实施例提供的显示装置中，所述像素电路还包括数据写入晶体管与存储电容。所述数据写入晶体管配置为从所述数据驱动电路获取数据电压，向所述驱动晶体管的栅极写入所述数据电压，所述存储电容存储所述数据电压。
例如，在本公开一实施例提供的显示装置中，所述控制电路包括处理器和存储介质，所述存储介质配置为存储有可适于所述处理器执行的计算机指令，且所述计算机指令被所述处理器执行时实施所述检测方法。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为一种像素电路的示意图；
图1B为另一种像素电路的示意图；
图1C为再一种像素电路的示意图；
图1D为一种感测电压随时间变化的曲线图；
图2A为在本公开的实施例提供的像素电路的检测方法中，第一充电周期和第二充电周期中的感测电压随时间变化的曲线图；
图2B为在本公开的实施例提供的像素电路的检测方法中，在第一时长和第二时长相同时第一充电周期和第二充电周期中的感测电压随时间变化的曲线图；
图2C为在本公开的实施例提供的像素电路的检测方法中，第一参考充电周期和第二参考充电周期中的感测电压随时间变化的曲线图；
图3A为在本公开的实施例提供的像素电路的检测方法中，第一充电周期、第三充电周期和第一参考充电周期中的感测电压随时间变化的曲线图；
图3B为在本公开的实施例提供的像素电路的检测方法中，第二充电周期、第四充电周期和第二参考充电周期中的感测电压随时间变化的曲线图；
图4A为在本公开的实施例提供的像素电路的检测方法中，在重复进行多次第三充电周期时感测电压随时间变化的曲线图；
图4B为在本公开的实施例提供的像素电路的检测方法中，在重复进行多次第四充电周期时感测电压随时间变化的曲线图；
图5A为在本公开的实施例提供的像素电路的检测方法中，关机充电周期中的感测电压随时间变化的曲线图；
图5B为在本公开的实施例提供的像素电路的检测方法中，在关机充电周期与第一参考充电周期相同时感测电压随时间变化的曲线图；
图5C为在本公开的实施例提供的像素电路的检测方法中，在关机充电周期与第二参考充电周期相同时感测电压随时间变化的曲线图；
图6A为本公开的实施例提供的一种像素电路的示意图；
图6B为本公开的实施例提供的另一种像素电路的示意图；
图7为本公开的实施例提供的显示面板的驱动方法的示意性流程图；
图8为本公开的实施例提供的显示装置的一种示例性的结构图；以及
图9为本公开的实施例提供的显示装置中的一种控制电路的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分 不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
OLED显示装置中的像素电路一般采用矩阵驱动方式，根据每个像素单元中是否引入开关元器件分为有源矩阵(Active Matrix)驱动和无源矩阵(Passive Matrix)驱动。AMOLED(Active Matrix OLED)在每一个像素的像素电路中都集成了一组薄膜晶体管和存储电容，通过对薄膜晶体管和存储电容的驱动控制，实现对流过OLED的电流的控制，从而使OLED根据需要发光。
AMOLED显示装置中使用的基础像素电路通常为2T1C像素电路，即利用两个薄膜晶体管(Thin-film transistor，TFT)和一个存储电容Cst来实现驱动OLED发光的功能。图1A和图1B分别示出了两种2T1C像素电路的示意图。
如图1A所示，一种2T1C像素电路包括开关晶体管T0、驱动晶体管N0以及存储电容Cst。例如，该开关晶体管T0的栅极连接扫描线以接收扫描信号Scan1；例如，该开关晶体管T0的源极连接到数据线以接收数据信号Vdata；该开关晶体管T0的漏极连接到驱动晶体管N0的栅极；驱动晶体管N0的源极连接到第一电压端以接收第一电压Vdd(高电压)，驱动晶体管N0的漏极连接到OLED的正极端；存储电容Cst的一端连接到开关晶体管T0的漏极以及驱动晶体管N0的栅极，另一端连接到驱动晶体管N0的源极以及第一电压端；OLED的负极端连接到第二电压端以接收第二电压Vss(低电压，例如接地电压)。该2T1C像素电路的驱动方式是通过两个TFT和存储电容Cst来控制像素的明暗(灰阶)。当通过扫描线施加扫描信号Scan1以开启开关晶体管T0时，数据驱动电路通过数据线输入的数据信号Vdata可以通过开关晶体管T0对存储电容Cst充电，由此可以将数据信号Vdata存储在存储电容Cst中，且此存储的数据信号Vdata可以控制驱动晶体管N0的导通程度，由此可以控制流过驱动晶体管N0以驱动OLED发光的电流大小， 即此电流决定该像素发光的灰阶。在图1A所示的2T1C像素电路中，开关晶体管T0为N型晶体管而驱动晶体管N0为P型晶体管。
如图1B所示，另一种2T1C像素电路也包括开关晶体管T0、驱动晶体管N0以及存储电容Cst，但是其连接方式略有改变，且驱动晶体管N0为N型晶体管。图1B的像素电路相对于图1A的不同之处包括：OLED的正极端连接到第一电压端以接收第一电压Vdd(高电压)，而负极端连接到驱动晶体管N0的漏极，驱动晶体管N0的源极连接到第二电压端以接收第二电压Vss(低电压，例如接地电压)。存储电容Cst的一端连接到开关晶体管T0的漏极以及驱动晶体管N0的栅极，另一端连接到驱动晶体管N0的源极以及第二电压端。该2T1C像素电路的工作方式与图1A所示的像素电路基本相同，这里不再赘述。
此外，对于图1A和图1B所示的像素电路，开关晶体管T0不限于N型晶体管，也可以为P型晶体管，只需要控制扫描信号Scan1进行相应地改变即可。
OLED显示装置通常包括多个按阵列排布的像素单元，每个像素单元例如可以包括上述像素电路。在像素电路进行显示时，像素电路中的驱动晶体管N0处于饱和状态下的输出电流I OLED可以通过如下公式得到：
I OLED＝1/2*K(Vg-Vs-Vth) 2
这里，K＝W/L*C*μ，W/L为驱动晶体管N0的沟道的宽长比(即，宽度与长度的比值)，μ为电子迁移率，C为单位面积的电容，Vg为驱动晶体管N0栅极的电压，Vs为驱动晶体管N0源极的电压，Vth为驱动晶体管N0的阈值电压。需要说明的是，在本公开的实施例中，将K称为像素电路中的驱动晶体管的电流系数，以下各实施例与此相同，不再赘述。
各个像素电路中的驱动晶体管的阈值电压Vth由于制备工艺可能存在差异，而且由于例如温度变化的影响，驱动晶体管的阈值电压Vth可能会产生漂移现象。同时，驱动晶体管的电流系数K随着时间也会发生老化现象。因此，各个驱动晶体管的阈值电压Vth以及电流系数K的不同以及老化可能会导致显示不良(例如显示不均匀)，所以就需要对阈值电压Vth以及电流系数K进行补偿。
例如，在经由开关晶体管T0向驱动晶体管N0的栅极施加数据信号(例如，数据电压)Vdata之后，数据信号Vdata可以对存储电容Cst充电，而且 由于数据信号Vdata可以使得驱动晶体管N0导通，则与存储电容Cst的一端电连接的驱动晶体管N0的源极或漏极的电压Vs可能相应地改变。
例如，图1C示出了一种可以检测驱动晶体管的阈值电压的像素电路(也即，3T1C电路)，驱动晶体管N0为N型晶体管。例如，如图1C所示，为了实现补偿功能，可以在2T1C电路的基础上引入感测晶体管S0。感测晶体管S0的第一端连接到驱动晶体管N0的源极，感测晶体管S0的第二端经由感测线与检测电路(图1C未示出)连接。由此当驱动晶体管N0导通之后，可以经由感测晶体管S0对检测电路充电，使得驱动晶体管N0的源极电位改变。当驱动晶体管N0的源极的电压Vs等于驱动晶体管N0的栅极电压Vg与驱动晶体管N0的阈值电压Vth的差值时，驱动晶体管N0截止。此时，可以在驱动晶体管N0截止后，再经由导通的感测晶体管S0从驱动晶体管N0的源极获取感测电压(即驱动晶体管N0截止后的源极的电压Vb)。在获取驱动晶体管N0截止后的源极的电压Vb之后，则可以获取驱动晶体管的阈值电压Vth＝Vdata-Vb，由此可以基于每个像素电路中驱动晶体管的阈值电压针对每个像素电路建立(即确定)补偿数据，进而可以实现对显示面板中的各个子像素的阈值电压进行补偿。
例如，图1D示出了一种经由导通的感测晶体管S0从驱动晶体管N0的源极获取的感测电压随时间变化的曲线图。发明人注意到，施加数据信号Vdata之后，在经由感测线对检测电路充电的过程中，随着对存储电容Cst等的充电时间的增加，充电速度将相应地降低(即感测电压增加的速度降低)(参见图1D)，这是因为充电电流将随着感测电压(即驱动晶体管N0的源极的电压Vs)的增加而降低。具体地，驱动晶体管N0处于饱和状态下输出电流I OLED可以通过如下公式得到：
I OLED＝1/2*K(Vg-Vs-Vth) 2
＝1/2*K(Vdata-Vs-Vth) 2
＝1/2*K((Vdata-Vth)-Vs) 2。
这里，K＝W/L*C*μ，W/L为驱动晶体管N0的沟道的宽长比(即，宽度与长度的比值)，μ为电子迁移率，C为单位面积的电容。
在驱动晶体管N0的源极的电压Vs增加至Vdata-Vth的过程中，随着Vs的增加，[(Vdata-Vth)-Vs]的值将不断降低，对应地，驱动晶体管N0输出的电流I OLED以及充电速度也将随之不断降低，因此，从充电起始到驱动晶 体管N0截止所需的时间Ts较长，因此通常需要在显示面板结束正常显示之后的关机过程中进行检测，而无法在开机期间(例如，显示过程中相邻的显示周期之间)实现驱动晶体管N0的阈值电压的检测，无法实现实时检测以及补偿，由此会降低显示面板的补偿效果以及亮度均匀度。
本公开至少一实施例提供一种像素电路的检测方法，该检测方法可以在开机期间实现像素电路的阈值电压和电流系数的检测，进而可以提升补偿效果和亮度均匀度。本公开至少一实施例还提供对应于上述检测方法的显示面板的驱动方法和显示装置。
下面结合附图对本公开的实施例进行详细说明。
本公开的一个实施例提供一种像素电路的检测方法，该像素电路的检测方法可以用于检测像素电路中的驱动晶体管的当前阈值电压Vth和当前电流系数K。例如，下面将结合图2A-图2C对本实施例提供的像素电路的检测方法做具体说明。
例如，像素电路可以包括驱动晶体管(例如，图6A或图6B中的驱动晶体管T3)。例如，向驱动晶体管施加的栅极电压记为DATA。例如，像素电路的检测方法可以包括如下操作。
步骤S110：在第一充电周期中，向驱动晶体管的栅极施加第一数据电压Vd1，在施加第一数据电压Vd1后的第一时长且在驱动晶体管截止之前，在驱动晶体管的第一极获取第一感测电压Vs1，并判断第一感测电压Vs1是否等于第一参考感测电压Vsr1；
步骤S120：在第二充电周期中，向驱动晶体管的栅极施加第二数据电压Vd2，在施加第二数据电压Vd2后的第二时长且在驱动晶体管截止之前，在驱动晶体管的第一极获取第二感测电压Vs2，并判断第二感测电压Vs2是否等于第二参考感测电压Vsr2；以及
步骤S130：如果第一感测电压Vs1等于第一参考感测电压Vsr1，第二感测电压Vs2等于第二参考感测电压Vsr2，则根据第一数据电压Vd1和第二数据电压Vd2并根据第一公式：K＝(Vd1-Vd2)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前电流系数K；根据第二公式：Vth＝(Vd2*L1 1/2–Vd1*L2 1/2)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前阈值电压Vth。
上述公式中，K表示驱动晶体管的当前电流系数，Vth表示驱动晶体管的当前阈值电压，Vd1表示第一数据电压，Vd2表示第二数据电压，L1表示 第一亮度值，L2表示第二亮度值，第一亮度值和第二亮度值均是指定的归一化的亮度值。
例如，图2A示出了第一充电周期中的驱动晶体管的第一极的电压(即感测电压)随时间变化的曲线图C1和第二充电周期中的驱动晶体管的第一极的电压(即感测电压)随时间变化的曲线图C2。
如图2A所示，在步骤S110中，例如在第一充电周期的起始时刻t0开始向驱动晶体管的栅极施加第一数据电压Vd1，然后在施加第一数据电压Vd1后的第一时长(即t1-t0)，在驱动晶体管的第一极获取第一感测电压Vs1，并判断第一感测电压Vs1是否等于第一参考感测电压Vsr1。
如图2A所示，在步骤S120中，例如在第二充电周期的起始时刻t0开始向驱动晶体管的栅极施加第二数据电压Vd2，然后在施加第一数据电压Vd2后的第二时长(即t2-t0)，在驱动晶体管的第一极获取第二感测电压Vs2，并判断第二感测电压Vs2是否等于第二参考感测电压Vsr2。
在步骤S130中，如果在步骤S110中判断第一感测电压Vs1等于第一参考感测电压Vsr1，且在步骤S120中判断第二感测电压Vs2等于第二参考感测电压Vsr2，则可以根据第一数据电压Vd1和第二数据电压Vd2并根据第一公式：K＝(Vd1-Vd2)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前电流系数K；以及根据第二公式：Vth＝(Vd2*L1 1/2–Vd1*L2 1/2)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前阈值电压Vth。
需要说明的是，在图2A中是以第二数据电压Vd2大于第一数据电压Vd1为例进行示意的，本公开的实施例包括但不限于此，例如第二数据电压Vd2还可以小于第一数据电压Vd1。
另外，需要说明的是，在本公开的实施例中，第一亮度值L1和第二亮度值L2均是指定的(即预设的)归一化的亮度值，例如以最大数据电压对应的最大亮度值为1进行归一化。
例如，在第一公式和第二公式中，可以使得第一亮度值L1＝1/4，第二亮度值L2＝1。本公开的实施例对L1和L2的取值不作限定，例如还可以使得L1＝1/9，L2＝1/4；或者L1＝1/9，L2＝1等。另外，在第一数据电压Vd1大于第二数据电压Vd2的情况下，还可以使得L1＝1，L2＝1/4；或者L1＝1/4，L2＝1/9；又或者L1＝1，L2＝1/9等。
另外，需要说明的是，在本公开的实施例中，第一时长(t1-t0)与第二 时长(t2-t0)可以设置为不同，例如如图2A中所示，本公开的实施例包括但不限于此，例如如图2B所示，第一时长(t1-t0)与第二时长(t2-t0)还可以设置为相同。
例如，向驱动晶体管的栅极施加第一数据电压Vd1或第二数据电压Vd2是指经由像素电路的数据线(例如，图6A或图6B中的数据线Vdat)提供的数据电压为第一数据电压Vd1或第二数据电压Vd2。这里，驱动晶体管的第一极是指与感测开关晶体管T2电连接的一极，其根据具体的像素电路设计可以是源极或漏极。
在本公开的实施例中，在第一充电周期中获取第一感测电压Vs1并判断第一感测电压Vs1是否等于第一参考感测电压Vsr1；在第二充电周期中获取第二感测电压Vs2并判断第二感测电压Vs2是否等于第二参考感测电压Vsr2；如果第一感测电压Vs1等于第一参考感测电压Vsr1、第二感测电压Vs2等于第二参考感测电压Vsr2，则可以根据第一公式和第二公式分别获取驱动晶体管的当前电流系数K和当前阈值电压Vth，从而完成像素电路的补偿检测，提升使用该像素电路的检测方法的显示面板的补偿效果以及亮度均匀度。在本公开的实施例提供的像素电路的检测方法中，在第一充电周期和第二充电周期中，均是在驱动晶体管截止之前在驱动晶体管的第一极获取感测电压(第一感测电压Vs1和第二感测电压Vs2)，从而可以缩短检测所用的时间，提高检测效率。
在本公开的实施例中，例如，第一感测电压Vs1等于第一参考感测电压Vsr1可以指第一感测电压Vs1与第一参考感测电压Vsr1完全相等，由此可以使得针对每个像素电路建立的补偿数据更精确；又例如，第一感测电压Vs1等于第一参考感测电压Vsr1还可以指第一感测电压Vs1与第一参考感测电压Vsr1的差值小于一定的数值(例如，小于第一感测电压Vs1与第一参考感测电压Vsr1的平均值的1％)，由此可以缩短像素电路检测的时间。关于第二感测电压Vs2与第二参考感测电压Vsr2的描述与此相同，不再赘述。
例如，如图2C所示，本公开的实施例提供的检测方法还包括如下操作。
步骤S210：在第一参考充电周期中，向驱动晶体管的栅极施加第一参考数据电压Vdr1，在施加第一参考数据电压Vdr1后的第一时长，在驱动晶体管的第一极获取第一参考感测电压Vsr1；
步骤S220：在第二参考充电周期中，向驱动晶体管的栅极施加第二参考 数据电压Vdr2，在施加第二参考数据电压Vdr2后的第二时长，在驱动晶体管的第一极获取第二参考感测电压Vsr2；以及
步骤S230：由第三公式：Vdr1＝Kr*L1 1/2+Vthr，获得第一参考数据电压Vdr1，由第四公式：Vdr2＝Kr*L2 1/2+Vthr，获得第二参考数据电压Vdr2。
Vdr1表示第一参考数据电压，Vdr2表示第二参考数据电压，Kr表示驱动晶体管的参考电流系数，Vthr表示驱动晶体管的参考阈值电压，L1表示第一亮度值，L2表示第二亮度值。
例如，图2C示出了第一参考充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图C1'和第二参考充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图C2'。
如图2C所示，在步骤S210中，例如在第一参考充电周期的起始时刻t0开始向驱动晶体管的栅极施加第一参考数据电压Vdr1，然后在施加第一参考数据电压Vdr1后的第一时长(即t1-t0)，在驱动晶体管的第一极获取第一参考感测电压Vsr1。
如图2C所示，在步骤S220中，例如在第二参考充电周期的起始时刻t0开始向驱动晶体管的栅极施加第二参考数据电压Vdr2，然后在施加第二参考数据电压Vdr2后的第二时长(即t2-t0)，在驱动晶体管的第一极获取第二参考感测电压Vsr2。
需要说明的是，向驱动晶体管的栅极施加第一参考数据电压Vdr1或第二参考数据电压Vdr2是指经像素电路的数据线提供的电压为第一参考数据电压Vdr1或第二参考数据电压Vdr2。
例如，第一参考充电周期位于第一充电周期之前。例如，第一参考充电周期可以位于相应显示装置在关机过程中的关机状态，而第一充电周期可以位于第一参考充电周期之后相应显示装置的再次的开机期间，即相应显示装置开机之后的启动期间或正常显示期间；例如，第一参考充电周期还可以位于相应显示装置开机时的开机状态，即开机之后到正常显示之前的启动期间，第一充电周期可以位于第一参考充电周期之后的开机期间。例如，第一充电周期可以位于相应显示装置的正常显示的显示周期之间；该显示周期可以选择为各种适当的周期，在此不做具体限定。
关于第二参考充电周期与第二充电周期的关系，可以参照上述第一参考充电周期与第一充电周期的关系，这里不再赘述。
例如，如图3A所示，在第一感测电压Vs1不等于第一参考感测电压Vsr1的情况下，像素电路的检测方法还可以包括如下操作。
步骤S140：在第三充电周期中，向驱动晶体管的栅极施加第三数据电压Vd3，在施加第三数据电压Vd3后的第一时长，在驱动晶体管的第一极获取第三感测电压Vs3。
例如，图3A示出了在第一感测电压Vs1不等于第一参考感测电压Vsr1的情况下(例如，第一感测电压Vs1小于第一参考感测电压Vsr1)，第一参考充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图，第一充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图以及第三充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图。
例如，在第三充电周期的起始时刻t0开始向驱动晶体管的栅极施加第三数据电压Vd3，然后在施加第三数据电压Vd3后同样的第一时长(即t1-t0)，在驱动晶体管的第一极获取第三感测电压Vs3。需要说明的是，向驱动晶体管的栅极施加第三数据电压Vd3是指经像素电路的数据线提供的数据电压为第三数据电压Vd3。
例如，如图3A所示，可以通过选择第三数据电压Vd3以使得第三感测电压Vs3与第一参考感测电压Vsr1之间的差值小于第一感测电压Vs1与第一参考感测电压Vsr1之间的差值。需要说明的是，第三感测电压Vs3与第一参考感测电压Vsr1之间的差值是指第三感测电压Vs3与第一参考感测电压Vsr1之间的差值的绝对值|Vs3-Vsr1|；第一感测电压Vs1与第一参考感测电压Vsr1之间的差值是指第一感测电压Vs1与第一参考感测电压Vsr1之间的差值的绝对值|Vs1-Vsr1|。
例如，通过选择第三数据电压Vd3使得第三感测电压Vs3与第一参考感测电压Vsr1之间的差值小于第一感测电压Vs1与第一参考感测电压Vsr1之间的差值的具体方法可以根据实际情况进行设定，本公开的实施例对此不作限定。
例如，可以采用下述方法使得第三感测电压Vs3与第一参考感测电压Vsr1之间的差值|Vs3-Vsr1|小于第一感测电压Vs1与第一参考感测电压Vsr1之间的差值|Vs1-Vsr1|，即，在第一感测电压Vs1小于第一参考感测电压Vsr1的情况下，使得第三数据电压Vd3大于第一数据电压Vd1的取值；在第一感测电压Vs1大于第一参考感测电压Vsr1的情况下，使得第三数据 电压Vd3小于第一数据电压Vd1的取值。
例如，如图3A所示，鉴于对于同一个驱动晶体管而言，其在检测过程中的充电曲线形状基本相同，在第一感测电压Vs1小于第一参考感测电压Vsr1的情况下，在假设当前阈值电压Vth固定不变的情况下，可以通过增加数据电压来增大感测电压。因此，在第三充电周期中，可以通过使得第三数据电压Vd3大于第一数据电压Vd1来增大第三感测电压Vs3，进而可以使得第三感测电压Vs3与第一参考感测电压Vsr1之间的差值|Vs3-Vsr1|小于第一感测电压Vs1与第一参考感测电压Vsr1之间的差值|Vs1-Vsr1|。对应地，在第一感测电压Vs1大于第一参考感测电压Vsr1的情况下，可以使得第三数据电压Vd3小于第一数据电压Vd1的取值，以使得第三感测电压Vs3与第一参考感测电压Vsr1之间的差值|Vs3-Vsr1|小于第一感测电压Vs1与第一参考感测电压Vsr之间的差值|Vs1-Vsr1|。
例如，如图3B所示，在第二感测电压Vs2不等于第二参考感测电压Vsr2的情况下，像素电路的检测方法还可以包括如下操作。
步骤S150：在第四充电周期中，向驱动晶体管的栅极施加第四数据电压Vd4，在施加第四数据电压Vd4后的第二时长，在驱动晶体管的第一极获取第四感测电压Vs4。
例如，图3B示出了在第二感测电压Vs2不等于第二参考感测电压Vsr2的情况下(例如，第二感测电压Vs2小于第二参考感测电压Vsr2)，第二参考充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图，第二充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图以及第四充电周期中的驱动晶体管的第一极的电压随时间变化的曲线图。
例如，在第四充电周期的起始时刻t0开始向驱动晶体管的栅极施加第四数据电压Vd4，然后在施加第四数据电压Vd4后同样的第二时长(即t2-t0)，在驱动晶体管的第一极获取第四感测电压Vs4。需要说明的是，向驱动晶体管的栅极施加第四数据电压Vd4是指经像素电路的数据线提供的数据电压为第四数据电压Vd4。
例如，如图3B所示，可以通过选择第四数据电压Vd4以使得第四感测电压Vs4与第二参考感测电压Vsr2之间的差值小于第二感测电压Vs2与第二参考感测电压Vsr2之间的差值。需要说明的是，第四感测电压Vs4与第二参考感测电压Vsr2之间的差值是指第四感测电压Vs4与第二参考感测电 压Vsr2之间的差值的绝对值|Vs4-Vsr2|；第二感测电压Vs2与第二参考感测电压Vsr2之间的差值是指第二感测电压Vs2与第二参考感测电压Vsr2之间的差值的绝对值|Vs2-Vsr2|。
例如，通过选择第四数据电压Vd4使得第四感测电压Vs4与第二参考感测电压Vsr2之间的差值小于第二感测电压Vs2与第二参考感测电压Vsr2之间的差值的具体方法可以根据实际情况进行设定，本公开的实施例对此不做具体限定。
例如，可以采用下述方法使得第四感测电压Vs4与第二参考感测电压Vsr2之间的差值|Vs4-Vsr2|小于第二感测电压Vs2与第二参考感测电压Vsr2之间的差值|Vs2-Vsr2|，也即，在第二感测电压Vs2小于第二参考感测电压Vsr2的情况下，使得第四数据电压Vd4大于第二数据电压Vd2的取值；在第二感测电压Vs2大于第二参考感测电压Vsr2的情况下，使得第四数据电压Vd4小于第二数据电压Vd2的取值。
例如，如图3B所示，鉴于对于同一个驱动晶体管而言，其在检测过程中的充电曲线形状基本相同，在第二感测电压Vs2小于第二参考感测电压Vsr2的情况下，在假设当前阈值电压Vth固定不变的情况下，可以通过增加数据电压来增大感测电压。因此，在第四充电周期中，可以通过使得第四数据电压Vd4大于第二数据电压Vd2来增大第四感测电压Vs4，进而可以使得第四感测电压Vs4与第二参考感测电压Vsr2之间的差值|Vs4-Vsr2|小于第二感测电压Vs2与第二参考感测电压Vsr2之间的差值|Vs2-Vsr2|。对应地，在第二感测电压Vs2大于第二参考感测电压Vsr2的情况下，可以使得第四数据电压Vd4小于第二数据电压Vd2的取值，以使得第四感测电压Vs4与第二参考感测电压Vsr2之间的差值|Vs4-Vsr2|小于第二感测电压Vs2与第二参考感测电压Vsr之间的差值|Vs2-Vsr2|。
例如，在本公开的实施例中，第一充电周期和第三充电周期可以位于开机状态下的显示周期之间。例如，第三充电周期可以位于第一充电周期之后。例如，当两个相邻的不同帧图像之间的时间间隙的时长小于进行两次充电周期所需的时长时，可以在两组不同帧图像之间的时间间隙中分别进行第一充电周期和第三充电周期。例如，在第一充电周期位于显示第3帧图像和显示第4帧图像之间的情况下，第三充电周期可以位于显示第n帧图像和显示第n+1(n为大于3的整数)帧图像之间的时间间隙。采用这种方式可以充分的 利用不同帧图像之间的时间间隙进行检测。
又例如，当两个相邻的不同帧图像之间的时间间隙的时长大于进行两次充电周期所需的时长时，可以在不同帧图像之间的时间间隙中依次进行第一充电周期和第三充电周期。例如，在显示第3帧图像和显示第4帧图像之间的时间间隙中，依次进行第一充电周期和第三充电周期。采用这种方式可以提高检测效率。
同样地，第二充电周期和第四充电周期可以位于开机状态下的显示周期之间。例如，第四充电周期可以位于第二充电周期之后。例如，当两个相邻的不同帧图像之间的时间间隙的时长小于进行两次充电周期所需的时长时，可以在两组不同帧图像之间的时间间隙中分别进行第二充电周期和第四充电周期。例如，在第二充电周期位于显示第3帧图像和显示第4帧图像之间的情况下，第四充电周期可以位于显示第n帧图像和显示第n+1(n为大于3的整数)帧图像之间的时间间隙，但本公开的实施例不限于此。采用这种方式可以充分的利用不同帧图像之间的时间间隙进行检测。
又例如，当两个相邻的不同帧图像之间的时间间隙的时长大于进行两次充电周期所需的时长时，可以在不同帧图像之间的时间间隙中依次进行第二充电周期和第四充电周期。例如，在显示第3帧图像和显示第4帧图像之间的时间间隙中，依次进行第二充电周期和第四充电周期。采用这种方式可以提高检测效率。
例如，本公开的实施例提供的检测方法还可以包括如下操作。
步骤S160：在第三感测电压Vs3仍然不等于第一参考感测电压Vsr1的情况下，则重复进行第三充电周期，直至第三感测电压Vs3等于第一参考感测电压Vsr1；
步骤S170：在第四感测电压Vs4仍然不等于第二参考感测电压Vsr2的情况下，则重复进行第四充电周期，直至第四感测电压Vs4等于第二参考感测电压Vsr2；以及
步骤S180：根据第三数据电压Vd3和第四数据电压Vd4并根据第五公式：K＝(Vd3–Vd4)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前电流系数；根据第六公式：Vth＝(Vd4*L1 1/2–Vd3*L2 1/2)/(L1 1/2–L2 1/2)，获取驱动晶体管的当前阈值电压。
例如，在步骤S160中，如图4A所示，可以采用逐次逼近法，不断调整 施加的第三数据电压Vd3直到最终得到与第一参考感测电压Vsr1相等的感测电压。例如，重复进行第三充电周期是指在其它的第三充电周期中，向驱动晶体管的栅极施加调整后的第三数据电压Vd3(例如，从Vd31调整到Vd32，从Vd32调整到Vd33......等)，并在施加第三数据电压Vd3后的第一时长且在驱动晶体管截止之前，在驱动晶体管的第一极获取新的第三感测电压Vs3(例如，在第三数据电压Vd3分别为Vd31、Vd32和Vd33的情况下，第三感测电压Vs3分别为Vs31、Vs32和Vs33)，以不断减小第三感测电压Vs3与第一参考感测电压Vsr1之间的差值|Vs3-Vsr1|(例如，|Vs3-Vsr1|由|Vs31-Vsr1|减小至|Vs32-Vsr1|，即使用逐次逼近的方法)，直至第三感测电压Vs3等于第一参考感测电压Vsr1(例如，Vs33＝Vsr1)。
例如，为了加快逐次逼近的速度，即使得重复进行第三充电周期的次数减少，可以基于第三感测电压Vs3与第一参考感测电压Vsr1的差值|Vs3-Vsr1|确定第三数据电压Vd3的变化量ΔVd3。例如，可以基于|Vs31-Vsr1|来确定ΔVd3＝Vd32-Vd31，进而可以获取调整后的第三数据电压Vd3(例如，Vd32)。
例如，在步骤S170中，如图4B所示，同样可以采用逐次逼近法，不断调整施加的第四数据电压Vd4直到最终得到与第二参考感测电压Vsr2相等的感测电压。例如，重复进行第四充电周期是指在其它的第四充电周期中，向驱动晶体管的栅极施加调整后的第四数据电压Vd4(例如，从Vd41调整到Vd42，从Vd42调整到Vd43......等)，并在施加第四数据电压Vd4后的第一时长且在驱动晶体管截止之前，在驱动晶体管的第一极获取新的第四感测电压Vs4(例如，在第四数据电压Vd4分别为Vd41、Vd42和Vd43的情况下，第四感测电压Vs4分别为Vs41、Vs42和Vs43)，以不断减小第四感测电压Vs4与第二参考感测电压Vsr2之间的差值|Vs4-Vsr2|(例如，|Vs4-Vsr2|由|Vs41-Vsr2|减小至|Vs42-Vsr2|，即使用逐次逼近的方法)，直至第四感测电压Vs4等于第二参考感测电压Vsr2(例如，Vs43＝Vsr2)。
例如，在本公开的实施例提供的检测方法中，还可以包括如下操作。
步骤S310：获取参考阈值电压Vthr和参考电流系数Kr。
驱动晶体管的参考阈值电压Vthr和参考电流系数Kr的获取方法可以根据实际情况进行设定，本公开的实施例对此不作限定。下面结合图5A-图5C对参考阈值电压Vthr以及参考电流系数Kr的获取方法做示例性说明。
例如，如图5A所示，获取参考阈值电压Vthr可以包括如下操作。
步骤S301：在关机状态的关机充电周期中，向驱动晶体管的栅极施加关机数据电压Vdc且在驱动晶体管截止之后(例如在5A中的t3时刻)，在驱动晶体管的第一极获取关机感测电压Vb。因此，驱动晶体管的参考阈值电压Vthr等于关机数据电压Vdc与关机感测电压Vb的差值，即Vthr＝Vdc-Vb。
例如，获取参考电流系数Kr可以包括如下操作。
步骤S302：使像素电路的归一化的亮度值达到最大值1，获取此时施加在驱动晶体管的栅极上的数据电压Vmax，然后根据第七公式：Vmax＝Kr+Vthr，以及上述获取的参考阈值电压Vthr获取参考电流系数Kr，即Kr＝Vmax-Vthr。
例如，在一些实施例中，可以使得关机充电周期与第一参考充电周期或者第二参考充电周期为不同的充电周期，由此可以仅保存获取的参考阈值电压Vthr。例如，关机数据电压Vdc与第一参考数据电压Vdr1或第二参考数据电压Vdr2可以不相等。
例如，如图5B所示，在一些实施例中，还可以使得关机充电周期与第一参考充电周期相同，即为同一个充电周期，此时，关机数据电压Vdc与第一参考数据电压Vdr1可以相等，由此可以简化像素电路的检测方法。
又例如，如图5C所示，在一些实施例中，还可以使得关机充电周期与第二参考充电周期相同，即为同一个充电周期，此时，关机数据电压Vdc与第二参考数据电压Vdr2可以相等，由此可以简化像素电路的检测方法。
在本公开的实施例中，通过对比第一参考感测电压Vsr1与施加第一数据电压Vd1后的第一时长获取的第一感测电压Vs1，以及对比第二参考感测电压Vsr2与施加第二数据电压Vd2后的第二时长获取的第二感测电压Vs2，在获取像素电路的当前阈值电压Vth的同时还可以获取像素电路的当前电流系数K，从而完成像素电路的补偿检测，可以提升使用该像素电路的检测方法的显示面板的补偿效果以及亮度均匀度。
本公开的实施例提供的像素电路的检测方法可以用于检测图6A所示的像素电路中的驱动晶体管T3(N型晶体管)的阈值电压和电流系数，但本公开的实施例不限于此。例如，本公开的实施例提供的像素电路的检测方法还可以用于检测图6B所示的像素电路中的驱动晶体管T3(P型晶体管)的阈 值电压和电流系数。例如，为清楚起见，下面将以图6A所示的像素电路为例对像素电路的具体结构做具体说明，但本公开的实施例对此不作限定。
例如，如图6A所示，像素电路包括驱动晶体管T3。例如，如图6A所示，像素电路还可以包括发光元件EL和感测开关晶体管T2。例如，发光元件EL可以为有机发光二极管，但本公开的实施例不限于此，例如还可以为量子点发光二极管(QLED)等。例如，驱动晶体管T3的第二极可以配置为连接至第一电源电压端VDD，以接收第一电源电压端VDD提供的第一电压，第一电压例如可以是恒定的正电压；驱动晶体管T3的第一极可以配置为连接至发光元件EL的第一极。发光元件EL的第二极连接到第二电源电压端VSS，第二电源电压端VSS例如可以提供恒定的电压，第二电源电压端VSS提供的电压例如可以小于第一电源电压端VDD提供的电压，第二电源电压端VSS例如可以接地，但本公开的实施例对此不作限定。
例如，如图6A所示，感测开关晶体管T2的第一极(源极)与驱动晶体管T3的第一极电连接。例如，如图6A所示，像素电路还包括感测线SEN，感测开关晶体管T2的第二极与感测线SEN电连接，该感测线SEN例如与检测电路(图6A未示出)电连接。例如，如图6A所示，像素电路还可以包括数据写入晶体管T1与存储电容Cst，数据写入晶体管T1配置为向驱动晶体管T3的栅极写入数据信号(例如，第一数据电压、第二数据电压、第一参考数据电压和第二参考数据电压等)，存储电容Cst配置为存储数据信号。例如，像素电路还可以包括数据线Vdat，数据写入晶体管T1的第一极与数据线Vdat电连接。
本公开的至少一个实施例还提供一种显示面板的驱动方法。例如，显示面板可以包括像素电路，显示面板所包括的像素电路例如呈阵列排布。例如，显示面板所包括的像素电路可以为图6A或图6B所示的像素电路。例如，如图7所示，该驱动方法可以包括如下操作。
步骤S410：对像素电路执行本公开任一实施例提供的像素电路的检测方法，以用于获得像素电路的驱动晶体管T3的当前阈值电压Vth和当前电流系数K。
例如，像素电路的检测方法可以参见上述实施例中相应描述，在此不再赘述。
例如，如图7所示，本公开的实施例提供的显示面板的驱动方法还可以 包括如下操作。
步骤S420：根据获得的当前阈值电压Vth和当前电流系数K并根据第八公式：Vc＝K*L 1/2+Vth，建立像素电路的补偿数据电压Vc。
在第八公式中，Vc表示补偿数据电压，K表示当前电流系数，Vth表示当前阈值电压，L表示像素电路要显示的归一化的亮度值。
例如，在一个示例中，首先，可以逐行检测像素电路的驱动晶体管T3的当前阈值电压和当前电流系数，然后，在获取显示面板的所有像素电路的驱动晶体管T3的当前阈值电压和当前电流系数之后，可以针对每一个像素电路建立补偿数据电压，最后，基于所建立的补偿数据电压，对显示面板进行数据补偿，由此可以完成一个周期的数据补偿。
例如，首先可以对位于第一行的像素电路执行本公开任一实施例提供的像素电路的检测方法，并获取位于第一行的像素电路的驱动晶体管T3的当前阈值电压和当前电流系数；然后可以对位于第二行的像素电路执行本公开任一实施例提供的像素电路的检测方法，并获取位于第二行的像素电路的驱动晶体管T3的当前阈值电压和当前电流系数；接着，可以对显示面板的位于其它行的像素电路进行逐行检测，直至获取显示面板的所有像素电路的驱动晶体管T3的阈值电压和当前电流系数；最后，针对每一个像素电路建立补偿数据电压，并对显示面板进行数据补偿。
例如，在另一个示例中，还可以在检测获取一行像素电路的驱动晶体管T3的当前阈值电压和当前电流系数之后，针对该行的每一个像素电路建立补偿数据电压，然后对位于该行的像素电路进行数据补偿。例如，首先可以针对第一行的像素电路执行检测、建立补偿数据电压以及进行数据补偿，然后可以针对第五行的像素电路进行检测、建立补偿数据电压以及进行数据补偿，接着，可以针对第二行的像素电路进行检测、建立补偿数据电压以及进行数据补偿，直至对显示面板中所有像素电路完成检测、建立补偿数据电压以及进行数据补偿，由此可以对显示面板实现一个周期的数据补偿。
需要说明的是，对于该显示面板的驱动方法的其它的必不可少的步骤可以参见常规的显示面板的驱动方法，这些是本领域的普通技术人员所应该理解的，在此不做赘述。
例如，本公开的实施例提供的显示面板的驱动方法可以在开机期间(例如，在相邻的显示周期之间)实现驱动晶体管T3的当前阈值电压以及当前 电流系数的检测，由此可以实现实时补偿，进而可以提升应用该驱动方法的显示面板的补偿效果以及亮度均匀度。
本公开的至少一个实施例还提供一种显示装置，该显示装置包括像素电路和控制电路。像素电路可以为图6A或图6B所示的像素电路。例如，下面以显示装置中的像素电路实现为图6A示出的像素电路为例，对本公开的实施例提供的显示装置做具体说明，但本公开的实施例不限于此。
例如，图8示出了一种显示面板10的示意图。例如，如图8所示，该显示装置10包括像素电路110和控制电路120，像素电路110包括驱动晶体管T3。例如，控制电路120配置为执行本公开的实施例提供的像素电路的检测方法，即控制电路120可以配置为执行或部分执行上述实施例中的步骤S110、S120、S130、S140、S150、S160、S170、S180、S210、S220、S230、S310、S301以及S302等。
例如，如图8所示，显示装置10还可以包括数据驱动电路130、检测电路140和扫描驱动电路(图8未示出)。例如，控制电路120还可以配置为控制数据驱动电路130和检测电路140。
例如，数据驱动电路130配置为在不同的时刻输出第一参考数据电压、第二参考数据电压、第一数据电压、第二数据电压、第三数据电压以及第四数据电压等。扫描驱动电路输出用于数据写入晶体管T1以及感测晶体管T2的扫描信号，例如扫描驱动电路可以与写入晶体管T1的栅极G1以及感测晶体管T2的栅极G2连接以提供相应的扫描信号，从而控制数据写入晶体管T1以及感测晶体管T2的导通与截止。
例如，像素电路还配置为接收第一参考数据电压、第二参考数据电压、第一数据电压、第二数据电压、第三数据电压以及第四数据电压等，并施加至驱动晶体管T3的栅极。例如，检测电路140配置为从驱动晶体管T3的第一极读取第一参考感测电压、第二参考感测电压、第一感测电压、第二感测电压、第三感测电压以及第四感测电压等。
例如，数据驱动电路130还可以配置为提供关机数据电压，像素电路还可以配置为接收该关机数据电压并将该关机数据电压施加至驱动晶体管T3的栅极，检测电路140还可以配置为从驱动晶体管T3的第一极读取截止感测电压。
例如，像素电路还可以包括发光元件EL和感测开关晶体管T2，发光元 件EL例如可以为有机发光二极管，但本公开的实施例不限于此，例如还可以为量子点发光二极管(QLED)等。例如，驱动晶体管T3的第二极和第一极可以配置为分别连接至第一电源电压端VDD以及发光元件EL的第一极，发光元件EL的第二极连接到第二电源电压端VSS。例如，感测开关晶体管T2的第一极与驱动晶体管T3的第一极电连接，且感测开关晶体管T2的第二极与检测电路140电连接。
例如，像素电路还可以包括感测线SEN，感测线SEN将感测开关晶体管T2的第二极与检测电路140电连接。
例如，像素电路还可以包括数据写入晶体管T1与存储电容Cst，数据写入晶体管T1配置为从数据驱动电路130获取数据电压，并向驱动晶体管T3的栅极写入该数据电压，存储电容Cst存储该数据电压。例如，像素电路还可以包括数据线Vdat，数据写入晶体管T1的第一极连接到该数据线Vdat。
例如，如图9所示，控制电路120可以包括处理器121和存储介质122，存储介质122配置为存储有可适于处理器121执行的计算机指令，且计算机指令被处理器121执行时实施本公开的实施例提供的检测方法。
例如，该处理器121例如是中央处理单元(CPU)或者具有数据处理能力和/或指令执行能力的其它形式的处理单元，例如，该处理器可以实现为通用处理器，或者也可以实现为单片机、微处理器、数字信号处理器、专用的图像处理芯片、现场可编程逻辑阵列等。
例如，存储介质122可以包括易失性存储器和/或非易失性存储器，例如可以包括只读存储器(ROM)、硬盘、闪存等。相应地，该存储介质可以实现为一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，在所述计算机可读存储介质上可以存储一个或多个可执行代码(例如，计算机程序指令)。处理器可以运行所述程序指令，以执行本公开的实施例提供的检测方法，由此可以获取显示装置所包括的像素电路的驱动晶体管的当前阈值电压以及当前电流系数，进而可以实现显示装置的数据补偿功能。例如，该存储介质还可以存储其他各种应用程序和各种数据，例如每个像素电路的参考阈值电压和/或参考电流系数，以及应用程序使用和/或产生的各种数据等。
例如，本公开的实施例提供的显示装置可以在开机期间(例如，相邻的显示周期之间)实现驱动晶体管的当前阈值电压以及当前电流系数的检测， 由此在显示装置的开机期间可以进行实时检测以及实时补偿，进而可以提升显示装置的补偿效果以及亮度均匀度。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (20)

  1. 一种像素电路的检测方法，所述像素电路包括驱动晶体管，所述检测方法包括：
    在第一充电周期中，向所述驱动晶体管的栅极施加第一数据电压，在施加所述第一数据电压后的第一时长且在所述驱动晶体管截止之前，在所述驱动晶体管的第一极获取第一感测电压，并判断所述第一感测电压是否等于第一参考感测电压；
    在第二充电周期中，向所述驱动晶体管的栅极施加第二数据电压，在施加所述第二数据电压后的第二时长且在所述驱动晶体管截止之前，在所述驱动晶体管的第一极获取第二感测电压，并判断所述第二感测电压是否等于第二参考感测电压；
    其中，如果所述第一感测电压等于所述第一参考感测电压，所述第二感测电压等于所述第二参考感测电压，则根据所述第一数据电压和所述第二数据电压并根据第一公式：K＝(Vd1-Vd2)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前电流系数；根据第二公式：Vth＝(Vd2*L1 1/2–Vd1*L2 1/2)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前阈值电压；
    K表示所述驱动晶体管的当前电流系数，Vth表示所述驱动晶体管的当前阈值电压，Vd1表示所述第一数据电压，Vd2表示所述第二数据电压，L1表示第一亮度值，L2表示第二亮度值，所述第一亮度值和所述第二亮度值均是指定的归一化的亮度值。
  2. 根据权利要求1所述的检测方法，还包括：
    在第一参考充电周期中，向所述驱动晶体管的栅极施加第一参考数据电压，在施加所述第一参考数据电压后的所述第一时长，在所述驱动晶体管的第一极获取所述第一参考感测电压；
    在第二参考充电周期中，向所述驱动晶体管的栅极施加第二参考数据电压，在施加所述第二参考数据电压后的所述第二时长，在所述驱动晶体管的第一极获取所述第二参考感测电压；
    其中，由第三公式：Vdr1＝Kr*L1 1/2+Vthr，获得所述第一参考数据电压，由第四公式：Vdr2＝Kr*L2 1/2+Vthr，获得所述第二参考数据电压；
    Vdr1表示所述第一参考数据电压，Vdr2表示所述第二参考数据电压， Kr表示所述驱动晶体管的参考电流系数，Vthr表示所述驱动晶体管的参考阈值电压。
  3. 根据权利要求1或2所述的检测方法，还包括：
    在所述第一感测电压不等于所述第一参考感测电压的情况下，在第三充电周期中，向所述驱动晶体管的栅极施加第三数据电压，在施加所述第三数据电压后的所述第一时长，在所述驱动晶体管的第一极获取第三感测电压，
    其中，选择所述第三数据电压以使得所述第三感测电压与所述第一参考感测电压之间的差值小于所述第一感测电压与所述第一参考感测电压之间的差值。
  4. 根据权利要求3所述的检测方法，还包括：
    在所述第二感测电压不等于所述第二参考感测电压的情况下，在第四充电周期中，向所述驱动晶体管的栅极施加第四数据电压，在施加所述第四数据电压后的所述第二时长，在所述驱动晶体管的第一极获取第四感测电压，
    其中，选择所述第四数据电压以使得所述第四感测电压与所述第二参考感测电压之间的差值小于所述第二感测电压与所述第一参考感测电压之间的差值。
  5. 根据权利要求3所述的检测方法，其中，
    在所述第一感测电压小于所述第一参考感测电压的情况下，使得所述第三数据电压大于所述第一数据电压的取值；
    在所述第一感测电压大于所述第一参考感测电压的情况下，使得所述第三数据电压小于所述第一数据电压的取值。
  6. 根据权利要求4所述的检测方法，其中，
    在所述第二感测电压小于所述第二参考感测电压的情况下，使得所述第四数据电压大于所述第二数据电压的取值；
    在所述第二感测电压大于所述第二参考感测电压的情况下，使得所述第四数据电压小于所述第二数据电压的取值。
  7. 根据权利要求4所述的检测方法，还包括：
    在所述第三感测电压仍然不等于所述第一参考感测电压的情况下，则重复进行所述第三充电周期，直至所述第三感测电压等于所述第一参考感 测电压；
    在所述第四感测电压仍然不等于所述第二参考感测电压的情况下，则重复进行所述第四充电周期，直至所述第四感测电压等于所述第二参考感测电压；以及
    根据所述第三数据电压和所述第四数据电压并根据第五公式：K＝(Vd3–Vd4)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前电流系数；根据第六公式：Vth＝(Vd4*L1 1/2–Vd3*L2 1/2)/(L1 1/2–L2 1/2)，获取所述驱动晶体管的当前阈值电压；
    其中，Vd3表示所述第三数据电压，Vd4表示所述第四数据电压。
  8. 根据权利要求2所述的检测方法，还包括获取所述参考阈值电压和所述参考电流系数；其中，
    所述获取所述参考阈值电压包括：
    在关机状态的关机充电周期中，向所述驱动晶体管的栅极施加关机数据电压且在所述驱动晶体管截止之后，在所述驱动晶体管的第一极获取关机感测电压；其中，所述驱动晶体管的参考阈值电压等于所述关机数据电压与所述关机感测电压的差值；
    所述获取所述参考电流系数包括：
    使所述像素电路的归一化的亮度值达到最大值1，获取此时施加在所述驱动晶体管的栅极上的数据电压Vmax，然后根据第七公式：Vmax＝Kr+Vthr，获取所述参考电流系数。
  9. 根据权利要求8所述的检测方法，其中，
    所述关机充电周期与所述第一参考充电周期相同，且所述关机数据电压与所述第一参考数据电压相等；或者
    所述关机充电周期与所述第二参考充电周期相同，且所述关机数据电压与所述第二参考数据电压相等。
  10. 根据权利要求4、6、7任一项所述的检测方法，其中，所述第一充电周期、所述第二充电周期、所述第三充电周期和所述第四充电周期位于显示周期之间。
  11. 根据权利要求1-10任一项所述的检测方法，其中，所述第一时长与所述第二时长相同。
  12. 一种显示面板的驱动方法，所述显示面板包括像素电路，所述驱 动方法包括：
    对所述像素电路执行权利要求1-11任一项所述的像素电路的检测方法，以用于获得所述像素电路的驱动晶体管的当前阈值电压和当前电流系数。
  13. 根据权利要求12所述的显示面板的驱动方法，还包括：
    根据获得的所述当前阈值电压和所述当前电流系数并根据第八公式：Vc＝K*L 1/2+Vth，建立所述像素电路的补偿数据电压；
    其中，Vc表示所述补偿数据电压，K表示所述当前电流系数，Vth表示所述当前阈值电压，L表示所述像素电路要显示的归一化的亮度值。
  14. 一种显示装置，包括像素电路和控制电路，其中，
    所述像素电路包括驱动晶体管；
    所述控制电路配置为执行如权利要求1所述的检测方法。
  15. 根据权利要求14所述的显示装置，其中，
    所述控制电路还配置为执行：
    在第一参考充电周期中，向所述驱动晶体管的栅极施加第一参考数据电压，在施加所述第一参考数据电压后的所述第一时长，在所述驱动晶体管的第一极获取所述第一参考感测电压；
    在第二参考充电周期中，向所述驱动晶体管的栅极施加第二参考数据电压，在施加所述第二参考数据电压后的所述第二时长，在所述驱动晶体管的第一极获取所述第二参考感测电压；
    其中，由第三公式：Vdr1＝Kr*L1 1/2+Vthr，获得所述第一参考数据电压，由第四公式：Vdr2＝Kr*L2 1/2+Vthr，获得所述第二参考数据电压；
    Vdr1表示所述第一参考数据电压，Vdr2表示所述第二参考数据电压，Kr表示所述驱动晶体管的参考电流系数，Vthr表示所述驱动晶体管的参考阈值电压。
  16. 根据权利要求15所述的显示装置，还包括数据驱动电路和检测电路，其中，
    所述数据驱动电路配置为输出所述第一参考数据电压、所述第二参考数据电压、所述第一数据电压和所述第二数据电压；
    所述像素电路还配置为接收所述第一参考数据电压、所述第二参考数据电压、所述第一数据电压和所述第二数据电压，并施加至所述驱动晶体 管的栅极；
    所述检测电路配置为从所述驱动晶体管的第一极读取所述第一参考感测电压、所述第二参考感测电压、所述第一感测电压和所述第二感测电压；
    所述控制电路还配置为控制所述数据驱动电路和所述检测电路。
  17. 根据权利要求16所述的显示装置，其中，所述像素电路还包括发光元件和感测开关晶体管，
    所述驱动晶体管的第二极和第一极配置为分别连接至第一电源电压端以及所述发光元件的第一极，
    所述发光元件的第二极连接到第二电源电压端，
    所述感测开关晶体管的第一极与所述驱动晶体管的第一极电连接，且所述感测开关晶体管的第二极与所述检测电路电连接。
  18. 根据权利要求17所述的显示装置，其中，所述像素电路还包括感测线，所述感测线将所述感测开关晶体管的第二极与所述检测电路电连接。
  19. 根据权利要求18所述的显示装置，其中，所述像素电路还包括数据写入晶体管与存储电容，
    所述数据写入晶体管配置为从所述数据驱动电路获取数据电压，并向所述驱动晶体管的栅极写入所述数据电压，
    所述存储电容存储所述数据电压。
  20. 根据权利要求14-19任一项所述的显示装置，其中，所述控制电路包括处理器和存储介质，
    所述存储介质配置为存储有可适于所述处理器执行的计算机指令，且所述计算机指令被所述处理器执行时实施所述检测方法。
PCT/CN2018/112954 2018-01-29 2018-10-31 像素电路的检测方法、显示面板的驱动方法和显示装置 WO2019144669A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP18882298.5A EP3748618A4 (en) 2018-01-29 2018-10-31 DETECTION METHOD FOR PIXEL CIRCUIT, CONTROL METHOD FOR A DISPLAY BOARD AND DISPLAY DEVICE
US16/467,022 US11776438B2 (en) 2018-01-29 2018-10-31 Detecting method of pixel circuit, driving method of display panel and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810085782.1A CN110097840B (zh) 2018-01-29 2018-01-29 像素电路的检测方法、显示面板的驱动方法和显示装置
CN201810085782.1 2018-01-29

Publications (1)

Publication Number Publication Date
WO2019144669A1 true WO2019144669A1 (zh) 2019-08-01

Family

ID=67395143

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/112954 WO2019144669A1 (zh) 2018-01-29 2018-10-31 像素电路的检测方法、显示面板的驱动方法和显示装置

Country Status (4)

Country Link
US (1) US11776438B2 (zh)
EP (1) EP3748618A4 (zh)
CN (1) CN110097840B (zh)
WO (1) WO2019144669A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112967680B (zh) * 2021-03-18 2022-12-16 合肥京东方卓印科技有限公司 像素结构及其驱动方法、显示基板
KR20230025104A (ko) * 2021-08-13 2023-02-21 엘지디스플레이 주식회사 디스플레이 장치, 데이터 구동 회로 및 디스플레이 구동 방법

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009060282A (ja) * 2007-08-30 2009-03-19 Kyocera Corp 携帯電子機器及び表示輝度制御方法
CN101923829A (zh) * 2010-06-30 2010-12-22 昆山工研院新型平板显示技术中心有限公司 一种有源矩阵有机发光显示器
CN103093724A (zh) * 2013-03-04 2013-05-08 陈鑫 一种新型的amoled像素驱动电路
CN104157234A (zh) * 2014-01-17 2014-11-19 北京京东方光电科技有限公司 像素单元驱动电路及方法、显示装置
CN105047137A (zh) * 2015-09-09 2015-11-11 深圳市华星光电技术有限公司 Amoled实时补偿系统
CN106847187A (zh) * 2017-03-01 2017-06-13 上海天马有机发光显示技术有限公司 一种像素电路的电流检测方法、显示面板以及显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112002285B (zh) * 2014-06-25 2021-10-29 伊格尼斯创新公司 用于确定和补偿有机发光器件的效率劣化的方法
KR101789602B1 (ko) * 2014-12-31 2017-10-26 엘지디스플레이 주식회사 유기발광 표시장치 및 그의 구동 방법
CN104700761B (zh) * 2015-04-03 2017-08-29 京东方科技集团股份有限公司 一种检测电路及其检测方法和驱动系统
KR102301325B1 (ko) * 2015-06-30 2021-09-14 엘지디스플레이 주식회사 유기발광 표시장치에 구비된 구동 tft의 문턱전압 센싱장치 및 센싱방법
CN108877686B (zh) * 2017-05-12 2020-12-08 京东方科技集团股份有限公司 数据补偿方法及装置、显示驱动方法及装置、显示装置
CN107093403B (zh) * 2017-06-30 2019-03-15 深圳市华星光电技术有限公司 用于oled显示面板的像素驱动电路的补偿方法
CN109697944B (zh) 2017-10-20 2020-11-24 京东方科技集团股份有限公司 像素电路的检测方法、显示面板的驱动方法和显示装置
CN107610629B (zh) * 2017-11-06 2019-07-09 合肥鑫晟光电科技有限公司 阵列基板驱动电路的检测方法
CN107749280A (zh) * 2017-12-06 2018-03-02 京东方科技集团股份有限公司 显示装置的驱动方法及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009060282A (ja) * 2007-08-30 2009-03-19 Kyocera Corp 携帯電子機器及び表示輝度制御方法
CN101923829A (zh) * 2010-06-30 2010-12-22 昆山工研院新型平板显示技术中心有限公司 一种有源矩阵有机发光显示器
CN103093724A (zh) * 2013-03-04 2013-05-08 陈鑫 一种新型的amoled像素驱动电路
CN104157234A (zh) * 2014-01-17 2014-11-19 北京京东方光电科技有限公司 像素单元驱动电路及方法、显示装置
CN105047137A (zh) * 2015-09-09 2015-11-11 深圳市华星光电技术有限公司 Amoled实时补偿系统
CN106847187A (zh) * 2017-03-01 2017-06-13 上海天马有机发光显示技术有限公司 一种像素电路的电流检测方法、显示面板以及显示装置

Also Published As

Publication number Publication date
US20230206792A1 (en) 2023-06-29
EP3748618A4 (en) 2021-10-13
US11776438B2 (en) 2023-10-03
CN110097840A (zh) 2019-08-06
CN110097840B (zh) 2021-11-16
EP3748618A1 (en) 2020-12-09

Similar Documents

Publication Publication Date Title
CN110520922B (zh) 显示驱动电路、方法、以及显示设备
WO2018095031A1 (zh) 像素电路及其驱动方法、以及显示面板
WO2019205750A1 (zh) 像素电路的检测方法、显示面板的驱动方法和显示面板
US11308889B2 (en) Detection method of pixel circuit, driving method of display panel, and display device
KR101530500B1 (ko) 픽셀 유닛 회로, 그 보상 방법, 및 디스플레이 디바이스
US8941309B2 (en) Voltage-driven pixel circuit, driving method thereof and display panel
WO2016169388A1 (zh) 像素电路及其驱动方法和显示装置
JP4915195B2 (ja) 表示装置
WO2018209930A1 (en) A pixel circuit, a method for driving the pixel circuit, and a display apparatus
US10504436B2 (en) Pixel driving circuits, pixel driving methods and display devices
WO2015180419A1 (zh) 像素电路及其驱动方法和一种显示装置
WO2016173124A1 (zh) 像素电路、其驱动方法及相关装置
US9905166B2 (en) Pixel driving circuit, pixel driving method and display apparatus
WO2016150372A1 (zh) 像素电路及其驱动方法和一种显示装置
WO2018099073A1 (zh) 显示面板、显示设备及补偿方法
WO2015188533A1 (zh) 像素驱动电路、驱动方法、阵列基板及显示装置
WO2019109673A1 (zh) 像素电路及其驱动方法、显示面板和显示设备
JP2010025967A (ja) 表示装置
KR20130038872A (ko) 유기 발광 다이오드의 화소 구조 및 그것의 구동 방법
WO2016078282A1 (zh) 像素单元驱动电路和方法、像素单元和显示装置
WO2018214533A1 (zh) 显示装置以及像素电路及其控制方法
JP6175718B2 (ja) 駆動方法および表示装置
WO2014190617A1 (zh) 发光二极管像素单元电路和显示面板
WO2018049809A1 (zh) 像素驱动电路及其驱动方法和显示装置
JP2010066331A (ja) 表示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18882298

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2018882298

Country of ref document: EP

Effective date: 20200831