WO2019119638A1 - 像素驱动电路及具有该像素驱动电路的显示装置 - Google Patents

像素驱动电路及具有该像素驱动电路的显示装置 Download PDF

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WO2019119638A1
WO2019119638A1 PCT/CN2018/076542 CN2018076542W WO2019119638A1 WO 2019119638 A1 WO2019119638 A1 WO 2019119638A1 CN 2018076542 W CN2018076542 W CN 2018076542W WO 2019119638 A1 WO2019119638 A1 WO 2019119638A1
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transistor
node
voltage
gate electrode
turned
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PCT/CN2018/076542
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English (en)
French (fr)
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侯学顺
李雪
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武汉华星光电半导体显示技术有限公司
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Priority to US15/775,609 priority Critical patent/US11037509B2/en
Publication of WO2019119638A1 publication Critical patent/WO2019119638A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
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    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
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    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular to a pixel driving circuit and a display device having the pixel driving circuit.
  • OLED Organic Light-Emitting Diode
  • TFTs thin film transistors
  • capacitive storage signals to control the grayscale performance of the OLED.
  • each pixel requires at least two TFTs and one storage capacitor to be constructed, that is, 2T1C mode.
  • 1 is a circuit diagram of a pixel driving circuit of a conventional OLED display.
  • a pixel driving circuit of a conventional OLED display includes two thin film transistors (TFTs) and a capacitor, specifically, a switching TFT T1, a driving TFT T2, and a storage capacitor Cstst.
  • a pixel driving circuit capable of eliminating a driving current of an organic light emitting diode from being affected by a threshold voltage of a driving transistor, and a display device having the pixel driving circuit.
  • a pixel driving circuit including: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a capacitor, and an organic light emitting a diode; in the reset phase, the fourth transistor is turned on to supply a reference voltage to the first end of the capacitor, and the fifth transistor is turned on and then turned off to supply the power supply voltage to the second end of the capacitor; in the threshold voltage compensation phase, The second transistor is turned on to supply a data voltage to the gate electrode of the first transistor, the fourth transistor is kept in an on state to maintain the voltage of the first end of the capacitor as a reference voltage, and the first transistor and the third transistor are turned on And discharging the voltage of the second end of the capacitor to a difference between the data voltage and the threshold voltage of the first transistor; in the illuminating driving phase, the fifth transistor is turned on to supply the power voltage to the first transistor The first terminal, the seventh transistor is turned on to supply the voltage in the capacitor to
  • first transistor, the second transistor, the third transistor, the sixth transistor, and the seventh transistor are in an off state during a reset phase.
  • the fifth transistor, the sixth transistor, and the seventh transistor are in an off state during a threshold voltage compensation phase.
  • the second transistor, the third transistor, and the fourth transistor are in an off state during an illumination driving phase.
  • a gate electrode of the first transistor is connected to the first node, and a first end thereof is connected to the second node, and a second end thereof is connected to the third node; a gate electrode of the second transistor is used for receiving Scanning a signal, and a second end thereof is connected to the first node, and a first end thereof is for receiving a data voltage; a gate electrode of the third transistor is for receiving a scan signal, and a second end thereof is connected to the a third node, and a first end thereof is connected to the first node; a gate electrode of the fourth transistor is configured to receive a reset signal, and a first end thereof is configured to receive a reference voltage, and a second end thereof is connected to the first a fourth node; a gate electrode of the fifth transistor is configured to receive an enable signal, and a first end thereof is configured to receive a power supply voltage, and a second end thereof is coupled to the second node; a gate electrode of the sixth transistor Receiving an enable signal, and a first end thereof is
  • the reset signal remains at a low potential
  • the scan signal remains at a high potential
  • the enable signal remains at a low potential for a first predetermined period of time
  • the enable signal is at the first predetermined At the end of the time period, the low potential changes to a high potential.
  • the enable signal remains at a high potential
  • the reset signal remains at a low potential for a second predetermined period of time
  • the reset signal is at a low potential at the end of the second predetermined period of time
  • the transition to a high potential, the scan signal remains at a low potential for a third predetermined period of time, and transitions from a low potential to a high potential at the end of the third predetermined period of time.
  • the enable signal remains at a low potential, and both the reset signal and the scan signal remain at a high potential.
  • each of the first to seventh transistors is a p-channel transistor.
  • a display device comprising the above pixel driving circuit.
  • the pixel driving circuit using the 7T1C pixel structure of the present invention can effectively compensate the threshold voltage of the driving transistor for driving the organic light emitting diode, so that the current flowing through the organic light emitting diode is independent of the threshold voltage of the driving transistor. Thereby, the phenomenon of poor display of the screen due to the threshold voltage drift of the drive transistor is eliminated.
  • FIG. 1 is a circuit diagram of a pixel driving circuit of a conventional OLED display
  • FIG. 2 is an architectural diagram of an organic light emitting diode display in accordance with an embodiment of the present invention.
  • FIG. 3 is a circuit diagram of a pixel driving circuit in accordance with an embodiment of the present invention.
  • FIG. 4 is a timing diagram of various signals in accordance with an embodiment of the present invention.
  • FIG. 2 is a block diagram of an organic light emitting diode display in accordance with an embodiment of the present invention.
  • an organic light emitting diode display includes a display panel 100, a scan driver 200, and a data driver 300. It should be noted that the OLED display according to the present invention may further include other suitable devices, such as a timing controller that controls the scan driver 200 and the data driver 300, and a power supply voltage that provides a power supply positive voltage and a power supply negative voltage. And so on.
  • the display panel 100 includes a plurality of pixels PX arranged in an array, N scanning lines G 1 to G N , and M data lines D 1 to D M .
  • the scan driver 200 is connected to the scan lines G 1 to G N, and drives the scan lines G 1 to G N.
  • the data driver 300 is connected to the data lines D 1 to D M and drives the data lines D 1 to D M .
  • the scan driver 200 is capable of supplying one or more scan signals to each pixel PX, which will be described later.
  • the data driver 300 is capable of supplying a data voltage to each of the pixels PX, which will also be described later.
  • Each pixel PX includes a pixel driving circuit.
  • the pixel driving circuit i.e., the pixel structure of the pixel PX
  • the pixel driving circuit will be described in detail below.
  • FIG. 3 is a circuit diagram of a pixel driving circuit in accordance with an embodiment of the present invention.
  • each pixel PX of an organic light emitting diode display has a 7T1C pixel structure including an organic light emitting diode OLED, a first transistor T1, a second transistor T2, and a third transistor.
  • the gate electrode of the first transistor T1 is electrically connected to the first node g, and the first end thereof is electrically connected to the second node s, and the second end thereof is connected to the third node d.
  • the gate electrode of the second transistor T2 is for receiving the scan signal Scan (provided by the scan driver 200), and the first end thereof is for receiving the data voltage Vdata (which is provided by the data driver 300), and the second end thereof is connected to the One node g.
  • the data voltage Vdata is at a high potential (or high level).
  • the gate electrode of the third transistor T3 is configured to receive the scan signal Scan, and the first end thereof is electrically connected to the first node g, and the second end thereof is electrically connected to the third node d.
  • the gate electrode of the fourth transistor T4 is configured to receive the reset signal Reset, and the first end thereof is used to receive the reference voltage Vref, and the second end thereof is electrically connected to the fourth node a.
  • the gate electrode of the fifth transistor T5 is for receiving the enable signal Em, and the first end thereof is for receiving the power source positive voltage Vdd (which is usually generated and provided by a power generator (not shown) of the organic light emitting diode display), and Its second end is connected to the second node s.
  • the gate electrode of the sixth transistor T6 is for receiving the enable signal Em, and the first end thereof is connected to the third node d, and the second end thereof is connected to the anode of the organic light emitting diode OLED.
  • the gate electrode of the seventh transistor T7 is for receiving the enable signal Em, and the first end thereof is connected to the fourth node a, and the second end thereof is connected to the first node g.
  • the first end of the capacitor Cst is connected to the fourth node a, and the second end thereof is electrically connected to the second node s.
  • the cathode of the organic light emitting diode OLED is used to receive a power source negative voltage Vss (which is typically generated and provided by a power generator (not shown) of the organic light emitting diode display).
  • a power source negative voltage Vss which is typically generated and provided by a power generator (not shown) of the organic light emitting diode display.
  • the power source positive voltage Vdd is at a high potential
  • the power source negative voltage Vss is at a low potential
  • the power source positive voltage Vdd is greater.
  • the first transistor T1 functions as a driving transistor.
  • first end of each of the first to seventh transistors T1 to T7 may be a source electrode or a drain electrode
  • the second end of each of the first to seventh transistors T1 to T7 may be the first Different electrodes at the ends.
  • the second end when the first end is a drain electrode, the second end is a source electrode; and when the first end is a source electrode, the second end is a drain electrode.
  • Each of the first to seventh transistors T1 to T7 may have the same channel shape.
  • each of the first to seventh transistors T1 to T7 may have a p-channel shape.
  • each of the first to seventh transistors T1 to T7 can be realized using a polysilicon thin film transistor, an amorphous silicon thin film transistor, or an oxide thin film transistor.
  • the pixel driving circuit according to an embodiment of the present invention employing the 7T1C pixel structure performs a reset operation (ie, a reset phase), a threshold voltage compensation operation (ie, a threshold voltage compensation phase), and an illumination driving operation (ie, a light-emitting drive) stage).
  • a reset operation ie, a reset phase
  • a threshold voltage compensation operation ie, a threshold voltage compensation phase
  • an illumination driving operation ie, a light-emitting drive
  • the reset signal Reset is kept at a low potential
  • the scan signal Scan is kept at a high potential
  • the enable signal Em is maintained at a low potential for the first predetermined period A1
  • the enable signal Em is at the first At the end of the predetermined time period A1, the low potential transitions to the high potential; that is, in the first predetermined time period A1, both the enable signal Em and the reset signal Reset remain low.
  • the first transistor T1, the second transistor T2, the third transistor T3, the sixth transistor T6, and the seventh transistor T7 are all in an off state.
  • the enable signal Em remains at a high potential
  • the reset signal Reset maintains a low potential for the second predetermined time period A2
  • the reset signal Reset transitions from a low potential to a high potential at the end of the second predetermined time period A2, scanning
  • Scan maintains the low potential of the third predetermined period A3, and the scan signal Scan transitions from the low potential to the high potential at the end of the third predetermined period A3.
  • the start time of the second predetermined time period A2 is the same as the start time of the third predetermined time period A3, and the second predetermined time period A2 is greater than the third predetermined time period A3.
  • the second transistor T2 is turned on to supply the data voltage Vdata to the first node g (ie, the gate electrode of the first transistor T1), and the fourth transistor T4 is kept in an on state to hold the first end of the capacitor Cst.
  • Vth is the threshold voltage of the first transistor T1.
  • the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are both in an off state.
  • the enable signal Em is kept at a low potential, and both the reset signal Reset and the scan signal Scan are kept at a high potential.
  • the seventh transistor T7 is turned on to supply the voltage in the capacitor Cst to the first node g (ie, the gate electrode of the first transistor T1),
  • the current I flowing through the organic light emitting diode OLED is expressed as:
  • the current I flowing through the organic light emitting diode OLED is independent of the threshold voltage Vth of the first transistor T1, so that the display failure phenomenon caused by the shift of the threshold voltage Vth of the first transistor T1 can be eliminated.
  • the second transistor T2, the third transistor T3, and the fourth transistor T4 are all in an off state in the light emission driving phase.
  • the current flowing through the organic light emitting diode is independent of the threshold voltage of the driving transistor, thus eliminating the phenomenon of poor display of the screen due to the drift of the threshold voltage of the driving transistor.

Abstract

一种采用7T1C像素结构的像素驱动电路。所述7T1C像素结构的像素驱动电路能够对驱动有机发光二极管的驱动晶体管（T1）的阈值电压（Vth）进行有效补偿，使流经有机发光二极管（OLED）的电流（I）与该驱动晶体管（T1）的阈值电压（Vth）无关，从而消除因该驱动晶体管（T1）的阈值电压（Vth）漂移而引起的画面显示不良的现象。

Description

像素驱动电路及具有该像素驱动电路的显示装置 技术领域
本发明属于显示技术领域，具体地讲，涉及一种像素驱动电路及具有该像素驱动电路的显示装置。
背景技术
近年来，有机发光二极管(Organic Light-Emitting Diode，OLED)显示器成为国内外非常热门的新兴平面显示器产品，这是因为OLED显示器具有自发光、广视角、短反应时间、高发光效率、广色域、低工作电压、薄厚度、可制作大尺寸与可挠曲的显示器及制程简单等特性，而且它还具有低成本的潜力。
在OLED显示器中，通常利用薄膜晶体管(TFT)搭配电容存储信号来控制OLED的亮度灰阶表现。为了达到定电流驱动的目的，每个像素至少需要两个TFT和一个存储电容器来构成，即2T1C模式。图1是现有的OLED显示器的像素驱动电路的电路图。参照图1，现有的OLED显示器的像素驱动电路包括两个薄膜晶体管(TFT)和一个电容器，具体地，包括一个开关TFT T1、一个驱动TFT T2和一个存储电容器Cstst。OLED的驱动电流由驱动TFT T2控制，其电流大小为：I OLED＝k(V gs-V th) 2，其中，k为驱动TFT T2的本征导电因子，由驱动TFT T2本身特性决定，V th为驱动TFT T2的阈值电压，V gs为驱动TFT T2的栅电极和源电极之间的电压。由于长时间的操作，驱动TFT T2的阈值电压V th会发生漂移，因此会导致OLED的驱动电流变化，从而使得OLED显示器出现显示不良，进而影响显示画面的质量。
发明内容
为了解决上述现有技术的问题，本发明的目的在于提供一种能够消除有机发光二极管的驱动电流被驱动晶体管的阈值电压影响的像素驱动电路及具有该像素驱动电路的显示装置。
根据本发明的一方面，提供了一种像素驱动电路，其包括：第一晶体管、 第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管、第七晶体管、电容器和有机发光二极管；在复位阶段，第四晶体管被导通而将参考电压提供至电容器的第一端，第五晶体管被先导通后截止而将电源电压提供至电容器的第二端；在阈值电压补偿阶段，第二晶体管被导通而将数据电压提供至第一晶体管的栅电极，第四晶体管被保持导通状态以保持电容器的第一端的电压为参考电压，第一晶体管和第三晶体管被导通而使所述电容器的第二端的电压放电至数据电压和第一晶体管的阈值电压之差时第一晶体管被截止；在发光驱动阶段，第五晶体管被导通而将电源电压提供至第一晶体管的第一端，第七晶体管被导通而将电容器中的电压提供至第一晶体管的栅电极，第六晶体管被导通而使驱动电流从第一晶体管的第二端通过第六晶体管提供至有机发光二极管。
进一步地，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第六晶体管和所述第七晶体管在复位阶段处于截止状态。
进一步地，所述第五晶体管、所述第六晶体管和所述第七晶体管在阈值电压补偿阶段处于截止状态。
进一步地，所述第二晶体管、所述第三晶体管和所述第四晶体管在发光驱动阶段处于截止状态。
进一步地，所述第一晶体管的栅电极连接到第一节点，且其第一端连接到第二节点，且其第二端连接到第三节点；所述第二晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第一节点，且其第一端用于接收数据电压；所述第三晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第三节点，且其第一端连接到所述第一节点；所述第四晶体管的栅电极用于接收复位信号，且其第一端用于接收参考电压，且其第二端连接到第四节点；所述第五晶体管的栅电极用于接收使能信号，且其第一端用于接收电源电压，且其第二端连接到所述第二节点；所述第六晶体管的栅电极用于接收使能信号，且其第一端连接到所述第三节点，且其第二端连接到所述有机发光二极管；所述第七晶体管的栅电极用于接收使能信号，且其第一端连接到所述第四节点，且其第二端连接到所述第一节点；所述电容器的第一端连接所述第四节点，且其第二端连接所述第二节点。
进一步地，在复位阶段，所述复位信号保持低电位，所述扫描信号保持高电位，所述使能信号保持第一预定时间段的低电位，并且所述使能信号在所述第一预定时间段结束时由低电位转变为高电位。
进一步地，在阈值电压补偿阶段，所述使能信号保持高电位，所述复位信号保持第二预定时间段的低电位，并且所述复位信号在所述第二预定时间段结束时由低电位转变为高电位，所述扫描信号保持第三预定时间段的低电位，并在所述第三预定时间段结束时由低电位转变为高电位。
进一步地，在发光驱动阶段，所述使能信号保持低电位，所述复位信号和所述扫描信号均保持高电位。
进一步地，所述第一晶体管至所述第七晶体管中的每个晶体管是p沟道晶体管。
根据本发明的另一方面，还提供了一种显示装置，其包括上述的像素驱动电路。
本发明的有益效果：本发明的采用7T1C像素结构的像素驱动电路能够对驱动有机发光二极管的驱动晶体管的阈值电压进行有效补偿，使流经有机发光二极管的电流与该驱动晶体管的阈值电压无关，从而消除因该驱动晶体管的阈值电压漂移而引起的画面显示不良的现象。
附图说明
通过结合附图进行的以下描述，本发明的实施例的上述和其它方面、特点和优点将变得更加清楚，附图中：
图1是现有的OLED显示器的像素驱动电路的电路图；
图2是根据本发明的实施例的有机发光二极管显示器的架构图；
图3是根据本发明的实施例的像素驱动电路的电路图；
图4是根据本发明的实施例的各信号的时序图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
在附图中，为了清楚器件，夸大了层和区域的厚度。相同的标号在整个说明书和附图中表示相同的元器件。
图2是根据本发明的实施例的有机发光二极管显示器的架构图。
参照图2，根据本发明的实施例的有机发光二极管显示器包括：显示面板100、扫描驱动器200和数据驱动器300。需要说明的是，根据本发明的是实力的有机发光二极管显示器还可以包括其他合适的器件，诸如控制扫描驱动器200和数据驱动器300的时序控制器以及提供电源正极电压和电源负极电压的电源电压产生器等。
具体地，显示面板100包括：阵列排布的多个像素PX、N条扫描线G 1至G N、M条数据线D 1至D M。扫描驱动器200连接到扫描线G 1至G N，并驱动扫描线G 1至G N。数据驱动器300连接到数据线D 1至D M，并驱动数据线D 1至D M。
扫描驱动器200能够向每个像素PX提供一个或者多个扫描信号，之后将会描述。数据驱动器300能够向每个像素PX提供数据电压，之后也将会描述。
每个像素PX包括像素驱动电路。以下将对根据本发明的实施例的像素驱动电路(即像素PX的像素结构)进行详细描述。
图3是根据本发明的实施例的像素驱动电路的电路图。
参照图3，根据本发明的实施例的有机发光二极管显示器的每个像素PX都具有7T1C像素结构，所述7T1C像素结构包括有机发光二极管OLED、第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、第七晶体管T7和电容器Cst。
第一晶体管T1的栅电极电性连接于第一节点g，且其第一端电性连接于第二节点s，且其第二端连接到第三节点d。
第二晶体管T2的栅电极用于接收扫描信号Scan(其由扫描驱动器200提供)，且其第一端用于接收数据电压Vdata(其由数据驱动器300提供)，且其第二端连接到第一节点g。在本实施例中，数据电压Vdata为高电位(或称高电平)。
第三晶体管T3的栅电极用于接收扫描信号Scan，且其第一端电性连接到第一节点g，且其第二端电性连接到第三节点d。
第四晶体管T4的栅电极用于接收复位信号Reset，且其第一端用于接收参考电压Vref，且其第二端电性连接到第四节点a。
第五晶体管T5的栅电极用于接收使能信号Em，且其第一端用于接收电源正极电压Vdd(其通常由有机发光二极管显示器的电源产生器(未示出)产生并提供)，且其第二端连接到第二节点s。
第六晶体管T6的栅电极用于接收使能信号Em，且其第一端连接到第三节点d，且其第二端连接到有机发光二极管OLED的阳极。
第七晶体管T7的栅电极用于接收使能信号Em，且其第一端连接到第四节点a，且其第二端连接到第一节点g。
电容器Cst的第一端连接到第四节点a，且其第二端电性连接于第二节点s。
有机发光二极管OLED的阴极用于接收电源负极电压Vss(其通常由有机发光二极管显示器的电源产生器(未示出)产生并提供)。在本实施例中，电源正极电压Vdd为高电位，电源负极电压Vss为低电位，并且电源正极电压Vdd大于。
在本实施例中，第一晶体管T1作为驱动晶体管。
这里，第一晶体管T1至第七晶体管T7中的每个的第一端可以是源电极或漏电极，并且第一晶体管T1至第七晶体管T7中的每个的第二端可以是与第一端不同的电极。
例如，当第一端是漏电极时，第二端是源电极；而当第一端是源电极时，第二端是漏电极。
第一晶体管T1至第七晶体管T7中的每个可以具有相同的沟道形状。
例如，第一晶体管T1至第七晶体管T7中的每个可以具有p沟道形状。
因此，第一晶体管T1至第七晶体管T7中的每个可利用多晶硅薄膜晶体管、非晶硅薄膜晶体管或者氧化物薄膜晶体管来实现。
以下将对根据本发明的实施例的像素驱动电路的工作原理进行详细描述。在本实施例中，采用了7T1C像素结构的根据本发明的实施例的像素驱动电路执行复位操作(即复位阶段)、阈值电压补偿操作(即阈值电压补偿阶段)以及发光驱动操作(即发光驱动阶段)。图4是根据本发明的实施例的各信号的时序图。
首先，在复位阶段，参照图4和图3，复位信号Reset保持低电位，扫描信号Scan保持高电位，使能信号Em保持第一预定时间段A1的低电位，并且使能信号Em在第一预定时间段A1结束时由低电位转变为高电位；也就是说，在第一预定时间段A1内，使能信号Em和复位信号Reset均保持低电位。
此时，第四晶体管T4导通，从而将参考电压Vref提供至第四节点a(即电容器Cst的第一端)，第四节点a的电压Va＝Vref；第五晶体管T5被先导通后截止，从而将电源电压Vdd提供至第二节点s(即电容器Cst的第二端)，第二节点s的电压Vs＝Vdd。此外，需要说明的是，第一预定时间段A1的起始点与复位阶段的起始点重合。如此，使能信号Em先低电位后高电位，可以保证第二节点s的电压Vs＝Vdd。
此外，在复位阶段，第一晶体管T1、第二晶体管T2、第三晶体管T3、第六晶体管T6和第七晶体管T7均处于截止状态。
在阈值电压补偿阶段，使能信号Em保持高电位，复位信号Reset保持第二预定时间段A2的低电位，并且复位信号Reset在第二预定时间段A2结束时由低电位转变为高电位，扫描信号Scan保持第三预定时间段A3的低电位，并且扫描信号Scan在第三预定时间段A3结束时由低电位转变为高电位。第二预 定时间段A2的起始时刻与第三预定时间段A3的起始时刻相同，并且第二预定时间段A2大于第三预定时间段A3。
此时，第二晶体管T2导通而将数据电压Vdata提供至到第一节点g(即第一晶体管T1的栅电极)，第四晶体管T4被保持导通状态以保持电容器Cst的第一端的电压为参考电压Vref(即第四节点a的电压Va＝Vref)，第一晶体管T1和第三晶体管T3和第四晶体管导通，以使电容器Cst的第二端的电压经由第一晶体管T1和第三晶体管T3的路径放电至数据电压Vdata和第一晶体管T1的阈值电压Vth之差时第一晶体管T1被截止，即第二节点s的电压Vs＝Vdata-Vth。这里，Vth为第一晶体管T1的阈值电压。
此外，在阈值电压补偿阶段，第五晶体管T5、第六晶体管T6和第七晶体管T7均处于截止状态。
在发光驱动阶段，使能信号Em保持低电位，复位信号Reset和扫描信号Scan均保持高电位，此时，第五晶体管T5被导通而将电源电压Vdd提供至第二节点s(即第一晶体管T1的第一端)，第二节点s的电压Vs＝Vdd；第七晶体管T7被导通而将电容器Cst中的电压提供至第一节点g(即第一晶体管T1的栅电极)，第一节点g的电压Vg＝Vdd-Vdata+Vth+Vref，第六晶体管T6被导通而使驱动电流从第一晶体管T1的第二端通过第六晶体管T6提供至有机发光二极管OLED。
如此，流经有机发光二极管OLED的电流I表示为：
I＝k(Vgs-Vth) 2＝k(Vref+Vth-Vdata-Vth) 2＝k(Vref-Vdata) 2
其中，第一节点g与第二节点s之间的压差Vgs＝Vg-Vs＝Vdd-Vdata+Vth+Vref-Vdd＝Vref-Vdata+Vth，k表示第一晶体管T1的本征导电因子，由第一晶体管T1本身特性决定。
因此，在流经有机发光二极管OLED的电流I的表达式中，电流I与第一晶体管T1的阈值电压Vth无关，这样可以消除第一晶体管T1的阈值电压Vth漂移引起的画面显示不良现象。
此外，在发光驱动阶段第二晶体管T2、第三晶体管T3和第四晶体管T4 均处于截止状态。
综上所述，根据本发明的实施例，流经有机发光二极管的电流与驱动晶体管的阈值电压无关，这样消除了因驱动晶体管的阈值电压的漂移引起的画面显示不良现象。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (18)

  1. 一种像素驱动电路，其中，包括：第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管、第七晶体管、电容器和有机发光二极管；
    在复位阶段，第四晶体管被导通而将参考电压提供至电容器的第一端，第五晶体管被先导通后截止而将电源电压提供至电容器的第二端；
    在阈值电压补偿阶段，第二晶体管被导通而将数据电压提供至第一晶体管的栅电极，第四晶体管被保持导通状态以保持电容器的第一端的电压为参考电压，第一晶体管和第三晶体管被导通而使所述电容器的第二端的电压放电至数据电压和第一晶体管的阈值电压之差时第一晶体管被截止；
    在发光驱动阶段，第五晶体管被导通而将电源电压提供至第一晶体管的第一端，第七晶体管被导通而将电容器中的电压提供至第一晶体管的栅电极，第六晶体管被导通而使驱动电流从第一晶体管的第二端通过第六晶体管提供至有机发光二极管。
  2. 根据权利要求1所述的像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第六晶体管和所述第七晶体管在复位阶段处于截止状态。
  3. 根据权利要求1所述的像素驱动电路，其中，所述第五晶体管、所述第六晶体管和所述第七晶体管在阈值电压补偿阶段处于截止状态。
  4. 根据权利要求1所述的像素驱动电路，其中，所述第二晶体管、所述第三晶体管和所述第四晶体管在发光驱动阶段处于截止状态。
  5. 根据权利要求1所述的像素驱动电路，其中，
    所述第一晶体管的栅电极连接到第一节点，且其第一端连接到第二节点，且其第二端连接到第三节点；
    所述第二晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第一节点，且其第一端用于接收数据电压；
    所述第三晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第三节点，且其第一端连接到所述第一节点；
    所述第四晶体管的栅电极用于接收复位信号，且其第一端用于接收参考电压，且其第二端连接到第四节点；
    所述第五晶体管的栅电极用于接收使能信号，且其第一端用于接收电源电压，且其第二端连接到所述第二节点；
    所述第六晶体管的栅电极用于接收使能信号，且其第一端连接到所述第三节点，且其第二端连接到所述有机发光二极管；
    所述第七晶体管的栅电极用于接收使能信号，且其第一端连接到所述第四节点，且其第二端连接到所述第一节点；
    所述电容器的第一端连接所述第四节点，且其第二端连接所述第二节点。
  6. 根据权利要求5所述的像素驱动电路，其中，在复位阶段，所述复位信号保持低电位，所述扫描信号保持高电位，所述使能信号保持第一预定时间段的低电位，并且所述使能信号在所述第一预定时间段结束时由低电位转变为高电位。
  7. 根据权利要求5所述的像素驱动电路，其中，在阈值电压补偿阶段，所述使能信号保持高电位，所述复位信号保持第二预定时间段的低电位，并且所述复位信号在所述第二预定时间段结束时由低电位转变为高电位，所述扫描信号保持第三预定时间段的低电位，并在所述第三预定时间段结束时由低电位转变为高电位。
  8. 根据权利要求5所述的像素驱动电路，其中，在发光驱动阶段，所述使能信号保持低电位，所述复位信号和所述扫描信号均保持高电位。
  9. 根据权利要求1所述的像素驱动电路，其中，所述第一晶体管至所述第七晶体管中的每个晶体管是p沟道晶体管。
  10. 一种显示装置，其中，包括像素驱动电路，所述像素驱动电路包括：第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管、第七晶体管、电容器和有机发光二极管；
    在复位阶段，第四晶体管被导通而将参考电压提供至电容器的第一端，第五晶体管被先导通后截止而将电源电压提供至电容器的第二端；
    在阈值电压补偿阶段，第二晶体管被导通而将数据电压提供至第一晶体管的栅电极，第四晶体管被保持导通状态以保持电容器的第一端的电压为参考电压，第一晶体管和第三晶体管被导通而使所述电容器的第二端的电压放电至数据电压和第一晶体管的阈值电压之差时第一晶体管被截止；
    在发光驱动阶段，第五晶体管被导通而将电源电压提供至第一晶体管的第一端，第七晶体管被导通而将电容器中的电压提供至第一晶体管的栅电极，第六晶体管被导通而使驱动电流从第一晶体管的第二端通过第六晶体管提供至有机发光二极管。
  11. 根据权利要求10所述的显示装置，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第六晶体管和所述第七晶体管在复位阶段处于截止状态。
  12. 根据权利要求10所述的显示装置，其中，所述第五晶体管、所述第六晶体管和所述第七晶体管在阈值电压补偿阶段处于截止状态。
  13. 根据权利要求10所述的显示装置，其中，所述第二晶体管、所述第三晶体管和所述第四晶体管在发光驱动阶段处于截止状态。
  14. 根据权利要求10所述的显示装置，其中，
    所述第一晶体管的栅电极连接到第一节点，且其第一端连接到第二节点，且其第二端连接到第三节点；
    所述第二晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第一节点，且其第一端用于接收数据电压；
    所述第三晶体管的栅电极用于接收扫描信号，且其第二端连接到所述第三 节点，且其第一端连接到所述第一节点；
    所述第四晶体管的栅电极用于接收复位信号，且其第一端用于接收参考电压，且其第二端连接到第四节点；
    所述第五晶体管的栅电极用于接收使能信号，且其第一端用于接收电源电压，且其第二端连接到所述第二节点；
    所述第六晶体管的栅电极用于接收使能信号，且其第一端连接到所述第三节点，且其第二端连接到所述有机发光二极管；
    所述第七晶体管的栅电极用于接收使能信号，且其第一端连接到所述第四节点，且其第二端连接到所述第一节点；
    所述电容器的第一端连接所述第四节点，且其第二端连接所述第二节点。
  15. 根据权利要求14所述的显示装置，其中，在复位阶段，所述复位信号保持低电位，所述扫描信号保持高电位，所述使能信号保持第一预定时间段的低电位，并且所述使能信号在所述第一预定时间段结束时由低电位转变为高电位。
  16. 根据权利要求14所述的显示装置，其中，在阈值电压补偿阶段，所述使能信号保持高电位，所述复位信号保持第二预定时间段的低电位，并且所述复位信号在所述第二预定时间段结束时由低电位转变为高电位，所述扫描信号保持第三预定时间段的低电位，并在所述第三预定时间段结束时由低电位转变为高电位。
  17. 根据权利要求14所述的显示装置，其中，在发光驱动阶段，所述使能信号保持低电位，所述复位信号和所述扫描信号均保持高电位。
  18. 根据权利要求10所述的显示装置，其中，所述第一晶体管至所述第七晶体管中的每个晶体管是p沟道晶体管。
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