WO2019107069A1 - Élément de cellule solaire - Google Patents

Élément de cellule solaire Download PDF

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Publication number
WO2019107069A1
WO2019107069A1 PCT/JP2018/040800 JP2018040800W WO2019107069A1 WO 2019107069 A1 WO2019107069 A1 WO 2019107069A1 JP 2018040800 W JP2018040800 W JP 2018040800W WO 2019107069 A1 WO2019107069 A1 WO 2019107069A1
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Prior art keywords
electrode
solar cell
cell element
semiconductor substrate
protective film
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PCT/JP2018/040800
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English (en)
Japanese (ja)
Inventor
敬太 黒須
祐介 宮道
賢 北山
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京セラ株式会社
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Publication of WO2019107069A1 publication Critical patent/WO2019107069A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present disclosure relates to a solar cell element.
  • solar cell elements having an inorganic semiconductor substrate in which a pn junction is formed, and electrodes provided on both sides of this substrate (for example, JP-A-2016-6869 and JP-A-2013-512571).
  • a solar cell element includes a laminated semiconductor, a first electrode, a second electrode, an alloy portion, and a protective film.
  • the laminated semiconductor has a first surface and a second surface provided on the opposite side of the first surface, and semiconductor layers of opposite conductivity types are laminated between the first surface and the second surface. ing.
  • the first electrode is located on the second surface side of the laminated semiconductor.
  • the second electrode is connected to the laminated semiconductor and the first electrode on the second surface side, and has a main component different from the first electrode.
  • the alloy part is located between the first electrode and the second electrode, and includes the main component of the first electrode and the main component of the second electrode.
  • the protective film is located on the alloy portion.
  • FIG. 1 is a cross-sectional view schematically showing an example of the configuration of a solar cell module 200.
  • the solar cell module 200 includes a pair of base materials 210 and 220, a plurality of solar cell elements 100, a filler 230, and a wiring member 240.
  • XYZ coordinates are additionally shown in FIG.
  • one side and the other side in the X-axis direction are also referred to as + X side and ⁇ X side, respectively.
  • the pair of base members 210 and 220 have, for example, a plate-like shape, and the thickness direction thereof is positioned along the Z-axis direction.
  • the substrates 210 and 220 face each other at an interval in the Z-axis direction.
  • the base 210 is located on the + Z side with respect to the base 220.
  • the light source for example, the sun
  • the solar cell module 200 is installed such that the substrate 210 is located on the light source side.
  • the base 210 is a light transmitting substrate (for example, a glass substrate).
  • the light transmissivity referred to herein means that the transmittance to light (for example, sunlight) to be a target of photoelectric conversion of the solar cell element 100 is high.
  • the transmittance is, for example, 60% or more.
  • the base material 220 may have translucency or may not have translucency.
  • the plurality of solar cell elements 100 are located between the pair of substrates 210 and 220.
  • the plurality of solar cell elements 100 have a plate-like shape, and the thickness direction thereof is positioned along the Z-axis direction.
  • the plurality of solar cell elements 100 are positioned in the state of being spaced apart along the X-axis direction, they are actually positioned in the state of being aligned in the Y-axis direction. It is also good. That is, the plurality of solar cell elements 100 may be positioned in a two-dimensional array.
  • the light transmitted through the base 210 is incident on the plurality of solar cell elements 100.
  • the solar cell element 100 converts light incident thereon into electric power. That is, the solar cell element 100 generates power based on light.
  • the specific internal configuration of the solar cell element 100 will be described in detail later.
  • the solar cell elements 100 adjacent to each other are located in a state of being electrically connected via the wiring member 240.
  • a wiring member 240 (hereinafter, wiring member 240A) for connecting a pair of solar cell elements 100 (hereinafter, solar cell elements 100A and 100B) adjacent to each other in the X-axis direction will be described.
  • the solar cell element 100A is located on the ⁇ X side with respect to the solar cell element 100B.
  • the portion on the ⁇ X side of the wiring member 240A is located in a state of being connected to the first surface 100a on the + Z side of the solar cell element 100A.
  • Wiring member 240 extends between first surface 100a of solar cell element 100A to solar cell elements 100A and 100B and extends to second surface 100b on the -Z side of solar cell element 100B. ing. The portion on the ⁇ X side of the wiring member 240 is located in a state of being connected to the second surface 100 b of the solar cell element 100 B. Thus, the wiring member 240A can connect the solar cell elements 100A and 100B in series.
  • the plurality of solar cell elements 100 may be located in a state of being connected in series with each other, or a plurality of series connected members may be located in a state of being connected in parallel.
  • the solar cell module 200 is provided with a pair of wiring members (not shown) for outputting the power generated by the plurality of solar cell elements 100 to the outside.
  • the pair of wiring members are positioned, for example, in a state of being connected to the solar cell elements 100 positioned at both ends of the series connection body, and are positioned, for example, in a state of penetrating the base material 220 and extending to the outside.
  • a filler 230 is located between the pair of base materials 210 and 220 in a filled state.
  • the filler 230 is positioned in close contact with the facing surfaces of the base members 210 and 220, the solar cell element 100, and the wiring member 240.
  • the filler 230 is a translucent insulating resin, and the filler 230 may be formed of an organic material.
  • the filler 230 is formed of an organic material such as EVA (ethylene vinyl acetate copolymer resin).
  • EVA ethylene vinyl acetate copolymer resin
  • FIG. 2 is a plan view schematically showing an example of the configuration of the solar cell element 100 as viewed from the + Z side
  • FIG. 3 is a configuration of the solar cell element 100 as viewed from the ⁇ Z side
  • FIG. 4 is a plan view schematically showing an example
  • FIG. 4 is a cross-sectional view schematically showing an example of a configuration of a solar cell element 100, and shows a III-III cross section shown in FIG.
  • the solar cell element 100 includes the semiconductor substrate 1 (laminated semiconductor), the electrodes 6 and 7, the alloy portions 78 and 28, and the protective film 10.
  • the semiconductor substrate 1 has a substantially plate-like shape.
  • the main surface on the + Z side of the semiconductor substrate 1 is also referred to as the first surface 1a
  • the main surface on the ⁇ Z side is also referred to as the second surface 1b.
  • the peripheral edge of the first surface 1a and the peripheral edge of the second surface 1b are mutually connected
  • the side to be moved is also referred to as the third side 1c.
  • the semiconductor substrate 1 includes a first semiconductor layer 2 which is a semiconductor region of a first conductivity type (for example, p type), and a second semiconductor region which is a semiconductor region of a second conductivity type (for example n type) opposite to the first conductivity type. And the semiconductor layer 3.
  • the first semiconductor layer 2 and the second semiconductor layer 3 are formed to be stacked on each other in the Z-axis direction between the first surface 1a and the second surface 1b. In the example of FIG. 4, the second semiconductor layer 3 is located on the + Z side with respect to the first semiconductor layer 2.
  • a single crystal or polycrystalline silicon substrate can be employed as the semiconductor substrate 1.
  • a substrate of an inorganic semiconductor such as germanium, selenium or gallium arsenide may be employed as the semiconductor substrate 1.
  • the semiconductor substrate 1 When a single crystal or polycrystalline silicon substrate is employed as the semiconductor substrate 1, its thickness is, for example, about 100 to 250 ⁇ m.
  • the shape of the semiconductor substrate 1 is not particularly limited, but may be, for example, a substantially square shape in plan view (that is, viewed along the Z-axis direction). In this case, when manufacturing the solar cell module 200 by arranging the plurality of solar cell elements 100, the gap between the solar cell elements 100 can be easily reduced. Thereby, the power generation amount per unit area of the solar cell module 200 can be improved.
  • the first semiconductor layer 2 contains an impurity such as boron or gallium as a dopant.
  • the second semiconductor layer 3 is formed by diffusing an impurity such as phosphorus as a dopant on the first surface 1 a side of the first semiconductor layer 2.
  • a pn junction is formed at the interface between the first semiconductor layer 2 and the second semiconductor layer 3.
  • the first surface 1 a of the semiconductor substrate 1 may have a fine concavo-convex shape (texture) for reducing the reflectance of incident light.
  • the height of the convex portion of this texture is, for example, about 0.1 to 10 ⁇ m, and the distance between adjacent convex portions is, for example, about 0.1 to 20 ⁇ m.
  • the convex portions of the texture may be pyramidal, or, for example, the concave portions of the texture may be spherically shaped.
  • the electrode 6 is located on the first surface 1 a of the semiconductor substrate 1. Since the first surface 1 a corresponds to the surface of the semiconductor substrate 1, the electrode 6 is hereinafter also referred to as the surface electrode 6.
  • the surface electrode 6 is positioned in a state of being electrically connected to the second semiconductor layer 3. As illustrated in FIG. 2, the surface electrode 6 includes a first output lead electrode 6 a and a plurality of linear first current collection electrodes 6 b.
  • the first output extraction electrode 6a is an electrode for extracting the power generated by the semiconductor substrate 1 to the outside, and has, for example, an elongated shape extending along the X-axis direction.
  • the length (hereinafter referred to as the width) of the first output lead-out electrode 6a in the short side direction (here, Y axis direction) is, for example, about 0.5 to 2.5 [mm].
  • the first output lead-out electrode 6a is located in a state of being connected to the wiring member 240 by, for example, solder.
  • the first current collection electrode 6b is an electrode for collecting the power generated by the semiconductor substrate 1 in the first output extraction electrode 6a, and extends so as to intersect the first output extraction electrode 6a. It is located in the state connected to 6a.
  • the first current collecting electrode 6b may be positioned extending along a direction (here, the Y-axis direction) orthogonal to the extending direction of the first output extraction electrode 6a.
  • the first collecting electrode 6b has a linear shape, and the width (here, a length along the X-axis direction) is shorter than that of the first output extraction electrode 6a, for example, about 50 to 200 ⁇ m. It is.
  • a plurality of first current collection electrodes 6b may be provided, and the distance between them is, for example, about 1 to 3 [mm].
  • the thickness of the surface electrode 6 is, for example, 10 to 40 ⁇ m.
  • Such a surface electrode 6 is formed on the first surface 1 a of the semiconductor substrate 1 so that a metal paste composed mainly of a solderable metal (for example, silver) becomes a desired shape by screen printing or the like, for example. After application, it can be formed by baking the applied film.
  • the main component means that the content mass with respect to the whole component is 50 [mass%] or more.
  • the solar cell element 100 may have the antireflective layer 5.
  • the antireflective layer 5 is located on the first surface 1 a of the semiconductor substrate 1. More specifically, the antireflective layer 5 is located on a region of the first surface 1 a of the semiconductor substrate 1 which is not covered by the surface electrode 6.
  • the antireflective layer 5 suppresses the reflection of light incident on the solar cell element 100.
  • the antireflective layer 5 has a layer such as a silicon oxide, aluminum oxide or silicon nitride layer, for example.
  • the refractive index and thickness of the antireflective layer 5 may be appropriately selected so as to realize low reflectance for light in a wavelength range absorbed by the semiconductor substrate 1 and contributing to power generation.
  • the refractive index of the antireflective layer 5 is, for example, about 1.8 to 2.5, and the thickness thereof is, for example, about 20 to 120 nm.
  • the antireflective layer 5 can be formed by, for example, a plasma-enhanced chemical vapor deposition (PECVD) method.
  • PECVD plasma-enhanced chemical vapor deposition
  • the electrodes 7 and 8 are electrodes located on the second surface 1 b side of the semiconductor substrate 1 as shown in FIGS. 3 and 4. Since the second surface 1 b corresponds to the back surface of the semiconductor substrate 1, it can be said that the electrodes 7 and 8 are back surface electrodes.
  • the electrode 7 is a power extraction electrode for extracting the power generated by the semiconductor substrate 1 to the outside.
  • the electrodes 7 may be arranged in a dot shape (or island shape) as shown in FIG.
  • the plurality of electrodes 7 may be positioned in a matrix in which the X-axis direction and the Y-axis direction correspond to the row direction and the column direction, respectively.
  • the electrode 7 may have an elongated shape elongated in the X-axis direction.
  • the electrode 7 may have a linear shape extending from end to end in the X-axis direction of the semiconductor substrate 1.
  • the thickness of the electrode 7 is, for example, about 0 to 30 ⁇ m, and the width thereof is, for example, about 1.3 to 7 mm.
  • the electrode 7 contains, for example, a solderable metal (eg, silver) as a main component.
  • a solderable metal eg, silver
  • Such an electrode 7 is formed, for example, by applying a metal paste containing silver as a main component on the second surface 1 b of the semiconductor substrate 1 so as to have a desired shape by screen printing or the like, and then baking it. It can be done.
  • the electrode 7 is connected to the wiring member 240 by solder, for example.
  • a passivation layer 9 may be disposed on the second surface 1 b side of the semiconductor substrate 1.
  • the passivation layer 9 is formed on the second surface 1 b of the semiconductor substrate 1.
  • through holes are formed in the passivation layer 9 in a region corresponding to the electrode 7. The through hole penetrates the passivation layer 9 in the Z-axis direction, and the electrode 7 is disposed inside the through hole. That is, the electrode 7 is disposed directly on the second surface 1 b of the semiconductor substrate 1 without passing through the passivation layer 9.
  • the electrode 8 is an electrode for collecting the power generated by the semiconductor substrate 1 in the electrode 7 and is located in a state of being connected to the electrode 7.
  • the electrode 8 is located on the passivation layer 9.
  • a plurality of through holes 22 are formed in the passivation layer 9 in a region facing the electrode 8.
  • the plurality of through holes 22 are positioned in a state of penetrating the passivation layer 9 in the Z-axis direction.
  • a part of the electrode 8 fills the through hole 22 and is positioned in contact with the second surface 1 b of the semiconductor substrate 1. Thereby, the electrode 8 is positioned in a state of being electrically connected to the first semiconductor layer 2.
  • the electrode 7 since the electrode 7 is in contact with the first semiconductor layer 2, the electrode 7 is electrically connected to the first semiconductor layer 2, and is also electrically connected to the first semiconductor layer 2 via the electrode 8. . Therefore, the electrode 7 does not necessarily have to be positioned in contact with the second surface 1 b of the semiconductor substrate 1.
  • the electrode 7 may be located on the passivation layer 9. In other words, the passivation layer 9 may be interposed between the electrode 7 and the second surface 1 b of the semiconductor substrate 1.
  • the passivation layer 9 has a function of reducing minority carrier recombination because it reduces defect levels that cause minority carrier recombination at the interface with the semiconductor substrate 1.
  • the passivation layer 9 is, for example, an insulating film such as silicon oxide, aluminum oxide, or silicon nitride.
  • the thickness of the passivation layer 9 is, for example, about 10 to 200 nm.
  • the passivation layer 9 may be, for example, a film containing aluminum oxide formed by ALD (atomic layer deposition) method or the like. If a film having a negative fixed charge such as aluminum oxide is used as passivation layer 9, electrons which are minority carriers are separated from the interface between semiconductor substrate 1 and passivation layer 9 by the field effect. Can be further reduced.
  • a film having positive fixed charge such as silicon nitride formed by PECVD method may be employed as the passivation layer 9.
  • the electrode 8 is formed so as to cover the passivation layer 9 except an outer peripheral portion of, for example, about 0.3 to 2 mm from the end of the semiconductor substrate 1.
  • the electrode 8 may have, for example, a main component (for example, aluminum) different from that of the electrode 7.
  • the thickness of the electrode 8 is, for example, about 15 to 50 ⁇ m.
  • the electrode 8 can be formed, for example, by applying a metal paste containing aluminum as a main component on the passivation layer 9 so as to obtain a desired shape by screen printing or the like, and then baking the applied film.
  • a BSF (Back Surface Field) layer 4 may be formed in the vicinity of the interface with the electrode 8 in the first semiconductor layer 2.
  • the BSF layer 4 is a semiconductor of the same first conductivity type as the first semiconductor layer 2, and the concentration of the dopant is higher than the concentration of the dopant contained in the portion other than the BSF layer 4 in the first semiconductor layer 2.
  • the BSF layer 4 can be formed, for example, by diffusing a dopant such as boron or aluminum.
  • a dopant such as boron or aluminum.
  • the aluminum in the metal paste can be diffused to form the BSF layer 4 by firing the metal paste.
  • the concentration of the dopant contained in the portion other than the BSF layer 4 in the first semiconductor layer 2 is, for example, about 5 ⁇ 10 15 to 1 ⁇ 10 17 [atoms / cm 3 ], and the concentration of the dopant contained in the BSF layer 4 is For example, it is about 1 ⁇ 10 18 to 1 ⁇ 10 21 atoms / cm 3 .
  • Alloy portions 78 and 28 are formed between the electrodes 7 and 8.
  • the alloy portions 78 and 28 are adjacent to each other in the XY plane, and the alloy portion 78 is located closer to the electrode 7 than the alloy portion 28.
  • Alloy portion 78 is an alloy containing the main component (for example, silver) of electrode 7 and the main component (for example, aluminum) of electrode 8, and is in contact with second surface 1 b of semiconductor substrate 1, alloy portion 28 and electrode 7.
  • the alloy portion 28 is an alloy containing the main component (for example, aluminum) of the electrode 8 and the main component (for example, silicon) of the first semiconductor layer 2, and the second surface 1 b of the semiconductor substrate 1, the electrode 8 and the alloy portion 78 It is located in the state of contact.
  • the alloy portions 78 and 28 are formed, for example, when the metal paste is fired to form the electrodes 7 and 8. Since the alloy portions 78 and 28 have conductivity, they function as electrodes.
  • the protective film 10 is located at least on the alloy portions 78 and 28.
  • the protective film 10 covers, for example, the whole of the alloy portions 78 and 28 in plan view.
  • the protective film 10 is a film which is more excellent in environmental resistance than the alloy portions 78 and 28.
  • the excellent environmental resistance may be, for example, low corrosiveness to moisture, alkaline atmosphere or acid atmosphere.
  • the protective film 10 is, for example, an inorganic material. More specifically, the protective film 10 may be formed of the same material as a metal having a higher ionization tendency (hereinafter referred to as a target metal) among the main components of the electrode 7 and the main components of the electrode 8.
  • a target metal a metal having a higher ionization tendency
  • the target metal is aluminum.
  • the protective film 10 may be formed of a metal having a lower ionization tendency than the target metal.
  • the protective film 10 may be formed of a metal having an ionization tendency smaller than that of the target metal.
  • the target metal is aluminum
  • metals such as chromium, iron, cobalt, nickel, lead, copper, silver, palladium, iridium, platinum or gold can be employed as the metal having a lower ionization tendency than this. These metals are less likely to be ions, so they are less likely to be corroded, and the lower alloy portions 78 and 28 can be protected from, for example, moisture and the like. Therefore, the reliability of the solar cell element 100 can be improved.
  • the protective film 10 for example, a nitride film such as silicon nitride or an oxide film such as silicon oxide may be employed. Since these protective films 10 are also low in corrosiveness, the lower alloy portions 78 and 28 can be protected from, for example, moisture and the like.
  • the protective film 10 is less likely to deteriorate as compared to the case where the protective film 10 is made of an organic material.
  • the protective film 10 described above can be formed, for example, using a vapor deposition method such as sputtering, vapor deposition or chemical vapor deposition (CVD) or ALD.
  • a vapor deposition method such as sputtering, vapor deposition or chemical vapor deposition (CVD) or ALD.
  • FIG. 5 to 11 are views for explaining the method of manufacturing the solar cell element 100.
  • FIG. 5 a semiconductor substrate 1 'is prepared.
  • the semiconductor substrate 1 ′ has a plate-like shape, and is, for example, single crystal or polycrystalline silicon.
  • the semiconductor substrate 1 ' is formed by, for example, a CZ (Czochralski) method or a casting method.
  • CZ Czochralski
  • a texture for reducing light reflection may be formed on the + Z side surface 1 a ′ of one side of the semiconductor substrate 1 ′.
  • a wet etching method using an alkaline solution such as NaOH or an acid solution such as fluoronitric acid, or a dry etching method using RIE (Reactive Ion Etching) can be used.
  • the n-type second semiconductor layer 3 is formed in the region on the surface 1 a ′ side of the semiconductor substrate 1.
  • the second semiconductor layer 3 uses a coating thermal diffusion method in which paste-like phosphorus pentoxide is coated on the surface 1a ′ of the semiconductor substrate 1 ′ and thermally diffused, or a gaseous phosphorus oxychloride is used as a diffusion source It may be formed by a vapor phase thermal diffusion method or the like.
  • the semiconductor layer is removed by etching.
  • the semiconductor layer may be removed by etching.
  • the semiconductor substrate 1 can be manufactured by forming the n-type second semiconductor layer 3 on the surface 1 a ′ of the p-type semiconductor substrate 1 ′. That is, by forming the second semiconductor layer 3 in the semiconductor substrate 1 ′, the semiconductor substrate 1 ′ becomes the semiconductor substrate 1.
  • the antireflective layer 5 and the passivation layer 9 are formed on the first surface 1 a and the second surface 1 b of the semiconductor substrate 1, respectively.
  • the antireflective layer 5 is a film made of, for example, silicon nitride, and can be formed using, for example, a PECVD method or a sputtering method.
  • the passivation layer 9 is formed by, for example, a method such as an ALD method or a PECVD method. If the ALD method is used, the passivation layer 9 can be formed on the second surface 1 b of the semiconductor substrate 1 with excellent coverage. According to this, the passivation effect of the passivation layer 9 can be improved.
  • the through holes 22 are formed in the passivation layer 9.
  • the through holes 22 may be formed, for example, by laser beam irradiation, or may be formed by etching or the like.
  • the through holes 22 are formed, for example, in a circular or linear shape in plan view.
  • the diameter thereof is, for example, about 30 to 150 ⁇ m, and about 100 to 500 through holes 22 are formed so as to be substantially uniformly distributed per 1 cm 2. It can be done.
  • an electrode forming step is performed.
  • the first paste 17 is applied to the first surface 1 a side of the semiconductor substrate 1 in order to form the surface electrode 6.
  • the first paste 17 contains, for example, at least one of silver and copper as a main component of the conductive component.
  • metal powder such as silver (for example, particle diameter about 0.05 to 20 ⁇ m, or about 0.1 to 5 ⁇ m) in the conductive paste is 70 to 85 [the total mass of the conductive paste] % By mass].
  • the conductive paste one obtained by kneading a glass frit and an organic vehicle is used.
  • the organic vehicle is obtained, for example, by adding a resin component used as a binder to an organic solvent.
  • a resin component used as a binder in addition to a cellulose-based resin such as ethyl cellulose, for example, an acrylic resin or an alkyd resin may be used.
  • an acrylic resin or an alkyd resin may be used.
  • the organic solvent for example, diethylene glycol monobutyl ether acetate, terpineol or diethylene glycol monobutyl ether can be used.
  • the content weight of the organic vehicle is, for example, about 5 to 20 [mass%] of the total mass of the conductive paste.
  • the glass material of the glass frit for example, lead-based glass such as SiO 2 -Bi 2 O 3 -PbO system, Al 2 O 3 -SiO 2 -PbO system can be used. Further, as another glass material, lead-free glass such as B 2 O 3 —SiO 2 —Bi 2 O 3 type or B 2 O 3 —SiO 2 —ZnO type may be used.
  • the content mass of the glass frit is, for example, about 2 to 15 [mass%] of the total mass of the conductive paste.
  • the first paste 17 is applied to the first surface 1 a of the semiconductor substrate 1 by screen printing, for example. After this application, the solvent may be evaporated and dried at a predetermined temperature.
  • the second paste 18 is applied to the second surface 1 b side of the semiconductor substrate 1.
  • the second paste 18 is, for example, a conductive paste containing a metal powder composed of silver as a main component, an organic vehicle, a glass frit and the like.
  • the components of the second paste 18 may be the same as the first paste 17.
  • the second paste 18 is applied by screen printing, for example. After this application, the solvent may be evaporated and dried at a predetermined temperature.
  • the third paste 19 is applied to the second surface 1 b side of the semiconductor substrate 1 in order to form the electrode 8.
  • the third paste 19 contains, for example, aluminum as a main component.
  • an aluminum powder for example, a particle size of about 0.05 to 20 [ ⁇ m], or about 0.1 to 5 [ ⁇ m]
  • a mixture of a glass frit and an organic vehicle are used. Examples of the glass frit and the organic vehicle are the same as in the first paste 17.
  • the third paste 19 overlaps the outer peripheral portion of the second paste 18 and covers substantially the entire surface of the passivation layer 9 except the outer peripheral portion of, for example, about 0.3 to 2 mm from the end of the semiconductor substrate 1 As applied.
  • a method such as screen printing can be used.
  • the solvent may be evaporated to dryness at a predetermined temperature.
  • the semiconductor substrate 1 to which the first paste 17, the second paste 18, and the third paste 19 have been applied is placed in a baking furnace and baking is performed.
  • the baking is performed at a maximum temperature of about 700 to 900 ° C. for about 0.1 to several tens of seconds.
  • each conductive paste is sintered, and as shown in FIG. 11, the surface electrode 6 and the electrodes 7 and 8 are formed, and the alloy portions 78 and 28 are formed between the electrodes 7 and 8 .
  • the protective film 10 is formed on the alloy portions 78 and 28.
  • the protective film 10 can be formed, for example, using vapor deposition such as sputtering, evaporation, CVD or ALD. Then, the formed film is appropriately patterned into a desired shape by etching or the like to form the protective film 10.
  • the solar cell element 100 can be manufactured by the above steps. In the solar cell element 100, since the protective film 10 can protect the alloy portions 78 and 28, the reliability of the solar cell element 100 can be improved.
  • FIG. 12 is a cross sectional view schematically showing another example of the configuration of the solar cell element 100.
  • the solar cell element 100 illustrated in FIG. 12 differs from the solar cell element 100 in FIG. 4 in terms of the formation region of the protective film 10.
  • the protective film 10 is formed not only on the alloy portions 78 and 28 but also on the electrode 8.
  • the protective film 10 may be positioned so as to cover the electrode 8 in a plan view.
  • the protective film 10 for example, a metal whose ionization tendency is lower than that of the main component of the electrode 8, or a nitride film or an oxide film may be employed. Thereby, the electrode 8 can be protected from, for example, moisture and the like. Therefore, the reliability of the solar cell element 100 can be further improved.
  • the protective film 10 may also be formed on the electrode 7.
  • a metal that can be soldered and has a lower ionization tendency than the main component of the electrode 8 may be employed.

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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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  • Photovoltaic Devices (AREA)

Abstract

La présente invention concerne un élément de cellule solaire qui est pourvu d'un semi-conducteur stratifié, d'une première électrode, d'une seconde électrode, d'une partie d'alliage et d'un film protecteur. Le semi-conducteur stratifié a une première surface et une seconde surface disposée sur le côté opposé à la première surface, des couches de semi-conducteur de types de conductivité mutuellement opposés étant stratifiées l'une sur l'autre entre la première surface et la seconde surface. La seconde électrode est située sur le second côté de surface du semi-conducteur stratifié. La seconde électrode est disposée sur le second côté de surface dans un état connecté au semi-conducteur stratifié et à la première électrode, et comprend un composant principal différent de celui de la première électrode. La partie d'alliage est située entre la première électrode et la seconde électrode, et contient les composants principaux respectifs des première et seconde électrodes. Le film protecteur est disposé sur la partie supérieure de la partie d'alliage
PCT/JP2018/040800 2017-11-30 2018-11-02 Élément de cellule solaire WO2019107069A1 (fr)

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JP2017-230782 2017-11-30
JP2017230782 2017-11-30

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WO2019107069A1 true WO2019107069A1 (fr) 2019-06-06

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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62281396A (ja) * 1986-05-30 1987-12-07 古河電気工業株式会社 導電ペ−スト回路のメタライズ法
JPH06509910A (ja) * 1992-05-27 1994-11-02 モービル・ソラー・エナージー・コーポレーション 厚いアルミニウム電極を有する太陽電池
JP2002117723A (ja) * 2000-10-06 2002-04-19 Hitachi Cable Ltd 高耐食性電線
JP2003273379A (ja) * 2002-03-15 2003-09-26 Kyocera Corp 太陽電池素子
WO2005075369A1 (fr) * 2004-02-09 2005-08-18 Nippon Sheet Glass Co., Ltd. Article de verre et procede de formation d’un affichage a la surface d’un article de verre
JP2008192921A (ja) * 2007-02-06 2008-08-21 Murata Mfg Co Ltd 厚膜導体組成物および太陽電池セルの裏面Ａｇ電極
JP2013179370A (ja) * 2013-06-19 2013-09-09 Mitsubishi Electric Corp 光起電力装置の製造方法
US20130255765A1 (en) * 2012-03-30 2013-10-03 Applied Materials, Inc. Doped ai paste for local alloyed junction formation with low contact resistance
JP2013254993A (ja) * 2013-09-09 2013-12-19 Affinity Co Ltd 太陽電池モジュール

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62281396A (ja) * 1986-05-30 1987-12-07 古河電気工業株式会社 導電ペ−スト回路のメタライズ法
JPH06509910A (ja) * 1992-05-27 1994-11-02 モービル・ソラー・エナージー・コーポレーション 厚いアルミニウム電極を有する太陽電池
JP2002117723A (ja) * 2000-10-06 2002-04-19 Hitachi Cable Ltd 高耐食性電線
JP2003273379A (ja) * 2002-03-15 2003-09-26 Kyocera Corp 太陽電池素子
WO2005075369A1 (fr) * 2004-02-09 2005-08-18 Nippon Sheet Glass Co., Ltd. Article de verre et procede de formation d’un affichage a la surface d’un article de verre
JP2008192921A (ja) * 2007-02-06 2008-08-21 Murata Mfg Co Ltd 厚膜導体組成物および太陽電池セルの裏面Ａｇ電極
US20130255765A1 (en) * 2012-03-30 2013-10-03 Applied Materials, Inc. Doped ai paste for local alloyed junction formation with low contact resistance
JP2013179370A (ja) * 2013-06-19 2013-09-09 Mitsubishi Electric Corp 光起電力装置の製造方法
JP2013254993A (ja) * 2013-09-09 2013-12-19 Affinity Co Ltd 太陽電池モジュール

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