WO2019015055A1 - Amoled 器件的阵列基板的制作方法 - Google Patents

Amoled 器件的阵列基板的制作方法 Download PDF

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WO2019015055A1
WO2019015055A1 PCT/CN2017/101164 CN2017101164W WO2019015055A1 WO 2019015055 A1 WO2019015055 A1 WO 2019015055A1 CN 2017101164 W CN2017101164 W CN 2017101164W WO 2019015055 A1 WO2019015055 A1 WO 2019015055A1
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substrate
layer
contact via
fabricating
depositing
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姜春生
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6731—Top-gate only TFTs
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6746—Amorphous silicon
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present invention relates to the field of AMOLED technology, and in particular, to a method for fabricating an array substrate of an AMOLED device.
  • AMOLED is an active matrix organic light emitting diode (Active Matrix Organic) Light-Emitting Diode). Because of its thin, power-saving, solid-state display, high frequency, active illumination, high contrast, AMOLED display has many unparalleled advantages.
  • the AMOLED display is an active light-emitting display device, which is quite different from the display principle of the liquid crystal display.
  • AMOLED display has no viewing angle problem compared with liquid crystal display, light weight, small thickness, high brightness, high luminous efficiency, rich luminescent materials, easy color display, fast response, dynamic picture High quality, wide temperature range and soft display.
  • the fabrication process of the existing AMOLED device the fabrication of the thin film transistor needs to be completed by multiple photolithography operations, so the existing AMOLED device is complicated in fabrication process and high in fabrication cost.
  • the object of the present invention is to provide a method for fabricating an array substrate of an AMOLED device with a simple process flow and a low manufacturing cost.
  • the manufacturing process of the array substrate for the existing AMOLED device is complicated and the production cost is high. Technical problem.
  • Embodiments of the present invention provide a method for fabricating an array substrate of an AMOLED device, including:
  • the electron injection layer and the electron transport layer cover the entire substrate to form a protective material of the substrate.
  • the buffer layer is a silicon oxide film.
  • the gate metal layer is made of at least one of tantalum, aluminum, chromium, and copper.
  • the electrode metal layer is a transparent metal layer.
  • the interlayer dielectric layer is a silicon oxide layer or a silicon nitride layer.
  • the substrate is made of at least one of glass, plastic, quartz, and silicon crystal.
  • the step of performing an ion implantation operation on the amorphous silicon layer of the source and drain positions of the thin film transistor is specifically:
  • An ion implantation operation is performed on the amorphous silicon layer of the source and drain positions of the thin film transistor by semiconductor ion implantation.
  • the electrode metal layer is performed based on the source contact via, the drain contact via, and the gate contact via.
  • the step of patterning to form the data lines, the scan lines, and the pixel electrodes on the substrate is specifically as follows:
  • the data line is formed through the source contact via, the pixel electrode is formed through the drain contact via, and the scan line is formed through the gate contact via.
  • the embodiment of the invention further provides a method for fabricating an array substrate of an AMOLED device, which comprises:
  • An electron injection layer and an electron transport layer are sequentially deposited on the substrate, wherein the electron injection layer is in contact with the pixel electrode.
  • the electron injection layer and the electron transport layer cover the entire substrate to form a protective material of the substrate.
  • the method before the depositing the amorphous silicon layer on the substrate, the method further includes the step of depositing a buffer layer on the substrate.
  • the buffer layer is a silicon oxide film.
  • the gate metal layer is made of at least one of tantalum, aluminum, chromium, and copper.
  • the electrode metal layer is a transparent metal layer.
  • the interlayer dielectric layer is a silicon oxide layer or a silicon nitride layer.
  • the substrate is made of at least one of glass, plastic, quartz, and silicon crystal.
  • the step of performing an ion implantation operation on the amorphous silicon layer of the source and drain positions of the thin film transistor is specifically:
  • An ion implantation operation is performed on the amorphous silicon layer of the source and drain positions of the thin film transistor by semiconductor ion implantation.
  • the electrode metal layer is performed based on the source contact via, the drain contact via, and the gate contact via.
  • the step of patterning to form the data lines, the scan lines, and the pixel electrodes on the substrate is specifically as follows:
  • the data line is formed through the source contact via, the pixel electrode is formed through the drain contact via, and the scan line is formed through the gate contact via.
  • the method for fabricating the array substrate of the AMOLED device of the present invention forms the source and the drain of the thin film transistor by ion implantation, thereby effectively reducing the number of lithography operations for fabricating the thin film transistor, thereby simplifying the fabrication process of the AMOLED device.
  • the process reduces the manufacturing cost of the AMOLED device, and solves the technical problem that the manufacturing process of the array substrate of the existing AMOLED device is complicated and the manufacturing cost is high.
  • FIG. 1 is a flow chart of a preferred embodiment of a method of fabricating an array substrate of an AMOLED device of the present invention
  • 2A-2H are schematic diagrams showing a manufacturing process of a preferred embodiment of a method for fabricating an array substrate of an AMOLED device of the present invention.
  • FIG. 1 is a flow chart of a preferred embodiment of a method of fabricating an array substrate of an AMOLED device of the present invention.
  • the method for fabricating the array substrate of the AMOLED device of the preferred embodiment includes:
  • Step S101 providing a substrate, and depositing a buffer layer and an amorphous silicon layer on the substrate;
  • Step S102 performing a patterning process on the amorphous silicon layer to form a thin film transistor region of the AMOLED device
  • Step S103 depositing a photoresist on the substrate, and performing image processing on the photoresist based on a source position and a drain position of the thin film transistor of the AMOLED device;
  • Step S104 performing an ion implantation operation on the amorphous silicon layer of the source and drain positions of the thin film transistor by semiconductor ion implantation to form a source and a drain of the thin film transistor;
  • Step S105 depositing a gate insulating layer and a gate metal layer on the substrate, and performing image processing on the gate metal layer to form a gate of the thin film transistor;
  • Step S106 depositing an interlayer dielectric layer on the substrate, and patterning the interlayer dielectric layer to form a source contact via, a drain contact via, and a gate contact via of the thin film transistor;
  • Step S107 depositing an electrode metal layer on the substrate, and patterning the electrode metal layer based on the source contact via, the drain contact via, and the gate contact via to form a data line and a scan line on the substrate. And a pixel electrode;
  • Step S108 depositing an inorganic protective layer on the substrate, and patterning the inorganic protective layer to expose the pixel electrode;
  • step S109 an electron injection layer and an electron transport layer are sequentially deposited on the substrate, wherein the electron injection layer is in contact with the pixel electrode.
  • step S101 a substrate 11 is provided, and a buffer layer 12 and an amorphous silicon layer 13 are deposited on the substrate 11; wherein the substrate 11 is made of at least one of glass, plastic, quartz, and silicon crystal, and the buffer layer 12 It is a silicon oxide film. Then it proceeds to step S102.
  • step S102 the amorphous silicon layer 13 deposited in step S101 is patterned using a photomask to form a thin film transistor region of the AMOLED device, that is, the amorphous silicon layer 13 is left in the thin film transistor region of the AMOLED device. As shown in Figure 2A. Then it proceeds to step S103.
  • step S103 a photoresist is deposited on the substrate 11, and the photoresist is imaged using a photomask based on the source and drain positions of the thin film transistor of the AMOLED device. That is, the photoresist between the source and drain positions is preserved, as shown in FIG. 2B. Then it proceeds to step S104.
  • step S104 an ion implantation operation is performed on the amorphous silicon layer of the source and drain positions of the thin film transistor by semiconductor ion implantation. Since a barrier photoresist is disposed between the source and drain positions, the amorphous silicon layer 13 of the source and drain positions can be accurately ion-implanted, thereby forming the source 131 of the thin film transistor and Drain 132. The photoresist is then removed, as shown in Figure 2C. Then it proceeds to step S105.
  • step S105 a gate insulating layer 14 and a gate metal layer are deposited on the substrate 11, and then the photomask is used and the gate metal layer is imaged to form the gate electrode 15 of the thin film transistor; as shown in FIG. 2D. Show.
  • the gate metal layer is made of at least one of tantalum, aluminum, chromium, and copper. Then it proceeds to step S106.
  • step S106 an interlayer dielectric layer 16 is deposited on the substrate, and the interlayer dielectric layer 16 is patterned using a photomask to form a source contact via 161, a drain contact via 162, and a gate of the thin film transistor.
  • the pole contacts the through hole 163, as shown in FIG. 2E.
  • the interlayer dielectric layer 16 is a silicon oxide layer or a silicon nitride layer. Then it proceeds to step S107.
  • an electrode metal layer 17 is deposited on the substrate 11, which is preferably a transparent metal layer. Then, based on the source contact via 161, the drain contact via 162, and the gate contact via 163, the electrode metal layer 17 is patterned using a photomask to form the data line 171, the scan line 172, and the pixel on the substrate. Electrode 173. Specifically, the data line 171 is formed through the source contact via 161, the pixel electrode 173 is formed through the drain contact via 162, and the scan line 172 is formed through the gate contact via 163. Specifically, as shown in FIG. 2F. Then it proceeds to step S108.
  • step S108 an inorganic protective layer 18 is deposited on the substrate 11, and the inorganic protective layer 18 is patterned using a photomask to expose the pixel electrode 173; as shown in FIG. 2G. Then it proceeds to step S109.
  • step S109 an electron injection layer 19 and an electron transport layer 1A are sequentially deposited on the substrate 11, wherein the electron injection layer 19 is in contact with the pixel electrode 173. Both the electron injection layer 19 and the electron transport layer 1A cover the entire substrate 11, as shown in Fig. 2H.
  • the electron injecting layer 19 and the electron transporting layer 1A can serve as a protective material for the substrate 11, and it is not necessary to additionally provide another protective layer.
  • the method for fabricating the array substrate of the AMOLED device of the present invention forms the source and the drain of the thin film transistor by ion implantation, thereby effectively reducing the number of lithography operations for fabricating the thin film transistor, thereby simplifying the fabrication process of the AMOLED device.
  • the process reduces the manufacturing cost of the AMOLED device, and solves the technical problem that the manufacturing process of the array substrate of the existing AMOLED device is complicated and the manufacturing cost is high.

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Abstract

一种AMOLED器件的阵列基板的制作方法，其包括：提供一基板（11），并在基板上沉积非晶硅层（13）；对非晶硅层进行图形化处理；在基板上沉积光阻，并对光阻进行图像化处理；对薄膜晶体管进行离子注入操作；在基板上沉积栅极绝缘层（14）以及栅极金属层；在基板上沉积层间介质层（16）；在基板上沉积电极金属层（17）；在基板上沉积无机保护层（18）；以及在基板上依次沉积电子注入层（19）以及电子传输层（1A）。

Description

AMOLED 器件的阵列基板的制作方法 技术领域
本发明涉及AMOLED技术领域，特别是涉及一种AMOLED器件的阵列基板的制作方法。
 背景技术
AMOLED即有源矩阵有机发光二极管(Active matrix Organic Light-Emitting Diode)。因为其具备轻薄、省电、固态显示、高频、主动发光、对比度高等特性，使得AMOLED显示屏具备了许多液晶显示屏无可比拟的优势。
AMOLED显示屏为主动发光显示器件，其与液晶显示屏的显示原理有很大区别。除了具备上述特点之外，AMOLED显示屏与液晶显示屏相比还具有无视角问题、重量轻、厚度小、高亮度、高发光效率、发光材料丰富、易实现彩色显示、响应速度快、动态画面质量高、使用温度范围广以及可实现柔软显示等优势。
但是现有的AMOLED器件的制作流程中薄膜晶体管的制作需要通过多次光刻操作才能完成，因此现有的AMOLED器件的制作工艺较为复杂且制作成本较高。
故，有必要提供一种AMOLED器件的阵列基板的制作方法，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种工艺流程较为简单且制作成本较低的AMOLED器件的阵列基板的制作方法；以解决现有的AMOLED器件的阵列基板的制作方法的制作流程较为复杂且制作成本较高的技术问题。
 技术解决方案
本发明实施例提供一种AMOLED器件的阵列基板的制作方法，其包括：
提供一基板，在所述基板上沉积缓冲层，随后在所述基板上沉积非晶硅层；
对所述非晶硅层进行图形化处理，以形成AMOLED器件的薄膜晶体管区域；
在所述基板上沉积光阻，并基于所述AMOLED器件的薄膜晶体管的源极位置以及漏极位置，对所述光阻进行图像化处理；
对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作，以形成所述薄膜晶体管的源极以及漏极；
在所述基板上沉积栅极绝缘层以及栅极金属层，并对所述栅极金属层进行图像化处理，以形成所述薄膜晶体管的栅极；
在所述基板上沉积层间介质层，并对所述层间介质层进行图形化处理，以形成所述薄膜晶体管的源极接触通孔、漏极接触通孔以及栅极接触通孔；
在所述基板上沉积电极金属层，并基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极；
在所述基板上沉积无机保护层，并对所述无机保护层进行图形化处理，以露出所述像素电极；以及
在所述基板上依次沉积电子注入层以及电子传输层，其中所述电子注入层与所述像素电极接触；
其中所述电子注入层和所述电子传输层覆盖整个所述基板，以形成所述基板的保护材料。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述缓冲层为氧化硅薄膜。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述栅极金属层由钕、铝、铬以及铜中至少一种金属制成。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述电极金属层为透明金属层。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述层间介质层为氧化硅层或氮化硅层。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述基板由玻璃、塑胶、石英以及硅晶中至少一种材料制成。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作的步骤具体为：
通过半导体离子注入，对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极的步骤具体为：
通过所述源极接触通孔制作所述数据线，通过所述漏极接触通孔制作所述像素电极以及通过所述栅极接触通孔制作所述扫描线。
本发明实施例还提供一种AMOLED器件的阵列基板的制作方法，其包括：
提供一基板，并在所述基板上沉积非晶硅层；
对所述非晶硅层进行图形化处理，以形成AMOLED器件的薄膜晶体管区域；
在所述基板上沉积光阻，并基于所述AMOLED器件的薄膜晶体管的源极位置以及漏极位置，对所述光阻进行图像化处理；
对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作，以形成所述薄膜晶体管的源极以及漏极；
在所述基板上沉积栅极绝缘层以及栅极金属层，并对所述栅极金属层进行图像化处理，以形成所述薄膜晶体管的栅极；
在所述基板上沉积层间介质层，并对所述层间介质层进行图形化处理，以形成所述薄膜晶体管的源极接触通孔、漏极接触通孔以及栅极接触通孔；
在所述基板上沉积电极金属层，并基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极；
在所述基板上沉积无机保护层，并对所述无机保护层进行图形化处理，以露出所述像素电极；以及
在所述基板上依次沉积电子注入层以及电子传输层，其中所述电子注入层与所述像素电极接触。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述电子注入层和所述电子传输层覆盖整个所述基板，以形成所述基板的保护材料。
在本发明所述的AMOLED器件的阵列基板的制作方法中，在所述基板上沉积非晶硅层之前还包括步骤：在所述基板上沉积缓冲层。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述缓冲层为氧化硅薄膜。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述栅极金属层由钕、铝、铬以及铜中至少一种金属制成。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述电极金属层为透明金属层。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述层间介质层为氧化硅层或氮化硅层。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述基板由玻璃、塑胶、石英以及硅晶中至少一种材料制成。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作的步骤具体为：
通过半导体离子注入，对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作。
在本发明所述的AMOLED器件的阵列基板的制作方法中，所述基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极的步骤具体为：
通过所述源极接触通孔制作所述数据线，通过所述漏极接触通孔制作所述像素电极以及通过所述栅极接触通孔制作所述扫描线。
 有益效果
本发明的AMOLED器件的阵列基板的制作方法通过离子注入的方式形成薄膜晶体管的源极以及漏极，从而可以有效的减少制作薄膜晶体管的光刻操作数量，从而简化了AMOLED器件的制作工艺的制作流程，降低了了AMOLED器件的制作成本；解决了现有的AMOLED器件的阵列基板的制作方法的制作流程较为复杂且制作成本较高的技术问题。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。其中：
图1为本发明的AMOLED器件的阵列基板的制作方法的优选实施例的流程图；
图2A-图2H为本发明AMOLED器件的阵列基板的制作方法的优选实施例的制作流程示意图。
 本发明的最佳实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参照图 1，图1为本发明的AMOLED器件的阵列基板的制作方法的优选实施例的流程图。本优选实施例的AMOLED器件的阵列基板的制作方法包括：
步骤S101，提供一基板，并在基板上沉积缓冲层和非晶硅层；
步骤S102，对非晶硅层进行图形化处理，以形成AMOLED器件的薄膜晶体管区域；
步骤S103，在基板上沉积光阻，并基于AMOLED器件的薄膜晶体管的源极位置以及漏极位置，对光阻进行图像化处理；
步骤S104，通过半导体离子注入，对薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作，以形成薄膜晶体管的源极以及漏极；
步骤S105，在基板上沉积栅极绝缘层以及栅极金属层，并对栅极金属层进行图像化处理，以形成薄膜晶体管的栅极；
步骤S106，在基板上沉积层间介质层，并对层间介质层进行图形化处理，以形成薄膜晶体管的源极接触通孔、漏极接触通孔以及栅极接触通孔；
步骤S107，在基板上沉积电极金属层，并基于源极接触通孔、漏极接触通孔以及栅极接触通孔，对电极金属层进行图形化处理，以在基板上制作数据线、扫描线以及像素电极；
步骤S108，在基板上沉积无机保护层，并对无机保护层进行图形化处理，以露出像素电极；
步骤S109，在基板上依次沉积电子注入层以及电子传输层，其中电子注入层与所述像素电极接触。
下面详细说明本优选实施例的AMOLED器件的阵列基板的制作方法的各步骤的具体流程。
在步骤S101中，提供一基板11，并在该基板11上沉积缓冲层12和非晶硅层13；其中基板11由玻璃、塑胶、石英以及硅晶中至少一种材料制成，缓冲层12为氧化硅薄膜。随后转到步骤S102。
在步骤S102中，使用光罩，对步骤S101沉积的非晶硅层13进行图形化处理，以形成AMOLED器件的薄膜晶体管区域，即在AMOLED器件的薄膜晶体管区域保留上述非晶硅层13。如图2A所示。随后转到步骤S103。
在步骤S103中，在基板11上沉积光阻，并基于AMOLED器件的薄膜晶体管的源极位置以及漏极位置，使用光罩，对光阻进行图像化处理。即保留源极位置和漏极位置之间的光阻，具体如图2B所示。随后转到步骤S104。
在步骤S104中，通过半导体离子注入，对薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作。由于源极位置和漏极位置之间设置有阻挡的光阻，因此可分别准确的对源极位置以及漏极位置的非晶硅层13进行离子注入操作，从而形成薄膜晶体管的源极131以及漏极132。随后将光阻去除，具体如图2C所示。随后转到步骤S105。
在步骤S105中，在基板11上沉积栅极绝缘层14以及栅极金属层，随后使用光罩并对栅极金属层进行图像化处理，以形成薄膜晶体管的栅极15；具体如图2D所示。其中栅极金属层由钕、铝、铬以及铜中至少一种金属制成。随后转到步骤S106。
在步骤S106中，在基板上沉积层间介质层16，并使用光罩对层间介质层16进行图形化处理，以形成薄膜晶体管的源极接触通孔161、漏极接触通孔162以及栅极接触通孔163，具体如图2E所示。其中层间介质层16为氧化硅层或氮化硅层。随后转到步骤S107。
在步骤S107中，在基板11上沉积电极金属层17，该电极金属层17优选为透明金属层。随后基于源极接触通孔161、漏极接触通孔162以及栅极接触通孔163，使用光罩对电极金属层17进行图形化处理，以在基板上制作数据线171、扫描线172以及像素电极173。具体的，通过源极接触通孔161制作数据线171，通过漏极接触通孔162制作像素电极173以及通过栅极接触通孔163制作扫描线172。具体如图2F所示。随后转到步骤S108。
在步骤S108中，在基板11上沉积无机保护层18，并使用光罩对无机保护层18进行图形化处理，以露出像素电极173；具体如图2G所示。随后转到步骤S109。
在步骤S109中，在基板11上依次沉积电子注入层19以及电子传输层1A，其中电子注入层19与像素电极173接触。电子注入层19和电子传输层1A均覆盖整个基板11，具体如图2H所示。这样电子注入层19和电子传输层1A可作为基板11的保护材料，不需要另外设置其他的保护层。
这样即完成了本优选实施例的MOLED器件的阵列基板的制作方法的阵列基板的制作流程。
本发明的AMOLED器件的阵列基板的制作方法通过离子注入的方式形成薄膜晶体管的源极以及漏极，从而可以有效的减少制作薄膜晶体管的光刻操作数量，从而简化了AMOLED器件的制作工艺的制作流程，降低了了AMOLED器件的制作成本；解决了现有的AMOLED器件的阵列基板的制作方法的制作流程较为复杂且制作成本较高的技术问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种AMOLED器件的阵列基板的制作方法，其包括：
    提供一基板，在所述基板上沉积缓冲层，随后在所述基板上沉积非晶硅层；
    对所述非晶硅层进行图形化处理，以形成AMOLED器件的薄膜晶体管区域；
    在所述基板上沉积光阻，并基于所述AMOLED器件的薄膜晶体管的源极位置以及漏极位置，对所述光阻进行图像化处理；
    对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作，以形成所述薄膜晶体管的源极以及漏极；
    在所述基板上沉积栅极绝缘层以及栅极金属层，并对所述栅极金属层进行图像化处理，以形成所述薄膜晶体管的栅极；
    在所述基板上沉积层间介质层，并对所述层间介质层进行图形化处理，以形成所述薄膜晶体管的源极接触通孔、漏极接触通孔以及栅极接触通孔；
    在所述基板上沉积电极金属层，并基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极；
    在所述基板上沉积无机保护层，并对所述无机保护层进行图形化处理，以露出所述像素电极；以及
    在所述基板上依次沉积电子注入层以及电子传输层，其中所述电子注入层与所述像素电极接触；
    其中所述电子注入层和所述电子传输层覆盖整个所述基板，以形成所述基板的保护材料。
  2. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述缓冲层为氧化硅薄膜。
  3. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述栅极金属层由钕、铝、铬以及铜中至少一种金属制成。
  4. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述电极金属层为透明金属层。
  5. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述层间介质层为氧化硅层或氮化硅层。
  6. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述基板由玻璃、塑胶、石英以及硅晶中至少一种材料制成。
  7. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作的步骤具体为：
    通过半导体离子注入，对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作。
  8. 根据权利要求1所述的AMOLED器件的阵列基板的制作方法，其中所述基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极的步骤具体为：
    通过所述源极接触通孔制作所述数据线，通过所述漏极接触通孔制作所述像素电极以及通过所述栅极接触通孔制作所述扫描线。
  9. 一种AMOLED器件的阵列基板的制作方法，其包括：
    提供一基板，并在所述基板上沉积非晶硅层；
    对所述非晶硅层进行图形化处理，以形成AMOLED器件的薄膜晶体管区域；
    在所述基板上沉积光阻，并基于所述AMOLED器件的薄膜晶体管的源极位置以及漏极位置，对所述光阻进行图像化处理；
    对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作，以形成所述薄膜晶体管的源极以及漏极；
    在所述基板上沉积栅极绝缘层以及栅极金属层，并对所述栅极金属层进行图像化处理，以形成所述薄膜晶体管的栅极；
    在所述基板上沉积层间介质层，并对所述层间介质层进行图形化处理，以形成所述薄膜晶体管的源极接触通孔、漏极接触通孔以及栅极接触通孔；
    在所述基板上沉积电极金属层，并基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极；
    在所述基板上沉积无机保护层，并对所述无机保护层进行图形化处理，以露出所述像素电极；以及
    在所述基板上依次沉积电子注入层以及电子传输层，其中所述电子注入层与所述像素电极接触。
  10. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述电子注入层和所述电子传输层覆盖整个所述基板，以形成所述基板的保护材料。
  11. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中在所述基板上沉积非晶硅层之前还包括步骤：
    在所述基板上沉积缓冲层。
  12. 根据权利要求11所述的AMOLED器件的阵列基板的制作方法，其中所述缓冲层为氧化硅薄膜。
  13. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述栅极金属层由钕、铝、铬以及铜中至少一种金属制成。
  14. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述电极金属层为透明金属层。
  15. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述层间介质层为氧化硅层或氮化硅层。
  16. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述基板由玻璃、塑胶、石英以及硅晶中至少一种材料制成。
  17. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作的步骤具体为：
    通过半导体离子注入，对所述薄膜晶体管的源极位置以及漏极位置的非晶硅层进行离子注入操作。
  18. 根据权利要求9所述的AMOLED器件的阵列基板的制作方法，其中所述基于所述源极接触通孔、所述漏极接触通孔以及所述栅极接触通孔，对所述电极金属层进行图形化处理，以在所述基板上制作数据线、扫描线以及像素电极的步骤具体为：
    通过所述源极接触通孔制作所述数据线，通过所述漏极接触通孔制作所述像素电极以及通过所述栅极接触通孔制作所述扫描线。
PCT/CN2017/101164 2017-07-18 2017-09-11 Amoled 器件的阵列基板的制作方法 Ceased WO2019015055A1 (zh)

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