WO2018209757A1 - 一种柔性薄膜晶体管及其制备方法 - Google Patents

一种柔性薄膜晶体管及其制备方法 Download PDF

Info

Publication number
WO2018209757A1
WO2018209757A1 PCT/CN2017/089615 CN2017089615W WO2018209757A1 WO 2018209757 A1 WO2018209757 A1 WO 2018209757A1 CN 2017089615 W CN2017089615 W CN 2017089615W WO 2018209757 A1 WO2018209757 A1 WO 2018209757A1
Authority
WO
WIPO (PCT)
Prior art keywords
film transistor
thin film
insulating layer
inorganic insulating
flexible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/089615
Other languages
English (en)
French (fr)
Inventor
刘翔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to US15/575,204 priority Critical patent/US10651312B2/en
Publication of WO2018209757A1 publication Critical patent/WO2018209757A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a flexible thin film transistor and a method of fabricating the same.
  • the flexible substrates are generally polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyether sulfone resin (PES), polyimide (PI) and other materials
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES Polyether sulfone resin
  • PI polyimide
  • thin film transistors are generally deposited by transparent conductive film; due to poor adhesion of transparent conductive film and flexible substrate, it is easy to cause flexibility when bending The substrate is separated from the transparent conductive film, thereby causing various display defects.
  • the water vapor barrier property of the flexible substrate is poor, and the external air and water vapor easily penetrate into the device through the flexible substrate, which directly affects the performance of the device and deteriorates the performance of the device.
  • the invention provides a flexible thin film transistor comprising:
  • An inorganic insulating layer disposed on the flexible substrate
  • the inorganic insulating layer is provided with a rough structure toward a surface of one side of the thin film transistor
  • the inorganic insulating layer has a thickness of between 3,000 angstroms and 8,000 angstroms;
  • the material of the inorganic insulating layer is an oxide, a nitride or an oxynitride.
  • the roughness is discretely distributed on a surface of the inorganic insulating layer facing the side of the thin film transistor.
  • the roughness can be formed by plasma etching the surface of the inorganic insulating layer toward the side of the thin film transistor.
  • the roughness is uneven and in contact with the thin film transistor.
  • the invention also provides a flexible thin film transistor comprising:
  • An inorganic insulating layer disposed on the flexible substrate
  • the inorganic insulating layer is provided with a rough structure toward a surface of one side of the thin film transistor.
  • the inorganic insulating layer has a thickness of between 3,000 ⁇ and 8,000 ⁇ .
  • the material of the inorganic insulating layer is an oxide, a nitride or an oxynitride.
  • the roughness is discretely distributed on a surface of the inorganic insulating layer facing the side of the thin film transistor.
  • the roughness can be formed by plasma etching the surface of the inorganic insulating layer toward the side of the thin film transistor.
  • the roughness is uneven and in contact with the thin film transistor.
  • a method of fabricating a flexible thin film transistor comprising:
  • a thin film transistor is formed on the inorganic insulating layer.
  • the roughness is discretely distributed on a surface of the inorganic insulating layer toward a side of the thin film transistor.
  • the roughness may be formed by plasma etching the surface of the inorganic insulating layer toward the side of the thin film transistor.
  • the roughness is uneven and in contact with the thin film transistor.
  • the flexible thin film transistor of the present invention and the method of fabricating the same, by providing an inorganic insulating layer on a flexible substrate, and the inorganic insulating layer is provided with a rough structure toward the surface of the thin film transistor, so that the thin film transistor is not easily separated from the flexible substrate, thereby improving The display level of the device; and can effectively improve the water vapor barrier performance of the device.
  • FIG. 1 is a schematic structural view of a flexible thin film transistor according to a preferred embodiment of the present invention.
  • FIG. 2 is a schematic flow chart of a method of fabricating a flexible thin film transistor according to a preferred embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a flexible thin film transistor according to a preferred embodiment of the present invention.
  • the flexible thin film transistor includes: a flexible substrate 101; an inorganic insulating layer 102 disposed on the flexible substrate 101; and a thin film transistor 103 disposed on the inorganic insulating layer 102; wherein the inorganic insulating layer 102
  • the surface facing the side of the thin film transistor 103 is provided with a roughness 104.
  • the present invention provides an inorganic insulating layer 102 between the flexible substrate 101 and the thin film transistor 103, and a rough structure 104 is provided on the surface of the inorganic insulating layer 102 facing the thin film transistor 103, thereby making the thin film transistor 103 difficult to be bonded to the inorganic
  • the insulating layer 102 is separated, thereby increasing the display level of the device.
  • the thin film transistor 103 in the flexible thin film transistor includes a gate electrode 1011, a gate insulating layer 1032, a conductive channel 1033, and source/drain electrodes 1034 which are sequentially disposed on the inorganic insulating layer 102.
  • the step of forming the gate electrode 1031 is generally: depositing a transparent conductive film on the inorganic insulating layer 102; subsequently, forming a gate electrode 1031 by a patterning process.
  • the inorganic insulating layer 102 under the transparent conductive film also functions to protect the flexible substrate 101, thereby avoiding damage to the flexible substrate 101 due to process errors.
  • the external water vapor is less likely to enter the device through the flexible substrate 101, further improving the performance of the device.
  • the inorganic insulating layer 102 in the preferred embodiment will be further described below.
  • the inorganic insulating layer 102 has a thickness of between 3,000 angstroms and 8,000 angstroms. It should be noted that the thickness of the inorganic insulating layer 102 in the preferred embodiment may be set according to actual conditions, but when the thickness of the inorganic insulating layer 102 is set, it should be considered that after the inorganic insulating layer 102 is formed on the flexible substrate 101, It is necessary to process the surface so that the surface of the inorganic insulating layer 102 forms a roughness 104. That is, the thickness of the inorganic insulating layer 102 is set to ensure that the flexible substrate 101 is not damaged when the process is performed to form the roughness 104.
  • the material of the inorganic insulating layer 102 is an oxide, a nitride or an oxynitride.
  • the inorganic insulating layer 102 has good adhesion to the flexible substrate 101 and does not cause separation due to bending of the device.
  • the flexible substrate 101 in the preferred embodiment is generally polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether sulfone resin (PES), fiber reinforced composite plastic (FRP). And other materials, which have good adhesion to the inorganic insulating layer 102, can make the inorganic insulating layer 102 deposited on the flexible substrate 101 difficult to separate from the flexible substrate 101.
  • the roughness 104 on the inorganic insulating layer 102 in the preferred embodiment will be described in detail below.
  • the roughness 104 on the inorganic insulating layer 102 in the present preferred embodiment is discretely distributed on the surface of the inorganic insulating layer 102 toward the side of the thin film transistor 103.
  • the rough structure 104 is formed by plasma etching the surface of the inorganic insulating layer 102 toward the side of the thin film transistor 103. It should be noted that the roughness of the rough structure 104 on the surface of the inorganic insulating layer 102 facing the thin film transistor 103 can also make the thin film transistor 103 difficult to separate from the inorganic insulating layer 102.
  • the roughness 104 is uneven and in contact with the thin film transistor 103.
  • the flexible thin film transistor of the preferred embodiment is provided with an inorganic insulating layer on the flexible substrate, and the inorganic insulating layer is provided with a rough structure toward the surface of the thin film transistor, so that the thin film transistor is not easily separated from the flexible substrate, thereby improving the device. Display level; and can effectively improve the water vapor barrier performance of the device.
  • FIG. 2 is a schematic flow chart of a method for fabricating a flexible thin film transistor according to a preferred embodiment of the present invention. As shown in FIG. 2, the present invention also provides a method for manufacturing a flexible thin film transistor, comprising the following steps:
  • Step S201 providing a flexible substrate
  • Step S202 forming an inorganic insulating layer on the flexible substrate
  • Step S203 roughening the surface of the inorganic insulating layer to form a rough structure
  • step S204 a thin film transistor is formed on the inorganic insulating layer.
  • the flexible substrate is generally polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether sulfone resin (PES), fiber reinforced composite plastic (FRP). And other materials, which have good adhesion to the inorganic insulating layer, can make the inorganic insulating layer deposited on the flexible substrate difficult to separate from the flexible substrate.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyether sulfone resin
  • FRP fiber reinforced composite plastic
  • the inorganic insulating layer has a thickness of between 3,000 angstroms and 8,000 angstroms. It should be noted that the thickness of the inorganic insulating layer in the preferred embodiment may be set according to actual conditions, but in setting the thickness of the inorganic insulating layer, it should be considered that after the inorganic insulating layer is formed on the flexible substrate, it is also required to be processed by the process. The surface of the inorganic insulating layer is formed into a rough structure. That is to say, the thickness of the inorganic insulating layer is set so as to ensure that the flexible substrate is not damaged when the process is performed to form a rough structure.
  • the material of the inorganic insulating layer is an oxide, a nitride or an oxynitride.
  • the inorganic insulating layer has good adhesion to the flexible substrate and does not cause separation due to bending of the device.
  • the rough surface is formed by plasma etching the surface of the inorganic insulating layer toward the thin film transistor side. It should be noted that in order to further improve the efficiency, the roughness is discretely distributed on the surface of the inorganic insulating layer facing the side of the thin film transistor, and the thin film transistor is also difficult to be separated from the inorganic insulating layer. In particular, the roughness is uneven and in contact with the thin film transistor.
  • a thin film transistor is formed on the inorganic insulating layer. Specifically, a gate electrode, a gate insulating layer, a conductive channel, and source/drain electrodes are sequentially formed on the inorganic insulating layer.
  • the step of forming the gate is generally: depositing a transparent conductive film on the inorganic insulating layer; subsequently, forming a gate by a patterning process.
  • the inorganic insulating layer under the transparent conductive film also functions to protect the flexible substrate, thereby avoiding damage to the flexible substrate due to the existence of process errors.
  • the external water vapor is less likely to enter the device through the flexible substrate, further improving the performance of the device.
  • the flexible thin film transistor of the present invention and the method of fabricating the same, by providing an inorganic insulating layer on a flexible substrate, and the inorganic insulating layer is provided with a rough structure toward the surface of the thin film transistor, so that the thin film transistor is not easily separated from the flexible substrate, thereby improving The display level of the device; and can effectively improve the water vapor barrier performance of the device.

Landscapes

  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

提供一种柔性薄膜晶体管及其制造方法,包括:柔性基底(101);设置在柔性基底(101)上的无机绝缘层(102);以及设置在无机绝缘层(102)上的薄膜晶体管(103);其中,无机绝缘层(102)朝向薄膜晶体管(103)一侧的表面设置有粗糙结构(104)。

Description

一种柔性薄膜晶体管及其制备方法 技术领域
本发明涉及显示技术领域,尤其涉及一种柔性薄膜晶体管及其制备方法。
背景技术
柔性薄膜晶体管因其体积薄、重量轻、功耗低、柔性可弯折和耐冲击性强等优点,在各种大、中、小尺寸的产品上得到广泛应用,几乎涵盖了当今信息社会的主要电子产品,如:手机、车载显示、电子书等,具有非常广阔的应用前景。
然而,现有的制作柔性薄膜晶体管一般在柔性基底上直接形成薄膜晶体管,而柔性基底一般为聚对苯二甲酸乙二酯(PET)、聚萘二甲酸乙二醇酯(PEN)、 聚醚砜树脂(PES)、聚酰亚胺(PI)等材料,薄膜晶体管一般通过透明导电薄膜沉积而成;由于透明导电薄膜与柔性基底的粘合性较差,当进行弯曲时容易造成柔性基底与透明导电薄膜分离,进而造成各种显示不良。另外,柔性基底的阻水汽性能较差,外界的空气和水蒸气很容易透过柔性基底渗透到器件中,直接影响到器件的性能,使器件的性能恶化。
故,有必要提供一种柔性薄膜晶体管及其制备方法,以解决现有技术所存在的问题。
技术问题
本发明的目的在于提供一种柔性薄膜晶体管及其制造方法,可以使得薄膜晶体管不易与柔性基底分离,进而提高器件的显示水平;并且可以有效提高器件的阻水汽性能。
技术解决方案
本发明提供一种柔性薄膜晶体管,其包括:
柔性基底;
设置在所述柔性基底上的无机绝缘层;以及
设置在所述无机绝缘层上的薄膜晶体管;其中,
所述无机绝缘层朝向所述薄膜晶体管一侧的表面设置有粗糙结构;
所述无机绝缘层的厚度介于3000埃-8000埃之间;
所述无机绝缘层的材料为氧化物、氮化物或氮氧化合物。
在本发明的柔性薄膜晶体管中,所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
在本发明的柔性薄膜晶体管中,可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
在本发明的柔性薄膜晶体管中,所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
本发明还提供一种柔性薄膜晶体管,其包括:
柔性基底;
设置在所述柔性基底上的无机绝缘层;以及
设置在所述无机绝缘层上的薄膜晶体管;其中,
所述无机绝缘层朝向所述薄膜晶体管一侧的表面设置有粗糙结构。
在本发明的柔性薄膜晶体管中,所述无机绝缘层的厚度介于3000埃-8000埃之间。
在本发明的柔性薄膜晶体管中,所述无机绝缘层的材料为氧化物、氮化物或氮氧化合物。
在本发明的柔性薄膜晶体管中,所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
在本发明的柔性薄膜晶体管中,可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
在本发明的柔性薄膜晶体管中,所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
依据本发明的上述目的,还提供一种柔性薄膜晶体管的制备方法,其包括:
柔性基底;
在所述柔性基底上形成无机绝缘层;
对所述无机绝缘层的表面进行粗糙化处理,以形成粗糙结构;以及,
在所述无机绝缘层上形成薄膜晶体管。
在本发明的柔性薄膜晶体管的制备方法中,所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
在本发明的柔性薄膜晶体管的制备方法中,可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
在本发明的柔性薄膜晶体管的制备方法中,所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
有益效果
本发明的柔性薄膜晶体管及其制备方法,通过在柔性基底上设置无机绝缘层,且该无机绝缘层朝向薄膜晶体管一侧的表面设置有粗糙结构,从而使得薄膜晶体管不易与柔性基底分离,进而提高器件的显示水平;并且可以有效提高器件的阻水汽性能。
附图说明
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合所附图式,作详细说明如下:
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
图1为本发明优选实施例提供的柔性薄膜晶体管的结构示意图;
图2为本发明优选实施例提供的柔性薄膜晶体管的制造方法的流程示意图。
本发明的最佳实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
参阅图1,图1为本发明优选实施例提供的柔性薄膜晶体管的结构示意图。如图1所示,该柔性薄膜晶体管包括:柔性基底101;无机绝缘层102,其设置在柔性基底101上面;以及薄膜晶体管103,其设置在无机绝缘层102上面;其中,该无机绝缘层102朝向薄膜晶体管103一侧的表面设置有粗糙结构104。本发明通过在柔性基底101与薄膜晶体管103之间设置一层无机绝缘层102,并在该无机绝缘层102朝向薄膜晶体管103一侧的表面设置粗糙结构104,从而使得薄膜晶体管103不易与该无机绝缘层102分离,进而提高器件的显示水平。
需要说明的是,本优选实施例提供的柔性薄膜晶体管中的薄膜晶体管103包括依次设置在无机绝缘层102上面的栅极1031、栅极绝缘层1032、导电沟道1033以及源/漏电极1034。其中,形成该栅极1031的步骤一般为:在该无机绝缘层102上沉积一层透明导电薄膜;随后,通过图形化工艺形成栅极1031。在进行该图形化工艺的过程中,位于透明导电薄膜下面的无机绝缘层102还起到保护柔性基底101的作用,避免因工艺误差的存在,使得柔性基底101遭到损坏。另外,由于无机绝缘层102的存在,使得外界的水汽不易透过柔性基底101进入器件中,进一步提高器件的性能。
下面对本优选实施例中的无机绝缘层102做进一步的介绍。
该无机绝缘层102的厚度介于3000埃-8000埃之间。需要指出的是,本优选实施例中无机绝缘层102的厚度可根据实际情况设置,但是在设置该无机绝缘层102的厚度时应考虑到:在柔性基底101上形成无机绝缘层102后,还需要通过工艺处理,使得无机绝缘层102表面形成粗糙结构104。也就是说,无机绝缘层102的厚度的设置应保证在进行工艺处理形成粗糙结构104时,不损坏柔性基底101。
该无机绝缘层102的材料为氧化物、氮化物或者氮氧化合物。该无机绝缘层102与柔性基底101有较好的粘合性,不会因器件弯曲而造成分离。本优选实施例中的柔性基底101一般为聚对苯二甲酸乙二醇酯(PET)、聚萘二甲酸乙二醇酯(PEN)、聚醚砜树脂(PES)、纤维增强复合塑料(FRP)等材料,而这些材料均与无机绝缘层102具有较好的粘合性,可以使得沉积在柔性基底101上的无机绝缘层102不易与柔性基底101分离。
下面对本优选实施例中的无机绝缘层102上的粗糙结构104进行详细介绍。
为了进一步提高效率,本优选实施例中无机绝缘层102上的粗糙结构104离散的分布在无机绝缘层102朝向薄膜晶体管103一侧的表面。具体地,本优选实施例在柔性基底101形成无机绝缘层102后,通过对该无机绝缘层102朝向薄膜晶体管103一侧的表面进行等离子体刻蚀,从而形成该粗糙结构104。需要指出的是,该粗糙结构104离散的分布在无机绝缘层102朝向薄膜晶体管103一侧的表面,同样可以使得薄膜晶体管103不易与该无机绝缘层102分离。
特别地,该粗糙结构104呈凹凸不平状并与薄膜晶体管103接触。
本优选实施例的柔性薄膜晶体管,通过在柔性基底上设置无机绝缘层,且该无机绝缘层朝向薄膜晶体管一侧的表面设置有粗糙结构,从而使得薄膜晶体管不易与柔性基底分离,进而提高器件的显示水平;并且可以有效提高器件的阻水汽性能。
参阅图2,图2为本发明优选实施例提供的柔性薄膜晶体管的制造方法的流程示意图。如图2所示,本发明还提供一种柔性薄膜晶体管的制造方法,包括以下步骤:
步骤S201,提供一柔性基底;
步骤S202,在柔性基底上形成无机绝缘层;
步骤S203,对无机绝缘层的表面进行粗糙化处理,以形成粗糙结构;以及,
步骤S204,在无机绝缘层上形成薄膜晶体管。
在步骤S201中,该柔性基底一般为聚对苯二甲酸乙二醇酯(PET)、聚萘二甲酸乙二醇酯(PEN)、聚醚砜树脂(PES)、纤维增强复合塑料(FRP)等材料,而这些材料均与无机绝缘层具有较好的粘合性,可以使得沉积在柔性基底上的无机绝缘层不易与柔性基底分离。
在步骤S202中,该无机绝缘层的厚度介于3000埃-8000埃之间。需要指出的是,本优选实施例中无机绝缘层的厚度可根据实际情况设置,但是在设置该无机绝缘层的厚度时应考虑到:在柔性基底上形成无机绝缘层后,还需要通过工艺处理,使得无机绝缘层表面形成粗糙结构。也就是说,无机绝缘层的厚度的设置应保证在进行工艺处理形成粗糙结构时,不损坏柔性基底。
另外,该无机绝缘层的材料为氧化物、氮化物或者氮氧化合物。该无机绝缘层与柔性基底有较好的粘合性,不会因器件弯曲而造成分离。
在步骤S203中,通过对该无机绝缘层朝向薄膜晶体管一侧的表面进行等离子体刻蚀,从而形成该粗糙结构。需要指出的是,为了进一步提高效率,该粗糙结构离散的分布在无机绝缘层朝向薄膜晶体管一侧的表面,同样可以使得薄膜晶体管不易与该无机绝缘层分离。特别地,该粗糙结构呈凹凸不平状并与薄膜晶体管接触。
在步骤S204中,在无机绝缘层上形成薄膜晶体管。具体地,在无机绝缘层上依次形成栅极、栅极绝缘层、导电沟道以及源/漏电极。
其中,形成该栅极的步骤一般为:在该无机绝缘层上沉积一层透明导电薄膜;随后,通过图形化工艺形成栅极。在进行该图形化工艺的过程中,位于透明导电薄膜下面的无机绝缘层还起到保护柔性基底的作用,避免因工艺误差的存在,使得柔性基底遭到损坏。另外,由于无机绝缘层的存在,使得外界的水汽不易透过柔性基底进入器件中,进一步提高器件的性能。
本发明的柔性薄膜晶体管及其制备方法,通过在柔性基底上设置无机绝缘层,且该无机绝缘层朝向薄膜晶体管一侧的表面设置有粗糙结构,从而使得薄膜晶体管不易与柔性基底分离,进而提高器件的显示水平;并且可以有效提高器件的阻水汽性能。
综上,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种柔性薄膜晶体管,其包括:
    柔性基底;
    设置在所述柔性基底上的无机绝缘层;以及
    设置在所述无机绝缘层上的薄膜晶体管;其中,
    所述无机绝缘层朝向所述薄膜晶体管一侧的表面设置有粗糙结构;
    所述无机绝缘层的厚度介于3000埃-8000埃之间;
    所述无机绝缘层的材料为氧化物、氮化物或氮氧化合物。
  2. 根据权利要求1所述的柔性薄膜晶体管,其中所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
  3. 根据权利要求2所述的柔性薄膜晶体管,其中可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
  4. 根据权利要求1所述的柔性薄膜晶体管,其中所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
  5. 一种柔性薄膜晶体管,其包括:
    柔性基底;
    设置在所述柔性基底上的无机绝缘层;以及
    设置在所述无机绝缘层上的薄膜晶体管;其中,
    所述无机绝缘层朝向所述薄膜晶体管一侧的表面设置有粗糙结构。
  6. 根据权利要求5所述的柔性薄膜晶体管,其中所述无机绝缘层的厚度介于3000埃-8000埃之间。
  7. 根据权利要求5所述的柔性薄膜晶体管,其中所述无机绝缘层的材料为氧化物、氮化物或氮氧化合物。
  8. 根据权利要求5所述的柔性薄膜晶体管,其中所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
  9. 根据权利要求6所述的柔性薄膜晶体管,其中所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
  10. 根据权利要求7所述的柔性薄膜晶体管,其中所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
  11. 根据权利要求8所述的柔性薄膜晶体管,其中可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
  12. 根据权利要求5所述的柔性薄膜晶体管,其中所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
  13. 一种柔性薄膜晶体管的制备方法,其包括:
    柔性基底;
    在所述柔性基底上形成无机绝缘层;
    对所述无机绝缘层的表面进行粗糙化处理,以形成粗糙结构;以及,
    在所述无机绝缘层上形成薄膜晶体管。
  14. 根据权利要求13所述的柔性薄膜晶体管的制备方法,其中所述粗糙结构离散分布在所述无机绝缘层朝向所述薄膜晶体管一侧的表面。
  15. 根据权利要求14所述的柔性薄膜晶体管的制备方法,其中可通过对所述无机绝缘层朝向所述薄膜晶体管一侧的表面进行等离子体刻蚀,形成所述粗糙结构。
  16. 根据权利要求13所述的柔性薄膜晶体管的制备方法,其中所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
  17. 根据权利要求14所述的柔性薄膜晶体管的制备方法,其中所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
  18. 根据权利要求15所述的柔性薄膜晶体管的制备方法,其中所述粗糙结构呈凹凸不平状并与所述薄膜晶体管接触。
PCT/CN2017/089615 2017-05-16 2017-06-22 一种柔性薄膜晶体管及其制备方法 Ceased WO2018209757A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/575,204 US10651312B2 (en) 2017-05-16 2017-06-22 Flexible thin film transistor and method for fabricating the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710344614.5 2017-05-16
CN201710344614.5A CN107204374A (zh) 2017-05-16 2017-05-16 一种柔性薄膜晶体管及其制备方法

Publications (1)

Publication Number Publication Date
WO2018209757A1 true WO2018209757A1 (zh) 2018-11-22

Family

ID=59905176

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/089615 Ceased WO2018209757A1 (zh) 2017-05-16 2017-06-22 一种柔性薄膜晶体管及其制备方法

Country Status (2)

Country Link
CN (1) CN107204374A (zh)
WO (1) WO2018209757A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107945728A (zh) * 2017-12-15 2018-04-20 京东方科技集团股份有限公司 一种显示基板、显示基板的制作方法及显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003007721A (ja) * 2001-06-21 2003-01-10 Matsushita Electric Ind Co Ltd 多結晶薄膜を用いた半導体素子
CN1521858A (zh) * 2003-02-12 2004-08-18 �ձ�������ʽ���� 薄膜晶体管及其制造方法
CN1684273A (zh) * 2004-04-14 2005-10-19 Nec液晶技术株式会社 薄膜晶体管及其制造方法
CN1768437A (zh) * 2003-03-31 2006-05-03 佳能株式会社 有机薄膜晶体管及其制作方法
CN101989618A (zh) * 2009-08-07 2011-03-23 清华大学 一种柔性薄膜晶体管及其制备方法
CN103413833A (zh) * 2013-07-09 2013-11-27 复旦大学 一种柔性ZnO基薄膜晶体管及其制备方法
CN105304719A (zh) * 2014-07-18 2016-02-03 上海和辉光电有限公司 柔性薄膜晶体管及其制造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003007721A (ja) * 2001-06-21 2003-01-10 Matsushita Electric Ind Co Ltd 多結晶薄膜を用いた半導体素子
CN1521858A (zh) * 2003-02-12 2004-08-18 �ձ�������ʽ���� 薄膜晶体管及其制造方法
CN1768437A (zh) * 2003-03-31 2006-05-03 佳能株式会社 有机薄膜晶体管及其制作方法
CN1684273A (zh) * 2004-04-14 2005-10-19 Nec液晶技术株式会社 薄膜晶体管及其制造方法
CN101989618A (zh) * 2009-08-07 2011-03-23 清华大学 一种柔性薄膜晶体管及其制备方法
CN103413833A (zh) * 2013-07-09 2013-11-27 复旦大学 一种柔性ZnO基薄膜晶体管及其制备方法
CN105304719A (zh) * 2014-07-18 2016-02-03 上海和辉光电有限公司 柔性薄膜晶体管及其制造方法

Also Published As

Publication number Publication date
CN107204374A (zh) 2017-09-26

Similar Documents

Publication Publication Date Title
CN105226186B (zh) 柔性显示装置的制作方法及制得的柔性显示装置
WO2016106797A1 (zh) 一种柔性有机发光显示器及其制作方法
CN1953189A (zh) 薄膜晶体管、薄膜晶体管基板及其制造方法
CN106129088B (zh) 一种显示面板及制备方法、显示装置
CN102646676A (zh) 一种tft阵列基板
CN110416225A (zh) 一种TFT驱动背板及Micro-LED显示器
CN104269414A (zh) 一种阵列基板及其制作方法、显示装置
WO2019085065A1 (zh) 柔性 oled 显示面板及其制备方法
CN104795407B (zh) 一种阵列基板及其制备方法、显示面板、显示装置
WO2017210942A1 (zh) 一种柔性oled器件的封装结构及显示装置
WO2019041476A1 (zh) 一种阵列基板及其制作方法、显示面板
WO2014205858A1 (zh) 阵列基板及其制作方法、平板显示装置
US20200043951A1 (en) Electronic assemblies incorporating laminate substrates and methods of fabricating the same
CN104465670B (zh) 一种阵列基板及其制作方法、显示装置
WO2018094815A1 (zh) Oled器件的制作方法及oled器件
JP7115610B1 (ja) 薄膜トランジスタ、および、薄膜トランジスタの製造方法
WO2019033578A1 (zh) 柔性oled显示面板的柔性基底及其制备方法
WO2019041547A1 (zh) 显示面板
WO2018152874A1 (zh) 一种阵列基板及阵列基板的制作方法
WO2017128597A1 (zh) 液晶显示面板、tft基板及其制造方法
WO2020056814A1 (zh) 一种柔性显示装置及其制备方法
WO2016149958A1 (zh) 液晶显示面板、阵列基板及其薄膜晶体管的制造方法
WO2018209757A1 (zh) 一种柔性薄膜晶体管及其制备方法
TW201618168A (zh) 顯示面板之製備方法
WO2014019227A1 (zh) 一种液晶显示装置、阵列基板及其制作方法

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15575204

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17909932

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17909932

Country of ref document: EP

Kind code of ref document: A1