WO2018179251A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
WO2018179251A1
WO2018179251A1 PCT/JP2017/013319 JP2017013319W WO2018179251A1 WO 2018179251 A1 WO2018179251 A1 WO 2018179251A1 JP 2017013319 W JP2017013319 W JP 2017013319W WO 2018179251 A1 WO2018179251 A1 WO 2018179251A1
Authority
WO
WIPO (PCT)
Prior art keywords
gas
processing chamber
pressure
gas supply
etching
Prior art date
Application number
PCT/JP2017/013319
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
根 李
裕久 山崎
一樹 野々村
寿崎　健一
竹林　雄二
Original Assignee
株式会社日立国際電気
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立国際電気 filed Critical 株式会社日立国際電気
Priority to PCT/JP2017/013319 priority Critical patent/WO2018179251A1/ja
Priority to JP2019509995A priority patent/JP6823710B2/ja
Priority to CN201880017674.9A priority patent/CN110402482B/zh
Priority to PCT/JP2018/012833 priority patent/WO2018181508A1/ja
Publication of WO2018179251A1 publication Critical patent/WO2018179251A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2

Definitions

  • a plurality of gas supply holes 410 a, 420 a, 430 a, 440 a of the nozzles 410, 420, 430, 440 are provided at positions from the bottom to the top of the boat 217 described later. Therefore, the processing gas supplied into the processing chamber 201 from the gas supply holes 410 a, 420 a, 430 a, and 440 a of the nozzles 410, 420, and 430 is supplied to the wafers 200, that is, the boat 217 stored from the bottom to the top of the boat 217. It is supplied to the entire area of the accommodated wafer 200.
  • the nozzles 410, 420, 430, and 440 may be provided so as to extend from the lower region to the upper region of the processing chamber 201, but may be provided so as to extend to the vicinity of the ceiling of the boat 217. preferable.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
PCT/JP2017/013319 2017-03-30 2017-03-30 半導体装置の製造方法 WO2018179251A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2017/013319 WO2018179251A1 (ja) 2017-03-30 2017-03-30 半導体装置の製造方法
JP2019509995A JP6823710B2 (ja) 2017-03-30 2018-03-28 半導体装置の製造方法、クリーニング方法、基板処理装置およびプログラム
CN201880017674.9A CN110402482B (zh) 2017-03-30 2018-03-28 半导体装置的制造方法、清洁方法、基板处理装置和记录介质
PCT/JP2018/012833 WO2018181508A1 (ja) 2017-03-30 2018-03-28 半導体装置の製造方法、クリーニング方法、基板処理装置およびプログラム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/013319 WO2018179251A1 (ja) 2017-03-30 2017-03-30 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
WO2018179251A1 true WO2018179251A1 (ja) 2018-10-04

Family

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Family Applications (2)

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PCT/JP2017/013319 WO2018179251A1 (ja) 2017-03-30 2017-03-30 半導体装置の製造方法
PCT/JP2018/012833 WO2018181508A1 (ja) 2017-03-30 2018-03-28 半導体装置の製造方法、クリーニング方法、基板処理装置およびプログラム

Family Applications After (1)

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PCT/JP2018/012833 WO2018181508A1 (ja) 2017-03-30 2018-03-28 半導体装置の製造方法、クリーニング方法、基板処理装置およびプログラム

Country Status (3)

Country Link
JP (1) JP6823710B2 (zh)
CN (1) CN110402482B (zh)
WO (2) WO2018179251A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2021260869A1 (zh) 2020-06-25 2021-12-30
WO2024062662A1 (ja) * 2022-09-21 2024-03-28 株式会社Kokusai Electric 基板処理方法、半導体装置の製造方法、プログラム、および基板処理装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009124050A (ja) * 2007-11-16 2009-06-04 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
JP2009188198A (ja) * 2008-02-06 2009-08-20 Taiyo Nippon Sanso Corp 半導体装置の製造方法及び基板処理装置
JP2010206050A (ja) * 2009-03-05 2010-09-16 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
JP2013229575A (ja) * 2012-03-30 2013-11-07 Hitachi Kokusai Electric Inc 半導体装置の製造方法、クリーニング方法および基板処理装置並びに記録媒体
JP2015188068A (ja) * 2014-03-11 2015-10-29 東京エレクトロン株式会社 プラズマ処理装置、基板処理システム、薄膜トランジスターの製造方法及び記憶媒体

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1050686A (ja) * 1996-08-01 1998-02-20 Hitachi Ltd Ｃｖｄ装置のクリーニング方法及びその装置
JP2008060171A (ja) * 2006-08-29 2008-03-13 Taiyo Nippon Sanso Corp 半導体処理装置のクリーニング方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009124050A (ja) * 2007-11-16 2009-06-04 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
JP2009188198A (ja) * 2008-02-06 2009-08-20 Taiyo Nippon Sanso Corp 半導体装置の製造方法及び基板処理装置
JP2010206050A (ja) * 2009-03-05 2010-09-16 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
JP2013229575A (ja) * 2012-03-30 2013-11-07 Hitachi Kokusai Electric Inc 半導体装置の製造方法、クリーニング方法および基板処理装置並びに記録媒体
JP2015188068A (ja) * 2014-03-11 2015-10-29 東京エレクトロン株式会社 プラズマ処理装置、基板処理システム、薄膜トランジスターの製造方法及び記憶媒体

Also Published As

Publication number Publication date
JPWO2018181508A1 (ja) 2019-11-07
JP6823710B2 (ja) 2021-02-03
CN110402482A (zh) 2019-11-01
CN110402482B (zh) 2023-04-07
WO2018181508A1 (ja) 2018-10-04

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