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  • H10F30/223—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier
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  • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
  • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
  • H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
  • H10F30/225—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
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  • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
  • H10F39/016—Manufacture or treatment of image sensors covered by group H10F39/12 of thin-film-based image sensors
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  • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
  • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
  • H10F39/028—Manufacture or treatment of image sensors covered by group H10F39/12 performed after manufacture of the image sensors, e.g. annealing, gettering of impurities, short-circuit elimination or recrystallisation
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  • H10F39/10—Integrated devices
  • H10F39/12—Image sensors
  • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
  • H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
  • H10F39/1898—Indirect radiation image sensors, e.g. using luminescent members
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  • H10F39/80—Constructional details of image sensors
  • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
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  • H10F77/10—Semiconductor bodies
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  • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation

Definitions

• One embodiment of the present invention relates to an imaging device.
• one embodiment of the present invention is not limited to the above technical field.
• the technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
• one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter.
• examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, an imaging device, a method for operating any of them, and a method for manufacturing any of them.
• a semiconductor device generally means a device that can function by utilizing semiconductor characteristics.
• a transistor and a semiconductor circuit are embodiments of semiconductor devices.
• a memory device, a display device, an imaging device, or an electronic device includes a semiconductor device.
• Imaging devices are incorporated in a variety of electronic devices, and imaging devices capable of higher-resolution imaging are required.
• Patent Document 2 discloses an imaging device in which a transistor including an oxide semiconductor and having an extremely low off-state current is used in a pixel circuit.
• Patent Document 1 Japanese Published Patent Application No. 2014-17440
• Patent Document 2 Japanese Published Patent Application No. 2011-119711
• the pixel area When the pixel area is reduced, the light-receiving area of a photoelectric conversion element is also reduced; as a result, the photosensitivity is lowered.
• the S/N ratio of imaging data largely decreases in some cases. That is, in the image sensor having the conventional structure, there is a trade-off between resolution and photosensitivity.
• a solution to the above problem is to use a photoelectric conversion element utilizing avalanche multiplication effect, which has high photosensitivity.
• an object of one embodiment of the present invention is to provide a photoelectric conversion element with high photosensitivity. Another object is to provide an imaging device that easily performs imaging under a low illuminance condition. Another object is to provide an imaging device with low power consumption. Another object is to provide an imaging device with high resolution. Another object is to provide an imaging device with high reliability. Another object is to provide a novel imaging device or the like. Another object is to provide a novel semiconductor device or the like.
• One embodiment of the present invention is a photoelectric conversion element including a first electrode, a photoelectric conversion layer over the first electrode, a hole injection blocking layer over the photoelectric conversion layer, and a second electrode over the hole injection blocking layer.
• the photoelectric conversion layer contains selenium and an element X.
• the element X is one or more of silver, bismuth, indium, tin, and tellurium.
• the hole injection blocking layer contains tin, gallium, and oxygen.
• the hole injection blocking layer preferably includes a region where the ratio Sn/Ga is greater than or equal to 0.0010 and less than or equal to 0.050.
• the ratio Sn/Ga is a ratio of the number of tin atoms to the number of gallium atoms.
• the thickness of the hole injection blocking layer is preferably greater than or equal to 5 nm and less than or equal to 50 nm.
• the photoelectric conversion layer preferably contains crystalline selenium and the crystal grain size of the crystalline selenium is preferably greater than or equal to 0.010 ⁇ and less than or equal to 1.10 ⁇ .
• One embodiment of the present invention is a method for manufacturing a photoelectric conversion element including the steps of providing a base layer containing an element X over a first electrode, providing a layer containing selenium over the base layer, performing heat treatment, providing a hole injection blocking layer containing tin, gallium and oxygen over the layer containing selenium, and providing a second electrode over the hole injection blocking layer.
• the element is one or more of silver, bismuth, indium, and tellurium.
• One embodiment of the present invention is a method for manufacturing a photoelectric conversion element including the steps of providing a layer containing selenium over a first electrode, providing a base layer containing an element X over the layer containing selenium, performing heat treatment, providing a hole injection blocking layer containing tin, gallium and oxygen over the layer containing selenium, and providing a second electrode over the hole injection blocking layer.
• the element X is one or more of silver, bismuth, indium, tin, and tellurium.
• the heat treatment preferably contains a first process, a second process, and a third process.
• the first process is preferably performed at a temperature higher than or equal to 50 °C and lower than or equal to 90 °C.
• the second process is preferably performed at a temperature higher than the temperature of the first process and higher than or equal to 70 °C and lower than or equal to 170 °C.
• the third process is preferably performed at a temperature higher than the temperature of the second process and higher than or equal to 110 °C and lower than or equal to 220 °C.
• the hole injection blocking layer is preferably formed in vacuum through the first and second processes successively.
• the first process is preferably performed before the second process.
• the proportion of oxygen in the whole deposition gas is preferably higher in the second process than in the first process.
• One embodiment of the present invention can provide a photoelectric conversion element with high photosensitivity. Another embodiment can provide an imaging device that easily performs imaging under a low illuminance condition. Another embodiment can provide an imaging device with low power consumption. Another embodiment can provide an imaging device with high resolution. Another embodiment can provide an imaging device with high reliability. Another embodiment can provide a novel imaging device or the like. Another embodiment can provide a novel semiconductor device or the like.
• one embodiment of the present invention is not limited to these effects.
• one embodiment of the present invention might produce another effect depending on circumstances or conditions.
• one embodiment of the present invention might not produce any of the above effects depending on circumstances or conditions.
• FIGS. 1A to 1C are cross-sectional views illustrating structures of photoelectric conversion elements
• FIGS. 2A and 2B are diagrams showing band structures of a photoelectric conversion element
• FIG. 3 is a diagram showing a band structure of a photoelectric conversion element
• FIG. 4 is a flow chart showing a method for manufacturing a photoelectric conversion element
• FIGS. 5A to 5E are cross-sectional views illustrating a method for manufacturing a photoel ectri c conver si on el ement;
• FIGS. 6A to 6D are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element;
• FIGS. 7A to 7D are schematic cross-sectional views illustrating solid phase crystallization
• FIGS. 8 A to 8C are schematic cross-sectional views illustrating solid phase crystallization
• FIG. 9 is a diagram showing a thermal profile of heat treatment
• FIGS. 10A and 10B are a diagram illustrating a pixel circuit and a timing chart showing imaging operation
• FIGS. 11 A and 11B are a diagram illustrating a structure of a pixel of an imaging device and a block diagram of the imaging device;
• FIGS. 12A to 12C are cross-sectional views illustrating a structure of an imaging device
• FIGS. 13 A to 13C are cross-sectional views illustrating structures of an imaging device
• FIGS. 14A to 14C are cross-sectional views illustrating structures of an imaging device
• FIGS. 15A1 to 15 A3 and 15B 1 to 15B3 are perspective views of a package including an imaging device
• FIGS. 16A to 16F illustrate electronic devices
• FIGS. 17A and 17B are cross-sectional views illustrating a sample in Example 1;
• FIGS. 18A and 18B are plan SEM images according to Example 1;
• FIGS. 19A and 19B are plan SEM images according to Example 1;
• FIGS. 20A and 20B are plan SEM images according to Example 1;
• FIGS. 21 A and 21B are plan SEM images according to Example 1;
• FIGS. 22A and 22B are plan SEM images according to Example 1;
• FIGS. 23 A and 23B are plan SEM images according to Example 1;
• FIGS. 24A to 24D are diagrams illustrating a method for calculating a crystal grain size according to Example 1;
• FIGS. 25 A and 25B are histograms of a crystal grain size according to Example 1;
• FIGS. 26A and 26B are histograms of a crystal grain size according to Example 1;
• FIGS. 27A and 27B are diagrams showing current-voltage characteristics according to Example 2.
• FIGS. 28A and 28B are diagrams showing current-voltage characteristics according to Example 2.
• FIG. 29 is a diagram showing current-voltage characteristics according to Example 2
• FIG. 30 is a diagram showing wavelength dependence of a current amplification factor according to Example 2;
• FIGS. 31 A and 3 IB are cross-sectional STEM images according to Example 2.
• FIG. 32 is a cross-sectional STEM image according to Example 2.
• FIGS. 33 A and 33B are cross-sectional STEM images according to Example 2.
• FIGS. 34A and 34B are cross-sectional STEM images according to Example 2.
• FIGS. 35 A and 35B are diagrams showing current-voltage characteristics according to Example 3.
• FIG. 36 is a diagram showing wavelength dependence of current-voltage characteristics according to Example 3.
• FIGS. 37A and 37B are diagrams showing measurement temperature dependence of a dark current according to Example 3.
• FIGS. 38A and 38B are diagrams showing XPS spectra around a valence band according to Example 4.
• FIG. 39 is a diagram showing XPS spectra according to Example 5.
• FIGS. 40A to 40D are diagrams showing XPS spectra according to Example 5.
• FIG. 41 is a diagram showing UPS spectra according to Example 5.
• FIGS. 42 A to 42C are diagrams showing transmittance and reflectance according to Example 5.
• FIGS. 43 A to 43C are Tauc plots according to Example 5.
• FIGS. 44A and 44B are diagrams showing current-voltage characteristics according to Example 6;
• FIGS. 45A and 45B are diagrams showing current-voltage characteristics according to Example 6;
• FIG. 46 is a diagram showing wavelength dependence of a current amplification factor according to Example 6.
• FIGS. 47A and 47B are diagrams showing current-electric field strength characteristics according to Example 7.
• FIGS. 48A and 48B are diagrams showing current-electric field strength characteristics according to Example 7.
• FIG. 49 is a diagram showing wavelength dependence of a current amplification factor according to Example 7.
• ordinal numbers such as “first” and “second” in this specification are used for convenience and do not denote the order of steps or the stacking order of layers.
• the term “first” can be replaced with the term “second,” “third,” or the like as appropriate.
• the ordinal numbers in this specification and the like do not correspond to the ordinal numbers, which specify one embodiment of the present invention in some cases.
• film and “layer” can be interchanged with each other depending on the case or circumstances.
• conductive layer can be changed into the term “conductive film” in some cases
• insulating film can be changed into the term “insulating layer” in some cases.
• FIG. 1A A schematic view of a cross-sectional structure of a photoelectric conversion element 10A of one embodiment of the present invention is illustrated in FIG. 1A.
• the photoelectric conversion element 10A includes a first electrode 11, a photoelectric conversion layer 13 over the first electrode 11, a hole injection blocking layer 17 over the photoelectric conversion layer 13, and a second electrode 15 over the hole injection blocking layer 17.
• One embodiment of the present invention is a photoelectric conversion element in which selenium is used for the photoelectric conversion layer 13, which is capable of imaging utilizing avalanche multiplication effect at relatively low voltage.
• crystalline selenium is used for the photoelectric conversion layer, photosensitivity can be improved in almost the entire visible light region.
• a photoelectric conversion element having such a structure can have higher photosensitivity than a conventional photoelectric conversion element in which silicon is used for a photoelectric conversion layer; thus, imaging under a low illuminance condition can be easily performed.
• an imaging device capable of high-resolution imaging can be provided.
• An n-type semiconductor having an ionization potential of greater than or equal to 7.0 eV and a band gap of greater than or equal to 4.0 eV and containing an element that forms a donor level is preferably used for the hole injection blocking layer 17.
• Tin-containing gallium oxide can be favorably used for the hole injection blocking layer 17, for example.
• a pn junction is formed in the photoelectric conversion element of one embodiment of the present invention in which selenium, which is a p-type semiconductor, is used for the photoelectric conversion layer 13 and an n-type semiconductor is used for the hole injection blocking layer 17.
• the hole injection blocking layer 17 that is an n-type semiconductor layer with a wide band gap and appropriate carrier density can decrease a dark current and increase a photocurrent.
• the hole injection blocking layer 17 preferably has a stacked structure of a first hole injection blocking layer 17a and a second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• Tin-containing gallium oxide can be used for each of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b.
• the photoelectric conversion element of one embodiment of the present invention may include an electron injection blocking layer 19 between the photoelectric conversion layer 13 and the first electrode 11.
• the photoelectric conversion element may be formed over a substrate or over a driver transistor formed in or over a substrate.
• the second electrode 15 side is a light-receiving surface of each of the photoelectric conversion elements 10A to IOC.
• light (Light) entering each of the photoelectric conversion elements lOA to IOC is indicated by arrows.
• a selenium-based material can be used for the photoelectric conversion layer 13.
• a photoelectric conversion element including a selenium-based material has high internal quantum efficiency with respect to visible light. In such a photoelectric conversion element, carriers generated by incident light are amplified due to the effect of charge amplification by an avalanche phenomenon; thus, the photoelectric conversion efficiency can be improved.
• a photodiode utilizing avalanche multiplication effect is referred to as an avalanche photodiode (APD) in some cases.
• Crystalline selenium is preferably used for the photoelectric conversion layer 13.
• Selenium can be classified into single crystal selenium, polycrystalline selenium, microcrystalline selenium, amorphous selenium, and the like according to its crystallinity.
• crystalline selenium means selenium having crystallinity such as single crystal selenium, polycrystalline selenium, or microcrystalline selenium.
• mixed selenium including crystalline selenium and amorphous selenium may be used.
• “having crystallinity” may be referred to as "being crystalline.”
• crystalline selenium has a higher absorption coefficient in the entire wavelength region of visible light than silicon and amorphous selenium, the crystalline selenium can be thinner than the silicon and the amorphous selenium. Thin film thickness enables high electric field application. Moreover, avalanche multiplication effect occurs in the crystalline selenium at low voltage and the crystalline selenium has high photosensitivity. Therefore, a photoelectric conversion element containing crystalline selenium in the photoelectric conversion layer 13 has high photosensitivity and is suitable for imaging even in a low-illuminance environment. Furthermore, such a photoelectric conversion element is preferable because it can be operated at low voltage. [0038]
• amorphous selenium may be crystallized when exposed to a high temperature in manufacturing process or a usage environment. Thus, amorphous selenium has low thermal stability.
• the photoelectric conversion layer 13 of the photoelectric conversion element of one embodiment of the present invention has high thermal stability because of containing uniform crystalline selenium.
• the crystallinity of the selenium contained in the photoelectric conversion layer 13 can be evaluated using X-ray diffraction (XRD), electron diffraction (ED), an image obtained with a transmission electron microscope (TEM), an image obtained with scanning transmission electron microscopy (STEM), or the like.
• XRD X-ray diffraction
• ED electron diffraction
• TEM transmission electron microscope
• STEM scanning transmission electron microscopy
• a known method for obtaining crystalline selenium is to form amorphous selenium and then perform heat treatment.
• crystallization of amorphous selenium by heat treatment could cause aggregation of selenium; thus, there may be a region not containing selenium. In this specification and the like, such a region is referred to as a film separation region.
• the film separation region in a photoelectric conversion layer may vary the characteristics of photoelectric conversion elements, which may reduce the imaging performance of an imaging device.
• unevenness of the photoelectric conversion layer 13 is increased along with aggregation of the selenium or generation of the film separation region, coverage and adhesion of the second electrode 15 over the photoelectric conversion layer 13 become poor in some cases.
• a photoelectric conversion layer 13 is to be a pn-junction surface, an uneven shape, for example, causes degradation in interface properties.
• a photoelectric conversion layer is preferably a uniform crystalline selenium that includes few film separation regions and has little unevenness.
• the photoelectric conversion layer 13 of one embodiment of the present invention contains selenium and an element X.
• the element X is one or more of silver, bismuth, indium, tin, and tellurium.
• the element X together with selenium forms a compound (hereinafter, the compound is referred to as a selenium compound).
• the photoelectric conversion layer 13 of one embodiment of the present invention contains crystalline selenium formed by solid phase crystallization (SPC) using the selenium compound as a crystal nucleus. In the solid phase crystallization, the surface of the photoelectric conversion layer 13 may become uneven along with the growth of crystal grains. Moreover, in the case where the crystal grains are large, the surface unevenness of the photoelectric conversion layer 13 may be large.
• the surface unevenness of the photoelectric conversion layer 13 can be decreased by making the crystal grains small.
• the photoelectric conversion layer 13 of one embodiment of the present invention may include an element other than selenium and the element X.
• the element other than the element X include silicon and germanium.
• the crystal grain size (major diameter) of the photoelectric conversion layer 13 is preferably less than or equal to 1.10 ⁇ , further preferably less than or equal to 1.00 ⁇ , still further preferably less than or equal to 0.90 ⁇ .
• the surface unevenness of the photoelectric conversion layer 13 can be small.
• the coverage and adhesion of the second electrode 15 over the photoelectric conversion layer 13 having small surface unevenness become high, whereby a short circuit between the first electrode 11 and the second electrode 15 can be prevented.
• the pn-junction surface has excellent interface properties. Accordingly, a photoelectric conversion element having favorable characteristics can be manufactured.
• the minimum value of the crystal grain size (major diameter) is preferably greater than or equal to 0.010 ⁇ although there is no particular limitation. With the crystal grain size (major diameter) of greater than or equal to 0.010 ⁇ , a trap level due to a grain boundary can be reduced, which enables manufacture of a photoelectric conversion element having favorable characteristics.
• the length of the longest line connecting two points on an outline of the crystal grain is regarded as the crystal grain size (major diameter).
• the crystal grain size (major diameter) of the selenium contained in the photoelectric conversion layer 13 can be measured using an image obtained with scanning electron microscopy (SEM), an image obtained with a transmission electron microscope (TEM), an image obtained with scanning transmission electron microscopy (STEM), an electron backscatter diffraction (EBSD) pattern, or the like.
• SEM scanning electron microscopy
• TEM transmission electron microscope
• STEM scanning transmission electron microscopy
• EBSD electron backscatter diffraction
• the photoelectric conversion layer 13 preferably includes a region where the ratio of the atomic concentration of the element X to the atomic concentration of selenium (A7Se) is greater than or equal to 0.0010 and less than or equal to 0.70, preferably greater than or equal to 0.0030 and less than or equal to 0.50, further preferably greater than or equal to 0.0050 and less than or equal to 0.30. If X/Se is in the above range, the photoelectric conversion layer 13 that contains uniform crystalline selenium and includes few film separation regions can be formed. Note that segregation of the element X at a grain boundary or a surface of the crystalline selenium may increase a dark current. If X/Se is in the above range, a photoelectric conversion element and an imaging device can have a small dark current.
• the element X preferably has a high diffusion coefficient in selenium and forms a compound with the selenium.
• the selenium compound preferably has crystallinity.
• the degree of mismatch between the lattice constant of single crystal selenium and the lattice constant of the selenium compound is preferably small. It is further preferable that the selenium compound has the same crystal structure as the single crystal selenium; however, when the degree of mismatch between the lattice constants is small, the selenium compound may have a crystal structure different from that of the single crystal selenium.
• the photoelectric conversion layer 13 of one embodiment of the present invention includes the selenium compound in some cases. In the case of using two or more elements as the element X, the total atomic concentration of those elements may be used as the value X of X/Se.
• the atomic concentrations of the selenium and the element X of the photoelectric conversion layer 13 can be measured using energy dispersive X-ray spectroscopy (EDX), secondary ion mass spectrometry (SIMS), time-of-flight secondary ion mass spectrometry (ToF-SIMS), X-ray photoelectron spectroscopy (XPS), auger electron spectroscopy (AES), electron energy -loss spectroscopy (EELS), or the like.
• EDX energy dispersive X-ray spectroscopy
• SIMS secondary ion mass spectrometry
• ToF-SIMS time-of-flight secondary ion mass spectrometry
• XPS X-ray photoelectron spectroscopy
• AES auger electron spectroscopy
• EELS electron energy -loss spectroscopy
• the "ratio of the atomic concentration” is the same as the “ratio of the number of atoms,” so that the “ratio of the atomic concentration” can be replaced with the "ratio of the number of atoms.” That is, the value of X/Se can be regarded as the ratio of the atomic concentration of the element X to the atomic concentration of selenium, and the ratio of the number of atoms of the element Xto the number of selenium atoms.
• the photoelectric conversion element of one embodiment of the present invention includes the hole injection blocking layer 17 between the photoelectric conversion layer 13 and the second electrode 15 as illustrated in FIGS. lA to 1C.
• the hole injection blocking layer 17 suppresses hole injection from the second electrode 15 into the photoelectric conversion layer 13. Since the hole injection blocking layer 17 suppresses charge injection into the photoelectric conversion layer 13, the hole injection blocking layer 17 is referred to as a charge injection blocking layer in some cases.
• the hole injection blocking layer 17 preferably has a light-transmitting property with respect to visible light.
• the photoelectric conversion element can have high photosensitivity in the entire visible light region.
• the hole injection blocking layer 17 preferably has a wide band gap.
• the hole injection blocking layer 17 with a wide band gap can suppress hole injection from the electrode to the photoelectric conversion layer, so that the photoelectric conversion element can have a small dark current.
• the hole injection blocking layer 17 preferably has a low barrier to electrons. If the barrier to electrons is high, electrons may be trapped by the barrier and problems such as an image lag or image persistence may occur in imaging. When a photoelectric conversion element has a low barrier to electrons, an image lag or image persistence hardly occurs.
• the hole injection blocking layer 17 preferably has few defect states. If the number of defect states is large, an effective energy barrier with respect to holes is lowered and a dark current is increased in some cases. Since the hole injection blocking layer 17 has few defect states, a photoelectric conversion element can have a low dark current. Tin-containing gallium oxide can be favorably used for the hole injection blocking layer 17, for example.
• the hole injection blocking layer 17 of one embodiment of the present invention contains tin, gallium, and oxygen.
• the hole injection blocking layer 17 preferably includes a region where the atomic concentration of tin is greater than or equal to 0.020 atomic% and less than or equal to 2.0 atomic%, further preferably greater than or equal to 0.10 atomic% and less than or equal to 1.2 atomic%, still further preferably greater than or equal to 0.20 atomic% and less than or equal to 1.0 atomic%. If the tin concentration is in the above range, the photoelectric conversion element can have a large current amplification factor.
• the hole injection blocking layer 17 preferably includes a region where the ratio of the atomic concentration of tin to the atomic concentration of gallium (Sn/Ga) is greater than or equal to 0.0010 and less than or equal to 0.050, preferably greater than or equal to 0.0030 and less than or equal to 0.030, further preferably greater than or equal to 0.0050 and less than or equal to 0.020. If Sn/Ga is in the above range, the photoelectric conversion element can have a large current amplification factor. [0053]
• a tunnel current flowing through the hole injection blocking layer 17 needs to be prevented so that the hole injection blocking layer 17 is efficiently utilized; therefore, the layer needs to be greater than or equal to a certain thickness.
• the thickness is preferably set to be greater than or equal to 5 nm and less than or equal to 50 nm, further preferably greater than or equal to 10 nm and less than or equal to 40 nm, for example. If the thickness is in the above range, a photoelectric conversion element can have a small dark current.
• the energy difference between the Fermi level and the valence band (Ef- ⁇ ) of crystalline selenium is smaller than that of amorphous selenium, so that the crystalline selenium may have higher carrier density than the amorphous selenium.
• a photoelectric conversion element may have a high dark current (/dark) and a small current amplification factor (/photo Zdark)- [0055]
• the current amplification factor refers to the ratio of a photocurrent (/photo) to a dark current (/dark), that is, the value of a photocurrent (/photo) / a dark current (/dark)- [0056]
• the high photocurrent is effectively obtained by increasing a depletion layer width Wp in the photoelectric conversion layer 13 when voltage is applied to a photoelectric conversion element.
• the depletion layer width Wp in the photoelectric conversion layer 13 when voltage is applied to the photoelectric conversion element can be expressed by Formula 1.
• Wp is the depletion layer width in the photoelectric conversion layer 13
• Nd is the carrier density of the hole injection blocking layer 17
• Na is the carrier density of the photoelectric conversion layer 13
• ⁇ is a dielectric constant
• q is elementary charge
• Vbi is internal potential
• J 7 is an applied voltage.
• the depletion layer width Wp in the photoelectric conversion layer 13 is greatly affected by the ratio of the carrier density of the hole injection blocking layer 17 and the carrier density of the photoelectric conversion layer 13.
• a high photocurrent is effectively obtained by using the hole injection blocking layer 17 having the carrier density appropriate for the carrier density of the photoelectric conversion layer 13.
• crystalline selenium may have higher carrier density than amorphous selenium.
• a photocurrent and a current amplification factor can be increased by using the hole injection blocking layer 17 having high carrier density.
• FIG. 2A is a band diagram of a stacked structure of the second electrode 15, the hole injection blocking layer 17, and the photoelectric conversion layer 13.
• amorphous selenium and indium gallium oxide are respectively used for the photoelectric conversion layer 13 and the hole injection blocking layer 17.
• the band gap of the amorphous selenium is approximately 2.3 eV and an energy difference between the Fermi level and the valence band (Ef-Ev) of the amorphous selenium is approximately 0.2 eV.
• FIG. 2B is a band diagram in the case where crystalline selenium and indium gallium oxide are respectively used for the photoelectric conversion layer 13 and the hole injection blocking layer 17.
• the band gap of the crystalline selenium is approximately 1.8 eV and an energy difference between the Fermi level and the valence band of the crystalline selenium is approximately 0.1 eV.
• the energy difference between the Fermi level and the valence band of the crystalline selenium is smaller than that of the amorphous selenium, so that the crystalline selenium may have higher carrier density than the amorphous selenium. Therefore, the depletion layer width Wp in the structure illustrated in FIG. 2B in which crystalline selenium is used is smaller than that in the structure illustrated in FIG.
• the depletion layer width Wp formed in the photoelectric conversion layer 13 is preferably increased.
• the depletion layer width Wp can be increased by heightening the carrier concentration of the hole injection blocking layer 17.
• the hole injection blocking layer 17 is preferably formed using a material having a slightly higher carrier concentration than that of indium gallium oxide. Examples of such a material include tin-containing gallium oxide.
• FIG. 3 is a band diagram in the case where crystalline selenium and tin-containing gallium oxide are respectively used for the photoelectric conversion layer 13 and the hole injection blocking layer 17.
• the structure illustrated in FIG. 3 is one embodiment of the present invention.
• the band gap of the tin-containing gallium oxide is approximately 4.6 eV and the carrier density of the tin-containing gallium oxide is higher than that of the indium gallium oxide. Therefore, the depletion layer width Wp in the structure illustrated in FIG. 3 is larger than that in the structure illustrated in FIG. 2B, so that a photocurrent is estimated to be increased.
• the carrier density of the hole injection blocking layer 17 can be increased by, for example, increasing oxygen vacancies (Vo) in an oxide used for the hole injection blocking layer 17.
• increased oxygen vacancies may increase deep levels and lower an effective energy barrier to holes.
• the low effective energy barrier with respect to holes is not preferable because it may increase a dark current. Accordingly, the hole injection blocking layer 17 preferably contains few oxygen vacancies.
• the carrier density of the hole injection blocking layer 17 can be increased by, for example, adding an element to be a donor source. Tin-containing gallium oxide is particularly preferably used for the hole injection blocking layer 17.
• crystalline selenium and tin-containing gallium oxide are respectively used for the photoelectric conversion layer 13 and the hole injection blocking layer 17.
• the photoelectric conversion element having the above structure can have a large current amplification factor and high thermal stability.
• the hole injection blocking layer 17 preferably has a stacked structure of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• a material that can be used for the hole injection blocking layer 17 can be used for each of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b.
• Tin-containing gallium oxide can be used for each of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b, for example.
• the compositions of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b are substantially the same, they can be formed using the same sputtering target and the manufacturing cost can thus be reduced.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b each preferably include a region where the atomic concentration of tin is greater than or equal to 0.020 atomic% and less than or equal to 2.0 atomic%, further preferably greater than or equal to 0.10 atomic% and less than or equal to 1.2 atomic%, still further preferably greater than or equal to 0.20 atomic% and less than or equal to 1.0 atomic%. If the tin concentration is in the above range, the photoelectric conversion element can have a large current amplification factor.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b each preferably include a region where the ratio of the atomic concentration of tin to the atomic concentration of gallium (Sn/Ga) is greater than or equal to 0.0010 and less than or equal to 0.050, preferably greater than or equal to 0.0030 and less than or equal to 0.030, further preferably greater than or equal to 0.0050 and less than or equal to 0.020. If Sn/Ga is in the above range, the photoelectric conversion element can have a large current amplification factor.
• first hole injection blocking layer 17a and the second hole injection blocking layer 17b it is particularly preferable to use stacked films deposited successively in vacuum without exposure to the air using targets with the same composition, although it is also possible to use films deposited using targets with different compositions.
• the layers are deposited successively, one deposition apparatus can be shared between a plurality of deposition steps, remaining of impurities such as atmospheric components between the first hole injection blocking layer 17a and the second hole injection blocking layer 17b can be suppressed.
• Impurities in the hole injection blocking layer are not preferable because the impurities form defect states serving as carrier traps and degrade the frequency characteristics of a photodiode in some cases.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b are successively formed in vacuum, an increase in defect states can be suppressed and favorable characteristics can be obtained.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b can be formed separately in different conditions, for example.
• the flow rates of oxygen gas in the deposition gases can be different between the first hole injection blocking layer 17a and the second hole injection blocking layer 17b.
• the proportion of oxygen gas flow rate (also referred to as oxygen gas flow rate ratio or oxygen partial pressure) in a whole deposition gas is higher than or equal to 0 % and lower than or equal to 30 %, preferably higher than or equal to 5 % and lower than or equal to 15 %.
• oxygen flow rate ratio oxygen partial pressure
• the first hole injection blocking layer 17a is formed by a sputtering method
• a substrate temperature is increased by collision of sputtered particles in some cases.
• the selenium contained in the photoelectric conversion layer 13 may be evaporated.
• the deposition rate of the first hole injection blocking layer 17a can be increased with the above oxygen flow rate ratio. In other words, the time during which the surface of the photoelectric conversion layer 13 is exposed to sputtered particles in the formation of the first hole injection blocking layer 17a can be shortened; thus, evaporation of the selenium can be suppressed.
• the oxygen flow rate ratio is higher than 30 % and lower than or equal to 100 %, preferably higher than or equal to 35 % and lower than or equal to 100 %, further preferably higher than or equal to 40 % and lower than or equal to 70 %. With the above oxygen flow rate ratio, the second hole injection blocking layer 17b having few oxygen vacancies can be formed.
• the second hole injection blocking layer 17b having crystallinity may be formed.
• the second hole injection blocking layer 17b having crystallinity is not preferable because it increases the resistance of the second hole injection blocking layer 17b and decreases a photocurrent in some cases.
• the crystallinity of the second hole injection blocking layer 17b can be low and a photoelectric conversion element can have a large photocurrent.
• the thickness of the first hole injection blocking layer 17a is greater than or equal to 1 nm and less than or equal to 10 nm, preferably greater than or equal to 2 nm and less than or equal to 8 nm.
• the thickness of the second hole injection blocking layer 17b is greater than or equal to 1 nm and less than or equal to 50 nm, preferably greater than or equal to 5 nm and less than or equal to 40 nm.
• the hole injection blocking layer 17 may have a single layer structure.
• the same structure as the first hole injection blocking layer 17a or the second hole injection blocking layer 17b can be applied to the hole injection blocking layer 17.
• the hole injection blocking layer 17 has a single layer structure, whereby the productivity can be improved.
• the photoelectric conversion element of one embodiment of the present invention may further include the electron injection blocking layer 19 between the first electrode 11 and the photoelectric conversion layer 13 as illustrated in FIG. 1C.
• the electron injection blocking layer 19 suppresses electron injection from the first electrode 11 into the photoelectric conversion layer 13. Since the electron injection blocking layer 19 suppresses charge injection into the photoelectric conversion layer 13, the electron injection blocking layer 19 is referred to as a charge injection blocking layer in some cases.
• the electron injection blocking layer can contain nickel oxide, antimony sulfide, or the like.
• the first electrode 11 will be described.
• the first electrode 11 can be formed using gold, titanium nitride, molybdenum, tungsten, aluminum, titanium, or the like. In addition, for example, a stack of titanium, aluminum, and titanium that are stacked in this order can be used.
• the first electrode 11 can be formed by a sputtering method or a plasma CVD method.
• the first electrode 11 may be formed over a substrate or over a driver transistor formed in or over a substrate.
• the first electrode 11 illustrated in FIGS. 1A to 1C preferably has small surface unevenness in order to prevent a short circuit with the second electrode 15 caused by, for example, poor coverage with the photoelectric conversion layer 13.
• the first electrode 11 having small surface unevenness contributes to less unevenness of the top surface of the photoelectric conversion layer 13.
• An example of a conductive film having small surface unevenness is an indium tin oxide film containing silicon oxide at 1 wt% to 20 wt%.
• the surface unevenness can be observed using an atomic force microscope (AFM), a scanning electron microscope (SEM), or the like.
• AFM atomic force microscope
• SEM scanning electron microscope
• the indium tin oxide film is crystallized at a relatively low temperature even when it is amorphous at the time of its deposition, surface roughness due to the growth of crystal grains is easily caused.
• XRD X-ray diffraction
• the indium tin oxide film containing silicon does not exhibits crystallinity even in the case where the film is subjected to heat treatment at a temperature higher than 400 °C.
• the indium tin oxide film containing silicon keeps its amorphous state even after heat treatment at a relatively high temperature. Therefore, the surface roughness of the indium tin oxide film containing silicon is less likely to occur.
• the second electrode 15 will be described.
• indium tin oxide or indium tin oxide containing silicon is preferably used.
• the second electrode 15 is not limited to a single layer, and may be a stacked layer of different films. Note that indium tin oxide contains In, Sn, and O.
• the second electrode 15 preferably has a high light-transmitting property so that light reaches the photoelectric conversion layer 13.
• an imaging device with high resolution can be provided.
• the light-transmitting property is further important especially for an 8K imaging device because an area occupied by one pixel is extremely small and an area which can be used for receiving light is extremely small.
• the second electrode 15 can be formed over the photoelectric conversion layer 13 by a sputtering method, a plasma CVD method, or the like.
• FIG. 4 is a flow chart showing the method for manufacturing the photoelectric conversion element 10B.
• FIGS. 5 A to 5E are cross-sectional views illustrating the method for manufacturing the photoelectric conversion element 10B.
• Step S401 the first electrode 11 is formed over a layer 41 (FIG. 5A).
• a layer over which the first electrode 11 is formed is illustrated as the layer 41 for convenience.
• the layer 41 may be a substrate or a layer including a driver transistor formed in or over a substrate.
• Step S402 a base layer 43 and an amorphous selenium layer 45 over the base layer 43 are formed over the first electrode 11 (FIG. 5B).
• the base layer 43 contains one or more elements selected from the elements that can be used for the element X.
• the element X the above-described elements can be used.
• One or more of silver, bismuth, indium, indium oxide, tin, tin oxide, tellurium, In-Sn oxide (indium tin oxide or ITO), and In-Sn-Si oxide (ITSO) can be used for the base layer 43, for example.
• the base layer 43 may be a single layer or a stacked layer.
• the base layer 43 preferably has high wettability with respect to selenium.
• a selenium compound preferably has high wettability with respect to selenium. High wettability with respect to selenium can suppress aggregation, re-evaporation, or the like of selenium in crystallization of the selenium. Accordingly, generation of a film separation region in formation of crystalline selenium can be reduced.
• a material containing silver is preferably used for the base layer 43. Silver diffuses in selenium rapidly.
• a compound of selenium and silver (Ag 2 Se) has high wettability.
• a material containing bismuth is preferably used for the base layer 43.
• the thickness of the base layer 43 is preferably greater than or equal to 0.20 nm and less than or equal to 140 nm, further preferably greater than or equal to 0.60 nm and less than or equal to 100 nm, still further preferably greater than or equal to 1.0 nm and less than or equal to 60 nm. If the thickness is in the above range, a photoelectric conversion element that contains uniform crystalline selenium including few film separation regions can be formed. Moreover, an imaging device with less variation in characteristics can be manufactured with use of the crystalline selenium including few film separation regions. Furthermore, a photoelectric conversion element and an imaging device that have a small dark current can be manufactured.
• the base layer 43 can be formed by a sputtering method, an evaporation method, a pulse laser deposition (PLD) method, a plasma enhanced chemical vapor deposition (PECVD) method, a thermal chemical vapor deposition (CVD) method, an atomic layer deposition (ALD) method, a vacuum evaporation method, or the like.
• a sputtering method an evaporation method, a pulse laser deposition (PLD) method, a plasma enhanced chemical vapor deposition (PECVD) method, a thermal chemical vapor deposition (CVD) method, an atomic layer deposition (ALD) method, a vacuum evaporation method, or the like.
• a thermal CVD method a metal organic chemical vapor deposition (MOCVD) method can be given.
• FIG. 5B illustrates an example in which the shape of the base layer 43 is not processed
• the base layer 43 may have an island shape as illustrated in FIG. 6A.
• the base layer 43 may have a stripe shape, a net-like shape, a shape in which an opening is provided, or the like.
• the base layer 43 can be partly formed over the first electrode 11 using a metal mask.
• the base layer 43 formed over the first electrode 11 may be processed into a predetermined shape by dry etching or wet etching.
• the base layer 43 has an island shape, the amount of the element X contained in the base layer 43 to the amount of selenium contained in the selenium layer can be adjusted in some cases.
• the base layer 43 can be provided in a desired region.
• the amorphous selenium layer 45 can be formed by a sputtering method, an evaporation method, a pulsed laser deposition (PLD) method, a plasma-enhanced chemical vapor deposition (PECVD) method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like.
• a sputtering method an evaporation method
• PLD pulsed laser deposition
• PECVD plasma-enhanced chemical vapor deposition
• thermal CVD method an MOCVD method can be given.
• the substrate temperature in the formation of the amorphous selenium layer 45 is preferably a temperature at which the temperature of the layer 41 is higher than or equal to room temperature (20 °C) and lower than 50 °C. If the substrate temperature is in the above range, generation of a film separation region in the amorphous selenium layer 45 can be reduced. Note that the amorphous selenium layer 45 may be partly crystallized.
• the amorphous selenium layer 45 is preferably formed immediately after the formation of the base layer 43. Further preferably, the amorphous selenium layer 45 is formed after the formation of the base layer 43 without a surface of the base layer 43 being exposed to an air atmosphere. Still further preferably, the base layer 43 and the amorphous selenium layer 45 are successively formed in vacuum. When the base layer 43 and the amorphous selenium layer 45 are successively formed, attachment of impurities such as atmospheric components to the surface of the base layer 43 can be suppressed; therefore, the photoelectric conversion layer 13 including few impurities can be formed. Moreover, generation of a film separation region in the photoelectric conversion layer 13 can be reduced. Furthermore, the photoelectric conversion layer 13 with high crystallinity can be formed.
• the amorphous selenium layer can be formed in, for example, a multi-chamber sputtering apparatus equipped with a plurality of film formation chambers and provided with a plurality of targets, in which various kinds of films are successively formed in vacuum.
• a multi-chamber evaporation device provided with a plurality of evaporation sources, in which various kinds of films are successively formed in vacuum, can be used.
• a composite apparatus equipped with a sputtering chamber and an evaporation chamber, in which various kinds of films are successively formed in vacuum, can be used.
• Step S403 the photoelectric conversion layer 13 is formed by heat treatment (FIG. 5C).
• the heat treatment is preferably divided into first to third processes that are sequentially performed at different temperatures. It is preferable that the first process at a first temperature (Tl), the second process at a second temperature (T2), and the third process at a third temperature (T3) are performed in this order.
• the second temperature (T2) is preferably higher than the first temperature (Tl).
• the second temperature (T2) is preferably higher than or equal to 70 °C and lower than or equal to 170 °C, further preferably higher than or equal to 90 °C and lower than or equal to 160 °C, still further preferably higher than or equal to 100 °C and lower than or equal to 150 °C.
• the second temperature (T2) is preferably a temperature at which solid phase crystallization of amorphous selenium progresses using the selenium compound formed in the process performed at the first temperature (Tl) as a crystal nucleus.
• the third temperature (T3) is preferably higher than the second temperature (T2).
• the third temperature (T3) is preferably higher than or equal to 110 °C and lower than or equal to 220 °C, further preferably higher than or equal to 130 °C and lower than or equal to 220 °C, still further preferably higher than or equal to 150 °C and lower than or equal to 210 °C.
• the third temperature (T3) is preferably a temperature at which solid phase crystallization of the amorphous selenium progresses.
• FIGS. 7 A to 7D Schematic views of solid phase crystallization by which the crystalline selenium of one embodiment of the present invention is formed are illustrated in FIGS. 7 A to 7D.
• FIGS. 7 A to 7D are cross-sectional views illustrating the formation of a crystalline selenium layer by solid phase crystallization of an amorphous selenium layer.
• the element X is diffused from the base layer into an amorphous selenium layer 1001, whereby a selenium compound 1003 containing selenium and the element is formed (FIG. 7A).
• Heat treatment is performed at 110 °C as the second temperature (T2), for example, whereby a crystal grain 1005, which is selenium crystallized by solid phase crystallization using the selenium compound 1003 as a crystal nucleus, is formed (FIG. 7B). Since the second temperature (T2) is relatively low, the growth rate of the crystal grains is low, and the crystal grains 1005 grow at approximately the same growth rate. In the solid phase crystallization, the crystal grain grows until the crystal grain meets adjacent crystal grains. That is, the growth of the crystal grain terminates when the crystal grain meets adjacent crystal grain. In the case where the second temperature (T2) is low and the growth rate of the crystal grains is low, a large number of crystal grains 1005 can grow as illustrated in FIG. 7B before the crystal grains 1005 meet adjacent crystal grains.
• the crystal grain after the entire amorphous selenium layer is crystallized may have a polygonal shape as illustrated in FIG. 7D or a polygonal shape having round corners.
• FIGS. 8A to 8C schematic views of solid phase crystallization in the case where heat treatment at the second temperature (T2) is not performed but heat treatment at the first temperature (Tl) and heat treatment at the third temperature (T3) are performed in this order are illustrated in FIGS. 8A to 8C.
• the element X is diffused from the base layer into the amorphous selenium layer 1001, whereby the selenium compound 1003 containing selenium and the element is formed (FIG. 8A).
• Heat treatment is performed at 200 °C as the third temperature (T3), for example, whereby the crystal grain 1005, which is selenium crystallized by solid phase crystallization using the selenium compound 1003 as a crystal nucleus, is formed.
• the third temperature (T3) is relatively high and the growth rate of the crystal grains is sufficiently high, so that some crystal grains 1005a grow faster than the others (FIG. 8B).
• the entire amorphous selenium layer is crystallized, so that the crystalline selenium layer 1007 is formed (FIG. 8C).
• some crystal grains grow faster than the others; thus, the crystal grain size of such a fast-growing crystal grain increases. Consequently, the surface unevenness of the crystalline selenium layer 1007 increases.
• the large surface unevenness of the photoelectric conversion layer which may degrade the interface properties of a pn-junction surface, is not preferable.
• both large crystal grains and small crystal grains may be formed, whereby variation in the sizes of the crystal grains of the crystalline selenium layer 1007 may be increased as illustrated in FIG. 8C.
• FIG. 9 shows a thermal profile of the heat treatment of one embodiment of the present invention.
• the horizontal axis represents time (Time) and the vertical axis represents temperature (Temperature).
• a second period (P2) is a period in which the temperature is increased from the zeroth temperature (TO) to the first temperature (Tl).
• the length of the second period (P2) is not particularly limited.
• a third period (P3) is a period in which the first temperature (Tl) is kept.
• the length of the third period (P3) can be longer than or equal to 10 seconds and shorter than or equal to 60 minutes.
• a fourth period (P4) is a period in which the temperature is increased from the first temperature (Tl) to the second temperature (T2).
• the length of the fourth period (P4) is not particularly limited.
• a fifth period (P5) is a period in which the second temperature (T2) is kept.
• the length of the fifth period (P5) can be longer than or equal to 10 seconds and shorter than or equal to 60 minutes.
• a sixth period (P6) is a period in which the temperature is increased from the second temperature (T2) to the third temperature (T3).
• the length of the sixth period (P6) is not particularly limited.
• a seventh period (P7) is a period in which the third temperature (T3) is kept.
• the length of the seventh period (P7) can be longer than or equal to 10 seconds and shorter than or equal to 60 minutes.
• An electric furnace, a laser annealing apparatus, a lamp annealing apparatus, or the like can be used for the heat treatment.
• An apparatus for heating an object to be processed by heat conduction or heat radiation from a heater such as a resistance heater may be used.
• a hot plate may be used.
• a rapid thermal annealing (RTA) apparatus can be used.
• RTA apparatuses include a gas rapid thermal anneal (GRTA) apparatus and a lamp rapid thermal anneal (LRTA) apparatus.
• GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas.
• An inert gas which does not react by a heat treatment with an object to be processed such as nitrogen or a rare gas like argon
• An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
• a rare gas such as argon (Ar), an air atmosphere, nitrogen, oxygen, dry air, or the like can be used as an atmosphere of the heat treatment.
• a mixed atmosphere of a rare gas and oxygen and a mixed atmosphere of a rare gas and nitrogen can be used.
• FIG. 5C illustrates an example in which the base layer 43 is not clearly observed after the formation of the photoelectric conversion layer 13 and the photoelectric conversion layer 13 is formed over the first electrode 11, one embodiment of the present invention is not limited to this example.
• the photoelectric conversion layer 13 may be formed over a base layer 43a which is thinner than the initial base layer 43.
• the thickness of the base layer 43a may be the same as or larger than that of the initial base layer 43.
• the base layer 43 may be an island-shaped base layer 43b and the photoelectric conversion layer 13 may be formed over the first electrode 11 and the base layer 43b. Boundaries between the photoelectric conversion layer 13 and the base layer 43a and between the photoelectric conversion layer 13 and the base layer 43b are not necessarily clear.
• the base layers 43a and 43b may each contain selenium in addition to components of the base layer 43.
• the hole injection blocking layer 17 preferably has a stacked structure of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• the above-described material can be used for each of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17a are The first hole injection blocking layer 17a and the second hole injection blocking layer
• the flow rates of oxygen gas in the deposition gases can be different between the first hole injection blocking layer 17a and the second hole injection blocking layer 17b.
• the first hole injection blocking layer 17a is formed by a sputtering method
• a substrate temperature is increased by collision of sputtered particles in some cases.
• the selenium contained in the photoelectric conversion layer 13 may be evaporated.
• the deposition rate of the first hole injection blocking layer 17a can be increased with the above oxygen flow rate ratio. In other words, the time during which the surface of the photoelectric conversion layer 13 is exposed to sputtered particles in the formation of the first hole injection blocking layer 17a can be shortened; thus, evaporation of the selenium can be suppressed.
• the oxygen flow rate ratio is higher than 30 % and lower than or equal to 100 %, preferably higher than or equal to 35 % and lower than or equal to 100 %, further preferably higher than or equal to 40 % and lower than or equal to 70 %. With the above oxygen flow rate ratio, the second hole injection blocking layer 17b having few oxygen vacancies can be formed.
• the second hole injection blocking layer 17b having crystallinity may be formed.
• the second hole injection blocking layer 17b having crystallinity is not preferable because it increases the resistance of the second hole injection blocking layer 17b and decreases a photocurrent in some cases.
• the crystallinity of the second hole injection blocking layer 17b can be low and a photoelectric conversion element can have a large photocurrent.
• the substrate temperature at which the first hole injection blocking layer 17a and the second hole injection blocking layer 17b are formed is preferably higher than or equal to room temperature (20 °C) and lower than or equal to 60 °C, further preferably higher than or equal to room temperature and lower than or equal to 50 °C. If the substrate temperature is in the above range, evaporation of selenium contained in the photoelectric conversion layer 13 over which the hole injection blocking layer 17 is to be formed can be suppressed. In the case where the first hole injection blocking layer 17a and the second hole injection blocking layer 17b are formed with the same substrate temperature, the productivity can be increased.
• Ga 2 0 3 containing Sn0 2 at greater than or equal to 0.2 mol% and less than or equal to 15 mol% can be used as a sputtering target.
• Step S405 the second electrode 15 is formed over the hole injection blocking layer 17 (FIG. 5E).
• the photoelectric conversion element 10B of one embodiment of the present invention can be manufactured.
• Another heat treatment may be performed after the second electrode 15 is formed.
• the crystallinity of crystalline selenium contained in the photoelectric conversion layer 13 may be further increased. Note that this heat treatment is not necessarily performed.
• Step S401 the first electrode 11 is formed over the layer 41 (FIG. 5A).
• the description in Method 1 for manufacturing photoelectric conversion element described above can be referred to, and thus the detailed description is omitted.
• Step S402 the amorphous selenium layer 45 and the base layer 43 over the amorphous selenium layer 45 are formed over the first electrode 11 (FIG. 6D).
• the description in Method 1 for manufacturing photoelectric conversion element described above can be referred to, and thus the detailed description is omitted.
• Step S403 the photoelectric conversion layer 13 is formed by heat treatment (FIG. 5C).
• the description in Method 1 for manufacturing photoelectric conversion element described above can be referred to, and thus the detailed description is omitted.
• Step S405 the second electrode 15 is formed over the hole injection blocking layer 17 (FIG. 5E).
• the photoelectric conversion element 10B of one embodiment of the present invention can be manufactured.
• Another heat treatment may be performed after the second electrode 15 is formed.
• the crystallinity of the crystalline selenium contained in the photoelectric conversion layer 13 may be further increased. Note that this heat treatment is not necessarily performed.
• FIG. 10A illustrates a pixel circuit of the imaging device.
• the pixel circuit includes a photoelectric conversion element 50, a transistor 51, a transistor 52, a transistor 53, and a transistor 54.
• any one of the photoelectric conversion elements lOA to IOC described in Embodiment 1 can be used.
• One electrode (anode) of the photoelectric conversion element 50 is electrically connected to one of a source and a drain of the transistor 51 and one of a source and a drain of the transistor 52.
• the other of the source and the drain of the transistor 51 is electrically connected to a gate of the transistor 53.
• One of a source and a drain of the transistor 53 is electrically connected to one of a source and a drain of the transistor 54. Note that a capacitor electrically connected to the gate of the transistor 53 may be provided.
• the other electrode (cathode) of the photoelectric conversion element 50 is electrically connected to a wiring 72.
• a gate of the transistor 51 is electrically connected to a wiring 75.
• the other of the source and the drain of the transistor 53 is electrically connected to a wiring 79.
• a gate of the transistor 52 is electrically connected to a wiring 76.
• the other of the source and the drain of the transistor 52 is electrically connected to a wiring 73.
• the other of the source and the drain of the transistor 54 is electrically connected to a wiring 71.
• a gate of the transistor 54 is electrically connected to a wiring 78.
• the wiring 72 is electrically connected to one terminal of a power source 56.
• the other terminal of the power source 56 is electrically connected to a wiring 77.
• the wiring 71 can function as an output line that outputs a signal from a pixel.
• the wiring 73, the wiring 77, and the wiring 79 can function as power supply lines.
• the wiring 73 and the wiring 77 can function as low potential power supply lines
• the wiring 79 can function as a high potential power supply line.
• the wiring 75, the wiring 76, and the wiring 78 can function as signal lines that control the on/off states of the transistors.
• the photoelectric conversion element 50 To increase light detection sensitivity under a low illuminance condition, it is preferable to use a photoelectric conversion element that causes avalanche multiplication effect as the photoelectric conversion element 50. To cause avalanche multiplication effect, comparatively high potential HVDD is needed. Thus, the power source 56 is capable of supplying the potential HVDD, and the potential HVDD is supplied to the other electrode of the photoelectric conversion element 50 through the wiring 72. Note that the photoelectric conversion element 50 is available even when a potential that does not cause avalanche multiplication effect is applied thereto.
• the transistor 51 can have a function of transferring the potential of a charge accumulation portion (NR) that changes in response to output of the photoelectric conversion element 50 to a charge detection portion (ND).
• the transistor 52 can have a function of initializing the potentials of the charge accumulation portion (NR) and the charge detection portion (ND).
• the transistor 53 can have a function of outputting a signal based on the potential of the charge detection portion (ND).
• the transistor 54 can have a function of selecting a pixel from which a signal is read.
• a transistor to be connected to the photoelectric conversion element 50 needs to withstand the high voltage.
• the high withstand voltage transistor for example, an OS transistor can be used.
• OS transistors are preferably used as the transistors 51 and 52.
• the transistors 51 and 52 are desired to have excellent switching characteristics
• the transistor 53 is desired to have excellent amplifying characteristics; thus, a transistor with high on-state current is preferably used. Therefore, a transistor including silicon in an active layer or an active region (hereinafter referred to as a Si transistor) is preferably used as each of the transistors 53 and 54.
• the transistors 51 to 54 have the above structures, it is possible to manufacture an imaging device that has high light detection sensitivity under a low illuminance condition and can output a signal with little noise. Since the imaging device has high light detection sensitivity, light capturing time can be shortened and imaging can be performed at high speed.
• the structure is not limited to the structure described above, and the transistors 53 and 54 may be OS transistors. Alternatively, the transistors 51 and 52 may be Si transistors. In either case, the pixel circuit can perform imaging.
• HVDD and GND are supplied to the wiring 76 connected to the gate of the transistor 52 as an "H” potential and an “L” potential, respectively.
• VDD and GND are supplied to the wiring 75 connected to the gate of the transistor 51 and the wiring 78 connected to the gate of the transistor 54 as an "H” potential and an “L” potential, respectively.
• a potential VDD is supplied to the wiring 79 connected to the source of the transistor 53. Other potentials also can be supplied to the wirings.
• the wiring 76 is set at "H” and the wiring 75 is set at “H,” and the potentials of the charge accumulation portion (NR) and the charge detection portion (ND) are each set to a reset potential (GND) (that is, reset operation). Note that in reset operation, the potential VDD may be supplied to the wiring 76 as an "H" potential.
• the wiring 76 is set at "L” and the wiring 75 is set at “L,” whereby the potential of the charge accumulation portion (NR) changes (that is, accumulation operation).
• the potential of the charge accumulation portion (NR) is changed from GND to HVDD at the maximum depending on the intensity of light that enters the photoelectric conversion element 50.
• the wiring 76 is set at “L” and the wiring 75 is set at “L,” whereby the transfer operation terminates. At this time, the potential of the charge detection portion (ND) is determined.
• the wiring 76 is set at "L”
• the wiring 75 is set at “L”
• the wiring 78 is set at "H”
• a signal based on the potential of the charge detection portion (ND) is output to the wiring 71.
• an output signal based on the intensity of light that enters the photoelectric conversion element 50 in the accumulation operation can be obtained.
• FIG. 11A illustrates a structure example of a pixel of an imaging device including the above-described pixel circuit.
• the imaging device includes a layer 61, a layer 62, and a layer 63, which partly overlap with each other.
• a low-resistance metal layer or the like is preferably used for the electrode 65.
• aluminum, titanium, tungsten, tantalum, silver, or a stacked layer thereof can be used.
• a conductive layer having a high light-transmitting property with respect to visible light is preferably used for the electrode 67.
• indium oxide, tin oxide, zinc oxide, indium tin oxide, gallium zinc oxide, indium gallium zinc oxide, graphene, or the like can be used. Note that the electrode 67 can be omitted.
• a pn-junction photodiode including a selenium-based material in a photoelectric conversion layer can be used for the photoelectric conversion portion 66.
• the selenium-based material described in Embodiment 1 is preferably used for a photoelectric conversion layer 66a, and the material with a wide band gap described in Embodiment 1 is preferably used for a hole injection blocking layer 66b.
• a photoelectric conversion element including a selenium-based material has high external quantum efficiency with respect to visible light.
• Such a photoelectric conversion element can be a sensor in which the amount of amplification of electrons with respect to the amount of incident light is large because of avalanche multiplication effect, that is, a sensor with high photosensitivity.
• a selenium-based material has a high light-absorption coefficient, and thus enables, for example, formation of a thin photoelectric conversion layer; accordingly, the use of a selenium-based material has advantages in production.
• a thin film of a selenium-based material can be formed using a vacuum evaporation method, a sputtering method, or the like.
• crystalline selenium such as single crystal selenium or polycrystalline selenium, amorphous selenium, a compound of copper, indium, and selenium (CIS), a compound of copper, indium, gallium, and selenium (CIGS), or the like can be used.
• CIS copper, indium, and selenium
• CGS copper, indium, gallium, and selenium
• the layer 62 can include, for example, OS transistors (the transistors 51 and 52).
• OS transistors the transistors 51 and 52.
• ND charge detection portion
• a period during which charge can be held in the charge detection portion (ND) and the charge accumulation portion (NR) can be extremely long owing to the low off-state current of the transistors 51 and 52. Therefore, a global shutter system in which accumulation operation is performed in all the pixels at the same time can be used without a complicated circuit structure and operation method.
• FIG. 1 IB is a block diagram illustrating a circuit configuration of an imaging device of one embodiment of the present invention.
• the imaging device includes a pixel array 81 including pixels 80 arranged in a matrix, a circuit 82 (row driver) having a function of selecting a row of the pixel array 81, a circuit 83 (CDS circuit) for performing correlated double sampling on an output signal of the pixel 80, a circuit 84 (A/D converter circuit or the like) having a function of converting analog data output from the circuit 83 to digital data, and a circuit 85 (column driver) having a function of selecting and reading data converted in the circuit 84.
• a structure without the circuit 83 can be employed.
• components of the pixel array 81 except the photoelectric conversion element can be provided in the layer 62 illustrated in FIG. 11 A.
• the circuits 82 to 85 can be provided in the layer 63. Those circuits can be formed of CMOS circuits using silicon transistors.
• transistors suitable for respective circuits can be used, and an area of the imaging device can be made small.
• FIGS. 12A to 12C illustrate a specific structure of the imaging device illustrated in FIG.
• FIG. 12A is a cross-sectional view in the channel length direction of the transistors 51, 52, 53, and 54.
• FIG. 12B is a cross-sectional view in the channel width direction of the transistor 52 taken along dashed-dotted line A1-A2 in FIG. 12A.
• FIG. 12C is a cross-sectional view in the channel width direction of the transistor 53 taken along dashed-dotted line B1-B2 in FIG.
• the transistors 53 and 54 which are Si transistors, are provided in the layer 63.
• FIG. 12A illustrates an example in which the Si transistor is a fin transistor including a semiconductor layer in a silicon substrate 200
• a planar transistor including an active region in a silicon substrate 201 may be used as illustrated in FIG. 13B.
• FIG. 13B illustrates an example in which the Si transistor is a fin transistor including a semiconductor layer in a silicon substrate 200
• transistors each including a semiconductor layer 210 of a silicon thin film may be used.
• the semiconductor layer 210 can be SOI (silicon on insulator); specifically, the semiconductor layer 210 can be single crystal silicon formed over an insulating layer 220 over a silicon substrate 202, for example. Alternatively, the semiconductor layer 210 may be polycrystalline silicon formed over an insulating surface of a glass substrate or the like. In addition, a circuit for driving a pixel can be provided in the layer 63.
• SOI silicon on insulator
• the semiconductor layer 210 can be single crystal silicon formed over an insulating layer 220 over a silicon substrate 202, for example.
• the semiconductor layer 210 may be polycrystalline silicon formed over an insulating surface of a glass substrate or the like.
• a circuit for driving a pixel can be provided in the layer 63.
• An insulating layer 93 that has a function of inhibiting diffusion of hydrogen is provided between a region including OS transistors and a region including Si transistors. Dangling bonds of silicon are terminated with hydrogen in insulating layers provided in the vicinities of the active regions of the transistors 53 and 54. Meanwhile, hydrogen in insulating layers which are provided in the vicinity of the oxide semiconductor layer that is the active layer of the transistors 51 and 52 causes generation of carriers in the oxide semiconductor layer.
• Hydrogen is confined in the one layer by the insulating layer 93, so that the reliability of the transistors 53 and 54 can be improved. Furthermore, diffusion of hydrogen from the one layer to the other layer is inhibited, so that the reliability of the transistors 51 and 52 can also be improved.
• the insulating layer 93 can be, for example, formed using aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, or yttria-stabilized zirconia (YSZ).
• FIG. 14A is a cross-sectional view illustrating an example in which a color filter and the like are added to the imaging device of one embodiment of the present invention.
• the cross-sectional view illustrates part of a region including pixel circuits for three pixels.
• An insulating layer 300 is formed over the layer 61 where the photoelectric conversion element 50 is formed.
• a silicon oxide film with a high visible-light transmitting property can be used.
• a silicon nitride film may be stacked as a passivation film.
• a dielectric film of hafnium oxide or the like may be stacked as an anti -reflection film.
• a light-blocking layer 310 may be formed over the insulating layer 300.
• the light-blocking layer 310 has a function of inhibiting color mixing of light passing through the upper color filter.
• the light-blocking layer 310 can be formed using a metal layer of aluminum, tungsten, or the like, or a stack including the metal layer and a dielectric film functioning as an anti -reflection film.
• an insulating layer 360 having a light-transmitting property with respect to visible light can be provided over the color filter 330.
• an infrared imaging device when a filter that blocks light having a wavelength shorter than or equal to that of visible light is used as the optical conversion layer 350, an infrared imaging device can be obtained.
• a far infrared imaging device When a filter that blocks light having a wavelength shorter than or equal to that of near infrared light is used as the optical conversion layer 350, a far infrared imaging device can be obtained.
• an ultraviolet imaging device When a filter that blocks light having a wavelength longer than or equal to that of visible light is used as the optical conversion layer 350, an ultraviolet imaging device can be obtained.
• a scintillator contains a substance that, when irradiated with radiation such as X-rays or gamma-rays, absorbs energy of the radiation to emit visible light or ultraviolet light.
• a resin or ceramics in which any of Gd 2 0 2 S:Tb, Gd 2 0 2 S:Pr, Gd 2 0 2 S:Eu, BaFCkEu, Nal, Csl, CaF 2 , BaF 2 , CeF 3 , LiF, Lil, and ZnO is dispersed can be used.
• the scintillator is not necessarily used.
• a microlens array 340 may be provided over the color filters 330a, 330b, and 330c. Light penetrating lenses included in the microlens array 340 goes through the color filters positioned thereunder to reach the photoelectric conversion element 50.
• the microlens array 340 may be provided over the optical conversion layer 350 illustrated in
• FIG. 14B is a diagrammatic representation of FIG. 14B.
• FIG. 15A1 is an external perspective view showing the top surface side of a package including an image sensor chip.
• the package includes a package substrate 410 to which an image sensor chip 450 is fixed, a cover glass 420, an adhesive 430 for bonding the package substrate 410 and the cover glass 420 to each other, and the like.
• FIG. 15A2 is an external perspective view showing the bottom surface side of the package.
• a ball grid array BGA including solder balls as bumps 440 is formed.
• BGA ball grid array
• LGA land grid array
• PGA pin grid array
• FIG. 15 A3 is a perspective view of the package, in which the cover glass 420 and the adhesive 430 are partly illustrated. Electrode pads 460 are formed over the package substrate 410, and electrically connected to the bumps 440 through through-holes. The electrode pads 460 are electrically connected to the image sensor chip 450 through wires 470.
• FIG. 15B1 is an external perspective view showing the top surface side of a camera module in which an image sensor chip is mounted on a package with a built-in lens.
• the camera module includes a package substrate 411 to which an image sensor chip 451 is fixed, a lens cover 421, a lens 435, and the like. Furthermore, an IC chip 490 having functions of a driver circuit, a signal conversion circuit, and the like of an imaging device is provided between the package substrate 411 and the image sensor chip 451. Thus, a system in package (SiP) is formed.
• SiP system in package
• FIG. 15B2 is an external perspective view showing the bottom surface side of the camera module.
• mounting lands 441 are provided on the bottom surface and side surfaces of the package substrate 411; this structure can be called a quad flat no-lead package (QFN).
• QFN quad flat no-lead package
• QFP quad flat package
• the above BGA or the like may be alternatively employed.
• FIG. 15B3 is a perspective view of the module, in which the lens cover 421 and the lens 435 are partly illustrated.
• the lands 441 are electrically connected to electrode pads 461.
• the electrode pads 461 are electrically connected to the image sensor chip 451 or the IC chip 490 through wires 471.
• the image sensor chip placed in the package having the above structure can be easily mounted on a printed circuit board or the like and incorporated into a variety of semiconductor devices and electronic devices.
• Examples of an electronic device that can use the imaging device of one embodiment of the present invention include display devices, personal computers, image memory devices or image reproducing devices provided with storage media, mobile phones, game machines (including portable game machines), portable data terminals, e-book readers, cameras such as video cameras and digital still cameras, goggle-type displays (head mounted displays), navigation systems, audio reproducing devices (e.g., car audio players and digital audio players), copiers, facsimiles, printers, multifunction printers, automated teller machines (ATM), and vending machines.
• FIGS. 16A to 16F illustrate specific examples of these electronic devices.
• FIG. 16A illustrates a monitoring camera, which includes a housing 951, a lens 952, a support portion 953, and the like.
• the imaging device of one embodiment of the present invention can be included as a component for obtaining an image in the monitoring camera.
• a "monitoring camera” is a common name and does not limit the uses.
• a device that has a function of a monitoring camera can also be called a camera or a video camera.
• FIG. 16B illustrates a video camera, which includes a first housing 971, a second housing 972, a display portion 973, operation keys 974, a lens 975, a joint 976, and the like.
• the operation keys 974 and the lens 975 are provided for the first housing 971, and the display portion 973 is provided for the second housing 972.
• the imaging device of one embodiment of the present invention can be included as a component for obtaining an image in the video camera.
• FIG. 16C illustrates a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, a light-emitting portion 967, a lens 965, and the like.
• the imaging device of one embodiment of the present invention can be included as a component for obtaining an image in the digital camera.
• FIG. 16D illustrates a wrist- watch-type information terminal, which includes a housing 931, a display portion 932, a wristband 933, operation buttons 935, a winder 936, a camera 939, and the like.
• the display portion 932 may be a touch panel.
• the imaging device of one embodiment of the present invention can be included as a component for obtaining an image in the information terminal.
• FIG. 16E shows an example of a mobile phone which includes a housing 981, a display portion 982, an operation button 983, an external connection port 984, a speaker 985, a microphone 986, a camera 987, and the like.
• the mobile phone includes a touch sensor in the display portion 982. Operations such as making a call and inputting a character can be performed by touch on the display portion 982 with a finger, a stylus, or the like.
• the imaging device of one embodiment of the present invention can be included as one component for obtaining an image in the mobile phone.
• FIG. 16F illustrates a portable data terminal, which includes a housing 911, a display portion 912, a camera 919, and the like.
• a touch panel function of the display portion 912 enables input and output of information.
• the imaging device of one embodiment of the present invention can be included as one component for obtaining an image in the portable data terminal.
• crystalline selenium of one embodiment of the present invention was fabricated and the crystal grain size of a crystal grain and unevenness of a crystal selenium layer were evaluated.
• FIGS. 17A and 17B are cross-sectional views illustrating the fabrication method of the sample.
• a base layer 1063 and an amorphous selenium layer 1067 over the base layer 1063 were formed over a substrate 1061 (see FIG. 17A).
• a 2-nm-thick silver film was formed as the base layer 1063, and then the 700-nm-thick amorphous selenium layer 1067 was formed.
• the base layer 1063 and the amorphous selenium layer 1067 were formed successively in vacuum.
• the base layer 1063 of each of Samples Al to A6 was formed in an evaporation chamber of an evaporation/sputtering composite apparatus (VD15-065, manufactured by Shinko Seiki Co., Ltd.).
• the base layer was formed using silver as an evaporation source and resistive heating (a Ta board) at an evaporation rate of 0.05 nm/sec.
• the substrate temperature during the evaporation was room temperature.
• the pressure during the evaporation was about 1.5 x 10 "5 Pa.
• the amorphous selenium layer 1067 of each of Samples Al to A6 was formed in an evaporation chamber of an evaporation/sputtering composite apparatus (VD15-065, manufactured by Shinko Seiki Co., Ltd.).
• the amorphous selenium layer 1067 was formed using selenium as an evaporation source and resistive heating (a Ta board) at an evaporation rate of 0.20 nm/sec.
• the substrate temperature during the evaporation was room temperature.
• the pressure during the evaporation was about 1.5 x 10 ⁇ 5 Pa.
• the heat treatment on Sample A2 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 110 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample A3 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, and then raised to 150 °C and kept for 1 minute.
• the heat treatment on Sample A4 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 150 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample A5 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample A6 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 110 °C and kept for 1 minute, raised to 150 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• FIGS. 18A and 18B are plane SEM images of Sample Al
• FIGS. 19A and 19B are those of Sample A2
• FIGS. 20A and 20B are those of Sample A3
• FIGS. 21A and 21B are those of Sample A4
• FIGS. 22A and 22B are those of Sample A5
• FIGS. 23A and 23B are those of Sample A6.
• FIG. 18A, FIG. 19A, FIG. 20A, FIG. 21A, FIG. 22A, and FIG. 23A are SEM images at a magnification of 10000 times.
• FIG. 18B, FIG. 19B, FIG. 20B, FIG. 2 IB, FIG. 22B, and FIG. 23B are SEM images at a magnification of 30000 times.
• Samples Al to A6 of one embodiment of the present invention As shown in FIGS. 18A and 18B, FIGS. 19A and 19B, FIGS. 20A and 20B, FIGS. 21A and 21B, FIGS. 22A and 22B, and FIGS. 23A and 23B, no film separation region was observed in Samples Al to A6 of one embodiment of the present invention. It was found that Samples Al to A6 containing crystalline selenium having few film separation regions can be fabricated by using silver for the base layer 1063 and performing heat treatment after the formation of the amorphous selenium layer 1067 over the base layer 1063. In addition, the crystal grain of each sample had a substantially polygonal shape.
• the crystalline selenium layer of Sample A5 had the largest surface unevenness.
• the crystal grain sizes (major diameters) were calculated.
• the crystal grain sizes (major diameters) were calculated using SEM images at a magnification of 30000 times shown in FIG. 19B, FIG. 21B, FIG. 22B, and FIG. 23B.
• FIG. 24 A shows portions where the crystal grain sizes (major diameters) of Sample A2 were measured.
• FIG. 24A shows the same image as the SEM image at a magnification of 30000 times shown in FIG. 18B, and crystal grain sizes (major diameters) of the portions denoted by arrows were measured.
• the length of the longest line connecting two points on an outline of a crystal grain 1009 was calculated as a crystal grain size 1011.
• the crystal grain 1009 has a polygonal shape as illustrated in FIG. 24D
• the length of the longest diagonal line is measured as the crystal grain size 1011. Note that in the case of a triangular crystal grain, the length of the longest side of a triangle was regarded as the crystal grain size.
• Table 1 shows the number n of measured crystal grains and the calculated maximum, minimum, average, and median values of the crystal grain sizes (major diameters) of the crystal grains of Samples A2, A4, A5, and A6.
• FIG. 25 A, FIG. 25B, FIG. 26A, and FIG. 26B show a histogram of the crystal grain sizes (major diameters) of the crystal grains of Sample A2, that of Sample A4, that of Sample A5, and that of Sample A6, respectively.
• the horizontal axis represents a crystal grain size (major diameter) [ ⁇ ].
• a bar labeled "0.1 ⁇ ” represents the number of crystal grains having a crystal grain size (major diameter) of greater than or equal to 0.00 ⁇ and less than or equal to 0.10 ⁇
• a bar labeled "0.2 ⁇ ” represents the number of crystal grains having a crystal grain size (major diameter) of greater than 0.10 ⁇ and less than or equal to 0.20 ⁇ .
• the left vertical axis represents a frequency of the crystal grains [number]
• the right vertical axis represents a cumulative relative frequency of the crystal grains [%].
• Samples A2, A4, and A6 a crystal grain having a crystal grain size (major diameter) of greater than 1.0 ⁇ was not observed and the maximum value of the crystal grain size (major diameter) was less than or equal to 1.10 ⁇ .
• Sample A5 a plurality of crystal grains having a crystal grain size (major diameter) of greater than 1.0 ⁇ were observed and the maximum value of the crystal grain size (major diameter) was 1.20 ⁇ .
• the crystal grain size (major diameter) of Sample A5 was larger than that of the crystal grain of each of Samples A2, A4, and A6.
• Sample A5 also contained many small-sized crystal grains as compared to Samples A2, A4, and A6. That is, variation in the crystal grain sizes of the crystal grains was large in Sample A5.
• the crystal grain size (major diameter) of Sample A4 was larger than that of each of
• the sample having the crystalline selenium layer having large surface unevenness tended to have a crystal grain having a large crystal grain size (major diameter)
• the sample having the crystalline selenium layer having small surface unevenness tended to have a small crystal grain size (major diameter). That is, when the second temperature (T2) was approximately 110 °C with the first temperature (Tl) being 70 °C and the third temperature (T3) being 200 °C, the crystal grain size (major diameter) was less than or equal to 1.10 ⁇ . Accordingly, the surface unevenness of the crystalline selenium layer was decreased.
• the low second temperature T2 may have contributed to growth of many crystal grains in solid phase crystallization and reduction in size of crystal grains, which may have been responsible for a decrease in unevenness of the crystal selenium layer.
• the photoelectric conversion element of one embodiment of the present invention was fabricated and the current-voltage characteristics thereof were evaluated.
• Samples were five in total: Samples Bl to B5 of one embodiment of the present invention. Samples Bl to B5 were different from each other in conditions of heat treatment after formation of an amorphous selenium layer.
• the first electrode 11 was formed over the layer 41 (see FIG. 5 A).
• a 50-nm-thick first titanium film, a 200-nm-thick aluminum film, and a 50-nm-thick second titanium film were formed in this order with a sputtering apparatus.
• a glass substrate (AN100, manufactured by Asahi Glass Co., Ltd.) was used.
• the first titanium film was formed by a sputtering method using a titanium target. Argon was used as a deposition gas and the pressure in deposition was adjusted to 0.1 Pa. The deposition power was set to 12 kW with use of a DC power source. The substrate temperature in deposition was room temperature.
• the aluminum film was formed by a sputtering method using an aluminum target. Argon was used as a deposition gas and the pressure in deposition was adjusted to 0.4 Pa. The deposition power was set to 1 kW with use of a DC power source. The substrate temperature in deposition was room temperature.
• the second titanium film was formed by a sputtering method using a titanium target. Argon was used as a deposition gas and the pressure in deposition was adjusted to 0.1 Pa. The deposition power was set to 12 kW with use of a DC power source. The substrate temperature in deposition was room temperature.
• the base layer 43 and the amorphous selenium layer 45 were formed in this order (see FIG. 5B).
• Example 1 The description in Example 1 can be referred to for the description of a method for forming the base layer 43 and the amorphous selenium layer 45; thus, the detailed description is omitted.
• the heat treatment on Sample Bl was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample B2 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 90 °C and kept for 2 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample B3 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 110 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample B4 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 120 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment on Sample B5 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 150 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• Samples B l to B5 were performed in a draft chamber using the hot plate (EC-1200N, manufactured by AS ONE Corporation) in an air atmosphere.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b were formed in this order with a sputtering apparatus (see FIG. 5D).
• a 5-nm-thick first tin-containing gallium oxide film and a 10-nm -thick second tin-containing gallium oxide film were formed for the first hole injection blocking layer 17a and the second hole injection blocking layer 17b, respectively.
• Argon at a flow rate of 45 seem and oxygen at a flow rate of 5 seem (an oxygen flow rate ratio of 10 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• Argon at a flow rate of 25 seem and oxygen at a flow rate of 25 seem (an oxygen flow rate ratio of 50 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• the first tin-containing gallium oxide film and the second tin-containing gallium oxide film were formed successively in vacuum.
• the second electrode 15 was formed.
• a 110-nm-thick ITSO film was formed with a sputtering apparatus (see FIG. 5E).
• Argon at a flow rate of 50 seem and oxygen at a flow rate of 2 seem were used as deposition gases and the pressure in deposition was adjusted to 0.32 Pa.
• the deposition power was set to 200 W with use of a DC power source.
• the substrate temperature in deposition was room temperature.
• FIG. 27A, FIG. 27B, FIG. 28A, FIG. 28B, and FIG. 29 show the current-voltage characteristics of Sample B l, those of Sample B2, those of Sample B3, those of Sample B4, and those of Sample B5, respectively.
• the horizontal axis represents voltage (Voltage) [V] between electrodes facing each other, and the vertical axis represents a current value (Current) [A].
• a dark current (I ⁇ k ) is shown by a solid line
• a photocurrent (/photo) measured while the sample was irradiated with light with a wavelength of 450 nm and an intensity of 20 ⁇ /cm 2 is shown by a dashed line.
• the size of a light-receiving surface of each sample was 2mm x 2mm.
• Samples B l and B5 each tended to have a high dark current.
• the surface unevenness of the photoelectric conversion layer of each of Samples B l and B5 are supposed to have been larger than that of Samples B2 to B4 (see Example 1). Such large unevenness might have degraded interface properties between the photoelectric conversion layer and the hole injection blocking layer, leading to an increase in a dark current.
• Sample B3 tended to have a higher photocurrent than Samples B l, B2, B4, and B5.
• FIG. 30 shows the wavelength dependence of current amplification factors of Samples B l to B5.
• the horizontal axis represents the irradiation light wavelength ⁇ [nm]
• the vertical axis represents the current amplification factor
• a photocurrent used for calculation of the current amplification factor was measured while the sample was irradiated with light with an intensity of 20 and a voltage of -15 V (reverse bias: VR) was applied between electrodes of the sample.
• a dark current used for calculation of the current amplification factor was measured while a voltage of -15 V (reverse bias: VR) was applied between the electrodes of the sample.
• Sample B3 tended to have a large current amplification factor.
• the heat treatment condition used for Sample B3 was a condition under which the crystalline selenium with a small crystal grain size (major diameter) contained in the photoelectric conversion layer 13 and the photoelectric conversion layer 13 with small unevenness are obtained.
• the small surface unevenness of the photoelectric conversion layer 13 probably improved the interface properties between the photoelectric conversion layer and the hole injection blocking layer, so that a photoelectric conversion element having a high current amplification factor was obtained.
• Sample B3 was thinned by a focused ion beam (FIB), and a cross section of
• Sample B3 was observed with a STEM.
• the FIB processing was performed at an acceleration voltage of 30 kV using gallium (Ga) as an irradiation ion with an FIB-SEM double beam apparatus (XVision210DB, manufactured by SII Nano Technology Inc.).
• the STEM observation was performed at an acceleration voltage of 200 kV using a scanning transmission electron microscope (HD-2700, manufactured by Hitachi High-Technologies Corporation).
• FIGS. 31 A and 3 IB are STEM images of a cross section of Sample B3.
• FIG. 31 A is a transmission electron image (TE image) at a magnification of 100000 times.
• FIG. 3 IB is a Z contrast image (ZC image) of the same portion as FIG. 31A at a magnification of 100000 times. A substance having a larger atomic number is seen brighter in a Z contrast image.
• the concentration (luminance) inside the selenium layer in the STEM images is substantially uniform; thus, the film quality of the inside of the selenium layer of Sample B3 was substantially uniform.
• the surface unevenness of the selenium layer was small, so that the ITSO film, which was the second electrode, was formed with good coverage.
• the thickness of the selenium layer was measured using the cross-sectional STEM image shown in FIG. 31 A.
• FIG. 32 shows a point A and a point B, which were measured portions.
• the point A and the point B were respectively the thinnest portion and the thickest portion of the selenium layer shown in the cross-sectional STEM image shown in FIG. 32.
• FIG. 31A and FIG. 32 show the same STEM image.
• the thickness of the point A was 592 nm and the thickness of the point B was 661 nm.
• the height difference between the projection and the depression (the highest portion and the lowest portion) of the selenium layer was approximately 70 nm.
• FIGS. 33A and 33B and FIGS. 34A and 34B are transmission electron images (TE images) at a magnification of 3000000 times.
• FIG. 33A is a cross-sectional STEM image showing the selenium layer in the vicinity of the second electrode.
• FIG. 33B is a cross-sectional STEM image showing the selenium layer around the center in the thickness direction.
• FIG. 34A is a cross-sectional STEM image showing a first electrode side of the point B.
• FIG. 34B is a cross-sectional STEM image showing the selenium layer in the vicinity of the first electrode.
• Sample B3 contained crystalline selenium because crystal lattice patterns were observed.
• Samples CI, C2, and B3 will be described in this example.
• Sample B3 in this example is the same as that in Example 2.
• Samples CI, C2, and B3 were different from each other in the structures of a photoelectric conversion layer and a hole injection blocking layer.
• Crystalline selenium and indium gallium oxide were respectively used for the photoelectric conversion layer 13 and the hole injection blocking layer 17 of Sample CI .
• a stacked structure in which a 60-nm-thick crystalline selenium layer and a 440-nm-thick amorphous selenium layer are stacked in this order was used for the photoelectric conversion layer 13 of Sample C2, and indium gallium oxide was used for the hole injection blocking layer 17 of Sample C2.
• crystal selenium was used for the photoelectric conversion layer 13 of Sample B3 and tin-containing gallium oxide was used for the hole injection blocking layer 17 of Sample B3.
• Sample CI The structure and the fabrication method of Sample CI will be described using reference numerals used for the photoelectric conversion element 10B illustrated in FIGS. 5A to 5E.
• the first electrode 11 was formed over the layer 41 (see FIG. 5A).
• the glass substrate AN100, manufactured by Asahi Glass Co., Ltd.
• a 50-nm-thick first titanium film, a 200-nm-thick aluminum film, and a 50-nm-thick second titanium film were formed in this order with a sputtering apparatus.
• the description in Example 2 can be referred to for the description of the first electrode 11; thus, the detailed description is omitted.
• Example 1 a 2-nm-thick silver film was formed as the base layer 43, and then the 500-nm-thick amorphous selenium layer 45 was formed.
• the description in Example 1 can be referred to for the description of the base layer 43 and the amorphous selenium layer 45; thus, the detailed description is omitted.
• the heat treatment on Sample CI was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 110 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute. The heat treatment was performed in a draft chamber using the hot plate (EC-1200N, manufactured by As One Corporation) in an air atmosphere.
• the hole injection blocking layer 17 was formed with a sputtering apparatus (see FIG. 5D). A 10-nm -thick indium gallium oxide film was formed as the hole injection blocking layer 17 of Sample CI .
• Argon at a flow rate of 45 seem and oxygen at a flow rate of 5 seem were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• the second electrode 15 was formed.
• a 110-nm-thick ITSO film was formed with a sputtering apparatus (see FIG. 5E).
• the description in Example 2 can be referred to for the description of the second electrode 15; thus, the detailed description is omitted.
• Sample C2 is different from Sample CI described above in the structure of the photoelectric conversion layer 13. The other steps were the same as the steps for Sample CI .
• Example 1 For Sample C2, a 10-nm -thick first amorphous selenium layer, a 2-nm-thick silver film, and a 50-nm-thick second amorphous selenium layer were formed in this order.
• the description in Example 1 can be referred to for the description of the silver film and the amorphous selenium layer; thus, the detailed description is omitted.
• the heat treatment on Sample C2 was started at room temperature. The treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, and then raised to 110 °C and kept for 10 seconds. The heat treatment was performed in a draft chamber using the hot plate (EC-1200N, manufactured by As One Corporation) in an air atmosphere.
• Example 2 The description in Example 2 can be referred to for the description of the amorphous selenium layer; thus, the detailed description is omitted.
• 35 A and 35B show the current-voltage characteristics of Sample CI and those of Sample C2, respectively.
• the horizontal axis represents voltage (Voltage) [V] between electrodes facing each other, and the vertical axis represents a current value (Current) [A].
• a dark current (/dark) is shown by a solid line
• a photocurrent (/photo) measured while the sample was irradiated with light with a wavelength of 450 nm and an intensity of 20 is shown by a dashed line.
• the size of a light-receiving surface of each sample was 2mm x 2mm.
• Samples B3 and CI each contained crystalline selenium in the photoelectric conversion layer.
• Sample B3 in which tin-containing gallium oxide was used for the hole injection blocking layer had a higher photocurrent than Sample CI in which indium gallium oxide was used for the hole injection blocking layer when voltage applied between electrodes was -10 V to -20 V.
• Sample B3 had a high photocurrent probably because the width of a depletion layer was increased by tin-containing gallium oxide with high carrier density that was used for the hole injection blocking layer.
• Sample C2 tended to have a lower dark current than Samples B3 and CI .
• Samples B3 and CI each contained crystalline selenium in the photoelectric conversion layer.
• the photoelectric conversion layer of Sample C2 had a stacked structure of crystalline selenium and amorphous selenium over the crystalline selenium.
• Sample C2 had a low dark current probably because the surface unevenness of the photoelectric conversion layer of Sample C2 smaller than that of Samples B3 and CI improves the interface properties between the photoelectric conversion layer and the hole inj ection blocking layer.
• FIG. 36 shows wavelength dependence of current amplification factors of Samples CI, C2, and B3.
• the horizontal axis represents the irradiation light wavelength ⁇ [nm]
• the vertical axis represents a current amplification factor ( ph o t c d ar k )-
• a photocurrent used for calculation of the current amplification factor was measured while the sample was irradiated with light with an intensity of 20 and a voltage of -15 V (reverse bias: V R ) was applied between electrodes of the sample.
• a dark current used for calculation of the current amplification factor was measured while a voltage of -15 V (reverse bias: V R ) was applied between the electrodes of the sample.
• Sample B3 had a higher current amplification factor than Samples CI and C2 in the entire wavelength region of greater than or equal to 400 nm and less than or equal to 700 nm. That is, Sample B3 had a large current amplification factor in almost the entire visible light region.
• Sample B3 was a photoelectric conversion element containing crystalline selenium in the photoelectric conversion layer.
• Sample C2 was a photoelectric conversion element whose photoelectric conversion layer had a stacked structure of crystalline selenium and amorphous selenium over the crystalline selenium.
• the measurement of the current-voltage characteristics of Sample B3 was performed as follows: first measurement was performed at a substrate temperature of room temperature (20 °C); second measurement was performed at an increased substrate temperature of 40 °C; third measurement was performed at an increased substrate temperature of 60 °C; fourth measurement was performed at an increased substrate temperature of 80 °C; fifth measurement was performed at an increased substrate temperature of 100 °C; sixth measurement was performed at an increased substrate temperature of 120 °C; seventh measurement was performed at a decreased substrate temperature of 100 °C; eighth measurement was performed at a decreased substrate temperature of 80 °C; ninth measurement was performed at a decreased substrate temperature of 60 °C; tenth measurement was performed at a decreased substrate temperature of 40 °C; and eleventh measurement was performed at a decreased substrate temperature of room temperature (20 °C). Note that current-voltage characteristics were measured after the set temperature was kept for 5 minutes in any measurement.
• FIG. 37A shows the measurement temperature dependence of the current-voltage characteristics of Sample B3.
• the horizontal axis represents substrate temperature in the measurement (Temperature) [°C]
• the vertical axis represents a dark current /dark [A].
• dark currents /dark of the first to sixth measurement are represented as triangles
• dark currents /dark of the seventh to eleventh measurement are represented as white circles.
• Sample B3 including the crystalline selenium layer in the photoelectric conversion layer was a thermally stable photoelectric conversion element having a small change in current-voltage characteristics even in a high-temperature environment.
• the measurement of the current-voltage characteristics of Sample C2 was performed as follows: first measurement was performed at a substrate temperature of room temperature (20 °C); second measurement was performed at an increased substrate temperature of 80 °C; third measurement was performed at an increased substrate temperature of 120 °C; fourth measurement was performed at a decreased substrate temperature of 80 °C; and fifth measurement was performed at a decreased substrate temperature of room temperature (20 °C). Note that current-voltage characteristics were measured after the set temperature was kept for 5 minutes in any measurement.
• FIG. 37B shows the measurement temperature dependence of the current-voltage characteristics of Sample C2.
• the horizontal axis represents substrate temperature in the measurement (Temperature) [°C]
• the vertical axis represents a dark current [A].
• dark currents of the first to third measurement are represented as triangles
• dark currents of the fourth and fifth measurements are represented as white circles.
• the value of the dark current of Sample C2 in the fifth measurement performed at room temperature (20 °C) was about one digit higher than that of the first measurement performed at room temperature (20 °C). Since Sample C2 included the amorphous selenium layer in the photoelectric conversion layer, the amorphous selenium layer was probably partly or entirely crystallized in the measurement at a high temperature (e.g., 120 °C), so that the dark current increased in the fifth measurement performed at room temperature (20 °C). Therefore, Sample C2 including the amorphous selenium layer in the photoelectric conversion layer was a photoelectric conversion element that was less thermally stable than Sample B3 because the current-voltage characteristics of Sample C2 were changed in a high-temperature environment.
• a high temperature e.g. 120 °C
• Samples Dl and D2 will be described in this example.
• a 500-nm-thick crystalline selenium layer and a 500-nm-thick amorphous selenium layer were formed over glass substrates for Samples Dl and D2, respectively.
• a 2-nm-thick silver film was formed as a base layer over a substrate, and then the 500-nm-thick amorphous selenium layer was formed.
• the base layer and the amorphous selenium layer were formed successively in vacuum.
• the glass substrate (ANIOO, manufactured by Asahi Glass Co., Ltd.) was used.
• the description in Example 1 can be referred to for the description of the base layer and the amorphous selenium layer; thus, the detailed description is omitted.
• heat treatment was performed, so that a crystalline selenium layer was formed.
• the heat treatment was performed during a period in which the temperature was raised from room temperature to 70 °C and kept for 3 minutes, raised to 110 °C and kept for 1 minute, and then raised to 200 °C and kept for 1 minute.
• the heat treatment was performed in a draft chamber using the hot plate (EC-1200N, manufactured by As One Corporation) in an air atmosphere.
• the 500-nm-thick amorphous selenium layer was formed over the glass substrate.
• the glass substrate As a substrate, the glass substrate (AN100, manufactured by Asahi Glass Co., Ltd.) was used.
• the description in Example 1 can be referred to for the description of the amorphous selenium layer; thus, the detailed description is omitted.
• Samples Dl and D2 were measured by X-ray photoelectron spectroscopy (XPS).
• Quantera SXM manufactured by PHI, Inc. was used.
• Monochromatic Al Ka ray (1486.6 eV) was used for an X-ray source.
• a detection area was set to 100 ⁇ .
• An extraction angle was set to 45°.
• the detection depth might be approximately 4 to 5 nm.
• FIGS. 38A and 38B show an XPS spectrum around the Fermi level of Sample Dl and that of Sample D2, respectively.
• the horizontal axis represents the binding energy (Binding Energy) [eV]
• the vertical axis represents the intensity of photoelectron (Intensity) [arbitrary unit (arb. u)].
• measurement values are shown by a solid line, and an approximate line obtained by linear approximation using a least-square method in a range of 0.4 eV to 0.9 eV is shown by a dashed-dotted line.
• the energy difference between the Fermi level and the valence band (E f -Ey) of crystalline selenium is smaller than that of amorphous selenium, so that the crystalline selenium presumably has high carrier density.
• crystal selenium has high carrier density; thus, in the case where crystal selenium is used for a photoelectric conversion layer, a photocurrent can be increased by (e.g., tin-containing gallium oxide) having increased carrier density using an n-type semiconductor for a hole injection blocking layer.
• a photocurrent can be increased by (e.g., tin-containing gallium oxide) having increased carrier density using an n-type semiconductor for a hole injection blocking layer.
• compositions and the like of tin-containing gallium oxide and indium gallium oxide were evaluated.
• Samples El to E4 will be described in this example.
• a 30-nm-thick tin-containing gallium oxide film was formed over a silicon wafer.
• a 100-nm-thick tin-containing gallium oxide film was formed over a glass substrate.
• a 100-nm-thick indium gallium oxide (IGO) film was formed over a glass substrate.
• the deposition conditions of the tin-containing gallium oxide films of Samples El and E2 were the same.
• the deposition conditions of the tin-containing gallium oxide films of Samples E2 and E3 were different.
• the substrate temperature in deposition was room temperature.
• the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• Sample El was measured by X-ray photoelectron spectroscopy (XPS).
• Quantera SXM manufactured by PHI, Inc. was used.
• Monochromatic Al Ka ray (1486.6 eV) was used for an X-ray source.
• a detection area was set to 100 ⁇ .
• An extraction angle was set to 45°.
• the detection depth might be approximately 4 to 5 nm.
• the XPS measurement was performed in a wide energy range of 0 eV to 1350 eV
• FIG. 39 shows a spectrum obtained by the wide scanning.
• the horizontal axis represents the binding energy (Binding Energy) [eV]
• the vertical axis represents the intensity of photoelectron (Intensity) [arbitrary unit (arb. u)].
• peaks derived from Ga, O, Sn, and C were observed in Sample El .
• FIG. 40A, FIG. 40B, FIG. 40C, and FIG. 40D respectively show the spectrum of Ga3d, that of Ols, that of Sn3d 5 /2, and that of Cls, which were obtained by the narrow scanning.
• the horizontal axis represents the binding energy (Binding Energy) [eV]
• the vertical axis represents the intensity of photoelectron (Intensity) [arbitrary unit (arb. u)].
• Table 2 shows quantitative values of the elements obtained from the XPS spectra. Note that the quantitative accuracy is about ⁇ 1 atomic%. Although the lower limit of detection is about 1 atomic%, it is different from the elements. As shown in Table 2, the Sn concentration was 0.5 atomic% (lower than 1 atomic%); however, since a peak derived from tin oxide was observed slightly but clearly as shown in FIG. 40C, the value can be considered to be significant.
• C was present mainly in a state of C-C, C-H, and the like, and it may be derived from organic contamination on the surface of the sample.
• Table 3 shows quantitative values of the elements shown in Table 2 except C.
• Sample El contained Ga at 39.4 atomic%, O at 59.9 atomic%, and Sn at 0.6 atomic%.
• the ratio of the atomic concentration of tin to the atomic concentration of gallium (Sn/Ga) was 0.016. Note that in Table 3, since the value of each element is rounded off to one decimal place, the total is not 100 %.
• the tin-containing gallium oxide film formed by a sputtering method had a lower content of Sn than the sputtering target.
• FIG. 41 shows a UPS spectrum.
• the horizontal axis represents the binding energy (Binding Energy) [eV]
• the vertical axis represents the intensity of photoelectron (Intensity) [arbitrary unit (arb. u)].
• E Fe rmi Fermi level
• E cutoff zero kinetic energy of the electron
• an ionization potential of Sample El was estimated to be approximately 8.6 eV.
• E Fe rmi was calculated without including a tail of the spectrum. Specifically, E Fe rmi was calculated from an intersection of the background and a straight line, extrapolated from the spectrum in the vicinity of the top of the valence band.
• FIG. 42A, FIG. 42B, and FIG. 42C show the transmittance and reflectance of Sample E2, those of Sample E3, and those of Sample E4, respectively.
• the horizontal axis represents a wavelength of light (Wavelength) [nm]
• the vertical axis represents transmittance (Transmittance) [%] and reflectance (Reflectance) [%].
• the transmittance is shown by a solid line
• the reflectance is shown by a dashed-dotted line.
• Samples E2 to E4 each had high transmittance at the wavelengths of 300 nm to 1200 nm.
• FIG. 43 A, FIG. 43B, and FIG. 43C respectively show Tauc plots of Sample E2, those of Sample E3, and those of Sample E4 calculated from the transmittance and reflectance.
• the horizontal axis represents energy hv (Energy) [eV]
• the vertical axis represents (ahv) 2 .
• a represents an absorption coefficient
• h represents a Planck constant
• v represents the number of vibrations.
• the Tauc plot is assumed to be the band structure of an indirect transition semiconductor.
• photoelectric conversion element was fabricated and the current-voltage characteristics thereof were evaluated.
• Samples Fl to F4 and B3 will be described in this example.
• Sample B3 in this example is the same as that in Example 2.
• Samples Fl to F4 and B3 each contained crystalline selenium in a photoelectric conversion layer and were different from each other in the structure of the hole injection blocking layer 17.
• a 15-nm-thick Sn-GaOx film formed at 10 % of the oxygen flow rate was used for the hole injection blocking layer 17 of Sample Fl .
• the hole injection blocking layer 17 of Sample F3 had a stacked structure of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• a 5-nm-thick tin-containing gallium oxide film formed at 10 % of the oxygen flow rate and a 5-nm-thick tin-containing gallium oxide film formed at 50 % of the oxygen flow rate were used for the first hole injection blocking layer 17a and the second hole injection blocking layer 17b, respectively.
• the hole injection blocking layer 17 of Sample F4 had a stacked structure of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• a 10-nm -thick tin-containing gallium oxide film formed at 10 % of the oxygen flow rate and a 20-nm-thick tin-containing gallium oxide film formed at 50 % of the oxygen flow rate were used for the first hole injection blocking layer 17a and the second hole injection blocking layer 17b, respectively.
• the hole injection blocking layer 17 of Sample B3 had a stacked structure of the first hole injection blocking layer 17a and the second hole injection blocking layer 17b over the first hole injection blocking layer 17a.
• a 5-nm-thick tin-containing gallium oxide film formed at 10 % of the oxygen flow rate and a 10-nm-thick tin-containing gallium oxide film formed at 50 % of the oxygen flow rate were used for the first hole injection blocking layer 17a and the second hole injection blocking layer 17b, respectively.
• Samples Fl to F4 are different from Sample B3 described above in the structure of the hole injection blocking layer 17. The other steps were the same as the steps for Sample B3.
• a tin-containing gallium oxide film was used for the hole injection blocking layer 17 of Sample Fl .
• Argon at a flow rate of 45 seem and oxygen at a flow rate of 5 seem (an oxygen flow rate ratio of 10 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• a tin-containing gallium oxide film was used for the hole injection blocking layer 17 of
• Argon at a flow rate of 25 seem and oxygen at a flow rate of 25 seem (an oxygen flow rate ratio of 50 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• the first hole injection blocking layer 17a and the second hole injection blocking layer 17b were sequentially formed with a sputtering apparatus.
• Argon at a flow rate of 45 seem and oxygen at a flow rate of 5 seem (an oxygen flow rate ratio of 10 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• Argon at a flow rate of 25 seem and oxygen at a flow rate of 25 seem (an oxygen flow rate ratio of 50 %) were used as deposition gases and the pressure in deposition was adjusted to 0.4 Pa.
• the deposition power was set to 400 W with use of an RF power source.
• the substrate temperature in deposition was room temperature.
• FIG. 44A, FIG. 44B, FIG. 45A, and FIG. 45B show the current-voltage characteristics of Sample Fl, those of Sample F2, those of Sample F3, and those of Sample F4, respectively.
• FIG. 44A, FIG. 44B, FIG. 45A, and FIG. 45B show the current-voltage characteristics of Sample Fl, those of Sample F2, those of Sample F3, and those of Sample F4, respectively.
• the horizontal axis represents voltage (Voltage) [V] between electrodes facing each other, and the vertical axis represents a current value (Current)
• FIG. 44A, FIG. 44B, FIG. 45 A, and FIG. 45B a dark current ( ⁇ ) is shown by a solid line, and a photocurrent (/photo) with a wavelength of 450 nm and irradiance of 20 is shown by a dashed line.
• the size of a light-receiving surface of each sample was
• the total thickness of the hole injection blocking layer was preferably about 15 nm.
• Sample Fl tended to have a higher dark current than Samples B3 and F2.
• the dark current was increased probably because the hole injection blocking layer of Sample Fl was formed with tin-containing gallium oxide at 10 % of the oxygen flow rate and thus included many oxygen vacancies.
• Sample F2 tended to have a lower photocurrent than Samples B3 and Fl .
• the photocurrent was decreased probably because the hole injection blocking layer of Sample F2 was formed with tin-containing gallium oxide at 50 % of the oxygen flow rate and thus the surface of the photoelectric conversion layer and the vicinity thereof were oxidized, for example, in the formation of the hole injection blocking layer.
• the hole injection blocking layer of Sample B3 had a stacked structure of tin-containing gallium oxide formed at 10 % of the oxygen flow rate and tin-containing gallium oxide formed at 50 % of the oxygen flow rate; therefore, both a low dark current and a high photocurrent were achieved.
• FIG. 46 shows the wavelength dependence of current amplification factors of Samples Fl to F4 and B3.
• the horizontal axis represents the irradiation light wavelength ⁇ [nm]
• the vertical axis represents the current amplification factor
• a photocurrent used for calculation of the current amplification factor was measured while the sample was irradiated with light with an intensity of 20 and a voltage of -15 V (reverse bias: V R ) was applied between electrodes of the sample.
• a dark current used for calculation of the current amplification factor was measured while a voltage of -15 V (reverse bias: V R ) was applied between the electrodes of the sample.
• Sample B3 had a higher current amplification factor than Samples Fl to F4 in the entire wavelength region of greater than or equal to 400 nm and less than or equal to 700 nm. That is, Sample B3 had a large current amplification factor in almost the entire visible light region.
• photoelectric conversion element was fabricated and the current-voltage characteristics thereof were evaluated.
• Samples Gl to G3 and B3 will be described in this example.
• Sample B3 in this example is the same as that in Example 2.
• Samples Gl to G3 and B3 were different from each other in the thickness of a photoelectric conversion layer.
• the other steps were the same as the steps for Sample B3.
• a 300-nm-thick crystalline selenium layer, a 750-nm-thick crystalline selenium layer, a 1000-nm-thick crystalline selenium layer, and a 500-nm-thick crystalline selenium layer were used for the photoelectric conversion layers 13 of Samples Gl, G2, G3, and B3, respectively.
• Example 1 For Sample Gl, a 2-nm -thick silver film was formed as the base layer 43, and then the 300-nm-thick amorphous selenium layer 45 was formed.
• the base layer 43 and the selenium layer 45 were formed successively in vacuum.
• the description in Example 1 can be referred to for the description of a method for forming the base layer 43 and the amorphous selenium layer 45; thus, the detailed description is omitted.
• Example 1 750-nm-thick amorphous selenium layer 45 was formed.
• the base layer 43 and the selenium layer 45 were formed successively in vacuum.
• the description in Example 1 can be referred to for the description of a method for forming the base layer 43 and the amorphous selenium layer 45; thus, the detailed description is omitted.
• Example 3 For Sample G3, a 2-nm -thick silver film was formed as the base layer 43, and then the 1000-nm-thick amorphous selenium layer 45 was formed.
• the base layer 43 and the selenium layer 45 were formed successively in vacuum.
• the description in Example 1 can be referred to for the description of a method for forming the base layer 43 and the amorphous selenium layer 45; thus, the detailed description is omitted.
• FIG. 47A, FIG. 47B, FIG. 48A, and FIG. 48B show the current-electric field strength characteristics of Sample Gl, those of Sample G2, those of Sample G3, and those of Sample B3, respectively.
• the horizontal axis represents electric field strength [MV/cm]
• the vertical axis represents a current value (Current) [A]. Since the photoelectric conversion layers of Samples Gl to G3 and B3 had different thicknesses, the value of the voltage between electrodes facing each other divided by the value of the thickness of the photoelectric conversion layer (electric field strength) is shown in each of FIG. 47 A, FIG. 47B, FIG. 48 A, and FIG. 48B.
• a dark current is shown by a solid line
• a photocurrent (/photo) measured while the sample was irradiated with light with a wavelength of 450 nm and an intensity of 20 is shown by a dashed line.
• the size of a light-receiving surface of each sample was 2mm x 2mm.
• FIG. 49 shows the wavelength dependence of current amplification factors of Samples Gl to G3 and B3.
• the horizontal axis represents the irradiation light wavelength ⁇ [nm]
• the vertical axis represents the current amplification factor (/ P hoto//dark)- photocurrent used for calculation of the current amplification factor was measured while the sample was irradiated with light with an intensity of 20 and a voltage of -15 V (reverse bias: V R ) was applied between electrodes of the sample.
• a dark current used for calculation of the current amplification factor was measured while a voltage of -15 V (reverse bias: V R ) was applied between the electrodes of the sample.
• the thickness of a photoelectric conversion layer may be determined in accordance with the use application.
• the photoelectric conversion layer may be relatively thin.
• the photoelectric conversion layer may be relatively thick.

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