WO2018161874A1 - 显示基板及其制作方法、显示装置 - Google Patents
显示基板及其制作方法、显示装置 Download PDFInfo
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- WO2018161874A1 WO2018161874A1 PCT/CN2018/078029 CN2018078029W WO2018161874A1 WO 2018161874 A1 WO2018161874 A1 WO 2018161874A1 CN 2018078029 W CN2018078029 W CN 2018078029W WO 2018161874 A1 WO2018161874 A1 WO 2018161874A1
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- transparent conductive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/465—Chemical or electrical treatment, e.g. electrolytic etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
Abstract
Description
Claims (10)
- 一种显示基板的制作方法,包括:形成绝缘层;在所述绝缘层上形成第二透明导电层的图形,所述第二透明导电层的图形包括位于所述显示基板的显示区域内的多个间隔设置的子电极;以及去除所述显示区域中所述绝缘层未被所述子电极覆盖的部分以形成绝缘层的图形。
- 根据权利要求1所述的显示基板的制作方法,其中,所述形成第二透明导电层的图形和所述形成绝缘层的图形包括:在所述绝缘层上形成透明导电层过渡图形,所述透明导电层过渡图形包括位于所述显示基板的薄膜晶体管区域的第一部分和位于所述显示区域的第二部分,所述第二部分包括多个间隔设置的子电极;去除显示区域中所述子电极之间的间隙对应的绝缘层的部分;去除所述透明导电层过渡图形的第一部分,形成所述第二透明导电层的图形。
- 根据权利要求2所述的显示基板的制作方法,其中,所述形成第二透明导电层的图形和所述形成绝缘层的图形还包括:在所述绝缘层上沉积第二透明导电层;在所述第二透明导电层上涂覆光刻胶,对光刻胶进行曝光显影,形成光刻胶保留区域和光刻胶未保留区域,光刻胶未保留区域对应所述子电极之间的间隙;通过湿法刻蚀去除光刻胶未保留区域内的第二透明导电层的部分,形成所述透明导电层过渡图形;通过干法刻蚀去除光刻胶未保留区域内的绝缘层的部分;去除薄膜晶体管区域内的光刻胶;通过湿法刻蚀去除所述透明导电层过渡图形中未被光刻胶覆盖的部分,形成第二透明导电层的图形;去除剩余的光刻胶。
- 根据权利要求3所述的显示基板的制作方法,其中,干法刻蚀所采用的刻蚀气体为SF 6:O 2:He等于1:1:1的混合气体。
- 根据权利要求3所述的显示基板的制作方法,其中,湿法刻蚀所采用的刻蚀液由质量百分比为8%-9%的硫酸、质量百分比为13%-15%的醋酸、质量百分比为1%的添加剂和水组成。
- 根据权利要求1-5中任一项所述的显示基板的制作方法,还包括:提供一衬底基板;在所述衬底基板上形成薄膜晶体管和与所述薄膜晶体管的漏电极连接的第一透明导电层的图形;其中,所述绝缘层覆盖所述薄膜晶体管和所述第一透明导电层的图形。
- 根据权利要求1-5中任一项所述的显示基板的制作方法,其中,所述第二透明导电层采用ITO。
- 一种根据权利要求1-7中任一项所述的制作方法制作得到的显示基板,包括位于衬底基板上的绝缘层和位于所述绝缘层上的第二透明导电层的图形,所述第二透明导电层的图形包括位于所述显示基板的显示区域内的多个间隔设置的子电极;所述绝缘层位于所述显示区域内的部分在所述衬底基板上的正投影与所述子电极在所述衬底基板上的正投影重合。
- 根据权利要求8所述的显示基板,还包括:位于所述衬底基板上的薄膜晶体管和与所述薄膜晶体管的漏电极连接的第一透明导电层的图形;其中,所述绝缘层覆盖所述薄膜晶体管和与所述薄膜晶体管的漏电极连接的第一透明导电层的图形。
- 一种显示装置,包括如权利要求8或9所述的显示基板。
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US16/092,380 US10879278B2 (en) | 2017-03-09 | 2018-03-05 | Display substrate, manufacturing method therefor, and display device |
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CN201710137831.7A CN106847757B (zh) | 2017-03-09 | 2017-03-09 | 一种显示基板及其制作方法、显示装置 |
CN201710137831.7 | 2017-03-09 |
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CN106847757B (zh) * | 2017-03-09 | 2019-11-01 | 京东方科技集团股份有限公司 | 一种显示基板及其制作方法、显示装置 |
CN107799466B (zh) * | 2017-11-16 | 2020-04-07 | 深圳市华星光电半导体显示技术有限公司 | Tft基板及其制作方法 |
CN109037348B (zh) * | 2018-07-19 | 2021-11-09 | Tcl华星光电技术有限公司 | 薄膜晶体管及其制备方法、阵列基板 |
CN110676222A (zh) * | 2019-10-10 | 2020-01-10 | 合肥鑫晟光电科技有限公司 | 显示基板的制造方法、显示基板和显示装置 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020076938A (ko) * | 2001-03-31 | 2002-10-11 | 주식회사 현대 디스플레이 테크놀로지 | 프린지 필드 구동 액정표시장치 제조방법 |
JP2011023444A (ja) * | 2009-07-14 | 2011-02-03 | Seiko Epson Corp | 光電変換装置の製造方法 |
CN103488004A (zh) * | 2013-09-26 | 2014-01-01 | 京东方科技集团股份有限公司 | 一种阵列基板、液晶面板及显示装置 |
CN103988288A (zh) * | 2011-12-05 | 2014-08-13 | 夏普株式会社 | 半导体装置 |
CN104035228A (zh) * | 2013-03-04 | 2014-09-10 | 三星显示有限公司 | 液晶显示器及其制造方法 |
CN104155814A (zh) * | 2014-08-29 | 2014-11-19 | 昆山龙腾光电有限公司 | 液晶显示装置及其制造方法 |
CN106847757A (zh) * | 2017-03-09 | 2017-06-13 | 京东方科技集团股份有限公司 | 一种显示基板及其制作方法、显示装置 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP3228202B2 (ja) * | 1997-11-18 | 2001-11-12 | 日本電気株式会社 | 横方向電界方式アクティブマトリクス型液晶表示装置およびその製造方法 |
KR100755591B1 (ko) * | 2006-06-22 | 2007-09-06 | 고려대학교 산학협력단 | 질화물계 발광소자의 제조방법 |
KR101529557B1 (ko) * | 2011-06-09 | 2015-06-19 | 엘지디스플레이 주식회사 | 프린지 필드형 액정표시장치의 제조방법 |
CN103928406B (zh) * | 2014-04-01 | 2016-08-17 | 京东方科技集团股份有限公司 | 阵列基板的制备方法、阵列基板、显示装置 |
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- 2018-03-05 WO PCT/CN2018/078029 patent/WO2018161874A1/zh active Application Filing
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Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020076938A (ko) * | 2001-03-31 | 2002-10-11 | 주식회사 현대 디스플레이 테크놀로지 | 프린지 필드 구동 액정표시장치 제조방법 |
JP2011023444A (ja) * | 2009-07-14 | 2011-02-03 | Seiko Epson Corp | 光電変換装置の製造方法 |
CN103988288A (zh) * | 2011-12-05 | 2014-08-13 | 夏普株式会社 | 半导体装置 |
CN104035228A (zh) * | 2013-03-04 | 2014-09-10 | 三星显示有限公司 | 液晶显示器及其制造方法 |
CN103488004A (zh) * | 2013-09-26 | 2014-01-01 | 京东方科技集团股份有限公司 | 一种阵列基板、液晶面板及显示装置 |
CN104155814A (zh) * | 2014-08-29 | 2014-11-19 | 昆山龙腾光电有限公司 | 液晶显示装置及其制造方法 |
CN106847757A (zh) * | 2017-03-09 | 2017-06-13 | 京东方科技集团股份有限公司 | 一种显示基板及其制作方法、显示装置 |
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CN106847757A (zh) | 2017-06-13 |
CN106847757B (zh) | 2019-11-01 |
US10879278B2 (en) | 2020-12-29 |
US20190115371A1 (en) | 2019-04-18 |
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