WO2018152907A1 - 微发光二极管阵列基板及显示面板 - Google Patents

微发光二极管阵列基板及显示面板 Download PDF

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WO2018152907A1
WO2018152907A1 PCT/CN2017/077464 CN2017077464W WO2018152907A1 WO 2018152907 A1 WO2018152907 A1 WO 2018152907A1 CN 2017077464 W CN2017077464 W CN 2017077464W WO 2018152907 A1 WO2018152907 A1 WO 2018152907A1
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conductive layer
emitting diode
micro light
pixel electrode
array substrate
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陈黎暄
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/858—Means for heat extraction or cooling
    • H10H20/8581—Means for heat extraction or cooling characterised by their material

Definitions

  • the invention relates to the field of micro light emitting diode display technology, in particular to a micro light emitting diode array substrate and a display panel.
  • Flat display devices are widely used in various consumer electronics such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, desktop computers, etc. due to their high image quality, power saving, thin body and wide application range. Products have become the mainstream in display devices.
  • a micro LED ( ⁇ LED) display is a display that realizes image display by using a high-density and small-sized LED array integrated on one substrate as a display pixel.
  • each pixel Addressable, individually driven and lit can be seen as a miniature version of the outdoor LED display, reducing the pixel distance from millimeters to micrometers, and the ⁇ LED display is the same as the Organic Light-Emitting Diode (OLED) display.
  • OLED Organic Light-Emitting Diode
  • Self-illuminating display but compared with OLED display, ⁇ LED display has the advantages of better material stability, longer life, no image imprinting, etc., and is considered to be the biggest competitor of OLED display.
  • the micro light emitting diode display array shows a micro light emitting diode array structure designed above the driving array, and the positive and negative electrodes are used to drive the conductive connection of the array, and the TFT array controls the switching and brightness of the micro light emitting diode of each pixel, and is driven by the TFT.
  • the display unit has become the mainstream current control technology.
  • the thin film transistor forms a current channel between the source/drain through the gate control, so that the sub-pixel storage capacitor is charged to maintain the liquid crystal's continuous type.
  • micro-light-emitting diode array has a very high density of micro-light-emitting diodes due to its micrometer scale, when it is displayed for high pixel count (PPI), there is a problem that heat dissipation is not smooth.
  • PPI pixel count
  • the present invention provides a micro light emitting diode array substrate and a display panel, thereby improving heat dissipation capability.
  • the present invention provides a micro-light-emitting diode array substrate comprising a glass substrate on which a gate electrode and an insulating layer are sequentially formed, a semiconductor layer and a pixel electrode are formed on the insulating layer, and a source is provided on the semiconductor layer. And a drain connected to the adjacent pixel electrode and overlying the pixel electrode The cover is covered with a first conductive layer, and the first conductive layer is connected with a micro light-emitting diode.
  • the first conductive layer is made of a graphene material.
  • the first conductive layer is made of a carbon nanotube material.
  • a metal protrusion is disposed between the pin of the micro LED and the first conductive layer, and the pin of the micro LED is connected to the first conductive layer via the metal protrusion.
  • the metal convex portion has a trapezoidal cross-sectional shape.
  • the metal protrusion is covered with a graphene layer.
  • the source and the drain are covered with a second conductive layer, and the second conductive layer is connected to the portion of the first conductive layer disposed on the pixel electrode adjacent to the drain.
  • the second conductive layer is made of a graphene material.
  • the first conductive layer is obtained by covering the graphene on the pixel electrode by a plasma enhanced vapor deposition process and overlapping the pattern of the pixel electrode to form a graphene film.
  • the invention also provides a display panel comprising a CF substrate, and further comprising the micro light emitting diode array substrate.
  • the present invention covers the conductive layer between the pixel electrode and the micro light emitting diode, so that the heat at the micro light emitting diode can be conducted to other regions through the conductive layer, thereby improving the heat dissipation capability.
  • FIG. 1 is a schematic structural view of a first micro light emitting diode array substrate of the present invention
  • FIG. 2 is a schematic structural view of a second micro light-emitting diode array substrate of the present invention.
  • the first micro light emitting diode array substrate of the present invention includes a glass substrate 1, A gate electrode 2 and an insulating layer 3 are sequentially formed on the glass substrate 1 by a conventional technique.
  • a semiconductor layer 4 and a pixel electrode 5 are formed on the insulating layer 3, and a source electrode 6 and a drain electrode 7 are provided on the semiconductor layer 4.
  • the drain electrode 7 is connected to the adjacent pixel electrode 5, and the pixel electrode 5 is covered with a first conductive layer 8 on which the micro light emitting diode 9 is connected; at the pin of the micro light emitting diode 9
  • a metal bump 10 is disposed between the first conductive layer 8 and the first light-emitting diode 8 is connected to the first conductive layer 8 via the metal bump 10.
  • the first conductive layer 8 may be made of graphene material or carbon nanotubes (CNT), preferably graphene material, and graphene not only has good electrical conductivity but also has excellent performance.
  • the thermal conductivity can effectively convey the heat transfer of the micro-light-emitting diodes 9 of a larger density and the local area at a higher current density to a lower peripheral temperature region, which can improve the heat dissipation capability of the entire display panel.
  • the first conductive layer 8 is obtained by covering the graphene on the pixel electrode 5 by a plasma enhanced vapor deposition process and overlapping the pattern of the pixel electrode 5 to form a graphene film.
  • the graphene layer 12 may be covered on the outside of the metal bump 10; the cross-sectional shape of the metal bump 10 is trapezoidal.
  • a source of the second conductive layer 11 is also covered on the source 6 and the drain 7, and the second conductive layer 11 is disposed on the drain 7
  • the portion of the first conductive layer 8 on the adjacent pixel electrode 5 is connected;
  • the second conductive layer 11 is made of a graphene material, and the conductive layer is covered on the source electrode 6, the drain electrode 7 and the pixel electrode 5 to further improve heat dissipation. ability.
  • the invention covers the conductive layer on the source 6, the drain 7 and the pixel electrode 5 to improve the heat dissipation capability, and also protects the source 6, the drain 7 and the pixel electrode 5 from environmental corrosion and oxidation problems, thereby ensuring device performance. .
  • the rest is the same as the TFT device of the prior art, wherein the source 6, the drain 7, the pixel electrode 5, and the gate 2 can be Al/Mo/ One or more of Cu/Mg/Ag/Ti, the pixel electrode 5 may also be an ITO (Indium Tin Oxide Semiconductor Conductive Film) and an alloy material of Sn and Sn; the semiconductor layer 4 may be amorphous silicon or polycrystalline silicon, and The metal layer forming the source 6 and the drain 7 may be superposed with an n+/p+ doped layer.
  • ITO Indium Tin Oxide Semiconductor Conductive Film
  • the structure of the above two kinds of micro light-emitting diode array substrates can also be used in a TFT device of a top gate structure, and is also connected to a pixel electrode through a drain, thereby controlling current through the micro light-emitting diode.
  • the present invention also provides a display panel including a CF (color filter) substrate, and further includes the above-described micro light emitting diode array substrate, which will not be described herein.
  • CF color filter

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Abstract

提供了一种微发光二极管阵列基板，包括玻璃基板（1），所述玻璃基板（1）上依次形成有栅极（2）、绝缘层（3），在绝缘层（3）上形成有半导体层（4）以及像素电极（5），在半导体层（4）上设有源极（6）、漏极（7），所述漏极（7）与相邻的像素电极（5）连接，在像素电极（5）上覆盖有一层第一导电层（8），第一导电层（8）上连接有微发光二极管（9）。还提供了一种显示面板，包括CF基板，还包括所述的微发光二极管阵列基板。与现有技术相比，通过在像素电极与微发光二极管之间覆盖一层导电层，使得微发光二极管处的热量能够经导电层传导至其他区域，从而提高散热能力。

Description

微发光二极管阵列基板及显示面板 技术领域
本发明涉及一种微发光二极管显示技术领域，特别是一种微发光二极管阵列基板及显示面板。
背景技术
平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
微发光二极管(Micro LED，μLED)显示器是一种以在一个基板上集成的高密度微小尺寸的LED阵列作为显示像素来实现图像显示的显示器，同大尺寸的户外LED显示屏一样，每一个像素可定址、单独驱动点亮，可以看成是户外LED显示屏的缩小版，将像素点距离从毫米级降低至微米级，μLED显示器和有机发光二极管(Organic Light-Emitting Diode，OLED)显示器一样属于自发光显示器，但μLED显示器相比OLED显示器还具有材料稳定性更好、寿命更长、无影像烙印等优点，被认为是OLED显示器的最大竞争对手。
目前微发光二极管显示阵列示设计在驱动阵列上方的微发光二极管阵列结构，通过正负电极欲驱动阵列的导通连接，以TFT阵列控制每个像素的微发光二极管的开关和亮度，通过TFT驱动显示单元已经成为主流的电流控制技术，这种薄膜晶体管通过栅极控制，在源极/漏极之间形成电流沟道，从而使子像素存储电容被充电来保持液晶的持续式(Hold type)显示模式；而微发光二极管阵列由于其微米尺度，当为了达到高像素数目(PPI)显示时，会导致微发光二极管的密度极高，使得其存在散热不通畅的问题。
发明内容
为克服现有技术的不足，本发明提供一种微发光二极管阵列基板及显示面板，从而提高散热能力。
本发明提供了一种微发光二极管阵列基板，包括玻璃基板，所述玻璃基板上依次形成有栅极、绝缘层，在绝缘层上形成有半导体层以及像素电极，在半导体层上设有源极、漏极，所述漏极与相邻的像素电极连接，在像素电极上覆 盖有一层第一导电层，第一导电层上连接有微发光二极管。
进一步地，所述第一导电层由石墨烯材料制成。
进一步地，所述第一导电层由碳纳米管材料制成。
进一步地，所述微发光二极管的管脚处与第一导电层之间设有金属凸起部，微发光二极管的管脚经金属凸起部与第一导电层连接导通，
进一步地，所述金属凸起部的截面形状为梯形。
进一步地，所述金属凸起部外覆盖有石墨烯层。
进一步地，所述源极以及漏极上覆盖有一层第二导电层，第二导电层与设置在漏极相邻的像素电极上的这部分第一导电层连接。
进一步地，所述第二导电层由石墨烯材料制成。
进一步地，所述第一导电层通过等离子体增强气相沉积制程将石墨烯覆盖在像素电极上并且与像素电极的图形重叠形成石墨烯膜得到。
本发明还提供了一种显示面板，包括CF基板，还包括所述的微发光二极管阵列基板。
本发明与现有技术相比，通过在像素电极与微发光二极管之间覆盖一层导电层，使得微发光二极管处的热量能够经导电层传导至其他区域，从而提高散热能力。
附图说明
图1是本发明的第一种微发光二极管阵列基板的结构示意图；
图2是本发明的第二种微发光二极管阵列基板的结构示意图。
具体实施方式
下面结合附图和实施例对本发明作进一步详细说明。
如图1所示，本发明的第一种微发光二极管阵列基板，包括玻璃基板1， 在玻璃基板1上采用现有技术依次形成有栅极2、绝缘层3，在绝缘层3上形成有半导体层4以及像素电极5，在半导体层4上设有源极6、漏极7，所述漏极7与相邻的像素电极5连接，在像素电极5上覆盖有一层第一导电层8，第一导电层8上连接有微发光二极管9；在微发光二极管9的管脚处与第一导电层8之间设有金属凸起部10，微发光二极管9的管脚经金属凸起部10与第一导电层8连接导通。
在第一种微发光二极管阵列基板中，第一导电层8可由石墨烯材料或碳纳米管(CNT)制成，最好为石墨烯材料，石墨烯不仅具有较好的导电能力，同时具有优秀的导热能力，可以有效地讲较大密度排布的微发光二极管9和较大电流密度下的局部区域热能传递到周边温度较低区域，这样能够提高整个显示面板的散热能力。
所述第一导电层8通过等离子体增强气相沉积制程将石墨烯覆盖在像素电极5上并且与像素电极5的图形重叠形成石墨烯膜得到。
在金属凸起部10外可覆盖有石墨烯层12；金属凸起部10的截面形状为梯形。
如图2所示，在第一种微发光二极管阵列基板的基础上，在源极6以及漏极7上也覆盖有一层第二导电层11，第二导电层11与设置在漏极7相邻的像素电极5上的这部分第一导电层8连接；第二导电层11由石墨烯材料制成，通过在源极6、漏极7以及像素电极5上都覆盖导电层，进一步提高散热能力。
本发明在源极6、漏极7以及像素电极5上覆盖导电层可以提高散热能力外，还可以保护源极6、漏极7以及像素电极5不受到环境腐蚀以及氧化问题，从而保障器件性能。
本发明中除了对微发光二极管阵列基板设置导电层外，其余部分均与现有技术的TFT器件相同，其中的源极6、漏极7、像素电极5、栅极2可采用Al/Mo/Cu/Mg/Ag/Ti中的一种以上，像素电极5还可以采用ITO(铟锡氧化物半导体导电膜)和Sn及Sn的合金材料；半导体层4可以为非晶硅或多晶硅，其与形成源极6和漏极7的金属层可以叠加n+/p+掺杂层。
上述的两种微发光二极管阵列基板的结构还可以用于顶栅结构的TFT器件中，同样通过漏极与像素电极相连，从而控制通过微发光二极管的电流。
本发明还提供了一种显示面板，包括CF(彩色滤光片)基板，还包括上述的微发光二极管阵列基板，在此不再赘述。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (20)

  1. 一种微发光二极管阵列基板，包括玻璃基板，其中：所述玻璃基板上依次形成有栅极、绝缘层，在绝缘层上形成有半导体层以及像素电极，在半导体层上设有源极、漏极，所述漏极与相邻的像素电极连接，在像素电极上覆盖有一层第一导电层，第一导电层上连接有微发光二极管。
  2. 根据权利要求1所述的微发光二极管阵列基板，其中：所述第一导电层由石墨烯材料制成。
  3. 根据权利要求1所述的微发光二极管阵列基板，其中：所述第一导电层由碳纳米管材料制成。
  4. 根据权利要求1所述的微发光二极管阵列基板，其中：所述微发光二极管的管脚处与第一导电层之间设有金属凸起部，微发光二极管的管脚经金属凸起部与第一导电层连接导通，
  5. 根据权利要求4所述的微发光二极管阵列基板，其中：所述金属凸起部的截面形状为梯形。
  6. 根据权利要求5所述的为发光二极管阵列基板，其中：所述金属凸起部外覆盖有石墨烯层。
  7. 根据权利要求1所述的微发光二极管阵列基板，其中：所述源极以及漏极上覆盖有一层第二导电层，第二导电层与设置在漏极相邻的像素电极上的这部分第一导电层连接。
  8. 根据权利要求4所述的微发光二极管阵列基板，其中：所述源极以及漏极上覆盖有一层第二导电层，第二导电层与设置在漏极相邻的像素电极上的这部分第一导电层连接。
  9. 根据权利要求7所述的微发光二极管阵列基板，其中：所述第二导电层由石墨烯材料制成。
  10. 根据权利要求2所述的微发光二极管阵列基板，其中：所述第一导电层通过等离子体增强气相沉积制程将石墨烯覆盖在像素电极上并且与像素电 极的图形重叠形成石墨烯膜得到。
  11. 一种显示面板，包括CF基板，其中：还包括微发光二极管阵列基板，所述微发光二极管阵列基板包括玻璃基板，所述玻璃基板上依次形成有栅极、绝缘层，在绝缘层上形成有半导体层以及像素电极，在半导体层上设有源极、漏极，所述漏极与相邻的像素电极连接，在像素电极上覆盖有一层第一导电层，第一导电层上连接有微发光二极管。
  12. 根据权利要求11所述的显示面板，其特征在于：所述第一导电层由石墨烯材料制成。
  13. 根据权利要求11所述的显示面板，其特征在于：所述第一导电层由碳纳米管材料制成。
  14. 根据权利要求11所述的显示面板，其特征在于：所述微发光二极管的管脚处与第一导电层之间设有金属凸起部，微发光二极管的管脚经金属凸起部与第一导电层连接导通，
  15. 根据权利要求14所述的显示面板，其特征在于：所述金属凸起部的截面形状为梯形。
  16. 根据权利要求15所述的显示面板，其特征在于：所述金属凸起部外覆盖有石墨烯层。
  17. 根据权利要求11所述的显示面板，其特征在于：所述源极以及漏极上覆盖有一层第二导电层，第二导电层与设置在漏极相邻的像素电极上的这部分第一导电层连接。
  18. 根据权利要求14所述的显示面板，其特征在于：所述源极以及漏极上覆盖有一层第二导电层，第二导电层与设置在漏极相邻的像素电极上的这部分第一导电层连接。
  19. 根据权利要求17所述的显示面板，其特征在于：所述第二导电层由石墨烯材料制成。
  20. 根据权利要求12所述的显示面板，其特征在于：所述第一导电层通 过等离子体增强气相沉积制程将石墨烯覆盖在像素电极上并且与像素电极的图形重叠形成石墨烯膜得到。
PCT/CN2017/077464 2017-02-27 2017-03-21 微发光二极管阵列基板及显示面板 Ceased WO2018152907A1 (zh)

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