WO2018076901A1 - 一种薄膜发光二极管芯片及其制作方法 - Google Patents

一种薄膜发光二极管芯片及其制作方法 Download PDF

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Publication number
WO2018076901A1
WO2018076901A1 PCT/CN2017/097844 CN2017097844W WO2018076901A1 WO 2018076901 A1 WO2018076901 A1 WO 2018076901A1 CN 2017097844 W CN2017097844 W CN 2017097844W WO 2018076901 A1 WO2018076901 A1 WO 2018076901A1
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Prior art keywords
light emitting
layer
pits
reflective layer
diode chip
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PCT/CN2017/097844
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English (en)
French (fr)
Inventor
钟志白
李佳恩
郑锦坚
杨力勋
徐宸科
康俊勇
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厦门三安光电有限公司
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Publication of WO2018076901A1 publication Critical patent/WO2018076901A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector

Definitions

  • the present invention relates to a semiconductor light emitting device and a method of fabricating the same, and more particularly to a thin film light emitting diode chip and a method of fabricating the same.
  • LED chips include a lateral structure and a vertical structure.
  • Transverse Structure The two electrodes of the LED chip are on the same side of the LED chip and current is conducted laterally in the N and P confinement layers.
  • the two electrodes of the vertical structure LED chip are respectively on both sides of the epitaxial layer of the LED, and the current flows almost entirely vertically through the epitaxial layer of the LED, and the current which is rarely conducted laterally can improve the current distribution problem of the lateral structure and improve the luminous efficiency. Solve the problem of shading of the electrode, thereby increasing the light-emitting area of the LED.
  • the ohmic contact (such as the P-GaN layer) is poor, which affects the application of the Ag reflective layer and limits the reliability of the LED device.
  • the technical problem to be solved by the present invention is to overcome the deficiencies of the prior art and provide a thin film light emitting diode chip and a manufacturing method thereof.
  • a thin film light emitting diode chip comprising: a permanent substrate and a light emitting structure thereon, wherein the light emitting structure is grown by a III-V material
  • the film has two opposite surfaces, wherein the first surface is formed by the light emitting surface and the first electrode, and the second surface is connected to the permanent substrate, wherein: the second surface of the light emitting structure Having a plurality of V - Pits , the permanent substrate comprising a metal reflective layer, a mirror layer, a metal bond from top to bottom And a thermally conductive layer, the metal reflective layer being filled in the V-Pits.
  • the film is composed of a P-type III-V film, an N-type III-V film, and a light-emitting active layer.
  • the permanent substrate has a thickness ranging from 1 (Vm to 5 mm).
  • the material of the first electrode is selected from A1 or Ti or C or Ni or Au or Pt or ITO or the combination of the foregoing.
  • the material of the metal reflective layer is Ag.
  • the metal reflective layer fills the V-Pits and extends over a portion of the second surface of the light emitting structure.
  • the metal reflective layer is filled in a sparse position of the V-Pits to form a single reflection point, and filling the V-P at its dense position forms a monolithic reflective island or reflective layer.
  • the metal reflective layer has a whole-surface distribution or a disordered distribution or a grid-like distribution.
  • the mirror layer is a metal reflective layer or a distributed Bragg reflection structure or an omnidirectional reflection structure.
  • the specular layer has a light reflectance of 50% or more for the wavelength band of 200 to 1150 nm.
  • the material of the metal bonding layer is Au.
  • the material of the heat conducting layer is selected from Ag or Cu or A1 or MgO or BeO or diamond or graphite or carbon black or A1N or a combination thereof.
  • the thermal conductivity layer has a thermal conductivity greater than 100 W/mK.
  • a method of fabricating a thin film light emitting diode chip including the process steps:
  • the film is composed of a P-type III-V film, an N-type III-V film, and a light-emitting active layer.
  • the step 2) comprises: depositing a metal reflective layer by using an electron beam evaporation process, using a heat treatment condition to cause the metal to agglomerate in the V-pits, due to the defect of the V-Pits, the groove position
  • the surface has many dangling bonds and is more attractive, thereby increasing the adhesion of the metal to the second surface of the light-emitting structure and forming an aggregation center.
  • the metal reflective layer fills the V-Pits and extends on a portion of the second surface of the light emitting structure.
  • the metal reflective layer is filled in a sparse position of the V-Pits to form a single reflection point, and filling the V-Pits dense position forms a monolithic reflective island or reflective layer.
  • the metal reflective layer has a whole surface distribution or a disordered distribution or a grid-like distribution.
  • the mirror layer is a metal reflective layer or a distributed Bragg reflection structure or an omnidirectional reflection structure.
  • the specular layer has a light reflectance of 50% or more for a wavelength band of 200 nm to 1150 nm.
  • the material of the metal bonding layer is Au.
  • the material of the heat conducting layer is selected from Ag or Cu or A1 or MgO or BeO or diamond or graphite or carbon black or A1N or a combination thereof.
  • the thermal conductivity layer has a thermal conductivity greater than 100 W/mK.
  • the material of the first electrode is selected from A1 or Ti or C or Ni or Au or Pt or ITO or a combination thereof
  • the present invention is directed to a thin film light emitting diode chip and a method of fabricating the same.
  • the present invention fills the metal reflective layer in the light-emitting structure with V-Pits before the formation of the mirror layer, and the structure is multi-sidedly suspended by the V-Pits position, thereby increasing the metal.
  • 1 to 6 are schematic diagrams showing process steps of fabricating a thin film light emitting diode chip according to an embodiment of the invention.
  • FIG. 7 is a schematic structural view of a thin film light emitting diode chip according to an embodiment of the present invention.
  • 100 growth substrate; 200: light-emitting structure; 201: N-type semiconductor layer (first surface); 202: active layer; 203: P-type semiconductor layer (second surface); 204: V-pits; , 301: metal reflective layer; 400: mirror layer; 500: metal bonding layer; 600: heat conducting layer; 700: first electrode.
  • a light emitting structure 200 is grown on a sapphire or gallium arsenide single crystal growth substrate 100, and specifically, may include an N-type semiconductor layer 201, an active layer 202, and a P-type semiconductor layer 203.
  • the epitaxial film consists of a P-type III-V film, an N-type III-V film, and an active layer, and the III-V film can be composed of Group III boron, aluminum, gallium, indium, and V.
  • the family consists of nitrogen, phosphorus and arsenic.
  • the active layer has an emission wavelength between 200 and 1150 nm, preferably in the ultraviolet range, such as the UV-A band (315 to 380 nm). .
  • the foregoing light-emitting structure is defined to have opposite surfaces, wherein the first surface is a light-emitting light-emitting surface, and the second surface has a plurality of V-Pits 204 which can be obtained by controlling epitaxial process parameters.
  • the V-Pits 204 is filled with an Ag metal reflective layer 300, 301, and the filling process may include: depositing an Ag film layer having a thickness of 10 nm or less by using an electron beam evaporation process, and then using a heat treatment condition (for example, the temperature of 300 ⁇ 500 °C), because the Ag film is heated, the agglomeration will be formed to reduce the free energy of the system, and become an island by the reverse wetting of the continuous film.
  • a heat treatment condition For example, the temperature of 300 ⁇ 500 °C
  • the agglomeration is accelerated, so that the Ag film layer In the V-pits, the adhesion of the Ag metal to the second surface of the light-emitting structure (P-type semiconductor layer 203) is increased due to the large number of dangling bonds on the surface of the groove of the V-shaped pit, and Form an agglomeration center.
  • the metal reflective layer 300 filled in the sparse position of the V-Pits will form a single reflection point;
  • the metal reflective layer 301 at a V-Pi ts dense location forms a monolithic reflective island or reflective layer, i.e., the metal reflective layer fills the V-Pits and extends over a portion of the second surface of the light emitting structure.
  • the metal reflective layer can be distributed over the entire surface or randomly distributed or grid-like.
  • a mirror layer (Mirr or 400) is formed on the Ag metal reflective layer and the second surface 203 of the light emitting structure for forming a good ohmic contact and a mirror effect, and the mirror layer may be a metal reflective layer or
  • the distributed Bragg reflection structure or the omnidirectional reflection structure has a light reflectance of 50% or more for the wavelength range of 200 nm to 150 nm.
  • the mirror layer may be formed by the method (a): using an adhesion metal of Ni or Cr with a thickness of 2 nm or less, and then plating a thick film of Ag of 100 nm or more to form a mirror layer; or a method (b) of plating a thickness of lOnm or more The ITO layer is then plated with a DBR layer to form a mirror layer.
  • an Au metal bonding layer (Bonding Metal) 500 is formed on the mirror layer 400;
  • a heat conductive layer is formed on the metal bonding layer 500, and the thermal conductivity is preferably greater than 100 W/mK, and the material of the heat conductive layer may be Ag or Cu or A1 or MgO or BeO or diamond or graphite or carbon. Black or A1N or a combination of the foregoing, this embodiment is preferably a Cu metal.
  • the growth substrate is removed by laser stripping or etching, the first surface 201 of the light emitting structure 200 is exposed, and the first electrode 700 is formed on the first surface 201.
  • the material may be A1 or Ti or C or Ni or Au or Pt or ITO or a combination of the foregoing to constitute a thin film light emitting diode chip.
  • the light-emitting surface of the first surface 201 may be a plane, or may be a random rough surface or a geometrically processed surface.
  • the light-emitting surface of the first surface 201 illustrated in this embodiment is a plane.
  • the thin film light emitting diode chip structure obtained through the above process steps includes: a permanent substrate and a light emitting structure 200 disposed thereon, wherein the light emitting structure is a film grown by a III-V material. There are two opposite surfaces, wherein the first surface 201 is a light emitting surface and the first electrode 700 is formed, and the second surface 203 is connected to the permanent substrate, wherein the second surface of the light emitting structure has a plurality of One
  • the permanent substrate comprises a metal reflective layer 300/301, a mirror layer 400, a metal bonding layer 500 and a heat conducting layer 600 in order from the top to the bottom, and the thickness ranges from 1 (Vm ⁇ 5 mm; filled in V
  • the metal reflective layer 300 of the -Pits sparse position will form a single reflection point; and the metal reflective layer 301 filled in the dense position of the V-Pits will form a monolithic reflective island or reflective layer, that is, the metal reflective layer is filled with V - Pits and extending over a portion of the second surface 203 of the light emitting structure.
  • the thin-film light-emitting diode chip provided by the invention and the manufacturing method thereof are suitable for manufacturing LED light-emitting devices with vertical or inverted structures, and are also suitable for fabricating UV-LEDs, and have the advantages of realizing light output under a larger unit area. .
  • UV-LEDs make it easier to achieve greater current density operation due to the ease of thermal conduction.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种薄膜发光二极管芯片及其制作方法,包括:永久基材和位于其上的发光结构(200),所述发光结构(200)为III-V族材料所生长的薄膜,有相对的两个表面,其中第一表面(201)为发光的出光面及第一电极(700)所构成,第二表面(203)与所述永久基材进行连接,其特征在于:所述发光结构的第二表面(203)具有若干个V-Pits (204),所述永久基材从上到下包含金属反射层(300、301)、镜面层(400)、金属键合层(500)以及导热层(600),所述金属反射层(301)填充于所述V-Pits (204)中。

Description

一种薄膜发光二极管芯片及其制作方法 技术领域
[0001] 本发明涉及一种半导体发光器件及其制作方法, 更具体地为一种薄膜发光二极 管芯片及制作方法。
背景技术
[0002] 发光二极管已经广泛应用幵发, 众所皆知, LED芯片包括横向结构 (Lateral) 和垂直结构 (Vertical) 。 横向结构 LED芯片的两个电极在 LED芯片的同一侧, 电流在 N和 P限制层中横向传导。 垂直结构的 LED芯片的两个电极分别在 LED外 延层的两侧, 电流几乎全部垂直流过 LED外延层, 极少横向传导的电流, 可以改 善横向结构的电流分布问题, 提高发光效率, 也可以解决电极的遮光问题, 从 而提升 LED的发光面积。
[0003] 目前, 横向结构 (Lateral) 和垂直结构 (Vertical) 的芯片通常都需要用到反射 层 (Mirror) , 目前常用的反射层, 比如银 (Ag) , 其在在蓝绿光波段具有极高 的反射率, 是理想的反射层材料, 但是由于 Ag的稳定性差, 而且纯 Ag与外延层
(如 P-GaN层) 的欧姆接触较差, 因此影响了 Ag反射层的应用, 制约了 LED器件 的可靠性。
技术问题
问题的解决方案
技术解决方案
[0004] 本发明所要解决的技术问题在于: 克服现有技术的不足, 提供一种薄膜发光二 极管芯片及制作方法。
[0005] 为解决上述技术问题, 根据本发明的第一方面, 提供一种薄膜发光二极管芯片 , 包括: 永久基材和位于其上的发光结构, 所述发光结构为 III- V族材料所生长 的薄膜, 有相对的两个表面, 其中第一表面为发光的出光面及第一电极所构成 , 第二表面与所述永久基材进行连接, 其特征在于: 所述发光结构的第二表面 具有若干个 V-Pits, 所述永久基材从上到下包含金属反射层、 镜面层、 金属键合 层以及导热层, 所述金属反射层填充于所述 V-Pits中。
[0006] 优选地, 所述薄膜由 P型的 III-V族薄膜、 N型的 III-V族薄膜以及发光主动层所 构成。
[0007] 优选地, 所述永久基材的厚度范围介于 l(Vm~5mm。
[0008] 优选地, 所述第一电极的材料选用 A1或 Ti或 C或 Ni或 Au或 Pt或 ITO或前述组合 [0009] 优选地, 所述金属反射层的材料选用 Ag。
[0010] 优选地, 所述金属反射层填满于所述 V-Pits, 并延伸于所述发光结构的部分第 二表面上。
[0011] 优选地, 所述金属反射层填充于 V-Pits稀疏的位置形成单体反射点, 填充于 V-P its密集的位置会形成整块的反射岛或反射层。
[0012] 优选地, 所述金属反射层呈整面分布或者无序分布或者网格状分布。
[0013] 优选地, 所述镜面层为金属反射层或者分布布拉格反射结构或者全方位反射结 构。
[0014] 优选地, 所述镜面层对于 200~1150nm波段的光线反射率为 50%以上。
[0015] 优选地, 所述金属键合层的材料选用 Au。
[0016] 优选地, 所述导热层的材料选用 Ag或 Cu或 A1或 MgO或 BeO或钻石或石墨或炭 黑或 A1N或前述组合。
[0017] 优选地, 所述导热层的导热系数大于 100 W/mK。
[0018] 根据本发明的第二方面, 提供一种薄膜发光二极管芯片的制作方法, 包括工艺 步骤:
[0019] (1) 提供一生长衬底, 在其上生长 III- V族材料薄膜, 构成发光结构, 定义所 述发光结构具有相对的两个表面, 其中第一表面为发光的出光面, 第二表面具 有若干个 V-Pits;
[0020] (2) 在所述 V-Pits中填充金属反射层;
[0021] (3) 在所述金属反射层以及发光结构的第二表面上形成镜面层;
[0022] (4) 在所述镜面层上形成金属键合层;
[0023] (5) 在所述金属键合层上形成导热层; [0024] (6) 移除生长衬底, 并在所述发光结构的第一表面上形成第一电极, 构成薄 膜发光二极管芯片。
[0025] 优选地, 所述步骤 1) 中薄膜由 P型的 III-V族薄膜、 N型的 III-V族薄膜以及发光 主动层所构成。
[0026] 优选地, 所述步骤 2) 包括: 采用电子束蒸镀工艺, 沉积金属反射层, 利用热 处理条件, 使得金属在 V-pits中成团, 由于 V-Pits的缺陷存在, 凹槽位置表面悬 挂键多, 吸引力较大, 从而增加金属与发光结构的第二表面的附着性, 并形成 聚集中心。
[0027] 优选地, 所述步骤 2) 中所述金属反射层填满于所述 V-Pits, 并延伸于所述发光 结构的部分第二表面上。
[0028] 优选地, 所述步骤 2) 中金属反射层填充于 V-Pits稀疏的位置形成单体反射点, 填充于 V-Pits密集的位置会形成整块的反射岛或反射层。
[0029] 优选地, 所述金属反射层呈整面分布或者无序分布或者网格状分布。
[0030] 优选地, 所述镜面层为金属反射层或者分布布拉格反射结构或者全方位反射结 构。
[0031] 优选地, 所述镜面层对于 200nm~1150nm波段的光线反射率为 50%以上。
[0032] 优选地, 所述金属键合层的材料选用 Au。
[0033] 优选地, 所述导热层的材料选用 Ag或 Cu或 A1或 MgO或 BeO或钻石或石墨或炭 黑或 A1N或前述组合。
[0034] 优选地, 所述导热层的导热系数大于 100 W/mK。
[0035] 优选地, 所述第一电极的材料选用 A1或 Ti或 C或 Ni或 Au或 Pt或 ITO或前述组合
发明的有益效果
有益效果
[0036] 本发明旨在提出一种薄膜发光二极管芯片及制作方法。 与现有 LED的传统镜面 层结构相比, 本发明在形成镜面层前, 通过在具有 V-Pits的发光结构中填充金属 反射层, 禾 1」用 V-Pits位置多面悬挂建, 从而增加金属与发光结构之外延层的附着 性, 提高反射率, 适合用于制作倒装结构或者垂直结构的 LED。 [0037] 本发明的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从说明书中 变得显而易见, 或者通过实施本发明而了解。 本发明的目的和其他优点可通过 在说明书、 权利要求书以及附图中所特别指出的结构来实现和获得。
对附图的简要说明
附图说明
[0038] 附图用来提供对本发明的进一步理解, 并且构成说明书的一部分, 与本发明的 实施例一起用于解释本发明, 并不构成对本发明的限制。 此外, 附图数据是描 述概要, 不是按比例绘制。
[0039] 图 1~6是本发明实施例的制作薄膜发光二极管芯片的工艺步骤示意图。
[0040] 图 7是本发明实施例的薄膜发光二极管芯片的结构示意图。
[0041] 图中各标号表示如下:
[0042] 100: 生长衬底; 200: 发光结构; 201 : N型半导体层 (第一表面) ; 202: 活 性层; 203: P型半导体层 (第二表面) ; 204: V-pits; 300、 301: 金属反射层 ; 400: 镜面层; 500: 金属键合层; 600: 导热层; 700: 第一电极。
本发明的实施方式
[0043] 下面结合示意图对本发明的薄膜发光二极管芯片及其制作方法进行详细的描述 , 在进一步介绍本发明之前, 应当理解, 由于可以对特定的实施例进行改造, 因此, 本发明并不限于下述的特定实施例。 还应当理解, 由于本发明的范围只 由所附权利要求限定, 因此所采用的实施例只是介绍性的, 而不是限制性的。 除非另有说明, 否则这里所用的所有技术和科学用语与本领域的普通技术人员 所普遍理解的意义相同。
实施例
[0044] 如图 1所示, 在蓝宝石或砷化镓单晶生长衬底 100上生长发光结构 200, 具体 来说, 可以是包括 N型半导体层 201、 活性层 202和 P型半导体层 203构成的外延薄 膜, 薄膜由 P型的 III-V族薄膜、 N型的 III-V族薄膜以及发光主动层所构成, III-V 族薄膜中可以由 III族的硼、 铝、 镓、 铟与 V族的氮、 磷、 砷排列组合而成。 活性 层的发光波长在 200~1150nm之间, 优选紫外波段, 如 UV-A波段 (315~380nm) 。 定义前述的发光结构具有相对的两个表面, 其中第一表面为发光的出光面, 第二表面具有若干个 V-Pits (V型坑) 204, 可以通过控制外延工艺参数获得。
[0045] 如图 2所示, 在 V-Pits 204中填充 Ag金属反射层 300、 301, 填充工艺可以包括: 采用电子束蒸镀工艺, 沉积 10nm厚度以下的 Ag膜层, 再利用热处理条件 (比如 温度 300~500°C) , 由于 Ag薄膜受热, 为降低体系自由能将形成团聚, 由连续膜 的反浸润而变成孤岛, 基于缺陷的存在, 使这种团聚加速, 从而使得 Ag膜层在 V -pits中成团, 由于 V型坑的凹槽位置表面悬挂键多, 吸引力较大, 从而增加了 Ag 金属与发光结构的第二表面 (P型半导体层 203) 的附着性, 并形成聚集中心。 由于 V-Pits在外延层表面分布的不均匀性, 而金属反射层与 V-Pits成对应关系, 因此填充于 V-Pits稀疏的位置的金属反射层 300会形成单体反射点; 而填充于 V-Pi ts密集的位置的金属反射层 301会形成整块的反射岛或反射层, 即金属反射层填 满于 V-Pits并延伸于发光结构的部分第二表面上。 从整体上看, 金属反射层可以 呈整面分布或者无序分布或者网格状分布。
[0046] 如图 3所示, 在 Ag金属反射层以及发光结构的第二表面 203上形成镜面层 (Mirr or) 400, 用于形成良好欧姆接触和镜面效果, 镜面层可以是金属反射层或者分 布布拉格反射结构或者全方位反射结构, 对于 200nm~l 150nm波段的光线反射率 为 50%以上。 制作镜面层可以是方法 (a) : 采用镀 2nm以下厚度的粘附金属 Ni 或者 Cr, 然后镀 lOOnm以上的 Ag厚膜, 从形成镜面层; 也可以是方法 (b) , 镀 lOnm厚度以上的 ITO层, 然后镀 DBR层, 形成镜面层。
[0047] 如图 4所示, 在镜面层 400上形成 Au金属键合层 (Bonding Metal) 500;
[0048] 如图 5所示, 在金属键合层 500上形成导热层, 导热系数优选大于 100 W/mK, 导热层的材料可以选用 Ag或 Cu或 A1或 MgO或 BeO或钻石或石墨或炭黑或 A1N或 前述组合, 本实施例优选 Cu金属。
[0049] 如图 6所示, 通过激光剥离或蚀刻方式去除生长衬底, 从裸露出发光结构 200的 第一表面 201, 并在第一表面 201上形成第一电极 700, 材料可以选用 A1或 Ti或 C 或 Ni或 Au或 Pt或 ITO或前述组合, 从而构成薄膜发光二极管芯片。 需要说明的是 , 第一表面 201出光面可以是平面, 也可以是随机粗糙面或经过几何加工过的面 , 本实施例示意出的第一表面 201出光面为平面。 [0050] 如图 7所示, 经由上述工艺步骤制得的薄膜发光二极管芯片结构, 包括: 永久 基材和位于其上的发光结构 200, 所述发光结构为 III-V族材料所生长的薄膜, 有 相对的两个表面, 其中第一表面 201为发光的出光面及第一电极 700所构成, 第 二表面 203与所述永久基材进行连接, 其中所述发光结构的第二表面具有若干个
V-Pits 204, 所述永久基材从上到下依次包含金属反射层 300/301、 镜面层 400、 金属键合层 500以及导热层 600, 厚度范围介于 l(Vm~5mm; 填充于 V-Pits稀疏的 位置的金属反射层 300会形成单体反射点; 而填充于 V-Pits密集的位置的金属反 射层 301会形成整块的反射岛或反射层, 即金属反射层填满于 V-Pits并延伸于发 光结构的部分第二表面 203上。
[0051] 本发明提供的薄膜发光二极管芯片及其制作方法, 适合制作垂直或者倒装等结 构的 LED发光器件, 也适用于制作 UV-LED, 具有可以实现更大单位面积下的光 输出的优势。 此外, 由于容易导热的关系, UV-LED可以更容易达到更大电流密 度操作。
[0052] 应当理解的是, 上述具体实施方案仅为本发明的部分优选实施例, 以上实施例 还可以进行各种组合、 变形。 本发明的范围不限于以上实施例, 凡依本发明所 做的任何变更, 皆属本发明的保护范围之内。

Claims

权利要求书
[权利要求 1] 一种薄膜发光二极管芯片, 包括: 永久基材和位于其上的发光结构, 所述发光结构为 III-V族材料所生长的薄膜, 有相对的两个表面, 其中 第一表面为发光的出光面及第一电极所构成, 第二表面与所述永久基 材进行连接, 其特征在于: 所述发光结构的第二表面具有若干个 V-Pi ts, 所述永久基材从上到下包含金属反射层、 镜面层、 金属键合层以 及导热层, 所述金属反射层对应填充于所述 V-Pits中。
[权利要求 2] 根据权利要求 1所述的一种薄膜发光二极管芯片, 其特征在于: 所述 金属反射层的材料选用 Ag。
[权利要求 3] 根据权利要求 1所述的一种薄膜发光二极管芯片, 其特征在于: 所述 金属反射层填满于所述 V-Pits, 并延伸于所述发光结构的部分第二表 面上。
[权利要求 4] 根据权利要求 1所述的一种薄膜发光二极管芯片, 其特征在于: 所述 金属反射层填充于 V-Pits稀疏的位置形成单体反射点, 填充于 V-Pits 密集的位置会形成整块的反射岛或反射层。
[权利要求 5] 根据权利要求 1所述的一种薄膜发光二极管芯片, 其特征在于: 所述 金属反射层呈整面分布或者无序分布或者网格状分布。
[权利要求 6] 根据权利要求 1所述的一种薄膜发光二极管芯片, 其特征在于: 所述 镜面层为金属反射层或者分布布拉格反射结构或者全方位反射结构。
[权利要求 7] —种薄膜发光二极管芯片的制作方法, 包括工艺步骤:
(1) 提供一生长衬底, 在其上生长 III-V族材料薄膜, 构成发光结构
, 定义所述发光结构具有相对的两个表面, 其中第一表面为发光的出 光面, 第二表面具有若干个 V-Pits;
(2) 在所述 V-Pits中填充金属反射层;
(3) 在所述金属反射层以及发光结构的第二表面上形成镜面层;
(4) 在所述镜面层上形成金属键合层;
(5) 在所述金属键合层上形成导热层;
(6) 移除生长衬底, 并在所述发光结构的第一表面上形成第一电极 , 构成薄膜发光二极管芯片。
根据权利要求 7所述的一种薄膜发光二极管芯片的制作方法, 其特征 在于: 所述步骤 2) 包括: 采用电子束蒸镀工艺, 沉积金属反射层, 利用热处理条件, 使得金属在 V-pits中聚集成团, 由于 V-Pits的缺陷存 在, 凹槽位置表面悬挂键多, 吸引力较大, 从而增加金属与发光结构 的第二表面的附着性, 并形成聚集中心。
根据权利要求 7所述的一种薄膜发光二极管芯片的制作方法, 其特征 在于: 所述步骤 2) 中所述金属反射层填满于所述 V-Pits, 并延伸于所 述发光结构的部分第二表面上。
根据权利要求 7所述的一种薄膜发光二极管芯片的制作方法, 其特征 在于: 所述步骤 2) 中金属反射层填充于 V-Pits稀疏的位置形成单体反 射点, 填充于 V-Pits密集的位置会形成整块的反射岛或反射层。
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CN113113516B (zh) * 2019-06-28 2023-03-07 厦门市三安光电科技有限公司 一种半导体发光器件及其制备方法
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102074627A (zh) * 2009-11-19 2011-05-25 乐金显示有限公司 半导体发光器件及其制造方法
CN102779911A (zh) * 2012-04-09 2012-11-14 厦门市三安光电科技有限公司 一种垂直结构氮化镓基发光元件的制作方法
KR20130063378A (ko) * 2011-12-06 2013-06-14 서울옵토디바이스주식회사 질화물 반도체 소자 및 그 제조 방법
US9334582B2 (en) * 2014-02-17 2016-05-10 Samsung Electronics Co., Ltd. Apparatus for evaluating quality of crystal, and method and apparatus for manufacturing semiconductor light-emitting device including the apparatus
CN106025024A (zh) * 2016-07-21 2016-10-12 厦门市三安光电科技有限公司 一种氮化物发光二极管及其制作方法
CN106486575A (zh) * 2016-10-31 2017-03-08 厦门市三安光电科技有限公司 一种薄膜发光二极管芯片及其制作方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103872198B (zh) * 2014-03-24 2016-09-28 天津三安光电有限公司 一种多量子阱结构及采用该结构的发光二极管

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102074627A (zh) * 2009-11-19 2011-05-25 乐金显示有限公司 半导体发光器件及其制造方法
KR20130063378A (ko) * 2011-12-06 2013-06-14 서울옵토디바이스주식회사 질화물 반도체 소자 및 그 제조 방법
CN102779911A (zh) * 2012-04-09 2012-11-14 厦门市三安光电科技有限公司 一种垂直结构氮化镓基发光元件的制作方法
US9334582B2 (en) * 2014-02-17 2016-05-10 Samsung Electronics Co., Ltd. Apparatus for evaluating quality of crystal, and method and apparatus for manufacturing semiconductor light-emitting device including the apparatus
CN106025024A (zh) * 2016-07-21 2016-10-12 厦门市三安光电科技有限公司 一种氮化物发光二极管及其制作方法
CN106486575A (zh) * 2016-10-31 2017-03-08 厦门市三安光电科技有限公司 一种薄膜发光二极管芯片及其制作方法

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