WO2021129214A1 - 垂直结构深紫外发光二极管及其制备方法 - Google Patents

垂直结构深紫外发光二极管及其制备方法 Download PDF

Info

Publication number
WO2021129214A1
WO2021129214A1 PCT/CN2020/128347 CN2020128347W WO2021129214A1 WO 2021129214 A1 WO2021129214 A1 WO 2021129214A1 CN 2020128347 W CN2020128347 W CN 2020128347W WO 2021129214 A1 WO2021129214 A1 WO 2021129214A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
emitting diode
conductive substrate
ultraviolet light
deep ultraviolet
Prior art date
Application number
PCT/CN2020/128347
Other languages
English (en)
French (fr)
Inventor
王永进
蒋元
Original Assignee
南京亮芯信息科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 南京亮芯信息科技有限公司 filed Critical 南京亮芯信息科技有限公司
Publication of WO2021129214A1 publication Critical patent/WO2021129214A1/zh
Priority to US17/848,304 priority Critical patent/US20220367755A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements

Definitions

  • the invention relates to the technical fields of lighting, display and optical communication, and in particular to a deep ultraviolet light emitting diode with a vertical structure and a preparation method thereof.
  • LED Light Emitting Diode
  • LED has the advantages of small size, high efficiency, long life, etc., and has a wide range of application prospects in the fields of lighting, display and optical communication.
  • Traditional light-emitting diodes use sapphire as the growth substrate.
  • sapphire substrate is not conductive, traditional light-emitting diodes usually adopt a lateral structure with electrodes on the same side.
  • This lateral structure has at least the following two shortcomings: on the one hand, the current flows laterally in the N-type layer at unequal distances, and there is a phenomenon of current congestion, which leads to higher local heat generation of the light emitting diode device, which affects the performance of the device; , The sapphire substrate has poor thermal conductivity, which limits the heat dissipation of the light-emitting diode device and affects the service life of the light-emitting diode device.
  • a vertical structure light emitting diode has appeared in the prior art.
  • the invention provides a deep ultraviolet light emitting diode with a vertical structure and a preparation method thereof, which are used for solving the problem of low electro-optical conversion efficiency of the deep ultraviolet light emitting diode in the prior art, so as to expand the application field of the deep ultraviolet light emitting diode.
  • the present invention provides a vertical-structure deep ultraviolet light-emitting diode, including:
  • a conductive substrate having a first surface and a second surface opposite to the first surface;
  • the epitaxial layer located on the first surface of the conductive substrate, includes a P-type GaN layer, an electron blocking layer, a quantum well layer, and an N-type layer that are sequentially stacked along the direction in which the second surface points to the first surface AlGaN layer, the thickness of the epitaxial layer is less than 1 micron;
  • N-type electrode located on the surface of the epitaxial layer away from the conductive substrate;
  • the P-type electrode is located on the second surface.
  • it also includes:
  • a transparent passivation layer covering the surface of the epitaxial layer away from the conductive substrate
  • the N-type electrode penetrates the transparent passivation layer in a direction perpendicular to the conductive substrate, and is in contact with the N-type AlGaN layer.
  • the material of the transparent passivation layer is silicon dioxide
  • the transparent passivation layer is distributed around the periphery of the N-type electrode.
  • it also includes:
  • the metal bonding layer is located on the first surface
  • the metal reflective layer is bonded to the surface of the metal bonding layer away from the conductive substrate, and the epitaxial layer is located on the surface of the metal reflective layer.
  • the material of the metal bonding layer is a tin-gold alloy
  • the materials of the metal reflective layer, the P-type electrode and the N-type electrode are all one or two of nickel, gold, and silver. A combination of more than one.
  • the present invention also provides a method for manufacturing a vertical-structure deep ultraviolet light-emitting diode, which includes the following steps:
  • the initial epitaxial layer is formed on the surface of a growth substrate.
  • the initial epitaxial layer includes a buffer layer, an undoped u-AlGaN layer, an initial N-type AlGaN layer, and a quantum layer that are sequentially stacked in a direction perpendicular to the growth substrate.
  • the conductive substrate including a first surface and a second surface opposite to the first surface;
  • the growth substrate, the buffer layer, and the undoped u-AlGaN layer are removed, and the initial N-type AlGaN layer is thinned, so that the thinned initial N-type AlGaN layer serves as the N-type AlGaN layer.
  • -Type AlGaN layer forming an epitaxial layer including a P-type GaN layer, an electron blocking layer, a quantum well layer, and an N-type AlGaN layer sequentially stacked along the direction in which the second surface points to the first surface, so that the The thickness of the epitaxial layer is less than 1 micron;
  • An N-type electrode is formed on the surface of the epitaxial layer away from the conductive substrate, and a P-type electrode is formed on the second surface.
  • the specific steps of forming an initial epitaxial layer on the surface of a growth substrate include:
  • a buffer layer, an undoped u-AlGaN layer, an initial N-type AlGaN layer, a quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially deposited on the surface of the growth substrate along the direction perpendicular to the growth substrate , Forming an initial epitaxial layer, the thickness of the initial epitaxial layer is greater than the wavelength of the light emitted by the vertical structure deep ultraviolet light emitting diode.
  • the specific step of bonding the growth substrate and the conductive substrate in a direction in which the first surface faces the initial epitaxial layer includes:
  • the specific steps of forming an N-type electrode on the surface of the epitaxial layer away from the conductive substrate include:
  • An N-type electrode in contact with the N-type AlGaN layer is formed in the window.
  • the material of the transparent passivation layer is silicon dioxide
  • the transparent passivation layer is distributed around the periphery of the N-type electrode.
  • the vertical structure deep ultraviolet light emitting diode provided by the present invention and the preparation method thereof, by forming an epitaxial layer including a P-type GaN layer, an electron blocking layer, a quantum well layer and an N-type AlGaN layer, the light emitting diode can emit a deep ultraviolet wavelength Light; and the thickness of the epitaxial layer is set to be less than 1 micron, thereby effectively suppressing the waveguide mode inside the device, reducing the thermal effect of the device, improving the response speed of the device, and significantly improving the electro-optical conversion efficiency of the device, Expand the application field of deep ultraviolet light-emitting diodes.
  • FIG. 1 is a schematic diagram of the structure of a deep ultraviolet light emitting diode with a vertical structure in a specific embodiment of the present invention
  • Fig. 2 is a flow chart of a manufacturing method of a vertical-structure deep ultraviolet light emitting diode in a specific embodiment of the present invention
  • Figures 3A-3J are schematic cross-sectional views of main processes in the process of preparing a vertical-structure deep ultraviolet light emitting diode in a specific embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a vertical-structure deep ultraviolet light-emitting diode in an embodiment of the present invention.
  • the vertical structure deep ultraviolet light emitting diode provided by this embodiment includes:
  • a conductive substrate 10 having a first surface and a second surface opposite to the first surface;
  • the epitaxial layer 11 is located on the first surface of the conductive substrate 10 and includes a P-type GaN layer 111, an electron blocking layer 112, and a quantum well layer sequentially stacked along the direction of the second surface pointing to the first surface 113 and the N-type AlGaN layer 114, the thickness d1 of the epitaxial layer 11 is less than 1 micron;
  • the N-type electrode 12 is located on the surface of the epitaxial layer 11 away from the conductive substrate;
  • the P-type electrode 13 is located on the second surface.
  • the material of the conductive substrate 10 may be a metal material or a low-resistance silicon material, and those skilled in the art can make a selection according to actual needs.
  • the epitaxial layer 11 includes a P-type GaN layer 111, an electron blocking layer 112, a quantum well layer 113, and an N-type AlGaN layer sequentially stacked on the first surface of the conductive substrate 10 along the positive direction of the Y axis. 114.
  • the light of the deep ultraviolet wavelength is emitted from the side of the epitaxial layer 11 away from the conductive substrate 10, that is, the arrow direction in FIG. 1 indicates the direction of light emitted by the vertical structure deep ultraviolet light emitting diode.
  • the electron blocking layer 112 is a P-type electron blocking layer
  • the quantum well layer 113 may be an InGaN/GaN multiple quantum well layer.
  • the N-type electrode 12 and the P-type electrode 13 are located in the On the opposite sides of the epitaxial layer 11, almost all current flows through the epitaxial layer 11 in the vertical direction, and there is almost no current flowing in the lateral direction (that is, the X-axis direction in FIG. 1), which improves the efficiency of electrical injection.
  • the thickness d1 of the epitaxial layer 11 is set to be less than 1 micron, so that the vertical-structure deep-ultraviolet light-emitting diode is not restricted by the restricted mode, and the waveguide mode inside the deep-ultraviolet light-emitting diode is suppressed, reducing or even eliminating light emission.
  • the transmission of the light emitted by the diode inside the epitaxial layer 11 reduces the internal absorption loss, thereby achieving a significant increase in the electro-optical conversion efficiency of the vertical-structure deep ultraviolet light emitting diode, a reduction in thermal effects, and a substantial increase in response speed , So that the vertical structure deep ultraviolet light-emitting diode can be used as a light-emitting device and a detection device for display, lighting, optical communication and other fields.
  • the vertical-structure deep ultraviolet light emitting diode further includes:
  • a transparent passivation layer 14 covering the surface of the epitaxial layer 11 away from the conductive substrate 10;
  • the N-type electrode 12 penetrates the transparent passivation layer 14 in a direction perpendicular to the conductive substrate 10 and is in contact with the N-type AlGaN layer 114.
  • the material of the transparent passivation layer 14 is silicon dioxide
  • the transparent passivation layer 14 is distributed around the periphery of the N-type electrode 12.
  • the transparent passivation layer 14 By providing the transparent passivation layer 14 covering the N-type AlGaN layer 114, it is avoided that the entire epitaxial layer 11 is etched (that is, stepped) during the process of manufacturing the vertical structure deep ultraviolet light emitting diode. Structure), simplifies the manufacturing process of the vertical-structure deep-ultraviolet light-emitting diode, and improves the yield of the vertical-structure deep-ultraviolet light-emitting diode; at the same time, the overall light-emitting area of the vertical-structure deep-ultraviolet light-emitting diode is increased, thereby The light extraction efficiency of the vertical structure deep ultraviolet light emitting diode is further improved. Those skilled in the art can also select other transparent insulating materials to form the transparent passivation layer 14 according to actual needs.
  • the vertical-structure deep ultraviolet light emitting diode further includes:
  • the metal bonding layer 15 is located on the first surface
  • the metal reflective layer 16 is bonded to the surface of the metal bonding layer 15 away from the conductive substrate 10, and the epitaxial layer 11 is located on the surface of the metal reflective layer 16.
  • the material of the metal bonding layer 15 is tin-gold alloy or metal indium
  • the material of the metal reflective layer 16, the P-type electrode 13 and the N-type electrode 12 are all titanium, platinum, One or a combination of two or more in gold.
  • the material of the metal reflective layer 16 may be an alloy of titanium, platinum, and gold, and the material of the metal bonding layer 15 is indium.
  • the epitaxial layer 11 can be transferred to the conductive substrate 10 after being grown on the surface of any suitable growth substrate.
  • the arrangement of the metal reflective layer 16 can also reflect the emitted light, thereby further reducing the damage of the light and improving the light extraction efficiency of the vertical-structure deep ultraviolet light emitting diode.
  • FIG. 2 is a flowchart of the method for manufacturing a vertical-structure deep-ultraviolet light-emitting diode in the specific embodiment of the present invention
  • FIGS. 3A-3J It is a schematic cross-sectional view of the main process in the process of preparing the vertical-structure deep ultraviolet light emitting diode in the specific embodiment of the present invention.
  • the structure of the vertical-structure deep ultraviolet light emitting diode prepared in this specific embodiment can be seen in FIG. 1.
  • the method for manufacturing a deep ultraviolet light emitting diode with a vertical structure provided in this embodiment includes the following steps:
  • Step S21 forming an initial epitaxial layer 34 on the surface of a growth substrate 32.
  • the initial epitaxial layer 34 includes a buffer layer 33 and an undoped u-AlGaN layer ( Undoped AlGaN layer) 115, initial N-type AlGaN layer 314, quantum well layer 113, electron blocking layer 112, and P-type GaN layer 111, as shown in FIG. 3C.
  • the specific steps of forming the initial epitaxial layer 34 on the surface of a growth substrate 32 include:
  • a buffer layer 33, an undoped u-AlGaN layer 115, an initial N-type AlGaN layer 314, a quantum well layer 113, an electron blocking layer 112, and a P-type GaN layer 111 are sequentially deposited along a direction perpendicular to the growth substrate 32
  • an initial epitaxial layer 34 is formed on the surface of the growth substrate 32.
  • the thickness d0 of the initial epitaxial layer 34 is greater than the wavelength of light emitted by the vertical-structure deep ultraviolet light emitting diode.
  • the growth substrate 32 may be a III-V group material substrate, a sapphire substrate, or a silicon substrate, and those skilled in the art can choose according to actual needs.
  • the growth substrate 32 is preferably a sapphire substrate.
  • the buffer layer 33 is used to reduce the stress between the growth substrate 32 and the undoped u-AlGaN layer 115.
  • the specific material of the buffer layer 33 can be selected by those skilled in the art according to actual needs, such as AlN.
  • a conductive substrate 10 is formed.
  • the conductive substrate 10 includes a first surface and a second surface opposite to the first surface, as shown in FIG. 3A.
  • the material of the conductive substrate 10 may be a metal material or a low-resistance silicon material, and those skilled in the art can make a selection according to actual needs.
  • the conductive substrate 10 is preferably a low-resistance silicon substrate.
  • Step S23 bonding the growth substrate 32 and the conductive substrate 10 with the first surface facing the initial epitaxial layer 34, as shown in FIG. 3E.
  • the specific step of bonding the growth substrate 32 and the conductive substrate 10 with the first surface facing the initial epitaxial layer 34 includes:
  • the metal bonding layer 15 and the metal reflective layer 16 are bonded, as shown in FIG. 3E.
  • the metal bonding layer 15 is bonded to the metal reflective layer 16. Since the metal bonding layer 15 and the metal reflective layer 16 are made of metal materials, it helps to strengthen the bonding strength between the growth substrate 32 and the conductive substrate 10.
  • step S24 the growth substrate 32, the buffer layer 33 and the undoped u-AlGaN layer 115 are removed, and the initial N-type AlGaN layer 314 is thinned to reduce the initial N-type AlGaN layer.
  • the -type AlGaN layer 314 is used as the N-type AlGaN layer 114, and is formed to include a P-type GaN layer 111, an electron blocking layer 112, a quantum well layer 113, and a P-type GaN layer 111, an electron blocking layer 112, a quantum well layer 113 and
  • the epitaxial layer 11 of the N-type AlGaN layer 114 makes the thickness d1 of the epitaxial layer 11 less than 1 micron, as shown in FIG. 3G.
  • the growth substrate 32 is removed (stripped) by a grinding and polishing technique to form a structure as shown in FIG. 3F; after that, The buffer layer 33 and the undoped u-AlGaN layer 115 are further removed and the initial N-type AlGaN layer 314 is thinned, so that the thickness d1 of the epitaxial layer 11 formed is less than 1 micron, as shown in FIG. 3G Show.
  • Step S25 forming an N-type electrode 12 on the surface of the epitaxial layer 11 away from the conductive substrate 10, and forming a P-type electrode 13 on the second surface, as shown in FIG. 3J.
  • the specific steps of forming the N-type electrode 12 on the surface of the epitaxial layer 11 away from the conductive substrate 10 include:
  • the transparent passivation layer 14 has a window 141 exposing the N-type AlGaN layer 114, as shown in FIG. 3H;
  • An N-type electrode 12 in contact with the N-type AlGaN layer 114 is formed in the window 141, as shown in FIG. 3I.
  • the material of the transparent passivation layer 14 is silicon dioxide
  • the transparent passivation layer 14 is distributed around the periphery of the N-type electrode 12.
  • the window 141 is defined and formed in the transparent passivation layer, as shown in FIG. 3H;
  • the N-type electrode 12 is in the window 141, as shown in FIG. 3I; then, the conductive substrate 10 is reduced to the thickness required for packaging the device, and the conductive substrate 10 is away from the epitaxial layer 11
  • the P-type electrode 13 is vapor-deposited on the surface to form as shown in FIG. 3J.
  • the transparent passivation layer 14 may not be formed, but the N-type electrode 12 may be directly deposited on the N-type AlGaN layer 114 to form the N-type electrode 12.
  • the vertical structure deep-ultraviolet light-emitting diode and the preparation method thereof provided in this specific embodiment are formed to include a P-type GaN layer, an electron blocking layer, a quantum well layer, and an N-type AlGaN layer, so that the light-emitting diode can emit light of deep ultraviolet wavelength ;
  • the thickness of the epitaxial layer is set to be smaller than the wavelength of the light emitted by the device, thereby effectively suppressing the waveguide mode inside the device, reducing the thermal effect of the device, improving the response speed of the device, and making the electro-optical conversion efficiency of the device Significant improvement, expanding the application field of deep ultraviolet light-emitting diodes.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

一种垂直结构深紫外发光二极管及其制备方法。所述垂直结构深紫外发光二极管包括:导电衬底(10),所述导电衬底(10)具有第一表面以及与所述第一表面相对的第二表面;外延层(11),位于所述导电衬底(10)的第一表面,包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层(111)、电子阻挡层(112)、量子阱层(113)和N-型AlGaN层(114),所述外延层(11)的厚度小于1微米;N-型电极(12),位于所述外延层(11)背离所述导电衬底(10)的表面;P-型电极(13),位于所述第二表面。该发光二极管有效抑制了器件内部的波导模式,降低了器件的热效应,提高了器件的响应速度,且使得器件的电光转换效率显著提升。

Description

垂直结构深紫外发光二极管及其制备方法 技术领域
本发明涉及照明、显示和光通信技术领域,尤其涉及一种垂直结构深紫外发光二极管及其制备方法。
背景技术
发光二极管(Light Emitting Diode,LED)具有体积小、效率高、寿命长等优点,在照明、显示和光通信领域具有广泛的应用前景。传统的发光二极管以蓝宝石为生长衬底。然而,由于蓝宝石衬底不导电,所以传统的发光二极管通常是采用电极在同一侧的横向结构。这种横向结构至少存在以下两个方面的缺点:一方面,电流在N型层中横向流动不等距,存在电流拥堵现象,导致发光二极管器件局部发热量较高,影响器件性能;另一方面,蓝宝石衬底的导热性较差,限制了发光二极管器件的散热,影响发光二极管器件的使用寿命。为了克服横向发光二极管器件的缺陷,现有技术中出现了垂直结构发光二极管。
然而,在现有的垂直结构发光二极管中,由于厚膜的限制,存在许多光学约束模式(Confined Mode)。当电子注入、垂直结构发光二极管发光时,大部分出射光会被限制在发光二极管外延层的厚膜中,造成膜内传输、吸收,极大的降低了发光二极管的出光效率。
因此,如何提高发光二极管的电光转换效率,扩大发光二极管的应用领域,是目前亟待解决的技术问题。
发明内容
本发明提供一种垂直结构深紫外发光二极管及其制备方法,用于解决现有技术中的深紫外发光二极管电光转换效率较低的问题,以扩大深紫外发光二极管的应用领域。
为了解决上述问题,本发明提供了一种垂直结构深紫外发光二极管,包括:
导电衬底,所述导电衬底具有第一表面以及与所述第一表面相对的第二表面;
外延层,位于所述导电衬底的第一表面,包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层,所述外延层的厚度小于1微米;
N-型电极,位于所述外延层背离所述导电衬底的表面;
P-型电极,位于所述第二表面。
可选的,还包括:
透明钝化层,覆盖于所述外延层背离所述导电衬底的表面;
所述N-型电极沿垂直于所述导电衬底的方向贯穿所述透明钝化层,且与所述N-型AlGaN层接触。
可选的,所述透明钝化层的材料为二氧化硅;
所述透明钝化层环绕所述N-型电极的外围分布。
可选的,还包括:
金属键合层,位于所述第一表面;
金属反射层,与所述金属键合层背离所述导电衬底的表面键合,所述外延层位于所述金属反射层表面。
可选的,所述金属键合层的材料为锡金合金,所述金属反射层、所述P-型电极和所述N-型电极的材料均为镍、金、银中的一种或两种以上的组合。
为了解决上述问题,本发明还提供了一种垂直结构深紫外发光二极管的制备方法,包括如下步骤:
形成初始外延层于一生长衬底表面,所述初始外延层包括沿垂直于所述生长衬底的方向依次叠置的缓冲层、非掺杂u-AlGaN层、初始N-型AlGaN层、量子阱层、电子阻挡层和P-型GaN层;
形成一导电衬底,所述导电衬底包括第一表面以及与所述第一表面相对的第二表面;
以所述第一表面朝向所述初始外延层的方向键合所述生长衬底和所述导电衬底;
去除所述生长衬底、所述缓冲层和所述非掺杂u-AlGaN层,并减薄所述初始N-型AlGaN层,以减薄后的所述初始N-型AlGaN层作为N-型AlGaN层,形成包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层的外延层,使得所述外延层的厚度小于1微米;
形成N-型电极于所述外延层背离所述导电衬底的表面,并形成P-型电极 于所述第二表面。
可选的,形成初始外延层于一生长衬底表面的具体步骤包括:
提供一生长衬底;
沿垂直于所述生长衬底的方向依次沉积缓冲层、非掺杂u-AlGaN层、初始N-型AlGaN层、量子阱层、电子阻挡层和P-型GaN层于所述生长衬底表面,形成初始外延层,所述初始外延层的厚度大于所述垂直结构深紫外发光二极管发射的光线的波长。
可选的,以所述第一表面朝向所述初始外延层的方向键合所述生长衬底和所述导电衬底的具体步骤包括:
形成金属键合层于所述第一表面;
形成金属反射层于所述初始外延层背离所述生长衬底的表面;
键合所述金属键合层和所述金属反射层。
可选的,形成N-型电极于所述外延层背离所述导电衬底的表面的具体步骤包括:
形成透明钝化层于所述外延层背离所述导电衬底的表面,所述透明钝化层中具有暴露所述N-型AlGaN层的窗口;
形成与所述N-型AlGaN层接触的N-型电极于所述窗口内。
可选的,所述透明钝化层的材料为二氧化硅;
所述透明钝化层环绕所述N-型电极的外围分布。
本发明提供的垂直结构深紫外发光二极管及其制备方法,通过形成包括P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层的外延层,使得发光二极管能够发射深紫外波长的光线;而且,将所述外延层的厚度设置为小于1微米,从而有效抑制了器件内部的波导模式,降低了器件的热效应,提高了器件的响应速度,且使得器件的电光转换效率显著提升,扩展了深紫外发光二极管的应用领域。
附图说明
附图1是本发明具体实施方式中垂直结构深紫外发光二极管的结构示意图;
附图2是本发明具体实施方式中垂直结构深紫外发光二极管的制备方法流 程图;
附图3A-3J是本发明具体实施方式中在制备垂直结构深紫外发光二极管的过程中主要的工艺截面示意图。
具体实施方式
下面结合附图对本发明提供的垂直结构深紫外发光二极管及其制备方法的具体实施方式做详细说明。
本具体实施方式提供了一种垂直结构深紫外发光二极管,附图1是本发明具体实施方式中垂直结构深紫外发光二极管的结构示意图。如图1所示,本具体实施方式提供的垂直结构深紫外发光二极管,包括:
导电衬底10,所述导电衬底10具有第一表面以及与所述第一表面相对的第二表面;
外延层11,位于所述导电衬底10的第一表面,包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层111、电子阻挡层112、量子阱层113和N-型AlGaN层114,所述外延层11的厚度d1小于1微米;
N-型电极12,位于所述外延层11背离所述导电衬底的表面;
P-型电极13,位于所述第二表面。
具体来说,所述导电衬底10的材料可以为金属材料,也可以为低阻硅材料,本领域技术人员可以根据实际需要进行选择。所述外延层11包括沿Y轴正方向依次叠置于所述导电衬底10的所述第一表面的P-型GaN层111、电子阻挡层112、量子阱层113和N-型AlGaN层114。深紫外波长的光线自所述外延层11背离所述导电衬底10的一侧射出,即图1中的箭头方向表示所述垂直结构深紫外发光二极管发射的光线的方向。所述电子阻挡层112为P-型电子阻挡层,所述量子阱层113可以为InGaN/GaN多量子阱层。
在本具体实施方式中,在沿垂直于所述导电衬底10的方向上(即图1中的Y轴方向上),所述N-型电极12与所述P-型电极13位于所述外延层11的相对两侧,使得电流几乎全部沿垂直方向流过所述外延层11,几乎没有横向(即图1中的X轴方向)流动的电流,提高了电注入效率。同时,将所述外延层11的厚度d1设置为小于1微米,使得所述垂直结构深紫外发光二极管不受约束模式的限制,深紫外发光二极管内部的波导模式被抑制,减少甚至是消除了 发光二极管发出的光线在所述外延层11内部的传输,降低了内部的吸收损耗,从而实现了所述垂直结构深紫外发光二极管电光转换效率的显著提升,热效应的降低,以及响应速度的大幅度提升,使得所述垂直结构深紫外发光二极管可以作为发光器件和探测器件使用,用于显示、照明和光通信等领域。
可选的,所述垂直结构深紫外发光二极管还包括:
透明钝化层14,覆盖于所述外延层11背离所述导电衬底10的表面;
所述N-型电极12沿垂直于所述导电衬底10的方向贯穿所述透明钝化层14,且与所述N-型AlGaN层114接触。
可选的,所述透明钝化层14的材料为二氧化硅;
所述透明钝化层14环绕所述N-型电极12的外围分布。
具体来说,光线自所述透明钝化层14向外射出。通过设置覆盖所述N-型AlGaN层114的所述透明钝化层14,避免了在制造所述垂直结构深紫外发光二极管的过程中对所述外延层11的整体刻蚀(即形成台阶状结构),简化了所述垂直结构深紫外发光二极管的制造工艺,提高了所述垂直结构深紫外发光二极管的良率;同时,增大了所述垂直结构深紫外发光二极管整体的出光面积,从而进一步提高了所述垂直结构深紫外发光二极管的出光效率。本领域技术人员还可以根据实际需要选择其他透明绝缘材料形成所述透明钝化层14。
可选的,所述垂直结构深紫外发光二极管还包括:
金属键合层15,位于所述第一表面;
金属反射层16,与所述金属键合层15背离所述导电衬底10的表面键合,所述外延层11位于所述金属反射层16表面。
可选的,所述金属键合层15的材料为锡金合金或者金属铟,所述金属反射层16、所述P-型电极13和所述N-型电极12的材料均为钛、铂、金中的一种或两种以上的组合。举例来说,所述金属反射层16的材料可以为钛、铂、金三者的合金,所述金属键合层15的材料为铟。
具体来说,通过所述金属键合层15与所述金属反射层16的键合,使得所述外延层11可以在任意合适的生长衬底表面生长形成之后再转移至所述导电衬底10。所述金属反射层16的设置,还能够对出射光线进行反射,从而进一步减少了光线的损伤,提高了所述垂直结构深紫外发光二极管的出光效率。
不仅如此,本发明具体实施方式还提供了一种垂直结构深紫外发光二极管的制备方法,附图2是本发明具体实施方式中垂直结构深紫外发光二极管的制备方法流程图,附图3A-3J是本发明具体实施方式中在制备垂直结构深紫外发光二极管的过程中主要的工艺截面示意图,本具体实施方式制备的垂直结构深紫外发光二极管的结构可参见图1。如图1-图2、图3A-图3J所示,本具体实施方式提供的垂直结构深紫外发光二极管的制备方法,包括如下步骤:
步骤S21,形成初始外延层34于一生长衬底32表面,所述初始外延层34包括沿垂直于所述生长衬底32的方向依次叠置的缓冲层33、非掺杂u-AlGaN层(未掺杂的AlGaN层)115、初始N-型AlGaN层314、量子阱层113、电子阻挡层112和P-型GaN层111,如图3C所示。
可选的,形成初始外延层34于一生长衬底32表面的具体步骤包括:
提供一生长衬底32;
沿垂直于所述生长衬底32的方向依次沉积缓冲层33、非掺杂u-AlGaN层115、初始N-型AlGaN层314、量子阱层113、电子阻挡层112和P-型GaN层111于所述生长衬底32表面,形成初始外延层34,所述初始外延层34的厚度d0大于所述垂直结构深紫外发光二极管发射的光线的波长。
具体来说,所述生长衬底32可以为Ⅲ-Ⅴ族材料衬底、蓝宝石衬底或者硅衬底,本领域技术人员可以根据实际需要进行选择。在本具体实施方式中,所述生长衬底32优选为蓝宝石衬底。所述缓冲层33用于降低所述生长衬底32与所述非掺杂u-AlGaN层115之间的应力。所述缓冲层33的具体材料本领域技术人员可以根据实际需要进行选择,例如AlN。
步骤S22,形成一导电衬底10,所述导电衬底10包括第一表面以及与所述第一表面相对的第二表面,如图3A所示。
具体来说,所述导电衬底10的材料可以为金属材料,也可以为低阻硅材料,本领域技术人员可以根据实际需要进行选择。在本具体实施方式中,所述导电衬底10优选为低阻硅衬底。
步骤S23,以所述第一表面朝向所述初始外延层34的方向键合所述生长衬底32和所述导电衬底10,如图3E所示。
可选的,以所述第一表面朝向所述初始外延层34的方向键合所述生长衬 底32和所述导电衬底10的具体步骤包括:
形成金属键合层15于所述第一表面,如图3B所示;
形成金属反射层16于所述初始外延层34背离所述生长衬底32的表面,如图3D所示;
键合所述金属键合层15和所述金属反射层16,如图3E所示。
具体来说,在键合所述生长衬底32与所述导电衬底10的过程中,以所述金属键合层15朝向所述金属反射层16的方式键合。由于所述金属键合层15与所述金属反射层16的材料均为金属材料,从而有助于加强所述生长衬底32与所述导电衬底10之间键合强度。
步骤S24,去除所述生长衬底32、所述缓冲层33和所述非掺杂u-AlGaN层115,并减薄所述初始N-型AlGaN层314,以减薄后的所述初始N-型AlGaN层314作为N-型AlGaN层114,形成包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层111、电子阻挡层112、量子阱层113和N-型AlGaN层114的外延层11,使得所述外延层11的厚度d1小于1微米,如图3G所示。
具体来说,在键合所述生长衬底32与所述导电衬底10之后,首先,采用研磨抛光技术去除(剥离)所述生长衬底32,形成如图3F所示的结构;之后,进一步去除所述缓冲层33和所述非掺杂u-AlGaN层115并减薄所述初始N-型AlGaN层314,使得形成的所述外延层11的厚度d1小于1微米,如图3G所示。
步骤S25,形成N-型电极12于所述外延层11背离所述导电衬底10的表面,并形成P-型电极13于所述第二表面,如图3J所示。
可选的,形成N-型电极12于所述外延层11背离所述导电衬底10的表面的具体步骤包括:
形成透明钝化层14于所述外延层11背离所述导电衬底10的表面,所述透明钝化层14中具有暴露所述N-型AlGaN层114的窗口141,如图3H所示;
形成与所述N-型AlGaN层114接触的N-型电极12于所述窗口141内,如图3I所示。
可选的,所述透明钝化层14的材料为二氧化硅;
所述透明钝化层14环绕所述N-型电极12的外围分布。
具体来说,于所述N-型AlGaN层114表面生长所述透明钝化层14之后,于所述透明钝化层中定义并形成所述窗口141,如图3H所示;之后,蒸镀N-型电极12于所述窗口141,如图3I所示;接着,减薄所述导电衬底10至封装器件所需的厚度,并于所述导电衬底10背离所述外延层11的表面蒸镀所述P-型电极13,形成如图3J所示。
在其他具体实施方式中,也可以不形成所述透明钝化层14,而是直接于所述N-型AlGaN层114沉积形成所述N-型电极12。
本具体实施方式提供的垂直结构深紫外发光二极管及其制备方法,通过形成包括P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层,使得发光二极管能够发射深紫外波长的光线;而且,将所述外延层的厚度设置为小于器件发射的光线的波长,从而有效抑制了器件内部的波导模式,降低了器件的热效应,提高了器件的响应速度,且使得器件的电光转换效率显著提升,扩展了深紫外发光二极管的应用领域。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种垂直结构深紫外发光二极管,其特征在于,包括:
    导电衬底,所述导电衬底具有第一表面以及与所述第一表面相对的第二表面;
    外延层,位于所述导电衬底的第一表面,包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层,所述外延层的厚度小于1微米;
    N-型电极,位于所述外延层背离所述导电衬底的表面;
    P-型电极,位于所述第二表面。
  2. 根据权利要求1所述的垂直结构深紫外发光二极管,其特征在于,还包括:
    透明钝化层,覆盖于所述外延层背离所述导电衬底的表面;
    所述N-型电极沿垂直于所述导电衬底的方向贯穿所述透明钝化层,且与所述N-型AlGaN层接触。
  3. 根据权利要求2所述的垂直结构深紫外发光二极管,其特征在于,所述透明钝化层的材料为二氧化硅;
    所述透明钝化层环绕所述N-型电极的外围分布。
  4. 根据权利要求1所述的垂直结构深紫外发光二极管,其特征在于,还包括:
    金属键合层,位于所述第一表面;
    金属反射层,与所述金属键合层背离所述导电衬底的表面键合,所述外延层位于所述金属反射层表面。
  5. 根据权利要求4所述的垂直结构深紫外发光二极管,其特征在于,所述金属键合层的材料为锡金合金或者金属铟,所述金属反射层、所述P-型电极和所述N-型电极的材料均为钛、铂、金中的一种或两种以上的组合。
  6. 一种垂直结构深紫外发光二极管的制备方法,其特征在于,包括如下步骤:形成初始外延层于一生长衬底表面,所述初始外延层包括沿垂直于所述生长衬底的方向依次叠置的缓冲层、非掺杂u-AlGaN层、初始N-型AlGaN层、量子阱层、电子阻挡层和P-型GaN层;
    形成一导电衬底,所述导电衬底包括第一表面以及与所述第一表面相对的第二表面;
    以所述第一表面朝向所述初始外延层的方向键合所述生长衬底和所述导电衬底;
    去除所述生长衬底、所述缓冲层和所述非掺杂u-AlGaN层,并减薄所述初始N-型AlGaN层,以减薄后的所述初始N-型AlGaN层作为N-型AlGaN层,形成包括沿所述第二表面指向所述第一表面的方向依次叠置的P-型GaN层、电子阻挡层、量子阱层和N-型AlGaN层的外延层,使得所述外延层的厚度小于1微米;
    形成N-型电极于所述外延层背离所述导电衬底的表面,并形成P-型电极于所述第二表面。
  7. 根据权利要求6所述的垂直结构深紫外发光二极管的制备方法,其特征在于,形成初始外延层于一生长衬底表面的具体步骤包括:
    提供一生长衬底;
    沿垂直于所述生长衬底的方向依次沉积缓冲层、非掺杂u-AlGaN层、初始N-型AlGaN层、量子阱层、电子阻挡层和P-型GaN层于所述生长衬底表面,形成初始外延层,所述初始外延层的厚度大于所述垂直结构深紫外发光二极管发射的光线的波长。
  8. 根据权利要求6所述的垂直结构深紫外发光二极管的制备方法,其特征在于,以所述第一表面朝向所述初始外延层的方向键合所述生长衬底和所述导电衬底的具体步骤包括:
    形成金属键合层于所述第一表面;
    形成金属反射层于所述初始外延层背离所述生长衬底的表面;
    键合所述金属键合层和所述金属反射层。
  9. 根据权利要求6所述的垂直结构深紫外发光二极管的制备方法,其特征在于,形成N-型电极于所述外延层背离所述导电衬底的表面的具体步骤包括:
    形成透明钝化层于所述外延层背离所述导电衬底的表面,所述透明钝化层中具有暴露所述N-型AlGaN层的窗口;
    形成与所述N-型AlGaN层接触的N-型电极于所述窗口内。
  10. 根据权利要求9所述的垂直结构深紫外发光二极管的制备方法,其特征在 于,所述透明钝化层的材料为二氧化硅;
    所述透明钝化层环绕所述N-型电极的外围分布。
PCT/CN2020/128347 2019-12-26 2020-11-12 垂直结构深紫外发光二极管及其制备方法 WO2021129214A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/848,304 US20220367755A1 (en) 2019-12-26 2022-06-23 Vertical deep-ultraviolet light-emitting diode and method for manufacturing same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201911364817.6A CN111106212A (zh) 2019-12-26 2019-12-26 垂直结构深紫外发光二极管及其制备方法
CN201911364817.6 2019-12-26

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/848,304 Continuation US20220367755A1 (en) 2019-12-26 2022-06-23 Vertical deep-ultraviolet light-emitting diode and method for manufacturing same

Publications (1)

Publication Number Publication Date
WO2021129214A1 true WO2021129214A1 (zh) 2021-07-01

Family

ID=70424857

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/128347 WO2021129214A1 (zh) 2019-12-26 2020-11-12 垂直结构深紫外发光二极管及其制备方法

Country Status (3)

Country Link
US (1) US20220367755A1 (zh)
CN (1) CN111106212A (zh)
WO (1) WO2021129214A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111106212A (zh) * 2019-12-26 2020-05-05 南京亮芯信息科技有限公司 垂直结构深紫外发光二极管及其制备方法
CN111725361A (zh) * 2020-05-08 2020-09-29 南京亮芯信息科技有限公司 亚微米垂直结构深紫外led制备工艺以及其制成的深紫外led

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102214749A (zh) * 2011-06-20 2011-10-12 云峰 一种垂直结构发光二极管及其薄膜与衬底剥离的方法
CN105489717A (zh) * 2016-01-11 2016-04-13 西安交通大学 一种垂直结构led芯片的制备工艺
CN106410006A (zh) * 2016-06-22 2017-02-15 厦门乾照光电股份有限公司 一种集成可见光指示装置的紫外发光二极管及其生产方法
CN107069433A (zh) * 2017-06-20 2017-08-18 中国科学院半导体研究所 GaN基紫外激光器晶圆、激光器芯片及激光器及其制备方法
CN111106212A (zh) * 2019-12-26 2020-05-05 南京亮芯信息科技有限公司 垂直结构深紫外发光二极管及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106449932A (zh) * 2016-11-17 2017-02-22 映瑞光电科技(上海)有限公司 一种垂直结构发光二极管及其制造方法
CN106449955A (zh) * 2016-11-17 2017-02-22 映瑞光电科技(上海)有限公司 一种垂直结构发光二极管及其制造方法
CN109841714B (zh) * 2019-01-09 2020-12-11 南京邮电大学 垂直结构近紫外发光二极管及其制备方法
CN110176525B (zh) * 2019-06-10 2021-08-27 苏州亮芯光电科技有限公司 亚波长垂直结构发光二极管及其制备方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102214749A (zh) * 2011-06-20 2011-10-12 云峰 一种垂直结构发光二极管及其薄膜与衬底剥离的方法
CN105489717A (zh) * 2016-01-11 2016-04-13 西安交通大学 一种垂直结构led芯片的制备工艺
CN106410006A (zh) * 2016-06-22 2017-02-15 厦门乾照光电股份有限公司 一种集成可见光指示装置的紫外发光二极管及其生产方法
CN107069433A (zh) * 2017-06-20 2017-08-18 中国科学院半导体研究所 GaN基紫外激光器晶圆、激光器芯片及激光器及其制备方法
CN111106212A (zh) * 2019-12-26 2020-05-05 南京亮芯信息科技有限公司 垂直结构深紫外发光二极管及其制备方法

Also Published As

Publication number Publication date
CN111106212A (zh) 2020-05-05
US20220367755A1 (en) 2022-11-17

Similar Documents

Publication Publication Date Title
JP6722221B2 (ja) 発光ダイオード
US7714343B2 (en) Light emitting device
US9166110B2 (en) Light-emitting diode and method of manufacturing the same
CN109841714B (zh) 垂直结构近紫外发光二极管及其制备方法
JP5354622B2 (ja) 半導体発光ダイオード
US20050145872A1 (en) High performance nitride-based light-emitting diodes
US20150034900A1 (en) Light-emitting diode and method of manufacturing the same
TW201946294A (zh) 發光二極體、其製作方法及發光裝置
WO2020143274A1 (zh) 垂直结构蓝光发光二极管及其制备方法
JP5377725B1 (ja) 半導体発光素子
KR20100080094A (ko) 방사형 이종접합 구조의 나노 막대를 이용한 발광 다이오드
WO2021129214A1 (zh) 垂直结构深紫外发光二极管及其制备方法
JP2008066442A (ja) 発光ダイオード
CN211182232U (zh) 一种倒装紫外发光二极管芯片
JP2010251531A (ja) 半導体発光素子
US20110150023A1 (en) Nitride semiconductor laser device
JP2009059851A (ja) 半導体発光ダイオード
KR101211108B1 (ko) 고전압 구동 발광다이오드 및 그 제조방법
WO2021102696A1 (zh) 一种红外发光二极管
KR101805301B1 (ko) 광추출효율 향상을 위한 p-형 오믹 접합 전극 패턴을 구비한 자외선 발광 다이오드 소자
KR20140116574A (ko) 발광소자 및 이의 제조방법
JP5865870B2 (ja) 半導体発光素子
JP5123221B2 (ja) 発光装置
JP2007250714A (ja) 発光素子
CN203659930U (zh) 具有金属反射层的半导体发光器件

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20907034

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20907034

Country of ref document: EP

Kind code of ref document: A1