WO2018066483A1 - Élément semiconducteur - Google Patents

Élément semiconducteur Download PDF

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WO2018066483A1
WO2018066483A1 PCT/JP2017/035690 JP2017035690W WO2018066483A1 WO 2018066483 A1 WO2018066483 A1 WO 2018066483A1 JP 2017035690 W JP2017035690 W JP 2017035690W WO 2018066483 A1 WO2018066483 A1 WO 2018066483A1
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layer
semiconductor element
less
amorphous
electrode
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PCT/JP2017/035690
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Japanese (ja)
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細野 秀雄
日出也 雲見
暁 渡邉
中村 伸宏
伊藤 和弘
宮川 直通
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国立大学法人東京工業大学
旭硝子株式会社
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Priority to JP2018543876A priority Critical patent/JPWO2018066483A1/ja
Publication of WO2018066483A1 publication Critical patent/WO2018066483A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details

Definitions

  • the present invention relates to a semiconductor element, for example, a semiconductor element such as a solar cell and a thin film transistor.
  • semiconductor elements such as solar cells and thin film transistors (TFTs) have a configuration in which an electrode layer is disposed on a member made of crystalline or amorphous n-type silicon (see, for example, Patent Document 1).
  • a normal semiconductor element has a problem that the interface between the n-type silicon member and the electrode layer does not exhibit ohmic resistance behavior, and as a result, the interface contact resistance is high. This is one factor that hinders the efficiency improvement of semiconductor elements.
  • the present invention has been made in view of such a background, and an object of the present invention is to provide a semiconductor element in which contact resistance between an n-type silicon member and an electrode layer is significantly suppressed.
  • an n-type Si portion A first layer disposed on the n-type Si portion; A second layer disposed on the first layer; An electrode layer disposed on the second layer;
  • the first layer is composed of an oxide electride containing calcium atoms and aluminum atoms
  • Said second layer comprises the following groups: (I) a metal oxide comprising zinc (Zn) and oxygen (O), and further comprising at least one of silicon (Si) and tin (Sn); (Ii) a metal oxide containing titanium (Ti) and oxygen (O), (Iii) a metal oxide containing tin (Sn) and oxygen (O), and (iv) a metal oxide containing zinc (Zn) and oxygen (O),
  • a semiconductor device selected from is provided.
  • the present invention can provide a semiconductor element in which contact resistance between the n-type silicon member and the electrode layer is significantly suppressed.
  • an n-type Si portion A first layer disposed on the n-type Si portion; A second layer disposed on the first layer; An electrode layer disposed on the second layer;
  • the first layer is composed of an oxide electride containing calcium atoms and aluminum atoms
  • Said second layer comprises the following groups: (I) a metal oxide comprising zinc (Zn) and oxygen (O), and further comprising at least one of silicon (Si) and tin (Sn); (Ii) a metal oxide containing titanium (Ti) and oxygen (O), (Iii) a metal oxide containing tin (Sn) and oxygen (O), and (iv) a metal oxide containing zinc (Zn) and oxygen (O),
  • a semiconductor device selected from is provided.
  • an interface between an n-type Si portion and a layer disposed immediately above the n-type Si portion is referred to as a “first interface”.
  • an interface between the electrode layer and a layer disposed immediately below the electrode layer is referred to as a “second interface”.
  • a normal semiconductor element has a problem that the contact resistance at the first interface between the n-type silicon member and the electrode layer is high.
  • select the appropriate metal material to increase the carrier concentration in Si near the interface or to reduce the Schottky barrier height at the metal-Si interface The technique of doing is known.
  • the former has a limit in reducing contact resistance due to a physical phenomenon such as the solid solubility limit of dopant in a semiconductor and the latter the Fermi level pinning at the metal / Si interface.
  • a plurality of layers are added between the n-type silicon member and the electrode layer.
  • the first layer having the above-described characteristics included in the semiconductor element has good electron conductivity. Further, it has been confirmed that the contact resistance of the interface between the first layer and the n-type Si portion (that is, the “first interface”) is relatively low.
  • the first layer By disposing the first layer on the n-type Si portion, Fermi level pinning does not occur at the first interface, and the first layer has a high carrier density and a low work function.
  • the barrier height at the interface of 1 is small. Therefore, the contact resistance of the first interface can be significantly suppressed while ensuring the operability as the semiconductor element.
  • Fermi level pinning means that when the semiconductor and the metal are joined, the change in the Schottky barrier height is small even if metals having various work functions are used. For example, when Si and Al are bonded, the Schottky barrier height is about 1.5 eV, which is higher than the Schottky barrier height expected from the work function (4.2 eV) of Al and the electron affinity (4 eV) of Si. Is also big. Fermi level pinning is caused by the interface states or interface states existing in the band gap of the semiconductor, but it is considered that the chemical stability of the interface is greatly related in practice.
  • the first layer as described above has a relatively high contact resistance with the metal. For this reason, when the electrode layer comprised with the metal is arrange
  • the first layer and the electrode layer are not in direct contact. That is, the second layer is disposed between the first layer and the electrode layer.
  • the second layer has good electronic conductivity. Further, it has been confirmed that the contact resistance of the interface between the second layer and the electrode (that is, the “second interface”) is relatively low. It has also been confirmed that the contact resistance is relatively low at the interface between the first layer and the second layer (hereinafter referred to as “third interface”).
  • the Schottky barrier height is significantly suppressed at the second interface and the third interface for the same reason as the first interface, so that the operability as the semiconductor element is ensured.
  • the contact resistance of the second interface (or the third interface) can be significantly suppressed.
  • element efficiency can be significantly improved.
  • the present semiconductor element is applied to a solar cell, the power generation efficiency can be significantly increased.
  • this semiconductor element is applied to a TFT, it is possible to significantly increase the operation efficiency.
  • FIG. 1 shows a schematic cross section of a semiconductor device (hereinafter referred to as “first semiconductor device”) according to an embodiment of the present invention.
  • the first semiconductor element 100 includes a support 110, an n-type Si layer 120, a first layer 130, a second layer 140, and an electrode layer 150.
  • the support 110 has a role of supporting each layer disposed on the support 110 and facilitating the formation of the n-type Si layer 120.
  • the support 110 may have a p-type Si layer.
  • the support 110 may be a p-type Si layer.
  • the support 110 may have an amorphous Si layer.
  • the support 110 may be an amorphous Si layer.
  • the support 110 may be omitted.
  • the n-type Si layer 120 is composed of a layer containing n-type silicon Si.
  • the n-type Si layer 120 may be amorphous or crystalline.
  • the first layer 130 is composed of an oxide electride containing calcium atoms and aluminum atoms.
  • the second layer 140 is made of a metal oxide containing zinc (Zn) and oxygen (O), and further containing at least one of silicon (Si) and tin (Sn).
  • first layer 130 and the second layer 140 The details of the first layer 130 and the second layer 140 will be described later.
  • the electrode layer 150 is made of metal (or alloy; the same applies hereinafter).
  • the first to third interfaces that is, the interface between the n-type Si layer 120 and the first layer 130 (first interface), the second layer
  • the contact resistance is significantly suppressed at each of the interface between the electrode layer 150 and the electrode layer 150 (second interface) and the interface between the first layer 130 and the second layer 140 (third interface). Is done.
  • the operating efficiency can be significantly improved.
  • the support 110 has a role of supporting each layer disposed on the support 110 and facilitating the formation of the n-type Si layer 120.
  • the material of the support 110 is not particularly limited.
  • the support 110 when the first semiconductor element 100 is applied to a part of a solar cell, the support 110 may be made of p-type Si or non-doped Si.
  • the support 110 when the first semiconductor element 100 is applied to a part of the TFT, the support 110 may include amorphous Si or crystalline Si, or may be composed of amorphous Si or crystalline Si.
  • the support 110 may be a substrate made of glass, alumina, silicon, or the like.
  • the support 110 is not an essential component and may be omitted.
  • N-type Si layer 120 An n-type Si layer 120 is disposed on the support 110.
  • the n-type Si layer 120 may be crystalline or amorphous.
  • the n-type Si layer 120 may be doped with phosphorus (P) and / or arsenic (As).
  • the electron density of the n-type Si layer 120 may be in the range of 10 14 cm ⁇ 3 to 10 21 cm ⁇ 3 , for example.
  • the electron density is preferably 10 16 cm ⁇ 3 or more, and more preferably 10 18 cm ⁇ 3 or more. If the electron density is 10 14 cm ⁇ 3 or more, the contact resistance tends to be low.
  • the electron density is preferably 10 20 cm ⁇ 3 or less, and more preferably 10 19 cm ⁇ 3 or less.
  • the first layer 130 is composed of an oxide electride containing calcium atoms and aluminum atoms.
  • the first layer 130 has conductivity, a significantly high ionization potential, and a low work function.
  • the work function of the first layer 130 is in the range of 2.4 eV to 4.5 eV (eg, 2.8 eV to 3.2 eV).
  • the first layer 130 has a feature of high electron density.
  • the electron density of the first layer 130 is, for example, in the range of 2.0 ⁇ 10 17 cm ⁇ 3 to 2.3 ⁇ 10 21 cm ⁇ 3 .
  • the electron density is more preferably 1.0 ⁇ 10 18 cm ⁇ 3 or more, further preferably 1 ⁇ 10 19 cm ⁇ 3 or more, and particularly preferably 1 ⁇ 10 20 cm ⁇ 3 or more.
  • the interface (first interface) between the n-type Si layer 120 and the first layer 130 exhibits ohmic properties due to a tunnel effect. Therefore, the contact resistance of the first interface is significantly suppressed.
  • the first layer 130 also exhibits good contact resistance with the second layer 140 (third interface).
  • the contact resistance can be significantly suppressed at both the first interface and the third interface.
  • the thickness of the first layer 130 is preferably in the range of 0.5 nm to 10 nm. If it is 0.5 nm or more, a homogeneous thin film can be formed, and thus the contact resistance reduction effect can be obtained stably.
  • the thickness of the first layer 130 is more preferably 2 nm or more, and further preferably 3 nm or more. On the other hand, if the thickness of the first layer 130 is 10 nm or less, the influence of volume resistance can be ignored.
  • the thickness of the first layer 130 is more preferably 7 nm or less, and further preferably 5 nm or less.
  • the thickness of the first layer 130 can be measured by X-ray reflection (XRR) or observation with a cross-sectional transmission electron microscope.
  • the first layer 130 may be amorphous or crystalline. Hereinafter, each case will be described.
  • the first layer 130 may be made of an amorphous oxide electride containing calcium atoms and aluminum atoms.
  • Amorphous means a substance that does not give a sharp peak in X-ray diffraction measurement. Specifically, when the X-ray wavelength ⁇ is 0.154 nm and the Scherrer constant K is 0.9, the crystallite diameter (Scherrer diameter) obtained by the Scherrer equation represented by the following equation (1) is 5: .2 nm or less.
  • the Scherrer diameter L is a Scherrer constant K, an X-ray wavelength ⁇ , a half-value width ⁇ , and a peak position ⁇ .
  • L K ⁇ / ( ⁇ cos ⁇ ) (1)
  • an electride of an amorphous oxide containing calcium atoms and aluminum atoms is composed of a solvate in which an amorphous composed of calcium atoms, aluminum atoms and oxygen atoms is used as a solvent and electrons are used as a solute.
  • An amorphous solid material is meant.
  • Electrons in electride can work as anions.
  • the electrons may exist as bipolarons.
  • Bipolaron is composed of calcium atoms, aluminum atoms, and oxygen atoms, and is adjacent to two cages that are three-dimensionally connected and have a void of about 0.4 nm in inner diameter.
  • Each cage has an electron (solute). Is included.
  • the state of the amorphous oxide electride is not limited to the above, and two electrons (solutes) may be included in one cage.
  • a plurality of these cages may be in an aggregated state, and the aggregated cage can be regarded as a microcrystal. Therefore, a state in which the microcrystal is included in the amorphous is also regarded as amorphous.
  • the molar ratio of aluminum atom to calcium atom (Ca / Al) in the “amorphous oxide electride” is preferably in the range of 0.3 to 5.0, more preferably in the range of 0.55 to 1.00.
  • the range of 0.8 to 0.9 is more preferable, and the range of 0.84 to 0.86 is particularly preferable.
  • composition of “amorphous oxide electride” is preferably 12CaO ⁇ 7Al 2 O 3, but is not limited thereto, and examples thereof include the following compounds (1) to (5).
  • metal atoms such as Sr, Mg, and / or Ba.
  • a compound in which some or all of Ca atoms are substituted with Sr is strontium aluminate Sr 12 Al 14 O 33 , and calcium strontium aluminum is used as a mixed crystal in which the mixing ratio of Ca and Sr is arbitrarily changed.
  • Nate Ca 12-x Sr X Al 14 O 33 (x is an integer of 1 to 11; in the case of an average value, it is a number greater than 0 and less than 12).
  • a part of metal atoms and / or nonmetal atoms (excluding oxygen atoms) in 12CaO.7Al 2 O 3 is Ti, V, One or more transition metal atoms selected from the group consisting of Cr, Mn, Fe, Co, Ni, and Cu or one or more alkali metal atoms selected from the group consisting of typical metal atoms, Li, Na, and K; Or an isomorphous compound substituted with one or more rare earth atoms selected from the group consisting of Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb.
  • a compound in which some or all of the free oxygen ions included in the cage are replaced with other anions include, for example, anions such as H ⁇ , H 2 ⁇ , H 2 ⁇ , O ⁇ , O 2 ⁇ , OH ⁇ , F ⁇ , Cl ⁇ , and S 2 ⁇ , and nitrogen (N). There are anions.
  • Bipolaron has almost no light absorption in the visible light range where the photon energy is 1.55 eV to 3.10 eV, and shows light absorption in the vicinity of 4.6 eV. Accordingly, the first layer 130 is transparent in visible light. In addition, by measuring the light absorption characteristics of the first layer 130 and measuring the light absorption coefficient in the vicinity of 4.6 eV, whether or not bipolaron is present in the first layer 130, that is, the first layer 130 is measured. It can be confirmed whether or not has an electride of amorphous oxide.
  • the composition analysis of the first layer 130 can be performed by an XPS method, an EPMA method, an EDX method, or the like. Analysis by the XPS method is possible when the film thickness is 100 nm or less, EPMA method when the film thickness is 50 nm or more, and EDX method when it is 3 ⁇ m or more.
  • the first layer 130 is composed of an amorphous oxide electride, no peak is observed in the X-ray diffraction measurement, and only a halo is observed.
  • the first layer 130 may contain microcrystals. Whether or not microcrystals are contained in the first layer 130 is determined from, for example, a cross-sectional TEM (transmission electron microscope) photograph of the first layer 130.
  • the composition in the crystalline state is represented by 12CaO ⁇ 7Al 2 O 3 , CaO ⁇ Al 2 O 3 , 3CaO ⁇ Al 2 O 3 and the like.
  • the microcrystal is a crystal having a Scherrer diameter larger than 5.2 nm and smaller than 100 nm. When the first layer 130 is microcrystalline, conductivity is improved.
  • the light absorption value at a position of 4.6 eV may be 100 cm ⁇ 1 or more, or 200 cm ⁇ 1 or more. If the light absorption value at the position of 4.6 eV is 100 cm ⁇ 1 or more, the electron density increases and the work function decreases, so that the contact resistance can be sufficiently reduced.
  • the electron density of the first layer 130 can be measured by an iodine titration method.
  • the density of bipolarons in the electride thin film can be calculated by multiplying the measured electron density by 1/2.
  • a sample of the first layer 130 is immersed in a 5 mol / l iodine aqueous solution and dissolved by adding hydrochloric acid. This is a method for titration detection.
  • iodine in the aqueous iodine solution is ionized by the following reaction: I 2 + e ⁇ ⁇ 2I ⁇ (2)
  • Formula (2) When titrating an aqueous iodine solution with sodium thiosulfate, 2Na 2 S 2 O 3 + I 2 ⁇ 2NaI + Na 2 S 4 O 6 (3)
  • the amount of iodine consumed in the reaction of equation (2) is calculated by subtracting the amount of iodine detected by titration in equation (3) from the amount of iodine present in the initial solution. Thereby, the electron density in the sample of the first layer 130 can be measured.
  • a method for forming the amorphous first layer 130 is not particularly limited.
  • the amorphous first layer 130 may be formed by, for example, a vapor deposition method.
  • the amorphous first layer 130 may be deposited by heating the raw material in a vacuum of 10 ⁇ 7 Pa to 10 ⁇ 3 Pa, for example. Further, the amorphous first layer 130 may be formed by a sputtering method or the like.
  • the first layer 130 may be made of a crystalline oxide electride containing calcium atoms and aluminum atoms.
  • Crystal electrite electrides are three-dimensionally stacked with their respective cages sharing a plane, so that a crystal lattice is formed, and electrons are included in a part of these cages.
  • the electrons included in the cage are loosely bound in the cage and can move freely in the crystal. For this reason, the crystalline C12A7 electride exhibits higher conductivity than the amorphous C12A7 electride.
  • the composition of the “crystalline oxide electride” is the same as the composition of the “amorphous oxide electride” described above.
  • the crystalline oxide electride can be produced by heat-treating the amorphous oxide electride to 900 ° C. or higher.
  • the heat treatment can be performed by heating with a normal electric furnace, infrared heating, laser heating, induction heating, or the like.
  • the second layer 140 includes zinc (Zn) and oxygen (O), and further includes a metal oxide including at least one of silicon (Si) and tin (Sn).
  • the second layer 140 may include zinc (Zn), silicon (Si), and oxygen (O).
  • a second layer is particularly referred to as a “ZSO layer”.
  • the second layer may include zinc (Zn), tin (Sn), and oxygen (O).
  • ZTO layer such a second layer is particularly referred to as a “ZTO layer”.
  • the second layer may include zinc (Zn), silicon (Si), tin (Sn), and oxygen (O).
  • ZSTO layer zinc (Zn), silicon (Si), tin (Sn), and oxygen (O).
  • ZSTO layer zinc (Zn), silicon (Si), tin (Sn), and oxygen
  • the ZSO layer contains zinc (Zn), silicon (Si), and oxygen (O).
  • ZnO zinc
  • Si silicon
  • O oxygen
  • the second layer 140 does not have a crystal grain boundary, and thus is superior in flatness and homogeneity as compared to a generally used oxide semiconductor such as ZnO.
  • the value of Zn / (Zn + Si) is, for example, preferably in the range of 0.30 to 0.95 in molar ratio. If it is 0.30 or more, a sufficiently large electron mobility can be obtained and the film can be used after being thickened, so that the Si substrate can be sufficiently chemically protected. If it is 0.95 or less, since a smooth surface is obtained, a short circuit can be suppressed.
  • the value of Zn / (Zn + Si) may be 0.70 or more, 0.80 or more, or 0.85 or more in terms of molar ratio.
  • the value of Zn / (Zn + Si) may be 0.94 or less in molar ratio, 0.92 or less, or 0.90 or less.
  • x 0.30 or more, a sufficiently large electron mobility can be obtained and the film can be used after being thickened, so that the Si substrate can be sufficiently protected.
  • x 0.95 or less, a smooth surface can be obtained and short-circuiting can be suppressed.
  • x may be 0.70 or more, 0.80 or more, or 0.85 or more.
  • x may be 0.94 or less, 0.92 or less, or 0.90 or less.
  • the ZSO layer is excellent in transparency, and exhibits a high electron mobility of, for example, 0.1 cm 2 V ⁇ 1 s ⁇ 1 to 5.0 cm 2 V ⁇ 1 s ⁇ 1 .
  • the ZSO layer since the ZSO layer is homogeneous and does not have crystal grain boundaries, and has a low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate.
  • the Si substrate and various functional layers formed on the substrate are known to deteriorate in characteristics mainly due to the influence of oxygen and moisture when exposed to the outside air, and a protective layer is usually required.
  • the thickness of the ZSO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZSO layer is 10 nm or more, it sufficiently functions as a protective layer. If the thickness of the ZSO layer is 1000 nm or less, the manufacturing process is short. When the thickness of the ZSO layer exceeds 1000 nm, in order to improve the film formation speed (film formation thickness per unit time), for example, when using a sputtering method, a plurality of sputtering targets are prepared, or a high output A film forming apparatus is required.
  • the thickness of the ZSO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more. On the other hand, the thickness of the ZSO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.
  • the ZTO layer contains zinc (Zn), tin (Sn), and oxygen (O).
  • the etching rate is appropriate, and a desired shape can be formed without excessive etching, so that the semiconductor element can be manufactured stably.
  • SnO 2 in terms of oxide, relative to the total 100 mol% of ZnO and SnO 2, SnO 2 is 15 mol% or more, and preferably not more than 95 mol%. If SnO 2 is 15 mol% or more, the crystallization temperature is high, and it is difficult to crystallize in the heat treatment step performed in various processes. If SnO 2 is less 95 mol%, in easy sintering, good oxide target is obtained, easy to form a thin film. SnO 2 may be 20 mol% or more, 30 mol% or more, 35 mol% or more, or 40 mol% or more. On the other hand, SnO 2 may be 70 mol% or less, 60 mol% or less, or 50 mol% or less.
  • ZTO layer is excellent in transparency, for example, shows a high electron mobility 1cm 2 V -1 s -1 ⁇ 10cm 2 V -1 s -1.
  • the ZSTO layer is homogeneous and does not have a crystal grain boundary and has low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate.
  • the thickness of the ZTO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZTO layer is 10 nm or more, it sufficiently functions as a protective layer. If the thickness of the ZTO layer is 1000 nm or less, the manufacturing process is short.
  • the thickness of the ZTO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more.
  • the thickness of the ZSO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.
  • the ZSTO layer includes zinc (Zn), tin (Sn), silicon (Si), and oxygen (O).
  • the work function is low, the etching rate is appropriate, and high transparency is obtained, so that the semiconductor element characteristics are improved.
  • SnO 2 in terms of oxide, ZnO, relative to SnO 2, and the total 100 mol% of SiO 2, SnO 2 is 15 mol% or more, and preferably not more than 95 mol%. If SnO 2 is 15 mol% or more, the crystallization temperature is high, and it is difficult to crystallize in the heat treatment step performed in various processes. If it is 95 mol% or less, it is easy to sinter, a good oxide target is obtained, and a thin film is easily formed. SnO 2 may be 30 mol% or more, 35 mol% or more, or 40 mol% or more. On the other hand, SnO 2 may be 70 mol% or less, 60 mol% or less, or 50 mol% or less.
  • SiO 2 in terms of oxide, ZnO, relative to SnO 2, and the total 100 mol% of SiO 2, SiO 2 is, 7 mol% or more, and preferably not more than 30 mol%. SiO 2 is 7 mol% or more, not more than 30 mol%, the electron affinity is not too high, the volume resistivity is not too high. SiO 2 may be 8 mol% or more, or 10 mol% or more. On the other hand, SiO 2 may be less 20 mol%, may be not more than 15 mol%.
  • the ZSTO layer is excellent in transparency and exhibits a high electron mobility of, for example, 0.1 cm 2 V ⁇ 1 s ⁇ 1 to 3 cm 2 V ⁇ 1 s ⁇ 1 .
  • the ZSTO layer is homogeneous and does not have a crystal grain boundary and has low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate.
  • the thickness of the ZSTO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZSTO layer is 10 nm or more, it sufficiently functions as a protective layer for the Si substrate and various functional layers formed on the substrate. In addition, if the thickness of the ZSTO layer is 1000 nm or less, the manufacturing process is short.
  • the thickness of the ZSTO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more. On the other hand, the thickness of the ZSTO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.
  • the second layer 140 may further include one or more metal components selected from the group consisting of titanium (Ti), indium (In), gallium (Ga), niobium (Nb), and aluminum (Al). .
  • Ti titanium
  • In indium
  • Ga gallium
  • Nb niobium
  • Al aluminum
  • the content of these metal components calculated as oxide, ZnO, the total 100 mol% of SiO 2, SnO 2, and other oxides of the metal components, preferably not more than 15 mol%, more preferably 10mol % Or less, more preferably 5 mol% or less. In terms of oxides, these metals are calculated as TiO 2 , In 2 O 3 , Ga 2 O 3 , Nb 2 O 5 , or Al 2 O 3 .
  • the composition of the second layer 140 can be analyzed using EPMA when the thickness is 200 nm or more.
  • the analysis can be performed using SEM-EDX having an acceleration voltage of 10 kV.
  • the analysis can also be performed by performing substrate correction using XRF.
  • the second layer 140 can be analyzed by using a volume of 1 mm 3 or more.
  • the second layer 140 is dominant in an amorphous state or an amorphous state.
  • amorphous means a substance that does not give a sharp peak in the X-ray diffraction measurement, like the first layer 130.
  • the amorphous state is dominant when the amorphous is present in a volume ratio of more than 50%.
  • the second layer 140 is predominantly amorphous or amorphous because the film surface has high smoothness and can prevent a short circuit of the element.
  • the second layer 140 may be a microcrystal or a mixture of amorphous and microcrystal.
  • the microcrystal is a crystal having a Scherrer diameter larger than 5.2 nm and smaller than 100 nm. It is preferable that the second layer 140 be microcrystalline because conductivity is improved. It is preferable that the second layer 140 is in a form in which amorphous and microcrystals are mixed because both smoothness and conductivity are improved.
  • the electron mobility of the second layer 140 is preferably 10 ⁇ 4 cm 2 ⁇ V ⁇ 1 s ⁇ 1 to 10 2 cm 2 ⁇ V ⁇ 1 s ⁇ 1 .
  • the thickness of the second layer 140 can be 10 nm or more, and as a protective layer for the Si substrate and various functional layers formed on the substrate. Works well. If it is 10 2 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or less, the amorphous state becomes dominant, the smoothness of the film surface is high, and the short circuit of the element can be prevented.
  • the electron mobility of the second layer 140 may be 10 ⁇ 4 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or more, or may be 10 ⁇ 3 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or more. It may be ⁇ 2 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or more.
  • the electron mobility of the second layer 140 may be 10 2 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or less, may be 10 cm 2 ⁇ V ⁇ 1 s ⁇ 1 or less, and may be 10 ⁇ 1 cm 2. It may be V ⁇ 1 s ⁇ 1 or less.
  • the electron density of the second layer 140 is preferably 1 ⁇ 10 14 cm ⁇ 3 to 1 ⁇ 10 21 cm ⁇ 3 . If the thickness is 1 ⁇ 10 14 cm ⁇ 3 or more, the thickness of the second layer 140 can be 10 nm or more, and it sufficiently functions as a protective layer for the Si substrate and various functional layers formed on the substrate. If it is 1 ⁇ 10 21 cm ⁇ 3 or less, the amorphous state becomes dominant, the smoothness of the film surface is high, and the short circuit of the element can be prevented.
  • the electron density of the second layer 140 may be 1 ⁇ 10 14 cm ⁇ 3 or more, 5 ⁇ 10 16 cm ⁇ 3 or more, or 1 ⁇ 10 18 cm ⁇ 3 or more. Good.
  • the electron density of the second layer 140 may be 1 ⁇ 10 21 cm ⁇ 3 or less, 5 ⁇ 10 20 cm ⁇ 3 or less, or 1 ⁇ 10 20 cm ⁇ 3 or less. Good.
  • the electron mobility of the second layer 140 can be obtained by a hole measurement method, a time-of-flight (TOF) method, or the like.
  • the electron density of the second layer 140 can be obtained by an iodine titration method, a Hall measurement method, or the like.
  • the electron affinity of the second layer 140 is preferably 2.0 eV to 4.0 eV. If it is 2.0 eV or more, the contact resistance can be sufficiently reduced. If it is 4.0 eV or less, the effect of reducing the contact resistance cannot be sufficiently obtained.
  • the electron affinity of the second layer 140 may be 2.0 eV or more, 2.2 eV or more, or 2.5 eV or more. On the other hand, the electron affinity of the second layer 140 may be 4.0 eV or less, 3.5 eV or less, or 3.0 eV or less.
  • the ionization potential of the second layer 140 is preferably 5.5 eV to 8.5 eV.
  • the second layer 140 having such a large ionization potential has a high hole blocking effect and can selectively transport only electrons.
  • the ionization potential of the second layer 140 may be 5.7 eV or more, or 5.9 eV or more.
  • the ionization potential of the second layer 140 may be 7.5 eV or less, or 7.0 eV or less.
  • the interface between the n-type Si layer and the metal electrode layer usually does not exhibit ohmic resistance behavior and has a problem that the contact resistance of the interface is high.
  • the second layer 140 forms an ohmic junction with the metal electrode layer 150, and has a characteristic that the contact resistance between the two layers is relatively small. Further, as described above, the contact resistance at the interface between the second layer 140 and the first layer 130 is significantly small. For this reason, even if the second layer 140 is provided on the first layer 130, the influence of the contact resistance increase due to the increase in the number of interfaces is small.
  • the entire resistance loss in the first semiconductor element 100 can be suppressed. This also makes it possible to increase the element efficiency in the first semiconductor element 100.
  • the electrode layer 150 is made of metal.
  • the electrode layer 150 may be made of, for example, aluminum, an aluminum alloy, copper, a copper alloy, or the like.
  • the thickness of the electrode layer 150 is, for example, in the range of 50 nm to 100 nm.
  • a thickness of the electrode layer 150 of 50 nm or more is preferable because a low-resistance electrode is formed.
  • a thickness of the electrode layer 150 of 100 nm or less is preferable because a step at the edge of the electrode is small and a coating property of a film to be formed later is good.
  • the thickness of the electrode layer 150 may be 60 nm or more, or 70 nm or more. On the other hand, the thickness of the electrode layer 150 may be 90 nm or less, or 80 nm or less.
  • the electrode layer 150 may be configured in a mesh shape, for example.
  • FIG. 2 shows a schematic flow chart of an example of a method for manufacturing the first semiconductor element 100.
  • this manufacturing method (hereinafter referred to as “first manufacturing method”) Placing an n-type Si layer on the support (step S110); disposing a first layer on the n-type Si layer (step S120); Disposing a second layer on the first layer (step S130); Disposing an electrode layer on the second layer (step S140); Have
  • Step S110 First, the support body 110 is prepared.
  • the material of the support 110 is not particularly limited.
  • the case where the support 110 is a Si substrate will be described as an example.
  • the surface of the support 110 is sufficiently cleaned before the subsequent steps.
  • an n-type Si layer 120 is formed on the support 110.
  • the n-type Si layer 120 may be formed, for example, by doping the surface of the support 110, that is, the Si substrate, with an n-type dopant such as phosphorus and / or arsenic.
  • Step S120 Next, the first layer 130 is disposed on the n-type Si layer 120.
  • the method for forming the first layer 130 is not particularly limited.
  • the first layer 130 can be formed by, for example, a “vapor deposition method” using a target including aluminum (Al) and calcium (Ca).
  • the “vapor deposition method” means that a target material including a physical vapor deposition (PVD) method, a PLD method, a sputtering method, and a vacuum deposition method is vaporized and then formed. It means a general term for a film forming method to be deposited on a film member.
  • the first layer 130 may be formed by an evaporation method.
  • the first layer 130 may be deposited by heating the raw material in a vacuum of 10 ⁇ 7 Pa to 10 ⁇ 3 Pa, for example. If it is 10 ⁇ 7 Pa or more, a sufficient electron density can be obtained. It may be 10 ⁇ 6 Pa or higher, or 10 ⁇ 5 Pa or higher. If it is 10 ⁇ 3 Pa or less, a thin film can be formed at low cost using a simple apparatus. It may be 10 ⁇ 4 Pa or less, or 10 ⁇ 5 Pa or less. Further, the first layer 130 may be formed by a sputtering method or the like.
  • the first layer 130 formed by vapor deposition has an amorphous structure. Thereafter, the first layer 130 may be heat-treated as necessary. In this case, for example, the crystalline first layer 130 can be obtained by heat-treating the first layer 130 at 900 ° C. or higher.
  • Step S130 Next, the second layer 140 is disposed on the first layer 130.
  • the second layer 140 can be formed by, for example, a “vapor deposition method” including a sputtering method using a target including zinc (Zn) and silicon (Si).
  • Sputtering methods include DC (direct current) sputtering method, high frequency sputtering method, helicon wave sputtering method, ion beam sputtering method, magnetron sputtering method and the like.
  • the second layer 140 can be formed relatively uniformly in a large area region.
  • the target only needs to contain Zn and Si.
  • Zn and Si may be contained in a single target or may be separately contained in a plurality of targets.
  • Zn and Si may exist as a metal or a metal oxide, respectively, or may exist as an alloy or a composite metal oxide.
  • the metal oxide or composite metal oxide may be crystalline or amorphous.
  • the target may contain one or more metal components selected from the group consisting of Sn, Ti, In, Ga, Nb, and Al in addition to Zn and Si.
  • Zn, Si and other metal components may be contained in a single target, or may be separately contained in a plurality of targets.
  • Zn, Si and other metal components may exist as a metal or a metal oxide, respectively, or may exist as an alloy or a composite metal oxide of two or more metals.
  • the metal oxide or composite metal oxide may be crystalline or amorphous.
  • the Zn / (Zn + Si) value in the target may be 0.30 to 0.95, 0.70 to 0.94, 0.80 in terms of molar ratio. It may be ⁇ 0.92 and may be 0.85 ⁇ 0.90.
  • a single target contains one or more metal components selected from the group consisting of Sn, Ti, In, Ga, Nb, and Al in addition to Zn and Si, the content of these metal components is oxide in terms of, ZnO, the total 100 mol% of an oxide of SiO 2 and other metal components, preferably not more than 15 mol%, more preferably not more than 10 mol%, more preferably not more than 5 mol%.
  • the metal component is calculated as SnO 2 , TiO 2 , In 2 O 3 , Ga 2 O 3 , Nb 2 O 5 , or Al 2 O 3 .
  • the composition analysis of the target can be performed by the XRF method or the like. Note that the composition of the second layer 140 may differ from the composition ratio of the target used.
  • the second layer 140 can be obtained by simultaneously sputtering a metal Si target and a ZnO target.
  • Other combinations of a plurality of targets include a combination of a ZnO target and a SiO 2 target, a combination of a plurality of targets including ZnO and SiO 2 with different ZnO ratios, a combination of a metal Zn target and a metal Si target, Examples include a combination of a metal Zn target and a SiO 2 target, and a combination of a metal Zn or metal Si target and a ZnO and SiO 2 target.
  • the second layer 140 having a desired composition can be obtained by adjusting the power applied to each target.
  • the support 110 may not be “positively” heated. preferable. This is because when the temperature of the support 110 is increased, the second layer 140 may not easily become amorphous.
  • the support 110 may be “incidentally” heated by the sputtering process itself by ion bombardment or the like. In this case, how much the temperature of the support 110 increases depends on the sputtering conditions. In order to avoid an increase in the temperature of the support 110, the support 110 may be “positively” cooled.
  • the first layer 130 is preferably formed at a temperature of the support 110 of 70 ° C. or lower.
  • the temperature of the support 110 may be 60 ° C. or less, or 50 ° C. or less.
  • the pressure of the sputtering gas (pressure in the chamber of the sputtering apparatus) is preferably in the range of 0.05 Pa to 10 Pa, more preferably 0.1 Pa to 5 Pa, and further preferably 0.2 Pa to 3 Pa. If it is this range, since the pressure of sputtering gas will not be too low, plasma will become stable. Moreover, since the pressure of sputtering gas is not too high, the temperature rise of the support body 110 due to an increase in ion bombardment can be suppressed.
  • the sputtering gas used is not particularly limited.
  • the sputtering gas may be an inert gas or a noble gas. Oxygen may be contained.
  • the inert gas eg, N 2 gas.
  • examples of the rare gas include He (helium), Ne (neon), Ar (argon), Kr (krypton), and Xe (xenon). These may be used alone or in combination with other gases.
  • the sputtering gas may be a reducing gas such as NO (nitrogen monoxide) or CO (carbon monoxide).
  • the second layer 140 can be formed on the first layer 130.
  • Step S140 Next, the electrode layer 150 is disposed on the second layer 140.
  • the formation method of the electrode layer 150 is not particularly limited.
  • the electrode layer 150 may be formed by a known film forming technique such as a vapor deposition method, a sputtering method, or a coating method.
  • the first semiconductor element 100 can be manufactured.
  • the first semiconductor element 100 may further be provided with other members as necessary.
  • FIG. 3 shows a schematic cross section of another semiconductor element (hereinafter referred to as “second semiconductor element”) according to an embodiment of the present invention.
  • the second semiconductor element 200 includes a support 210, an n-type Si layer 220, a first layer 230, a second layer 240, and an electrode layer 250 in this order.
  • the configuration of the second semiconductor element 200 is substantially the same as that of the first semiconductor element 100 shown in FIG.
  • the support 210 to the first layer 230 and the electrode layer 250 are respectively the support 110 to the first layer 130 and the electrode layer in the first semiconductor element 100.
  • 150 has the same configuration.
  • the second layer 240 in the second semiconductor element 200 is composed of a layer different from the second layer 140 in the first semiconductor element 100.
  • the second layer 240 is (A) a metal oxide containing titanium (Ti) and oxygen (O), (B) a metal oxide containing tin (Sn) and oxygen (O), and (c) a metal oxide containing zinc (Zn) and oxygen (O), Consists of either.
  • the second layer 240 has high chemical durability, and is particularly excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the second layer 240 may be made of titanium oxide doped with Nb (niobium). Since the second layer 240 is composed of titanium oxide doped with Nb (niobium) and exhibits high conductivity, the film thickness can be particularly increased, so that the Si substrate and various types formed on the substrate can be formed. Excellent protection for the functional layer.
  • the value of Nb / (Ti + Nb) is, for example, in the range of 0.01 to 0.15 in molar ratio.
  • Nb niobium
  • the molar ratio of Nb / (Ti + Nb) may be 0.02 or more, 0.03 or more, or 0.05 or more.
  • the molar ratio Nb / (Ti + Nb) may be 0.10 or less, 0.08 or less, or 0.07 or less.
  • the second layer 240 has high chemical durability, and is particularly excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the second layer 240 may be made of tin oxide, ITO (indium tin oxide), tin oxide doped with fluorine, or the like.
  • the second layer 240 is made of tin oxide, so that the chemical durability is high, and particularly, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the second layer 240 is made of ITO, high conductivity can be obtained.
  • the film thickness can be increased, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the value of In / (Sn + In) is, for example, in the range of 0.03 to 0.2 in terms of molar ratio. Since it will show high electroconductivity if it is 0.03 or more, since a film thickness can be enlarged, it is excellent in the protection property with respect to the Si substrate and various functional layers formed on the substrate. If it is 0.20 or less, since Sn (tin) is dissolved, a homogeneous thin film can be produced.
  • the molar ratio of In / (Sn + In) may be 0.5 or more, 0.07 or more, or 0.09 or more.
  • the value of In / (Sn + In) may be 0.15 or less, 0.13 or less, or 0.11 or less in terms of molar ratio.
  • the second layer 240 is composed of tin oxide doped with fluorine, so that the chemical durability is high, and in particular, the second substrate 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the value of F / (Sn + F) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained. In particular, since the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since F (fluorine) is dissolved, a homogeneous thin film can be produced.
  • the value of F / (Sn + F) may be 0.03 or more, 0.05 or more, or 0.08 or more in terms of molar ratio.
  • the value of F / (Sn + F) may be 0.15 or less in molar ratio, 0.12 or less, or 0.1 or less.
  • the second layer 240 may be made of zinc oxide, IZO (indium zinc oxide), zinc oxide doped with aluminum, zinc oxide doped with gallium, or the like.
  • the second layer 240 is composed of zinc oxide, high conductivity can be obtained. In particular, since the film thickness can be increased, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate. .
  • the second layer 240 is made of IZO, high conductivity can be obtained.
  • the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate.
  • the value of Zn / (Zn + In) is, for example, in the range of 0.01 to 0.2 in molar ratio. If it is 0.01 or more, high conductivity can be obtained.
  • the Si substrate and various functional layers formed on the substrate are excellent in protection. Since Zn (zinc) is dissolved, a homogeneous thin film can be produced.
  • the value of Zn / (Zn + In) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio.
  • the value of Zn / (Zn + In) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.
  • the second layer 240 is made of zinc oxide doped with aluminum, high conductivity can be obtained.
  • various functional layers formed on the Si substrate and the substrate excellent protection against.
  • the value of Al / (Zn + Al) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained.
  • the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since Al (aluminum) is dissolved, a homogeneous thin film can be produced.
  • the value of Al / (Zn + Al) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio.
  • the value of Al / (Zn + Al) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.
  • the second layer 240 is composed of zinc oxide doped with gallium, high conductivity can be obtained.
  • various functional layers formed on the Si substrate and the substrate are provided. Excellent protection against.
  • the value of Ga / (Zn + Ga) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained.
  • the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since Ga (gallium) is dissolved, a homogeneous thin film can be produced.
  • the value of Ga / (Zn + Ga) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio.
  • the value of Ga / (Zn + Ga) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.
  • the second layer 240 may be crystalline or amorphous.
  • the second layer 240 is characterized in that an ohmic junction is formed at the interface (second interface) with the metal electrode layer 250, and the contact resistance of the second interface is relatively small. Further, the contact resistance at the interface (third interface) between the second layer 240 and the first layer 230 is also significantly small. For this reason, even if the second layer 240 is provided on the first layer 230, the influence of an increase in contact resistance due to an increase in the number of interfaces is small.
  • the contact resistance is significantly suppressed also at the interface (first interface) between the n-type Si layer 220 and the first layer 230.
  • the same effects as those of the first semiconductor element 100 can be obtained in the second semiconductor element 200. That is, in the second semiconductor element 200, the first to third interfaces, that is, the interface (first interface) between the n-type Si layer 220 and the first layer 230, the second layer 240 and the electrode layer. Contact resistance is significantly suppressed at each of the interface between the first layer 230 and the second layer 240 (third interface). As a result, in the second semiconductor element 200, the efficiency during operation can be significantly improved.
  • Second manufacturing method As a method for manufacturing the second semiconductor element 200 (hereinafter referred to as “second manufacturing method”), the flowchart of the first manufacturing method shown in FIG. 2 described above can be referred to. In particular, steps S110 to S120 and step S140 in the first manufacturing method described above can be applied to the second manufacturing method as they are.
  • step S130 shown in FIG. 2 that is, an example of an installation method of the second layer will be described.
  • the second layer 240 as described above, (A) a metal oxide containing titanium (Ti) and oxygen (O), (B) a metal oxide containing tin (Sn) and oxygen (O), or (c) a metal oxide containing zinc (Zn) and oxygen (O), Consists of either.
  • the second layer 240 can be formed by, for example, a “vapor deposition method” including a sputtering method.
  • Sputtering methods include DC (direct current) sputtering method, high frequency sputtering method, helicon wave sputtering method, ion beam sputtering method, magnetron sputtering method and the like.
  • the second layer 240 can be formed relatively uniformly in a large area region.
  • the target only needs to include a predetermined material.
  • a target containing Ti is used.
  • a target containing Sn is used.
  • a target containing Zn is used.
  • These targets may be metals or metal oxides.
  • the target may be crystalline or amorphous.
  • the support 210 in forming the second layer 240 may not be “positively” heated. preferable.
  • the installation method of the second layer 240 shown here is merely an example, and the second layer 240 may be installed by other methods.
  • FIG. 4 shows a schematic cross section of still another semiconductor element (hereinafter referred to as “third semiconductor element”) according to an embodiment of the present invention.
  • the third semiconductor element 300 includes a support 310, an n-type Si layer 320, a first layer 330, a third layer 342, a fourth layer 344, and an electrode layer. 350.
  • the third semiconductor element 300 has a configuration very similar to that of the first semiconductor element 100 shown in FIG.
  • the support 310 to the third layer 342 and the electrode layer 350 are respectively the support 110 to the second layer 140 and the electrode layer in the first semiconductor element 100.
  • 150 has the same configuration. That is, the third layer 342 in the third semiconductor element 300 corresponds to the second layer 140 in the first semiconductor element 100.
  • the third semiconductor element 300 is different from the first semiconductor element 100 in that it has a fourth layer 344 between the third layer 342 and the electrode layer 350.
  • the third semiconductor element 300 has a configuration in which two layers of the third layer 342 and the fourth layer 344 are arranged instead of the second layer 140 in the first semiconductor element 100. I can say.
  • the fourth layer 344 corresponds to the second layer 240 in the second semiconductor element 200. That is, the fourth layer 344 is (A) a metal oxide containing titanium (Ti) and oxygen (O), (B) a metal oxide containing tin (Sn) and oxygen (O), or (c) a metal oxide containing zinc (Zn) and oxygen (O), Consists of either.
  • the fourth layer 344 may be made of titanium oxide doped with Nb (niobium).
  • the fourth layer 344 may be composed of tin oxide, ITO (indium tin oxide), tin oxide doped with fluorine, or the like.
  • the fourth layer 344 may be made of zinc oxide, IZO (indium zinc oxide), zinc oxide doped with aluminum, zinc oxide doped with gallium, or the like.
  • the fourth layer 344 may be crystalline or amorphous.
  • the number of layers of the third semiconductor element 300 is increased by one as compared with the first semiconductor element 100 and the second semiconductor element 200 described above, and as a result, one interface is also increased.
  • the inventors' knowledge has confirmed that the contact resistance of the interface between the third layer 342 and the fourth layer 344 (hereinafter referred to as “fourth interface”) is relatively low. . Therefore, although the number of layers and the number of interfaces of the third semiconductor element 300 are larger than those of the first semiconductor element 100 and the second semiconductor element 200, the influence thereof hardly occurs.
  • the same effects as those of the first semiconductor element 100 and the second semiconductor element 200 can be obtained. That is, in the third semiconductor element 300, the interface between the n-type Si layer 320 and the first layer 330 (first interface), the interface between the fourth layer 344 and the electrode layer 350 (second interface). ) And the interface between the first layer 330 and the third layer 342 (third interface), the contact resistance is significantly suppressed.
  • the contact resistance can be reduced as compared with the first semiconductor element 100 and the second semiconductor element 200, the element efficiency can be significantly improved.
  • the third layer 342 and the fourth layer 344 have different refractive indexes, the degree of freedom in optical design can be increased.
  • a method for manufacturing the third semiconductor element 300 can be easily understood by those skilled in the art from the description of the method for manufacturing the first semiconductor element 100 and the second semiconductor element 200 described above.
  • the embodiment of the present invention has been described above by taking the first to third semiconductor elements 100, 200, and 300 as examples. However, the present invention is not limited to these configurations.
  • the n-type Si layers 120, 220, 320 may be made of another n-type semiconductor material other than Si.
  • the semiconductor device according to one embodiment of the present invention can be applied to, for example, a solar cell module.
  • FIG. 5 schematically shows a configuration example of such a solar cell module.
  • the solar cell module 500 is configured by electrically connecting a plurality of solar cells 502 in series with each other.
  • Each solar cell 502 includes a first electrode 560A and a second electrode 560B made of metal, and the first portion 580 and the second portion 590 are disposed between the electrodes 560A and 560B.
  • the solar battery cell 502 is configured by disposing the second electrode 560B, the second portion 590, the first portion 580, and the first electrode 560A in order from the bottom.
  • the first electrode 560A is electrically connected to the second electrode 560B of the adjacent right solar cell 502.
  • the second electrode 560B is electrically connected to the first electrode 560A of the adjacent left solar cell 502. Thereby, each photovoltaic cell 502 is mutually connected in series.
  • the first portion 580 has an n-type Si layer
  • the second portion 590 has a p-type Si layer.
  • the n-type Si layer of the first portion 580 forms a pn junction with the p-type Si layer of the second portion 590.
  • the second portion 590 to the first electrode 560A are composed of the first semiconductor element 100 described above. That is, the second portion 590 in the solar cell 502 corresponds to the support 110 of the first semiconductor element 100, and the first portion 580 in the solar cell 502 is the n-type Si of the first semiconductor element 100. Corresponding to the layer 120, the first layer 130, and the second layer 140, the first electrode 560 ⁇ / b> A in the solar battery cell 502 corresponds to the electrode layer 150 of the first semiconductor element 100.
  • the contact resistance between the first electrode and the n-type Si layer in the first portion 580 is relatively high, and thus there is a limit to improving the power generation efficiency. It was.
  • the first semiconductor element 100 having the above-described characteristics is applied to the solar cell module 500 shown in FIG. For this reason, in the solar cell module 500, the power generation efficiency can be significantly improved.
  • TFT The semiconductor device according to an embodiment of the present invention can be applied to, for example, a TFT.
  • FIG. 6 schematically shows a configuration example of such a TFT.
  • the TFT 600 includes a gate electrode 601, a gate insulating film 603, an amorphous Si layer 690, an n-type Si layer 680, a first electrode 660A (for example, a source), a second electrode 660B (for example, a drain), A channel protective layer 670 and a protective film 675 are included.
  • the portion of the amorphous Si layer 690 to the first electrode 660A or the portion of the amorphous Si layer 690 to the second electrode 660B is composed of the first semiconductor element 100 described above. That is, the amorphous Si layer 690 in the TFT 600 corresponds to the support 110 of the first semiconductor element 100, and the n-type Si layer 680 in the TFT 600 is the n-type Si layer 120 and the first layer of the first semiconductor element 100. 130 and the second layer 140, the first electrode 660A or the second electrode 660B in the TFT 600 corresponds to the electrode layer 150 of the first semiconductor element 100.
  • the contact resistance between the first or second electrode and the n-type Si layer is relatively high, so that there is a limit to the improvement of the operation efficiency.
  • the first semiconductor element 100 having the above-described characteristics is applied to the TFT 600 shown in FIG. For this reason, in the TFT 600, it is possible to significantly improve the operation efficiency.
  • Example 1 The semiconductor device as shown in FIG. 1 was manufactured by the following method.
  • n-type Si substrate had dimensions of 30 mm length ⁇ 30 mm width ⁇ 0.5 mm thickness, and the electron density was 10 15 cm ⁇ 3 .
  • substrate The n-type Si substrate (hereinafter simply referred to as “substrate”) was washed with hydrofluoric acid and pure water before use to remove the natural oxide film on the surface.
  • the substrate was introduced into a sputtering apparatus. After evacuating the inside of the sputtering apparatus to 3 ⁇ 10 ⁇ 7 Pa, an amorphous C12A7 electride was formed as a first layer on the substrate by sputtering.
  • a metal mask was used to form four rectangular first layers (thickness 2 nm) having a width of 200 ⁇ m ⁇ length of 800 ⁇ m ⁇ thickness of 2 nm on a substrate.
  • the intervals between adjacent rectangles were 400 ⁇ m, 600 ⁇ m, and 800 ⁇ m, respectively.
  • the RF power was 100 W
  • Ar was used as the soot film forming gas
  • the total pressure was 0.15 Pa.
  • the distance between the substrate and the target was 100 mm.
  • the electron density of the obtained first layer was 10 21 cm ⁇ 3 .
  • the second layer was a ZSO layer.
  • the distance between the target and the substrate during film formation was 100 mm.
  • the sputtering gas at the time of film formation was a mixed gas of Ar and O 2 , and the pressure of the sputtering gas was 0.4 Pa.
  • the Ar flow rate was 39.9 sccm, and the O 2 flow rate was 0.1 sccm.
  • the RF plasma power was 100W.
  • a second layer having a thickness of 10 nm was formed only on the first layer.
  • the electron density of the obtained second layer was 10 15 cm ⁇ 3 .
  • the substrate on which each layer was formed was taken out into the atmosphere and left for 1.5 hours.
  • Al electrode Al alloy layer
  • the thickness of the Al electrode was 200 nm.
  • sample A A semiconductor element (hereinafter referred to as “sample A”) was formed by such a method.
  • Example 2 A semiconductor device was manufactured in the same manner as in Example 1.
  • Example 3 titanium oxide doped with Nb (niobium) was formed as the second layer on the first layer.
  • a target having a composition of Ti: Nb 94: 6 in molar ratio was used.
  • the distance between the target and the substrate during film formation was 100 mm.
  • the sputtering gas at the time of film formation was a mixed gas of Ar and O 2 , and the pressure of the sputtering gas was 0.4 Pa.
  • the flow rate of Ar was 40 sccm.
  • the RF plasma power was 100W.
  • a second layer having a thickness of 10 nm was formed only on the first layer. At this time, the second layer was amorphous.
  • the substrate on which each layer was formed was taken out into the atmosphere and left for 48 hours.
  • the substrate was returned to the same sputtering apparatus, and an Al electrode was formed only on the second layer.
  • sample B the obtained semiconductor element is referred to as “sample B”.
  • Example 3 A semiconductor device was manufactured in the same manner as in Example 1.
  • Example 3 the second layer was not formed on the first layer. That is, an Al electrode was directly formed on the amorphous C12A7 electride layer.
  • the film forming conditions for each layer are the same as in Example 1.
  • sample C the obtained semiconductor element is referred to as “sample C”.
  • the resistance value of the sample can be measured as a function of the distance between the two Al electrodes by measuring the current and voltage between each two Al electrodes.
  • Keithley 2635B was used for the ammeter.
  • FIG. 7 collectively shows the measurement results obtained for Sample A, Sample B, and Sample C.
  • the horizontal axis is the distance between the Al electrodes, and the vertical axis is the resistance value.
  • Sample A and Sample B show significantly lower resistance values than Sample C.
  • four rectangular Al electrodes were formed directly on the substrate, and the same measurement was performed. As a result, it was confirmed that the resistance change was not ohmic in such a sample. It was also found that the absolute value of the resistance was significantly high regardless of the distance between the Al electrodes. This may be due to alteration of the interface of the amorphous C12A7 electride layer, which is an oxide.
  • the electric conduction of the amorphous C12A7 electride layer is considered to be obtained by O 2 ⁇ coming out of the cage and e ⁇ entering instead of moving the e ⁇ , but at the interface of the amorphous C12A7 electride layer. It is inferred that oxygen atoms enter the cage and the electrical characteristics deteriorate, which is considered to be a phenomenon peculiar to the amorphous C12A7 electride layer.
  • the first layer (C12A7 electride layer) is disposed immediately above the n-type layer, and the second layer (ZSO layer or titanium oxide layer) is disposed directly below the Al electrode.
  • the semiconductor element of the present invention can be applied to, for example, a solar cell module and a thin film transistor (TFT). Further, the present invention can be applied to semiconductor devices used for various electronic devices such as electro-optical devices. For example, it can be used for electronic devices such as displays such as televisions, electrical appliances such as washing machines and refrigerators, and information processing devices such as mobile phones and computers. In addition, the semiconductor element of the present invention can be used for electronic devices included in automobiles and various industrial equipment.
  • TFT thin film transistor
  • SYMBOLS 100 1st semiconductor element 110 Support body 120 n-type Si layer 130 1st layer 140 2nd layer 150 Electrode layer 200 2nd semiconductor element 210 Support body 220 n-type Si layer 230 1st layer 240 2nd Layer 250 electrode layer 300 third semiconductor element 310 support 320 n-type Si layer 330 first layer 342 third layer 344 fourth layer 350 electrode layer 500 solar cell module 502 each solar cell 560A first electrode 560B Second electrode 580 First portion 590 Second portion 600 TFT 601 gate electrode 603 gate insulating film 660A first electrode 660B second electrode 670 channel protective layer 675 protective film 680 n-type Si layer 690 amorphous Si layer

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Thin Film Transistor (AREA)
  • Photovoltaic Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un élément semiconducteur qui comprend une portion en Si de type n, une première couche qui est disposée sur la portion en Si de type n, une deuxième couche qui est disposée sur la première couche et une couche d'électrode qui est disposée sur la deuxième couche. La première couche est constituée d'un électrure d'un oxyde qui contient un atome de calcium et un atome d'aluminium. La deuxième couche est choisie dans le groupe constitué par : (i) des oxydes métalliques qui contiennent du zinc (Zn) et de l'oxygène (O), et contient en outre au moins l'un parmi le silicium (Si) et l'étain (Sn) ; (ii) des oxydes métalliques qui contiennent du titane (Ti) et de l'oxygène (O) ; (iii) des oxydes métalliques qui contiennent de l'étain (Sn) et de l'oxygène (O) ; et (iv) des oxydes métalliques qui contiennent du zinc (Zn) et de l'oxygène (O).
PCT/JP2017/035690 2016-10-03 2017-09-29 Élément semiconducteur WO2018066483A1 (fr)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020218354A1 (fr) * 2019-04-25 2020-10-29 Agc株式会社 Agrégat de nanoparticules, liquide de dispersion de nanoparticules, encre, film mince, diode électroluminescente organique et procédé de fabrication d'agrégat de nanoparticules
JP2020202360A (ja) * 2019-06-13 2020-12-17 株式会社東芝 太陽電池、多接合型太陽電池、太陽電池モジュール及び太陽光発電システム
CN115052837A (zh) * 2020-02-17 2022-09-13 国立研究开发法人科学技术振兴机构 层状双氢氧化物电子化合物及其制造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010114332A (ja) * 2008-11-08 2010-05-20 Japan Science & Technology Agency 抵抗変化型不揮発性メモリー素子
JP2015026703A (ja) * 2013-07-26 2015-02-05 旭硝子株式会社 光電変換素子及び撮像素子
JP2015070114A (ja) * 2013-09-30 2015-04-13 エルジー ディスプレイ カンパニー リミテッド 薄膜半導体装置
WO2015098458A1 (fr) * 2013-12-26 2015-07-02 国立大学法人東京工業大学 Film mince d'oxyde métallique, élément électroluminescent organique pourvu d'un film mince, cellule solaire, et cellule solaire organique
WO2015098225A1 (fr) * 2013-12-26 2015-07-02 旭硝子株式会社 Dispositif à semiconducteur et son procédé de fabrication

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010114332A (ja) * 2008-11-08 2010-05-20 Japan Science & Technology Agency 抵抗変化型不揮発性メモリー素子
JP2015026703A (ja) * 2013-07-26 2015-02-05 旭硝子株式会社 光電変換素子及び撮像素子
JP2015070114A (ja) * 2013-09-30 2015-04-13 エルジー ディスプレイ カンパニー リミテッド 薄膜半導体装置
WO2015098458A1 (fr) * 2013-12-26 2015-07-02 国立大学法人東京工業大学 Film mince d'oxyde métallique, élément électroluminescent organique pourvu d'un film mince, cellule solaire, et cellule solaire organique
WO2015098225A1 (fr) * 2013-12-26 2015-07-02 旭硝子株式会社 Dispositif à semiconducteur et son procédé de fabrication

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020218354A1 (fr) * 2019-04-25 2020-10-29 Agc株式会社 Agrégat de nanoparticules, liquide de dispersion de nanoparticules, encre, film mince, diode électroluminescente organique et procédé de fabrication d'agrégat de nanoparticules
CN113711378A (zh) * 2019-04-25 2021-11-26 Agc株式会社 纳米粒子的集合体、纳米粒子的分散液、油墨、薄膜、有机发光二极管和纳米粒子的集合体的制造方法
JP2020202360A (ja) * 2019-06-13 2020-12-17 株式会社東芝 太陽電池、多接合型太陽電池、太陽電池モジュール及び太陽光発電システム
JP7378974B2 (ja) 2019-06-13 2023-11-14 株式会社東芝 太陽電池、多接合型太陽電池、太陽電池モジュール及び太陽光発電システム
CN115052837A (zh) * 2020-02-17 2022-09-13 国立研究开发法人科学技术振兴机构 层状双氢氧化物电子化合物及其制造方法

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