WO2018066483A1 - Semiconductor element - Google Patents

Abstract

A semiconductor element which comprises an n-type Si portion, a first layer that is arranged on the n-type Si portion, a second layer that is arranged on the first layer, and an electrode layer that is arranged on the second layer. The first layer is configured from an electride of an oxide that contains a calcium atom and an aluminum atom. The second layer is selected from the group consisting of: (i) metal oxides that contain zinc (Zn) and oxygen (O), and additionally contains at least one of silicon (Si) and tin (Sn); (ii) metal oxides that contain titanium (Ti) and oxygen (O); (iii) metal oxides that contain tin (Sn) and oxygen (O); and (iv) metal oxides that contain zinc (Zn) and oxygen (O).

Description

Semiconductor element

The present invention relates to a semiconductor element, for example, a semiconductor element such as a solar cell and a thin film transistor.

For example, semiconductor elements such as solar cells and thin film transistors (TFTs) have a configuration in which an electrode layer is disposed on a member made of crystalline or amorphous n-type silicon (see, for example, Patent Document 1).

International Publication No. 2015/098225

In the field of semiconductor elements as described above, there is a demand for further increasing element efficiency. For example, solar cells are required to further improve power generation efficiency, while thin film transistors (TFTs) are required to further improve operating efficiency.

However, a normal semiconductor element has a problem that the interface between the n-type silicon member and the electrode layer does not exhibit ohmic resistance behavior, and as a result, the interface contact resistance is high. This is one factor that hinders the efficiency improvement of semiconductor elements.

The present invention has been made in view of such a background, and an object of the present invention is to provide a semiconductor element in which contact resistance between an n-type silicon member and an electrode layer is significantly suppressed.

In the present invention,
an n-type Si portion;
A first layer disposed on the n-type Si portion;
A second layer disposed on the first layer;
An electrode layer disposed on the second layer;
Have
The first layer is composed of an oxide electride containing calcium atoms and aluminum atoms,
Said second layer comprises the following groups:
(I) a metal oxide comprising zinc (Zn) and oxygen (O), and further comprising at least one of silicon (Si) and tin (Sn);
(Ii) a metal oxide containing titanium (Ti) and oxygen (O),
(Iii) a metal oxide containing tin (Sn) and oxygen (O), and (iv) a metal oxide containing zinc (Zn) and oxygen (O),
A semiconductor device selected from is provided.

The present invention can provide a semiconductor element in which contact resistance between the n-type silicon member and the electrode layer is significantly suppressed.

It is the figure which showed the schematic cross section of the semiconductor device by one Embodiment of this invention. It is a schematic flowchart of an example of the manufacturing method of the semiconductor device by one Embodiment of this invention. It is the figure which showed the schematic cross section of another semiconductor element by one Embodiment of this invention. It is the figure which showed the schematic cross section of another semiconductor element by one Embodiment of this invention. It is sectional drawing which showed typically the example of 1 structure of the solar cell module provided with the semiconductor element by one Embodiment of this invention. It is sectional drawing which showed typically the example of 1 structure of TFT provided with the semiconductor element by one Embodiment of this invention. It is the graph which showed collectively the relationship between the distance between electrodes and resistance value which were obtained in each sample.

Hereinafter, the present invention will be described.

In one embodiment of the invention,
an n-type Si portion;
A first layer disposed on the n-type Si portion;
A second layer disposed on the first layer;
An electrode layer disposed on the second layer;
Have
The first layer is composed of an oxide electride containing calcium atoms and aluminum atoms,
Said second layer comprises the following groups:
(I) a metal oxide comprising zinc (Zn) and oxygen (O), and further comprising at least one of silicon (Si) and tin (Sn);
(Ii) a metal oxide containing titanium (Ti) and oxygen (O),
(Iii) a metal oxide containing tin (Sn) and oxygen (O), and (iv) a metal oxide containing zinc (Zn) and oxygen (O),
A semiconductor device selected from is provided.

In the present application, an interface between an n-type Si portion and a layer disposed immediately above the n-type Si portion is referred to as a “first interface”. In addition, an interface between the electrode layer and a layer disposed immediately below the electrode layer is referred to as a “second interface”.

As described above, a normal semiconductor element has a problem that the contact resistance at the first interface between the n-type silicon member and the electrode layer is high. To reduce contact resistance at the junction between metal and Si, select the appropriate metal material to increase the carrier concentration in Si near the interface or to reduce the Schottky barrier height at the metal-Si interface The technique of doing is known. The former has a limit in reducing contact resistance due to a physical phenomenon such as the solid solubility limit of dopant in a semiconductor and the latter the Fermi level pinning at the metal / Si interface.

However, in the semiconductor device according to the embodiment of the present invention, a plurality of layers are added between the n-type silicon member and the electrode layer.

According to the knowledge of the inventors of the present application, the first layer having the above-described characteristics included in the semiconductor element has good electron conductivity. Further, it has been confirmed that the contact resistance of the interface between the first layer and the n-type Si portion (that is, the “first interface”) is relatively low.

By disposing the first layer on the n-type Si portion, Fermi level pinning does not occur at the first interface, and the first layer has a high carrier density and a low work function. The barrier height at the interface of 1 is small. Therefore, the contact resistance of the first interface can be significantly suppressed while ensuring the operability as the semiconductor element.

Here, Fermi level pinning means that when the semiconductor and the metal are joined, the change in the Schottky barrier height is small even if metals having various work functions are used. For example, when Si and Al are bonded, the Schottky barrier height is about 1.5 eV, which is higher than the Schottky barrier height expected from the work function (4.2 eV) of Al and the electron affinity (4 eV) of Si. Is also big. Fermi level pinning is caused by the interface states or interface states existing in the band gap of the semiconductor, but it is considered that the chemical stability of the interface is greatly related in practice.

According to the knowledge of the inventors of the present application, it has been confirmed that the first layer as described above has a relatively high contact resistance with the metal. For this reason, when the electrode layer comprised with the metal is arrange | positioned directly on the 1st layer, the influence of the contact resistance in a 2nd interface will become remarkable.

However, as described above, in the present semiconductor element, the first layer and the electrode layer are not in direct contact. That is, the second layer is disposed between the first layer and the electrode layer.

Here, the second layer has good electronic conductivity. Further, it has been confirmed that the contact resistance of the interface between the second layer and the electrode (that is, the “second interface”) is relatively low. It has also been confirmed that the contact resistance is relatively low at the interface between the first layer and the second layer (hereinafter referred to as “third interface”).

In the present semiconductor element, the Schottky barrier height is significantly suppressed at the second interface and the third interface for the same reason as the first interface, so that the operability as the semiconductor element is ensured. The contact resistance of the second interface (or the third interface) can be significantly suppressed.

As a result, in this semiconductor element, element efficiency can be significantly improved. For example, when the present semiconductor element is applied to a solar cell, the power generation efficiency can be significantly increased. In addition, when this semiconductor element is applied to a TFT, it is possible to significantly increase the operation efficiency.

(Semiconductor Device According to One Embodiment of the Present Invention)
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a schematic cross section of a semiconductor device (hereinafter referred to as “first semiconductor device”) according to an embodiment of the present invention.

As shown in FIG. 1, the first semiconductor element 100 includes a support 110, an n-type Si layer 120, a first layer 130, a second layer 140, and an electrode layer 150.

The support 110 has a role of supporting each layer disposed on the support 110 and facilitating the formation of the n-type Si layer 120.

For example, when the first semiconductor element 100 constitutes a part of the solar cell, the support 110 may have a p-type Si layer. Alternatively, the support 110 may be a p-type Si layer. In addition, when the first semiconductor element 100 forms part of a thin film transistor (TFT), the support 110 may have an amorphous Si layer. Alternatively, the support 110 may be an amorphous Si layer.

However, in certain cases, such as when the n-type Si layer 120 is formed thick, the support 110 may be omitted.

The n-type Si layer 120 is composed of a layer containing n-type silicon Si. The n-type Si layer 120 may be amorphous or crystalline.

The first layer 130 is composed of an oxide electride containing calcium atoms and aluminum atoms.

The second layer 140 is made of a metal oxide containing zinc (Zn) and oxygen (O), and further containing at least one of silicon (Si) and tin (Sn).

The details of the first layer 130 and the second layer 140 will be described later.

The electrode layer 150 is made of metal (or alloy; the same applies hereinafter).

In the first semiconductor element 100 having such a configuration, the first to third interfaces, that is, the interface between the n-type Si layer 120 and the first layer 130 (first interface), the second layer The contact resistance is significantly suppressed at each of the interface between the electrode layer 150 and the electrode layer 150 (second interface) and the interface between the first layer 130 and the second layer 140 (third interface). Is done.

For this reason, in the first semiconductor element 100, the operating efficiency can be significantly improved.

(About each component)
Next, each member constituting the first semiconductor element 100 shown in FIG. 1 will be described in more detail.

Here, for the sake of clarity, the reference numerals shown in FIG. 1 are used to represent each member.

(Support 110)
As described above, the support 110 has a role of supporting each layer disposed on the support 110 and facilitating the formation of the n-type Si layer 120.

The material of the support 110 is not particularly limited.

For example, when the first semiconductor element 100 is applied to a part of a solar cell, the support 110 may be made of p-type Si or non-doped Si. On the other hand, when the first semiconductor element 100 is applied to a part of the TFT, the support 110 may include amorphous Si or crystalline Si, or may be composed of amorphous Si or crystalline Si.

Further, the support 110 may be a substrate made of glass, alumina, silicon, or the like.

As described above, the support 110 is not an essential component and may be omitted.

(N-type Si layer 120)
An n-type Si layer 120 is disposed on the support 110.

The n-type Si layer 120 may be crystalline or amorphous.

The n-type Si layer 120 may be doped with phosphorus (P) and / or arsenic (As).

The electron density of the n-type Si layer 120 may be in the range of 10 ¹⁴ cm ⁻³ to 10 ²¹ cm ⁻³ , for example. The electron density is preferably 10 ¹⁶ cm ⁻³ or more, and more preferably 10 ¹⁸ cm ⁻³ or more. If the electron density is 10 ¹⁴ cm ⁻³ or more, the contact resistance tends to be low. The electron density is preferably 10 ²⁰ cm ⁻³ or less, and more preferably 10 ¹⁹ cm ⁻³ or less.

(First layer 130)
As described above, the first layer 130 is composed of an oxide electride containing calcium atoms and aluminum atoms.

The first layer 130 has conductivity, a significantly high ionization potential, and a low work function. For example, the work function of the first layer 130 is in the range of 2.4 eV to 4.5 eV (eg, 2.8 eV to 3.2 eV).

In addition, the first layer 130 has a feature of high electron density. The electron density of the first layer 130 is, for example, in the range of 2.0 × 10 ¹⁷ cm ⁻³ to 2.3 × 10 ²¹ cm ⁻³ . The electron density is more preferably 1.0 × 10 ¹⁸ cm ⁻³ or more, further preferably 1 × 10 ¹⁹ cm ⁻³ or more, and particularly preferably 1 × 10 ²⁰ cm ⁻³ or more.

Since the electron density of the first layer 130 is high, the interface (first interface) between the n-type Si layer 120 and the first layer 130 exhibits ohmic properties due to a tunnel effect. Therefore, the contact resistance of the first interface is significantly suppressed. The first layer 130 also exhibits good contact resistance with the second layer 140 (third interface).

Therefore, in the first semiconductor element 100 having the first layer 130, the contact resistance can be significantly suppressed at both the first interface and the third interface.

The thickness of the first layer 130 is preferably in the range of 0.5 nm to 10 nm. If it is 0.5 nm or more, a homogeneous thin film can be formed, and thus the contact resistance reduction effect can be obtained stably. The thickness of the first layer 130 is more preferably 2 nm or more, and further preferably 3 nm or more. On the other hand, if the thickness of the first layer 130 is 10 nm or less, the influence of volume resistance can be ignored. The thickness of the first layer 130 is more preferably 7 nm or less, and further preferably 5 nm or less.

The thickness of the first layer 130 can be measured by X-ray reflection (XRR) or observation with a cross-sectional transmission electron microscope.

The first layer 130 may be amorphous or crystalline. Hereinafter, each case will be described.

(Amorphous first layer 130)
The first layer 130 may be made of an amorphous oxide electride containing calcium atoms and aluminum atoms.

Amorphous means a substance that does not give a sharp peak in X-ray diffraction measurement. Specifically, when the X-ray wavelength λ is 0.154 nm and the Scherrer constant K is 0.9, the crystallite diameter (Scherrer diameter) obtained by the Scherrer equation represented by the following equation (1) is 5: .2 nm or less. The Scherrer diameter L is a Scherrer constant K, an X-ray wavelength λ, a half-value width β, and a peak position θ.

L = Kλ / (βcos θ) (1) Formula
It is represented by It is preferable that the first layer 130 be amorphous because the film surface has high smoothness and can prevent a short circuit of the element.

In addition, “an electride of an amorphous oxide containing calcium atoms and aluminum atoms” is composed of a solvate in which an amorphous composed of calcium atoms, aluminum atoms and oxygen atoms is used as a solvent and electrons are used as a solute. An amorphous solid material is meant.

Electrons in electride can work as anions. The electrons may exist as bipolarons. Bipolaron is composed of calcium atoms, aluminum atoms, and oxygen atoms, and is adjacent to two cages that are three-dimensionally connected and have a void of about 0.4 nm in inner diameter. Each cage has an electron (solute). Is included. However, the state of the amorphous oxide electride is not limited to the above, and two electrons (solutes) may be included in one cage. In addition, a plurality of these cages may be in an aggregated state, and the aggregated cage can be regarded as a microcrystal. Therefore, a state in which the microcrystal is included in the amorphous is also regarded as amorphous.

The molar ratio of aluminum atom to calcium atom (Ca / Al) in the “amorphous oxide electride” is preferably in the range of 0.3 to 5.0, more preferably in the range of 0.55 to 1.00. The range of 0.8 to 0.9 is more preferable, and the range of 0.84 to 0.86 is particularly preferable.

The composition of “amorphous oxide electride” is preferably 12CaO · 7Al ₂ O _3, but is not limited thereto, and examples thereof include the following compounds (1) to (5).
(1) Isomorphic compounds in which some or all of the Ca atoms are substituted with metal atoms such as Sr, Mg, and / or Ba. For example, a compound in which some or all of Ca atoms are substituted with Sr is strontium aluminate Sr ₁₂ Al ₁₄ O ₃₃ , and calcium strontium aluminum is used as a mixed crystal in which the mixing ratio of Ca and Sr is arbitrarily changed. Nate Ca _12-x Sr _X Al ₁₄ O ₃₃ (x is an integer of 1 to 11; in the case of an average value, it is a number greater than 0 and less than 12).
(2) An isomorphous compound in which some or all of the Al atoms are substituted with one or more atoms selected from the group consisting of Si, Ge, Ga, In, and B. For _example, like _{Ca 12 Al 10 Si 4 O 35} .
(3) A part of metal atoms and / or nonmetal atoms (excluding oxygen atoms) in 12CaO.7Al ₂ O ₃ (including the compounds of (1) and (2) above) is Ti, V, One or more transition metal atoms selected from the group consisting of Cr, Mn, Fe, Co, Ni, and Cu or one or more alkali metal atoms selected from the group consisting of typical metal atoms, Li, Na, and K; Or an isomorphous compound substituted with one or more rare earth atoms selected from the group consisting of Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb.
(4) A compound in which some or all of the free oxygen ions included in the cage are replaced with other anions. Other anions include, for example, anions such as H ⁻ , H ₂ ⁻ , H ²⁻ , O ⁻ , O ₂ ⁻ , OH ⁻ , F ⁻ , Cl ⁻ , and S ²⁻ , and nitrogen (N). There are anions.
(5) A compound in which part of oxygen in the cage skeleton is substituted with nitrogen (N) or the like.

Bipolaron has almost no light absorption in the visible light range where the photon energy is 1.55 eV to 3.10 eV, and shows light absorption in the vicinity of 4.6 eV. Accordingly, the first layer 130 is transparent in visible light. In addition, by measuring the light absorption characteristics of the first layer 130 and measuring the light absorption coefficient in the vicinity of 4.6 eV, whether or not bipolaron is present in the first layer 130, that is, the first layer 130 is measured. It can be confirmed whether or not has an electride of amorphous oxide.

The composition analysis of the first layer 130 can be performed by an XPS method, an EPMA method, an EDX method, or the like. Analysis by the XPS method is possible when the film thickness is 100 nm or less, EPMA method when the film thickness is 50 nm or more, and EDX method when it is 3 μm or more.

When the first layer 130 is composed of an amorphous oxide electride, no peak is observed in the X-ray diffraction measurement, and only a halo is observed.

The first layer 130 may contain microcrystals. Whether or not microcrystals are contained in the first layer 130 is determined from, for example, a cross-sectional TEM (transmission electron microscope) photograph of the first layer 130. The composition in the crystalline state is represented by 12CaO · 7Al ₂ O ₃ , CaO · Al ₂ O ₃ , 3CaO · Al ₂ O _{3 and the} like. The microcrystal is a crystal having a Scherrer diameter larger than 5.2 nm and smaller than 100 nm. When the first layer 130 is microcrystalline, conductivity is improved.

In the first layer 130, the light absorption value at a position of 4.6 eV may be 100 cm ⁻¹ or more, or 200 cm ⁻¹ or more. If the light absorption value at the position of 4.6 eV is 100 cm ⁻¹ or more, the electron density increases and the work function decreases, so that the contact resistance can be sufficiently reduced.

Note that the electron density of the first layer 130 can be measured by an iodine titration method. Incidentally, the density of bipolarons in the electride thin film can be calculated by multiplying the measured electron density by 1/2.

In this iodine titration method, a sample of the first layer 130 is immersed in a 5 mol / l iodine aqueous solution and dissolved by adding hydrochloric acid. This is a method for titration detection. In this case, due to dissolution of the sample, iodine in the aqueous iodine solution is ionized by the following reaction:

I ₂ + e ⁻ → 2I ⁻ (2) Formula
When titrating an aqueous iodine solution with sodium thiosulfate,

2Na ₂ S ₂ O ₃ + I ₂ → 2NaI + Na ₂ S ₄ O ₆ (3) Formula
By this reaction, unreacted iodine is changed to sodium iodide. The amount of iodine consumed in the reaction of equation (2) is calculated by subtracting the amount of iodine detected by titration in equation (3) from the amount of iodine present in the initial solution. Thereby, the electron density in the sample of the first layer 130 can be measured.

A method for forming the amorphous first layer 130 is not particularly limited. The amorphous first layer 130 may be formed by, for example, a vapor deposition method. The amorphous first layer 130 may be deposited by heating the raw material in a vacuum of 10 ⁻⁷ Pa to 10 ⁻³ Pa, for example. Further, the amorphous first layer 130 may be formed by a sputtering method or the like.

(Crystalline first layer 130)
The first layer 130 may be made of a crystalline oxide electride containing calcium atoms and aluminum atoms.

Crystal electrite electrides are three-dimensionally stacked with their respective cages sharing a plane, so that a crystal lattice is formed, and electrons are included in a part of these cages. In the crystalline C12A7 electride, the electrons included in the cage are loosely bound in the cage and can move freely in the crystal. For this reason, the crystalline C12A7 electride exhibits higher conductivity than the amorphous C12A7 electride. The composition of the “crystalline oxide electride” is the same as the composition of the “amorphous oxide electride” described above.

The crystalline oxide electride can be produced by heat-treating the amorphous oxide electride to 900 ° C. or higher. The heat treatment can be performed by heating with a normal electric furnace, infrared heating, laser heating, induction heating, or the like.

(Second layer 140)
The second layer 140 includes zinc (Zn) and oxygen (O), and further includes a metal oxide including at least one of silicon (Si) and tin (Sn).

For example, the second layer 140 may include zinc (Zn), silicon (Si), and oxygen (O). Hereinafter, such a second layer is particularly referred to as a “ZSO layer”. Further, the second layer may include zinc (Zn), tin (Sn), and oxygen (O). Hereinafter, such a second layer is particularly referred to as a “ZTO layer”. Further, the second layer may include zinc (Zn), silicon (Si), tin (Sn), and oxygen (O). Hereinafter, such a second layer is particularly referred to as a “ZSTO layer”.

Hereinafter, each of the ZSO layer, the ZTO layer, and the ZSTO layer will be described.

(ZSO layer)
The ZSO layer contains zinc (Zn), silicon (Si), and oxygen (O). In the case where the second layer 140 is formed of a ZSO layer, it does not have a crystal grain boundary, and thus is superior in flatness and homogeneity as compared to a generally used oxide semiconductor such as ZnO.

The value of Zn / (Zn + Si) is, for example, preferably in the range of 0.30 to 0.95 in molar ratio. If it is 0.30 or more, a sufficiently large electron mobility can be obtained and the film can be used after being thickened, so that the Si substrate can be sufficiently chemically protected. If it is 0.95 or less, since a smooth surface is obtained, a short circuit can be suppressed. The value of Zn / (Zn + Si) may be 0.70 or more, 0.80 or more, or 0.85 or more in terms of molar ratio. The value of Zn / (Zn + Si) may be 0.94 or less in molar ratio, 0.92 or less, or 0.90 or less.

The chemical composition of the ZSO layer is preferably represented by xZnO— (1-x) SiO ₂ (x = 0.30 to 0.95). Here, if x is 0.30 or more, a sufficiently large electron mobility can be obtained and the film can be used after being thickened, so that the Si substrate can be sufficiently protected. If x is 0.95 or less, a smooth surface can be obtained and short-circuiting can be suppressed. x may be 0.70 or more, 0.80 or more, or 0.85 or more. x may be 0.94 or less, 0.92 or less, or 0.90 or less.

The ZSO layer is excellent in transparency, and exhibits a high electron mobility of, for example, 0.1 cm ² V ⁻¹ s ⁻¹ to 5.0 cm ² V ⁻¹ s ⁻¹ . In addition, since the ZSO layer is homogeneous and does not have crystal grain boundaries, and has a low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate. The Si substrate and various functional layers formed on the substrate are known to deteriorate in characteristics mainly due to the influence of oxygen and moisture when exposed to the outside air, and a protective layer is usually required.

The thickness of the ZSO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZSO layer is 10 nm or more, it sufficiently functions as a protective layer. If the thickness of the ZSO layer is 1000 nm or less, the manufacturing process is short. When the thickness of the ZSO layer exceeds 1000 nm, in order to improve the film formation speed (film formation thickness per unit time), for example, when using a sputtering method, a plurality of sputtering targets are prepared, or a high output A film forming apparatus is required. The thickness of the ZSO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more. On the other hand, the thickness of the ZSO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.

(ZTO layer)
The ZTO layer contains zinc (Zn), tin (Sn), and oxygen (O). When the second layer 140 is composed of a ZTO layer, the etching rate is appropriate, and a desired shape can be formed without excessive etching, so that the semiconductor element can be manufactured stably.

ZTO layer, in terms of oxide, relative to the total 100 mol% of ZnO and SnO _2, SnO ₂ is 15 mol% or more, and preferably not more than 95 mol%. If SnO ₂ is 15 mol% or more, the crystallization temperature is high, and it is difficult to crystallize in the heat treatment step performed in various processes. If SnO ₂ is less 95 mol%, in easy sintering, good oxide target is obtained, easy to form a thin film. SnO ₂ may be 20 mol% or more, 30 mol% or more, 35 mol% or more, or 40 mol% or more. On the other hand, SnO ₂ may be 70 mol% or less, 60 mol% or less, or 50 mol% or less.

ZTO layer is excellent in transparency, for ^example, shows a high electron mobility ^{1cm 2 V -1 s -1 ~ 10cm} 2 V -1 s -1. In addition, since the ZSTO layer is homogeneous and does not have a crystal grain boundary and has low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate.

The thickness of the ZTO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZTO layer is 10 nm or more, it sufficiently functions as a protective layer. If the thickness of the ZTO layer is 1000 nm or less, the manufacturing process is short. The thickness of the ZTO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more. On the other hand, the thickness of the ZSO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.

(ZSTO layer)
The ZSTO layer includes zinc (Zn), tin (Sn), silicon (Si), and oxygen (O). In the case where the second layer 140 is formed of a ZSTO layer, the work function is low, the etching rate is appropriate, and high transparency is obtained, so that the semiconductor element characteristics are improved.

ZSTO layer, in terms of oxide, ZnO, relative to SnO _2, and the total 100 mol% of SiO _2, SnO ₂ is 15 mol% or more, and preferably not more than 95 mol%. If SnO ₂ is 15 mol% or more, the crystallization temperature is high, and it is difficult to crystallize in the heat treatment step performed in various processes. If it is 95 mol% or less, it is easy to sinter, a good oxide target is obtained, and a thin film is easily formed. SnO ₂ may be 30 mol% or more, 35 mol% or more, or 40 mol% or more. On the other hand, SnO ₂ may be 70 mol% or less, 60 mol% or less, or 50 mol% or less.

ZSTO layer, in terms of oxide, ZnO, relative to SnO _2, and the total 100 mol% of SiO _2, SiO ₂ is, 7 mol% or more, and preferably not more than 30 mol%. SiO ₂ is 7 mol% or more, not more than 30 mol%, the electron affinity is not too high, the volume resistivity is not too high. SiO ₂ may be 8 mol% or more, or 10 mol% or more. On the other hand, SiO ₂ may be less 20 mol%, may be not more than 15 mol%.

The ZSTO layer is excellent in transparency and exhibits a high electron mobility of, for example, 0.1 cm ² V ⁻¹ s ⁻¹ to 3 cm ² V ⁻¹ s ⁻¹ . In addition, since the ZSTO layer is homogeneous and does not have a crystal grain boundary and has low gas permeability, it can be used as a protective layer for the Si substrate and various functional layers formed on the substrate.

The thickness of the ZSTO layer is preferably in the range of 10 nm to 1000 nm. If the thickness of the ZSTO layer is 10 nm or more, it sufficiently functions as a protective layer for the Si substrate and various functional layers formed on the substrate. In addition, if the thickness of the ZSTO layer is 1000 nm or less, the manufacturing process is short. The thickness of the ZSTO layer is more preferably 20 nm or more, further preferably 30 nm or more, and particularly preferably 50 nm or more. On the other hand, the thickness of the ZSTO layer is more preferably 700 nm or less, further preferably 500 nm or less, and particularly preferably 300 nm or less.

The second layer 140 may further include one or more metal components selected from the group consisting of titanium (Ti), indium (In), gallium (Ga), niobium (Nb), and aluminum (Al). . By including these metal components, the chemical durability is excellent. The content of these metal components, calculated as oxide, _ZnO, the total 100 mol% of SiO 2, SnO _2, and other oxides of the metal components, preferably not more than 15 mol%, more preferably 10mol % Or less, more preferably 5 mol% or less. In terms of oxides, these metals are calculated as TiO ₂ , In ₂ O ₃ , Ga ₂ O ₃ , Nb ₂ O ₅ , or Al ₂ O ₃ .

The composition of the second layer 140 can be analyzed using EPMA when the thickness is 200 nm or more. When the thickness is 700 nm or more, for example, the analysis can be performed using SEM-EDX having an acceleration voltage of 10 kV. The analysis can also be performed by performing substrate correction using XRF. Also, when using ICP, the second layer 140 can be analyzed by using a volume of 1 mm ³ or more.

It is preferable that the second layer 140 is dominant in an amorphous state or an amorphous state. Here, the term “amorphous” means a substance that does not give a sharp peak in the X-ray diffraction measurement, like the first layer 130. The amorphous state is dominant when the amorphous is present in a volume ratio of more than 50%. It is preferable that the second layer 140 is predominantly amorphous or amorphous because the film surface has high smoothness and can prevent a short circuit of the element.

The second layer 140 may be a microcrystal or a mixture of amorphous and microcrystal. Here, the microcrystal is a crystal having a Scherrer diameter larger than 5.2 nm and smaller than 100 nm. It is preferable that the second layer 140 be microcrystalline because conductivity is improved. It is preferable that the second layer 140 is in a form in which amorphous and microcrystals are mixed because both smoothness and conductivity are improved.

The electron mobility of the second layer 140 is preferably 10 ⁻⁴ cm ² · V ⁻¹ s ⁻¹ to 10 ² cm ² · V ⁻¹ s ⁻¹ . When the thickness is 10 ⁻⁴ cm ² · V ⁻¹ s ⁻¹ or more, the thickness of the second layer 140 can be 10 nm or more, and as a protective layer for the Si substrate and various functional layers formed on the substrate. Works well. If it is 10 ² cm ² · V ⁻¹ s ⁻¹ or less, the amorphous state becomes dominant, the smoothness of the film surface is high, and the short circuit of the element can be prevented. The electron mobility of the second layer 140 may be 10 ⁻⁴ cm ² · V ⁻¹ s ⁻¹ or more, or may be 10 ⁻³ cm ² · V ⁻¹ s ⁻¹ or more. ^It may be ⁻² cm ² · V ⁻¹ s ⁻¹ or more. The electron mobility of the second layer 140 may be 10 ² cm ² · V ⁻¹ s ⁻¹ or less, may be 10 cm ² · V ⁻¹ s ⁻¹ or less, and may be 10 ⁻¹ cm ^2. It may be V ⁻¹ s ⁻¹ or less.

The electron density of the second layer 140 is preferably 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ . If the thickness is 1 × 10 ¹⁴ cm ⁻³ or more, the thickness of the second layer 140 can be 10 nm or more, and it sufficiently functions as a protective layer for the Si substrate and various functional layers formed on the substrate. If it is 1 × 10 ²¹ cm ⁻³ or less, the amorphous state becomes dominant, the smoothness of the film surface is high, and the short circuit of the element can be prevented. The electron density of the second layer 140 may be 1 × 10 ¹⁴ cm ⁻³ or more, 5 × 10 ¹⁶ cm ⁻³ or more, or 1 × 10 ¹⁸ cm ⁻³ or more. Good. The electron density of the second layer 140 may be 1 × 10 ²¹ cm ⁻³ or less, 5 × 10 ²⁰ cm ⁻³ or less, or 1 × 10 ²⁰ cm ⁻³ or less. Good.

The electron mobility of the second layer 140 can be obtained by a hole measurement method, a time-of-flight (TOF) method, or the like. The electron density of the second layer 140 can be obtained by an iodine titration method, a Hall measurement method, or the like.

The electron affinity of the second layer 140 is preferably 2.0 eV to 4.0 eV. If it is 2.0 eV or more, the contact resistance can be sufficiently reduced. If it is 4.0 eV or less, the effect of reducing the contact resistance cannot be sufficiently obtained. The electron affinity of the second layer 140 may be 2.0 eV or more, 2.2 eV or more, or 2.5 eV or more. On the other hand, the electron affinity of the second layer 140 may be 4.0 eV or less, 3.5 eV or less, or 3.0 eV or less.

The ionization potential of the second layer 140 is preferably 5.5 eV to 8.5 eV. The second layer 140 having such a large ionization potential has a high hole blocking effect and can selectively transport only electrons. The ionization potential of the second layer 140 may be 5.7 eV or more, or 5.9 eV or more. On the other hand, the ionization potential of the second layer 140 may be 7.5 eV or less, or 7.0 eV or less.

As described above, the interface between the n-type Si layer and the metal electrode layer usually does not exhibit ohmic resistance behavior and has a problem that the contact resistance of the interface is high.

On the other hand, the second layer 140 forms an ohmic junction with the metal electrode layer 150, and has a characteristic that the contact resistance between the two layers is relatively small. Further, as described above, the contact resistance at the interface between the second layer 140 and the first layer 130 is significantly small. For this reason, even if the second layer 140 is provided on the first layer 130, the influence of the contact resistance increase due to the increase in the number of interfaces is small.

As a result, by disposing the second layer 140 immediately below the electrode layer 150, the entire resistance loss in the first semiconductor element 100 can be suppressed. This also makes it possible to increase the element efficiency in the first semiconductor element 100.

(Electrode layer 150)
The electrode layer 150 is made of metal. The electrode layer 150 may be made of, for example, aluminum, an aluminum alloy, copper, a copper alloy, or the like.

The thickness of the electrode layer 150 is, for example, in the range of 50 nm to 100 nm. A thickness of the electrode layer 150 of 50 nm or more is preferable because a low-resistance electrode is formed. A thickness of the electrode layer 150 of 100 nm or less is preferable because a step at the edge of the electrode is small and a coating property of a film to be formed later is good. The thickness of the electrode layer 150 may be 60 nm or more, or 70 nm or more. On the other hand, the thickness of the electrode layer 150 may be 90 nm or less, or 80 nm or less.

The electrode layer 150 may be configured in a mesh shape, for example.

(Method for Manufacturing First Semiconductor Element 100)
Next, an example of a manufacturing method of the first semiconductor element 100 having the configuration as shown in FIG. 1 will be described with reference to FIG.

FIG. 2 shows a schematic flow chart of an example of a method for manufacturing the first semiconductor element 100.

As shown in FIG. 2, this manufacturing method (hereinafter referred to as “first manufacturing method”)
Placing an n-type Si layer on the support (step S110);
disposing a first layer on the n-type Si layer (step S120);
Disposing a second layer on the first layer (step S130);
Disposing an electrode layer on the second layer (step S140);
Have

Hereinafter, each process will be described. Here, for the sake of clarity, reference numerals shown in FIG. 1 are used to represent each member.

(Step S110)
First, the support body 110 is prepared.

As described above, the material of the support 110 is not particularly limited. Here, as an example, the case where the support 110 is a Si substrate will be described as an example.

The surface of the support 110 is sufficiently cleaned before the subsequent steps.

Next, an n-type Si layer 120 is formed on the support 110.

The n-type Si layer 120 may be formed, for example, by doping the surface of the support 110, that is, the Si substrate, with an n-type dopant such as phosphorus and / or arsenic.

(Step S120)
Next, the first layer 130 is disposed on the n-type Si layer 120.

The method for forming the first layer 130 is not particularly limited. The first layer 130 can be formed by, for example, a “vapor deposition method” using a target including aluminum (Al) and calcium (Ca).

Here, in the present application, the “vapor deposition method” means that a target material including a physical vapor deposition (PVD) method, a PLD method, a sputtering method, and a vacuum deposition method is vaporized and then formed. It means a general term for a film forming method to be deposited on a film member.

For example, the first layer 130 may be formed by an evaporation method. The first layer 130 may be deposited by heating the raw material in a vacuum of 10 ⁻⁷ Pa to 10 ⁻³ Pa, for example. If it is 10 ⁻⁷ Pa or more, a sufficient electron density can be obtained. It may be 10 ⁻⁶ Pa or higher, or 10 ⁻⁵ Pa or higher. If it is 10 ⁻³ Pa or less, a thin film can be formed at low cost using a simple apparatus. It may be 10 ⁻⁴ Pa or less, or 10 ⁻⁵ Pa or less. Further, the first layer 130 may be formed by a sputtering method or the like.

In general, the first layer 130 formed by vapor deposition has an amorphous structure. Thereafter, the first layer 130 may be heat-treated as necessary. In this case, for example, the crystalline first layer 130 can be obtained by heat-treating the first layer 130 at 900 ° C. or higher.

(Step S130)
Next, the second layer 140 is disposed on the first layer 130.

The second layer 140 can be formed by, for example, a “vapor deposition method” including a sputtering method using a target including zinc (Zn) and silicon (Si).

Sputtering methods include DC (direct current) sputtering method, high frequency sputtering method, helicon wave sputtering method, ion beam sputtering method, magnetron sputtering method and the like. In the sputtering method, the second layer 140 can be formed relatively uniformly in a large area region.

The target only needs to contain Zn and Si. Zn and Si may be contained in a single target or may be separately contained in a plurality of targets. In the target, Zn and Si may exist as a metal or a metal oxide, respectively, or may exist as an alloy or a composite metal oxide. The metal oxide or composite metal oxide may be crystalline or amorphous.

The target may contain one or more metal components selected from the group consisting of Sn, Ti, In, Ga, Nb, and Al in addition to Zn and Si. Zn, Si and other metal components may be contained in a single target, or may be separately contained in a plurality of targets. In the target, Zn, Si and other metal components may exist as a metal or a metal oxide, respectively, or may exist as an alloy or a composite metal oxide of two or more metals. The metal oxide or composite metal oxide may be crystalline or amorphous.

When a single target is used, the Zn / (Zn + Si) value in the target may be 0.30 to 0.95, 0.70 to 0.94, 0.80 in terms of molar ratio. It may be ˜0.92 and may be 0.85˜0.90. When a single target contains one or more metal components selected from the group consisting of Sn, Ti, In, Ga, Nb, and Al in addition to Zn and Si, the content of these metal components is oxide in terms of, ZnO, the total 100 mol% of an oxide of SiO ₂ and other metal components, preferably not more than 15 mol%, more preferably not more than 10 mol%, more preferably not more than 5 mol%. Note that, in terms of oxide, the metal component is calculated as SnO ₂ , TiO ₂ , In ₂ O ₃ , Ga ₂ O ₃ , Nb ₂ O ₅ , or Al ₂ O ₃ . The composition analysis of the target can be performed by the XRF method or the like. Note that the composition of the second layer 140 may differ from the composition ratio of the target used.

When a plurality of targets are used, for example, the second layer 140 can be obtained by simultaneously sputtering a metal Si target and a ZnO target. Other combinations of a plurality of targets include a combination of a ZnO target and a SiO ₂ target, a combination of a plurality of targets including ZnO and SiO ₂ with different ZnO ratios, a combination of a metal Zn target and a metal Si target, Examples include a combination of a metal Zn target and a SiO ₂ target, and a combination of a metal Zn or metal Si target and a ZnO and SiO ₂ target.

When a plurality of targets are used simultaneously, the second layer 140 having a desired composition can be obtained by adjusting the power applied to each target.

When the second layer 140 is formed, if the second layer 140 is dominant in an amorphous state or an amorphous state, the support 110 may not be “positively” heated. preferable. This is because when the temperature of the support 110 is increased, the second layer 140 may not easily become amorphous.

However, the support 110 may be “incidentally” heated by the sputtering process itself by ion bombardment or the like. In this case, how much the temperature of the support 110 increases depends on the sputtering conditions. In order to avoid an increase in the temperature of the support 110, the support 110 may be “positively” cooled. The first layer 130 is preferably formed at a temperature of the support 110 of 70 ° C. or lower. The temperature of the support 110 may be 60 ° C. or less, or 50 ° C. or less.

The pressure of the sputtering gas (pressure in the chamber of the sputtering apparatus) is preferably in the range of 0.05 Pa to 10 Pa, more preferably 0.1 Pa to 5 Pa, and further preferably 0.2 Pa to 3 Pa. If it is this range, since the pressure of sputtering gas will not be too low, plasma will become stable. Moreover, since the pressure of sputtering gas is not too high, the temperature rise of the support body 110 due to an increase in ion bombardment can be suppressed.

The sputtering gas used is not particularly limited. The sputtering gas may be an inert gas or a noble gas. Oxygen may be contained. The inert gas, eg, N ₂ gas. In addition, examples of the rare gas include He (helium), Ne (neon), Ar (argon), Kr (krypton), and Xe (xenon). These may be used alone or in combination with other gases. Alternatively, the sputtering gas may be a reducing gas such as NO (nitrogen monoxide) or CO (carbon monoxide).

By the above method, the second layer 140 can be formed on the first layer 130.

(Step S140)
Next, the electrode layer 150 is disposed on the second layer 140.

The formation method of the electrode layer 150 is not particularly limited. For example, the electrode layer 150 may be formed by a known film forming technique such as a vapor deposition method, a sputtering method, or a coating method.

Through the above steps, the first semiconductor element 100 can be manufactured.

The first semiconductor element 100 may further be provided with other members as necessary.

(Another semiconductor device according to an embodiment of the present invention)
Next, another semiconductor device according to an embodiment of the present invention will be described with reference to FIG.

FIG. 3 shows a schematic cross section of another semiconductor element (hereinafter referred to as “second semiconductor element”) according to an embodiment of the present invention.

As shown in FIG. 3, the second semiconductor element 200 includes a support 210, an n-type Si layer 220, a first layer 230, a second layer 240, and an electrode layer 250 in this order.

Here, the configuration of the second semiconductor element 200 is substantially the same as that of the first semiconductor element 100 shown in FIG. For example, in the second semiconductor element 200, the support 210 to the first layer 230 and the electrode layer 250 are respectively the support 110 to the first layer 130 and the electrode layer in the first semiconductor element 100. 150 has the same configuration.

However, the second layer 240 in the second semiconductor element 200 is composed of a layer different from the second layer 140 in the first semiconductor element 100.

Therefore, the second layer 240 will be described in detail below.

(Second layer 240)
The second layer 240 is
(A) a metal oxide containing titanium (Ti) and oxygen (O),
(B) a metal oxide containing tin (Sn) and oxygen (O), and (c) a metal oxide containing zinc (Zn) and oxygen (O),
Consists of either.

(A) In the case of (a), the second layer 240 has high chemical durability, and is particularly excellent in protection against the Si substrate and various functional layers formed on the substrate. The second layer 240 may be made of titanium oxide doped with Nb (niobium). Since the second layer 240 is composed of titanium oxide doped with Nb (niobium) and exhibits high conductivity, the film thickness can be particularly increased, so that the Si substrate and various types formed on the substrate can be formed. Excellent protection for the functional layer. The value of Nb / (Ti + Nb) is, for example, in the range of 0.01 to 0.15 in molar ratio. Since it will show high electroconductivity if it is 0.01 or more, since a film thickness can be enlarged, it is excellent in the protection property with respect to the Si substrate and various functional layers formed on the substrate. If it is 0.15 or less, Nb (niobium) is dissolved, so that a homogeneous thin film can be produced. The molar ratio of Nb / (Ti + Nb) may be 0.02 or more, 0.03 or more, or 0.05 or more. The molar ratio Nb / (Ti + Nb) may be 0.10 or less, 0.08 or less, or 0.07 or less.

Further, in the case of (b), the second layer 240 has high chemical durability, and is particularly excellent in protection against the Si substrate and various functional layers formed on the substrate. The second layer 240 may be made of tin oxide, ITO (indium tin oxide), tin oxide doped with fluorine, or the like.

The second layer 240 is made of tin oxide, so that the chemical durability is high, and particularly, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate.

Since the second layer 240 is made of ITO, high conductivity can be obtained. In particular, since the film thickness can be increased, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate. The value of In / (Sn + In) is, for example, in the range of 0.03 to 0.2 in terms of molar ratio. Since it will show high electroconductivity if it is 0.03 or more, since a film thickness can be enlarged, it is excellent in the protection property with respect to the Si substrate and various functional layers formed on the substrate. If it is 0.20 or less, since Sn (tin) is dissolved, a homogeneous thin film can be produced. The molar ratio of In / (Sn + In) may be 0.5 or more, 0.07 or more, or 0.09 or more. The value of In / (Sn + In) may be 0.15 or less, 0.13 or less, or 0.11 or less in terms of molar ratio.

The second layer 240 is composed of tin oxide doped with fluorine, so that the chemical durability is high, and in particular, the second substrate 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate. The value of F / (Sn + F) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained. In particular, since the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since F (fluorine) is dissolved, a homogeneous thin film can be produced. The value of F / (Sn + F) may be 0.03 or more, 0.05 or more, or 0.08 or more in terms of molar ratio. The value of F / (Sn + F) may be 0.15 or less in molar ratio, 0.12 or less, or 0.1 or less.

Furthermore, in the case of (c), the second layer 240 may be made of zinc oxide, IZO (indium zinc oxide), zinc oxide doped with aluminum, zinc oxide doped with gallium, or the like.

Since the second layer 240 is composed of zinc oxide, high conductivity can be obtained. In particular, since the film thickness can be increased, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate. .

Since the second layer 240 is made of IZO, high conductivity can be obtained. In particular, since the film thickness can be increased, the second layer 240 is excellent in protection against the Si substrate and various functional layers formed on the substrate. The value of Zn / (Zn + In) is, for example, in the range of 0.01 to 0.2 in molar ratio. If it is 0.01 or more, high conductivity can be obtained. In particular, since the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. Since Zn (zinc) is dissolved, a homogeneous thin film can be produced. The value of Zn / (Zn + In) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio. The value of Zn / (Zn + In) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.

Since the second layer 240 is made of zinc oxide doped with aluminum, high conductivity can be obtained. In particular, since the film thickness can be increased, various functional layers formed on the Si substrate and the substrate. Excellent protection against. The value of Al / (Zn + Al) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained. In particular, since the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since Al (aluminum) is dissolved, a homogeneous thin film can be produced. The value of Al / (Zn + Al) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio. The value of Al / (Zn + Al) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.

Since the second layer 240 is composed of zinc oxide doped with gallium, high conductivity can be obtained. In particular, since the film thickness can be increased, various functional layers formed on the Si substrate and the substrate are provided. Excellent protection against. The value of Ga / (Zn + Ga) is, for example, in the range of 0.01 to 0.2 in terms of molar ratio. If it is 0.01 or more, high conductivity can be obtained. In particular, since the film thickness can be increased, the Si substrate and various functional layers formed on the substrate are excellent in protection. If it is 0.2 or less, since Ga (gallium) is dissolved, a homogeneous thin film can be produced. The value of Ga / (Zn + Ga) may be 0.05 or more, 0.08 or more, or 0.1 or more in terms of molar ratio. The value of Ga / (Zn + Ga) may be 0.15 or less in molar ratio, 0.13 or less, or 0.11 or less.

The second layer 240 may be crystalline or amorphous.

The second layer 240 is characterized in that an ohmic junction is formed at the interface (second interface) with the metal electrode layer 250, and the contact resistance of the second interface is relatively small. Further, the contact resistance at the interface (third interface) between the second layer 240 and the first layer 230 is also significantly small. For this reason, even if the second layer 240 is provided on the first layer 230, the influence of an increase in contact resistance due to an increase in the number of interfaces is small.

Also, as described above, the contact resistance is significantly suppressed also at the interface (first interface) between the n-type Si layer 220 and the first layer 230.

Therefore, the same effects as those of the first semiconductor element 100 can be obtained in the second semiconductor element 200. That is, in the second semiconductor element 200, the first to third interfaces, that is, the interface (first interface) between the n-type Si layer 220 and the first layer 230, the second layer 240 and the electrode layer. Contact resistance is significantly suppressed at each of the interface between the first layer 230 and the second layer 240 (third interface). As a result, in the second semiconductor element 200, the efficiency during operation can be significantly improved.

(Method for Manufacturing Second Semiconductor Element 200)
As a method for manufacturing the second semiconductor element 200 (hereinafter referred to as “second manufacturing method”), the flowchart of the first manufacturing method shown in FIG. 2 described above can be referred to. In particular, steps S110 to S120 and step S140 in the first manufacturing method described above can be applied to the second manufacturing method as they are.

Therefore, here, in particular, step S130 shown in FIG. 2, that is, an example of an installation method of the second layer will be described.

(Installation method of the second layer 240)
The second layer 240, as described above,
(A) a metal oxide containing titanium (Ti) and oxygen (O),
(B) a metal oxide containing tin (Sn) and oxygen (O), or (c) a metal oxide containing zinc (Zn) and oxygen (O),
Consists of either.

The second layer 240 can be formed by, for example, a “vapor deposition method” including a sputtering method.

Sputtering methods include DC (direct current) sputtering method, high frequency sputtering method, helicon wave sputtering method, ion beam sputtering method, magnetron sputtering method and the like. In the sputtering method, the second layer 240 can be formed relatively uniformly in a large area region.

The target only needs to include a predetermined material. For example, in the case of (a) described above, a target containing Ti is used. In the case of (b) described above, a target containing Sn is used. Further, in the case of (c) described above, a target containing Zn is used. These targets may be metals or metal oxides. The target may be crystalline or amorphous.

When the second layer 240 is a layer in which an amorphous state or an amorphous state is dominant, the support 210 in forming the second layer 240 may not be “positively” heated. preferable.

Note that the installation method of the second layer 240 shown here is merely an example, and the second layer 240 may be installed by other methods.

(Still another semiconductor device according to an embodiment of the present invention)
Next, still another semiconductor device according to an embodiment of the present invention will be described with reference to FIG.

FIG. 4 shows a schematic cross section of still another semiconductor element (hereinafter referred to as “third semiconductor element”) according to an embodiment of the present invention.

As shown in FIG. 4, the third semiconductor element 300 includes a support 310, an n-type Si layer 320, a first layer 330, a third layer 342, a fourth layer 344, and an electrode layer. 350.

Here, the third semiconductor element 300 has a configuration very similar to that of the first semiconductor element 100 shown in FIG. For example, in the third semiconductor element 300, the support 310 to the third layer 342 and the electrode layer 350 are respectively the support 110 to the second layer 140 and the electrode layer in the first semiconductor element 100. 150 has the same configuration. That is, the third layer 342 in the third semiconductor element 300 corresponds to the second layer 140 in the first semiconductor element 100.

However, the third semiconductor element 300 is different from the first semiconductor element 100 in that it has a fourth layer 344 between the third layer 342 and the electrode layer 350. In other words, the third semiconductor element 300 has a configuration in which two layers of the third layer 342 and the fourth layer 344 are arranged instead of the second layer 140 in the first semiconductor element 100. I can say.

Here, the fourth layer 344 corresponds to the second layer 240 in the second semiconductor element 200. That is, the fourth layer 344 is
(A) a metal oxide containing titanium (Ti) and oxygen (O),
(B) a metal oxide containing tin (Sn) and oxygen (O), or (c) a metal oxide containing zinc (Zn) and oxygen (O),
Consists of either.

As described above, in the case of (a), the fourth layer 344 may be made of titanium oxide doped with Nb (niobium). In the case of (b), the fourth layer 344 may be composed of tin oxide, ITO (indium tin oxide), tin oxide doped with fluorine, or the like. Furthermore, in the case of (c), the fourth layer 344 may be made of zinc oxide, IZO (indium zinc oxide), zinc oxide doped with aluminum, zinc oxide doped with gallium, or the like.

Further, the fourth layer 344 may be crystalline or amorphous.

Here, the number of layers of the third semiconductor element 300 is increased by one as compared with the first semiconductor element 100 and the second semiconductor element 200 described above, and as a result, one interface is also increased.

However, the inventors' knowledge has confirmed that the contact resistance of the interface between the third layer 342 and the fourth layer 344 (hereinafter referred to as “fourth interface”) is relatively low. . Therefore, although the number of layers and the number of interfaces of the third semiconductor element 300 are larger than those of the first semiconductor element 100 and the second semiconductor element 200, the influence thereof hardly occurs.

Therefore, also in the third semiconductor element 300 having such a configuration, the same effects as those of the first semiconductor element 100 and the second semiconductor element 200 can be obtained. That is, in the third semiconductor element 300, the interface between the n-type Si layer 320 and the first layer 330 (first interface), the interface between the fourth layer 344 and the electrode layer 350 (second interface). ) And the interface between the first layer 330 and the third layer 342 (third interface), the contact resistance is significantly suppressed.

For this reason, in the third semiconductor element 300, since the contact resistance can be reduced as compared with the first semiconductor element 100 and the second semiconductor element 200, the element efficiency can be significantly improved. In addition, when the third layer 342 and the fourth layer 344 have different refractive indexes, the degree of freedom in optical design can be increased.

A method for manufacturing the third semiconductor element 300 can be easily understood by those skilled in the art from the description of the method for manufacturing the first semiconductor element 100 and the second semiconductor element 200 described above.
The embodiment of the present invention has been described above by taking the first to third semiconductor elements 100, 200, and 300 as examples. However, the present invention is not limited to these configurations. For example, in the first to third semiconductor elements 100, 200, 300, the n-type Si layers 120, 220, 320 may be made of another n-type semiconductor material other than Si.

(Application Example of Semiconductor Device According to One Embodiment of the Present Invention)
Next, application examples of the semiconductor device according to the embodiment of the present invention will be described. Here, the application example will be described by taking the configuration of the first semiconductor element 100 described above as an example. However, it will be apparent to those skilled in the art that the same application is possible in the configuration of the second or third semiconductor elements 200 and 300 described above.

(Solar cell module)
The semiconductor device according to one embodiment of the present invention can be applied to, for example, a solar cell module.

FIG. 5 schematically shows a configuration example of such a solar cell module.

As shown in FIG. 5, the solar cell module 500 is configured by electrically connecting a plurality of solar cells 502 in series with each other.

Each solar cell 502 includes a first electrode 560A and a second electrode 560B made of metal, and the first portion 580 and the second portion 590 are disposed between the electrodes 560A and 560B. . In other words, the solar battery cell 502 is configured by disposing the second electrode 560B, the second portion 590, the first portion 580, and the first electrode 560A in order from the bottom.

The first electrode 560A is electrically connected to the second electrode 560B of the adjacent right solar cell 502. The second electrode 560B is electrically connected to the first electrode 560A of the adjacent left solar cell 502. Thereby, each photovoltaic cell 502 is mutually connected in series.

The first portion 580 has an n-type Si layer, and the second portion 590 has a p-type Si layer. The n-type Si layer of the first portion 580 forms a pn junction with the p-type Si layer of the second portion 590.

Here, the second portion 590 to the first electrode 560A are composed of the first semiconductor element 100 described above. That is, the second portion 590 in the solar cell 502 corresponds to the support 110 of the first semiconductor element 100, and the first portion 580 in the solar cell 502 is the n-type Si of the first semiconductor element 100. Corresponding to the layer 120, the first layer 130, and the second layer 140, the first electrode 560 </ b> A in the solar battery cell 502 corresponds to the electrode layer 150 of the first semiconductor element 100.

As described above, in the conventional solar cell module, the contact resistance between the first electrode and the n-type Si layer in the first portion 580 is relatively high, and thus there is a limit to improving the power generation efficiency. It was.

However, the first semiconductor element 100 having the above-described characteristics is applied to the solar cell module 500 shown in FIG. For this reason, in the solar cell module 500, the power generation efficiency can be significantly improved.

(TFT)
The semiconductor device according to an embodiment of the present invention can be applied to, for example, a TFT.

FIG. 6 schematically shows a configuration example of such a TFT.

As shown in FIG. 6, the TFT 600 includes a gate electrode 601, a gate insulating film 603, an amorphous Si layer 690, an n-type Si layer 680, a first electrode 660A (for example, a source), a second electrode 660B (for example, a drain), A channel protective layer 670 and a protective film 675 are included.

In addition, since the role of these members is clear to those skilled in the art, detailed description is omitted here.

Here, the portion of the amorphous Si layer 690 to the first electrode 660A or the portion of the amorphous Si layer 690 to the second electrode 660B is composed of the first semiconductor element 100 described above. That is, the amorphous Si layer 690 in the TFT 600 corresponds to the support 110 of the first semiconductor element 100, and the n-type Si layer 680 in the TFT 600 is the n-type Si layer 120 and the first layer of the first semiconductor element 100. 130 and the second layer 140, the first electrode 660A or the second electrode 660B in the TFT 600 corresponds to the electrode layer 150 of the first semiconductor element 100.

As described above, in the conventional TFT, the contact resistance between the first or second electrode and the n-type Si layer is relatively high, so that there is a limit to the improvement of the operation efficiency.

However, the first semiconductor element 100 having the above-described characteristics is applied to the TFT 600 shown in FIG. For this reason, in the TFT 600, it is possible to significantly improve the operation efficiency.

The application example of the semiconductor element according to the embodiment of the present invention has been described above using the solar cell module and the TFT as examples. However, these application examples are merely examples, and the semiconductor element according to the embodiment of the present invention may be applied to other apparatuses.

Next, examples of the present invention will be described.

(Example 1)
The semiconductor device as shown in FIG. 1 was manufactured by the following method.

First, an n-type Si substrate was prepared. The n-type Si substrate had dimensions of 30 mm length × 30 mm width × 0.5 mm thickness, and the electron density was 10 ¹⁵ cm ⁻³ .

The n-type Si substrate (hereinafter simply referred to as “substrate”) was washed with hydrofluoric acid and pure water before use to remove the natural oxide film on the surface.

Next, the substrate was introduced into a sputtering apparatus. After evacuating the inside of the sputtering apparatus to 3 × 10 ⁻⁷ Pa, an amorphous C12A7 electride was formed as a first layer on the substrate by sputtering.

During film formation, a metal mask was used to form four rectangular first layers (thickness 2 nm) having a width of 200 μm × length of 800 μm × thickness of 2 nm on a substrate. The intervals between adjacent rectangles were 400 μm, 600 μm, and 800 μm, respectively.

During film formation, the RF power was 100 W, Ar was used as the soot film forming gas, and the total pressure was 0.15 Pa. The distance between the substrate and the target was 100 mm.

The electron density of the obtained first layer was 10 ²¹ cm ⁻³ .

Next, a second layer was formed by sputtering on each rectangular first layer while the substrate was introduced into the sputtering apparatus. The second layer was a ZSO layer.

As the target, a composition having a molar ratio of Zn: Si = 80: 20 was used.

The distance between the target and the substrate during film formation was 100 mm. The sputtering gas at the time of film formation was a mixed gas of Ar and O ₂ , and the pressure of the sputtering gas was 0.4 Pa. The Ar flow rate was 39.9 sccm, and the O ₂ flow rate was 0.1 sccm. The RF plasma power was 100W. As a result, a second layer having a thickness of 10 nm was formed only on the first layer.
The electron density of the obtained second layer was 10 ¹⁵ cm ⁻³ .

Thereafter, the substrate on which each layer was formed was taken out into the atmosphere and left for 1.5 hours.

Next, the substrate was returned to the same sputtering apparatus, and an Al alloy layer (hereinafter referred to as “Al electrode”) was formed only on the second layer. The Al electrode was formed by sputtering using an Al: 2% Nd target.

In any part of the four rectangles, the thickness of the Al electrode was 200 nm.

A semiconductor element (hereinafter referred to as “sample A”) was formed by such a method.

(Example 2)
A semiconductor device was manufactured in the same manner as in Example 1.

However, in Example 3, titanium oxide doped with Nb (niobium) was formed as the second layer on the first layer. A target having a composition of Ti: Nb = 94: 6 in molar ratio was used. The distance between the target and the substrate during film formation was 100 mm. The sputtering gas at the time of film formation was a mixed gas of Ar and O ₂ , and the pressure of the sputtering gas was 0.4 Pa. The flow rate of Ar was 40 sccm. The RF plasma power was 100W. As a result, a second layer having a thickness of 10 nm was formed only on the first layer. At this time, the second layer was amorphous.

Thereafter, the substrate on which each layer was formed was taken out into the atmosphere and left for 48 hours.

Next, the substrate was returned to the same sputtering apparatus, and an Al electrode was formed only on the second layer.

Hereinafter, the obtained semiconductor element is referred to as “sample B”.

(Example 3)
A semiconductor device was manufactured in the same manner as in Example 1.

However, in Example 3, the second layer was not formed on the first layer. That is, an Al electrode was directly formed on the amorphous C12A7 electride layer. The film forming conditions for each layer are the same as in Example 1.

Hereinafter, the obtained semiconductor element is referred to as “sample C”.

(Evaluation)
Resistance measurement was performed using Sample A, Sample B, and Sample C described above. For the resistance measurement, a TLM method (Transmission Line Model) was used.

In this method, the resistance value of the sample can be measured as a function of the distance between the two Al electrodes by measuring the current and voltage between each two Al electrodes. Keithley 2635B was used for the ammeter.

As a result of measurement, in Sample A and Sample B, it was confirmed that the resistance change was ohmic. On the other hand, in sample C, it was confirmed that the resistance change was not ohmic.

FIG. 7 collectively shows the measurement results obtained for Sample A, Sample B, and Sample C.

7, the horizontal axis is the distance between the Al electrodes, and the vertical axis is the resistance value.

From FIG. 7, it can be seen that Sample A and Sample B show significantly lower resistance values than Sample C. Although not shown in the figure, four rectangular Al electrodes were formed directly on the substrate, and the same measurement was performed. As a result, it was confirmed that the resistance change was not ohmic in such a sample. It was also found that the absolute value of the resistance was significantly high regardless of the distance between the Al electrodes.
This may be due to alteration of the interface of the amorphous C12A7 electride layer, which is an oxide. The electric conduction of the amorphous C12A7 electride layer is considered to be obtained by O ^{2 −} coming out of the cage and e ⁻ entering instead of moving the e ^−, but at the interface of the amorphous C12A7 electride layer. It is inferred that oxygen atoms enter the cage and the electrical characteristics deteriorate, which is considered to be a phenomenon peculiar to the amorphous C12A7 electride layer.

In this way, the first layer (C12A7 electride layer) is disposed immediately above the n-type layer, and the second layer (ZSO layer or titanium oxide layer) is disposed directly below the Al electrode. Thus, it was confirmed that the contact resistances of the first interface and the second interface are both suppressed, and the overall resistance value of the semiconductor element can be reduced.

The semiconductor element of the present invention can be applied to, for example, a solar cell module and a thin film transistor (TFT). Further, the present invention can be applied to semiconductor devices used for various electronic devices such as electro-optical devices. For example, it can be used for electronic devices such as displays such as televisions, electrical appliances such as washing machines and refrigerators, and information processing devices such as mobile phones and computers. In addition, the semiconductor element of the present invention can be used for electronic devices included in automobiles and various industrial equipment.

This application claims priority based on Japanese Patent Application No. 2016-195785 filed on October 3, 2016, the entire contents of which are incorporated herein by reference.

DESCRIPTION OF SYMBOLS 100 1st semiconductor element 110 Support body 120 n-type Si layer 130 1st layer 140 2nd layer 150 Electrode layer 200 2nd semiconductor element 210 Support body 220 n-type Si layer 230 1st layer 240 2nd Layer 250 electrode layer 300 third semiconductor element 310 support 320 n-type Si layer 330 first layer 342 third layer 344 fourth layer 350 electrode layer 500 solar cell module 502 each solar cell 560A first electrode 560B Second electrode 580 First portion 590 Second portion 600 TFT
601 gate electrode 603 gate insulating film 660A first electrode 660B second electrode 670 channel protective layer 675 protective film 680 n-type Si layer 690 amorphous Si layer

Claims (9)

1. an n-type Si portion;
   A first layer disposed on the n-type Si portion;
   A second layer disposed on the first layer;
   An electrode layer disposed on the second layer;
   Have
   The first layer is composed of an oxide electride containing calcium atoms and aluminum atoms,
   Said second layer comprises the following groups:
   (I) a metal oxide comprising zinc (Zn) and oxygen (O), and further comprising at least one of silicon (Si) and tin (Sn);
   (Ii) a metal oxide containing titanium (Ti) and oxygen (O),
   (Iii) a metal oxide containing tin (Sn) and oxygen (O), and (iv) a metal oxide containing zinc (Zn) and oxygen (O),
   A semiconductor element selected from
2. The semiconductor element according to claim 1, wherein the first layer is amorphous.
3. 3. The semiconductor element according to claim 1, wherein the metal oxide (i) is amorphous.
4. The semiconductor element according to any one of claims 1 to 3, wherein the metal oxide (ii) is titanium oxide doped with Nb (niobium).
5. 5. The semiconductor element according to claim 1, wherein the metal oxide (iii) is indium tin oxide (ITO) or fluorine-doped tin oxide.
6. The semiconductor element according to any one of claims 1 to 5, wherein the metal oxide (iv) is zinc oxide doped with aluminum and / or gallium.
7. The second layer is composed of at least two layers including a third layer and a fourth layer from the side close to the first layer,
   The third layer is selected from (i),
   7. The semiconductor device according to claim 1, wherein the fourth layer is selected from one of (ii) to (iv).
8. A solar cell module comprising the semiconductor element according to any one of claims 1 to 7.
9. A TFT comprising the semiconductor element according to claim 1.

Images