WO2018033898A1 - 볼 그리드 어레이형 반도체 칩 패키지의 검사 방법 - Google Patents

볼 그리드 어레이형 반도체 칩 패키지의 검사 방법 Download PDF

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Publication number
WO2018033898A1
WO2018033898A1 PCT/IB2017/056460 IB2017056460W WO2018033898A1 WO 2018033898 A1 WO2018033898 A1 WO 2018033898A1 IB 2017056460 W IB2017056460 W IB 2017056460W WO 2018033898 A1 WO2018033898 A1 WO 2018033898A1
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Prior art keywords
semiconductor chip
image
dimensional image
interest
region
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PCT/IB2017/056460
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English (en)
French (fr)
Inventor
조승룡
박미란
이호연
Original Assignee
한국과학기술원
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Priority to US16/326,340 priority Critical patent/US11150198B2/en
Publication of WO2018033898A1 publication Critical patent/WO2018033898A1/ko

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302—Contactless testing
    • G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • G01R31/311—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of integrated circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501—Semiconductor wafers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects
    • G01N21/95684—Patterns showing highly reflecting parts, e.g. metallic elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/951—Balls
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
    • G01N23/04—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
    • G01N23/046—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material using tomography, e.g. computed tomography [CT]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
    • G01N23/06—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and measuring the absorption
    • G01N23/18—Investigating the presence of flaws defects or foreign matter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T11/00—2D [Two Dimensional] image generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G06T7/001—Industrial image inspection using an image reference approach
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/20—Image signal generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects
    • G01N2021/95638—Inspecting patterns on the surface of objects for PCB's
    • G01N2021/95646—Soldering
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00—Investigating materials by wave or particle radiation
    • G01N2223/30—Accessories, mechanical or electrical features
    • G01N2223/33—Accessories, mechanical or electrical features scanning, i.e. relative motion for measurement of successive object-parts
    • G01N2223/3306—Accessories, mechanical or electrical features scanning, i.e. relative motion for measurement of successive object-parts object rotates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00—Investigating materials by wave or particle radiation
    • G01N2223/40—Imaging
    • G01N2223/419—Imaging computed tomograph
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00—Investigating materials by wave or particle radiation
    • G01N2223/60—Specific applications or type of materials
    • G01N2223/611—Specific applications or type of materials patterned objects; electronic devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2896—Testing of IC packages; Test features related to IC packages
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/10—Image acquisition modality
    • G06T2207/10028—Range image; Depth image; 3D point clouds
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/20—Special algorithmic details
    • G06T2207/20092—Interactive image processing based on input by user
    • G06T2207/20104—Interactive definition of region of interest [ROI]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30148—Semiconductor; IC; Wafer

Definitions

  • the present invention relates to a method of inspecting a ball grid array semiconductor chip package, and more particularly, to a method of inspecting a solder ball of a ball grid array semiconductor chip using a non-destructive projection imaging technique.
  • the ball grid array has a grid-like pin grid array in which pins are attached to one side or the front surface of the ball grid array.
  • the pin grid array of pins is used to transfer electrical signals from the integrated circuit to the printed circuit board with the chip attached.
  • the pins are solder balls attached to the underside of the package.
  • the ball grid array semiconductor chip becomes a grid of solder balls arranged as a pin of the part.
  • the pin grid array has a finer pin spacing as the density increases. The process is complex, there is a risk of short circuit, whereas the ball grid array is due to the production of the package with the correct amount of solder not have the above problems, is excellent in thermal conductivity, and has the advantage of having a low inductance pin.
  • solder balls are constructed in various sizes and intervals, depending on the type of semiconductor chip. Solder balls must be checked for location, spacing, size, presence, quality, etc. Inspection of these solder balls must be carried out to prevent malfunction of the entire machine.
  • Fig. 1 is a method of inspecting a conventional ball grid array semiconductor chip, which shows (a) the acquisition of a ball grid array region from a difference image from a 2D quality projection image, and (b) a 3D image reconstructed by lanography.
  • a ball grid array image which is a region of interest obtained from a difference image from a 2D quality projection image, is very difficult to obtain a cue for detection of defects. If it is the same as the good product, there is no difference value as indicated by the arrow, and if there is a size and pore, the difference value is displayed.However, as shown, the 2D imaging technique is difficult to find the characteristics of each solder ball, and has low contrast. This is especially the upper right corner
  • Fig. 1 (b) shows an example of the image reconstructed by laminography, which shows a high contrast compared to 2D, but it is still difficult to distinguish clearly from other layers and has a low resolution in the depth direction.
  • Minograph's 3D image inspection method has a problem that fundamentally complete 3D information may not be restored and search time is increased to an unparalleled level compared to 2D.
  • Korean Patent No. 10-1293532 discloses a CT inspection method (hereinafter, referred to as 'prior patent') of a semiconductor chip.
  • CT inspection method for non-destructive perspective the semiconductor chip is rotated 180 degrees or 360 degrees to acquire a large number of two-dimensional transmission image and reconstructed into three-dimensional tomographic image.
  • the inspection angle is set to be a diagonal line with respect to the direction. Chips are difficult to shoot at high magnification.
  • the present applicant is responsible for the correctness of the ball grid array area in conjunction with 2D and 3D.
  • the present invention therefore provides a cross-sectional view of the ball grid array semiconductor chip package.
  • the first embodiment of the present invention obtains a three-dimensional image of a semiconductor chip as a reference and obtains a reference image from which the region of interest is removed from the three-dimensional image.
  • An acquisition unit, a second image acquisition unit for acquiring a two-dimensional image of the semiconductor chip under test, and an image processing unit for acquiring an image of a region of interest of the semiconductor chip under test from the difference between the reference image and the two-dimensional image It provides an inspection device for a semiconductor chip package containing.
  • Acquisition of 3D image is not particularly limited as long as the process of obtaining 3D image by acquiring internal information and surface information of semiconductor chip is possible.
  • the semiconductor chip can be rotated or moved at regular intervals.
  • the internal and surface information of the semiconductor chip is secured and implemented as a 3D image by software by capturing an image using an image acquisition method such as this.
  • the internal and surface information of the semiconductor chip can be at least part of information. .
  • semiconductor chip means a substrate in which semiconductor devices, various wirings, soldering, and the like are integrated, and it is possible to understand the concept including a PCB substrate.
  • it may be effective to cover the bottom or the middle of the device so that it is not possible to check its appearance by visual inspection alone.
  • the first image acquisition unit may be configured by acquiring a reference image as described above, which is configured in the inspection device of the semiconductor chip.
  • the first image acquisition unit may receive, store, and use the already obtained reference image.
  • the semiconductor chip must be inspected after the operation of the reference image is performed separately.
  • the operation for acquiring the reference image is first performed to acquire the 3D image through various methods which are not particularly limited, The reference image is produced by automatically removing the region of interest, and then the first image acquisition section can be used to
  • the first image acquisition unit removes one or more regions of interest from the three-dimensional image by using a three-dimensional image of the semiconductor chip to be the reference and acquires a reference image.
  • a 3D image acquisition module and a 2D image acquisition module may acquire a reference image obtained by converting the reference image acquired by the 3D image acquisition module into a 2D image at a specific angle.
  • the second image acquisition unit the specific image acquisition unit
  • a two-dimensional image of the semiconductor chip, which is the object under test, can be acquired at an angle.
  • the step (X) is to remove the at least one region of interest from the three-dimensional image and remove the at least one region of interest from the three-dimensional image at a particular angle.
  • step (y) may be a step of acquiring a two-dimensional image of the semiconductor chip to be examined at the specific angle.
  • the step (i) acquires a three-dimensional image of a semiconductor chip which becomes a reference, extracts a region of interest from the three-dimensional image, and extracts the extracted image at a predetermined angle.
  • the step (ii) may be a step of acquiring a two-dimensional image of the semiconductor chip to be inspected at the predetermined angle.
  • the semiconductor chip serving as the reference and the semiconductor chip under test may include a common region of interest, and an array of a predetermined type may exist in the common region of interest.
  • the array can be a ball grid array.
  • the fourth embodiment of the present invention provides a rotation means for rotating the semiconductor chip to be the reference in combination with the semiconductor chip to be the reference, and the specific angle of the semiconductor chip to be tested.
  • An image acquisition device for acquiring a two-dimensional image of an image, and obtaining a three-dimensional image of the semiconductor chip to be the reference rotated by the rotation means, and an image acquisition device for obtaining the three-dimensional image of the semiconductor chip to be the reference. Acquiring a reference image obtained by removing a region and converting the image into a two-dimensional image at the specific angle, and acquiring an image of a region of interest of the examinee semiconductor chip from the difference between the reference image and the two-dimensional image of the examinee semiconductor chip.
  • the image processing device provides a inspection system for semiconductor chip packages.
  • a 3D-structured ball grid array semiconductor package can be quickly inspected. More specifically, in the present invention, three-dimensional imaging is performed once in order to obtain a reference image, and the region of interest can be accurately extracted only by the two-dimensional image of the semiconductor chip.
  • time-consuming traditional 3D imaging technology Computed Tomography
  • the cross-section of interest acquired by linking 3D imaging technology can clearly identify the solder ball without overlapping cross-sections, thus improving the reliability of the inspection.
  • the high-speed non-destructive radiation inspection technique suitable for line inspection can be used for defect inspection system during the manufacturing process of mobile IT devices, IoT-related devices, and automotive electronic products.
  • FIG. 1 shows a conventional inspection method of a ball grid array semiconductor chip.
  • FIG. 2 shows a flowchart of a method of inspecting a ball grid array semiconductor chip package according to a first embodiment of the present invention.
  • FIG. 3 illustrates a three-dimensional imaging image of a semiconductor chip for obtaining a reference image in the inspection method of FIG. 2.
  • FIG. 4 illustrates a reference image from which a cross section of interest is removed from the image of FIG. 3.
  • FIG. 5 illustrates an example in which a ball grid array region of interest is obtained from a difference image between a two-dimensional image and a reference image of a semiconductor chip under test in the inspection method of FIG. 2.
  • FIG. 6 shows a flowchart of a test method of a ball grid array semiconductor chip package according to a second embodiment of the present invention.
  • FIG. 7 is a block diagram showing the configuration of an inspection apparatus for a semiconductor chip package according to a third embodiment of the present invention.
  • FIG. 8 is a diagram schematically showing the configuration of an inspection system for a semiconductor chip package according to a fourth embodiment of the present invention.
  • FIG. 9 is a diagram for explaining a method of acquiring a three-dimensional image by a semiconductor chip package inspection system according to a fourth exemplary embodiment of the present invention.
  • FIG. 10 is a diagram for explaining a method of obtaining a 3D reference image of a semiconductor chip which becomes a reference by using a CT.
  • FIG. 11 illustrates a case where a plurality of regions of interest are in accordance with various embodiments of the present invention.
  • the reference image of the semiconductor chip as a reference and the region of interest are removed.
  • first and second used in this specification may be used to describe various components, but the components should not be limited by the terms. It is only used to distinguish one component from another.
  • the first component may be named as the second component, and similarly the second component may be applied. It can be named as one component.
  • the inspection method and inspection apparatus of the semiconductor chip package according to various embodiments of the present invention described below can be applied to semiconductor chip packages having various forms.
  • (X) acquiring a reference image from which a region of interest is removed from the three-dimensional image by using a three-dimensional image of a semiconductor chip serving as a reference; y) obtaining a two-dimensional image of the semiconductor chip under test, and (z) the reference image obtained through the step (X) and the two-dimensional image of the semiconductor chip acquired through the step (y). It can be expressed as a step of obtaining an image of the center of interest from the difference.
  • These areas of interest may be preset, and the image of the area of interest obtained as a result of step (z) is the interest of the semiconductor chip being tested.
  • the image of the area is the interest of the semiconductor chip being tested.
  • the step (X) may include one or more regions of interest from the three-dimensional image.
  • It may be a step of obtaining a reference image obtained by removing a three-dimensional image is removed and one or more areas of interest removed to a two-dimensional image at a specific angle
  • the step (y), the two-dimensional of the semiconductor chip to be tested at the specific angle Acquiring an image may be a step.
  • FIG. 2 shows a flowchart of a method of inspecting a ball grid array semiconductor chip package according to a first embodiment of the present invention.
  • step (A) step (S101) of taking a semiconductor chip as a reference (b) step (S103) of obtaining a reference image, step (c) (S105) of taking a semiconductor chip under test, and an image of a cross section of a ball grid array. And (d) step (S107) of acquiring.
  • Step S101 acquires a three-dimensional image of the semiconductor chip to be a reference.
  • Step (S101) may be performed one time for the production of the reference image, or may be performed multiple times during the actual process.
  • Step (S 101) uses an X-ray CT to determine which general conductor chip is referred to.
  • FIG. 3 illustrates a three-dimensional image of the semiconductor chip 1 for obtaining a reference image in the inspection method of FIG. 2.
  • FIG. 3A illustrates step (a) of step (S101). Of the ball grid array semiconductor chip becomes a reference
  • FIG. 3B shows a side view of the forward projection.
  • step (a) (S101) and step (c) (S105) the solder ball 10 formed in the ball grid array of the semiconductor chip 1 to be photographed is formed as a single layer.
  • the chip element 30 is integrated on top or bottom of the solder ball to obtain a projection image of the nested ball grid array. That is, the embodiment of the present invention is particularly suitable for inspection of ball grid array semiconductor chips of 3D structure. Do.
  • the semiconductor chip (1) of the 3D structure may have a ball grid array area (B) formed between the lower substrate (C) and other elements or substrate layers (A), and accordingly, a general optical imaging or 2D X-ray solder ball. It is difficult to clearly identify only the region B. According to this embodiment,
  • step S103 a background image excluding the solder ball area B is produced as a reference image, which is used as a reference image that can be rapidly compared with a 2D image of a semiconductor chip to be tested later.
  • Step (S103) acquires a reference image from which the ball grid array area (B) is removed from the three-dimensional image obtained in (a) (S101).
  • the removed reference image is illustrated.
  • FIG. 4A is a forward projection in which the ball grid array area B is removed
  • FIG. 4B is a forward projection. Show the side view of the projection.
  • step (b) (S103) is performed by stacking a stacked layer of semiconductor chips.
  • the layer in which the ball 10 exists can be removed by setting it as the section of interest.
  • the section of interest can be one or more.
  • the solder ball 10 array can be formed in more than one layer.
  • a layer of the element 30 which requires a reliability test may be set as a cross-section of interest.
  • the layer of the ball grid layer (B) is deleted to acquire a background image other than the cross section of interest.
  • the reference image composed of the background is 3D. In order to be compatible, the conversion process is required.
  • Step (S103) is a two-dimensional image of the ball grid array area (B) of the semiconductor chip (1) removed from the three-dimensional image acquired in step (a101) at a fixed angle
  • a reference image can be obtained by converting it to an image.
  • the specific angle referred to in this specification refers to the angle set by the user.
  • the 3D image can be converted into a 2D image by fixing the projection angle, and the reference image can be 2D converted into a plane view in which the semiconductor chip 1 is viewed from above, as shown in FIG.
  • Step (C) acquires a two-dimensional image of the semiconductor chip to be tested.
  • step (c) the semiconductor chip to be inspected may be acquired as a two-dimensional image at the specific angle.
  • Step (S105) is to be taken 2D X-ray at the same angle as the specific angle described in the reference image conversion process.
  • Figures 3 to 5 planar view of the semiconductor chip (1) in the forward projection viewed from above Example of ⁇ - ⁇ ⁇ image with specific angle set.
  • Step (S107) is a two-dimensional image corresponding to the ball grid array area (B) of the semiconductor chip (1) from the difference between the reference image and (c) the two-dimensional image acquired in step (S105). Acquire.
  • step (d) in step S107, a 2D reference image is subtracted from the 2D semiconductor chip image to remove redundant background images, and an image processing process of obtaining only a cross section of interest is performed.
  • the inspection method according to the present embodiment can significantly reduce the reliability inspection time of the ball grid array semiconductor chip.
  • FIG. 5 shows the result of performing step (d) of step S107, and the two-dimensional image of the semiconductor chip under test.
  • the ball grid array region of interest is obtained from the difference image of the reference image.
  • the ball grid array region (B) is clearly identified in the semiconductor chip of the 3D structure by performing step (d) (S107). Can be acquired by video.
  • step (X) is complementary to the steps (a) (S101) and (b) step (S103) described above, and the (y) step is complementary to the step (c) (S105) described above.
  • step (z) described above Each of the stages that are sympathetic to (d) and sympathetic, can have different meanings.
  • the second embodiment conceptually uses (i) the two-dimensional image by using a three-dimensional image and a two-dimensional image of a semiconductor chip to be a reference.
  • step (ii) Acquiring a reference image from which the region of interest has been removed from the image, (ii) acquiring a two-dimensional image of the semiconductor chip under test by the semiconductor chip inspection apparatus, and (iii) acquiring through (i) step It can be expressed as a step of acquiring an image of the center of interest region from the difference between the reference image and the two-dimensional image of the semiconductor chip under test obtained through step (ii).
  • This region of interest may be preset, and the image of the region of interest obtained as a result of step (iii) is an image of the region of interest of the semiconductor chip under test.
  • the step (i) is a process of acquiring a three-dimensional image of a semiconductor chip, which becomes a reference, extracting a region of interest from the three-dimensional image, and converting the extracted image into a two-dimensional image at a predetermined angle. And acquiring, by the semiconductor chip inspection device, a two-dimensional image of the semiconductor chip that becomes the reference at the predetermined angle, and wherein the semiconductor chip inspection device is configured to convert the two-dimensional image and the
  • the method may include obtaining a reference image from which the center of gravity region is removed from the difference of the two-dimensional image of the semiconductor chip as a reference, and the step (ii) may include obtaining the two-dimensional image of the semiconductor chip under test at a predetermined angle. It can be a step.
  • FIG. 6 shows a flowchart of a method of inspecting a ball grid array semiconductor chip package according to a second embodiment of the present invention.
  • the inspection method of the ball grid array semiconductor chip package according to the second embodiment of the present invention includes the step (1) of step S201 in which the semiconductor chip is referred to as reference (S201), the ball grid array area. (2) step (S203) of extracting an image of the image, (3) step (S205) of 2D photographing a semiconductor chip to be a reference, and obtaining a reference image
  • step S201 a three-dimensional image of a semiconductor chip serving as a reference can be acquired.
  • step S201 an X-ray CT is used to capture a 3D image of any general conductor chip to be referenced.
  • Step (S201) is the same as step (a) (S101) described above can acquire the image of FIG.
  • step S203 the image corresponding to the ball grid array area B may be extracted from the 3D image acquired at step S201.
  • Step (S203) is the following step (3) and (4)
  • step S205 a reference image is acquired. This embodiment extracts only the ball grid array region B, which is the region of interest, from the 3D image, unlike the embodiment of FIG. 2 in which the region of interest is removed. do.
  • step S205 a two-dimensional image of a semiconductor chip serving as a reference can be acquired.
  • the present embodiment obtains a reference image by photographing the semiconductor chips to be referred to in 3D and 2D, respectively.
  • Step (S20 7 ) is the two-dimensional image obtained in step (3) (S205)
  • a reference image from which the ball grid array region has been removed can be obtained from the difference of the extracted image in step S203.
  • the image acquired in step (S205) is 2D
  • Step S207 is a three-dimensional image of the ball grid array region extracted in step S203.
  • the converted two-dimensional image may be removed from the two-dimensional image acquired in step (S205).
  • the embodiment of FIG. 6 may be understood as another embodiment of (b) step S103 of acquiring the reference image of FIG. 2.
  • a reference image is obtained by extracting a region of interest. 2 and 6, step (b) and step (S103).
  • step (S203) may require a user to directly process the image processing.
  • the user can easily extract the region of interest from the 3D image or the region of interest. Even if the removal of is easy, the embodiment of 2 or 6 can be optionally performed.
  • step S208 a two-dimensional image of the semiconductor chip to be inspected may be acquired.
  • step (S208) the semiconductor chip to be inspected may be acquired as a two-dimensional image at the specific angle.
  • Step (5) (S208) is the same as step (c) (S105) described above, and redundant descriptions are omitted.
  • Step (S209) can acquire a two-dimensional image corresponding to the cross section of the ball grid array area of the semiconductor chip under test from the difference between the reference image and the two-dimensional image obtained in (5) (S208). have.
  • Step (S209) is the same as step (d) (S107) described above, and redundant description is omitted.
  • step (i) is commuted with the steps (1) (S201) to (4) (S207) described above, and the step (ii) is commenced with the step (5) (s208) described above.
  • step (S209) Can be compared with step (S209).
  • Each step can have the same meaning even if it is explained in different expressions.
  • FIG. 7 is a view illustrating an inspection apparatus 100 for a semiconductor chip package according to a third embodiment of the present invention.
  • the semiconductor chip package inspection apparatus 100 includes a first image acquisition unit 110, a second image acquisition unit 120, and an image processing unit 130.
  • the first image acquisition unit 110 displays a three-dimensional image of the semiconductor chip, which is a reference.
  • the second image acquisition unit 120 acquires a two-dimensional image of the semiconductor chip under test.
  • the image processor 130 acquires an image of the region of interest from the difference between the reference image and the two-dimensional image.
  • the region of interest may be preset, and the image of the region of interest acquired by the image processing unit 130 may be an image of the region of interest of the semiconductor chip.
  • It may comprise an array (eg, ball grid array), and the common region of interest may be the region in which the above-described array of a predetermined type is formed.
  • array eg, ball grid array
  • the first image acquisition unit 110 acquires a three-dimensional image of the semiconductor chip to be a reference, and removes one or more regions of interest (or a cross-section) from the three-dimensional image to obtain a reference image.
  • the image acquisition module 111 and the 2D image acquisition module 112 may acquire the reference image obtained by converting the reference image acquired by the 3D image acquisition module 111 into a 2D image at a specific angle.
  • the two-dimensional image acquisition module 112 displays the reference image at a specific angle.
  • the second image acquisition unit 120 may acquire a two-dimensional image of the semiconductor chip under test at the same angle as the above-mentioned specific angle.
  • the image processing unit 130 is converted into a two-dimensional image at a specific angle
  • An image of the region of interest of the semiconductor chip under test can be obtained from the difference between the reference image and the two-dimensional image of the semiconductor chip under test at the same angle as that described above.
  • the first image acquisition unit 110 acquires a three-dimensional image and a two-dimensional image of a semiconductor chip as a reference, and obtains a region of interest from the three-dimensional image and the two-dimensional image of the semiconductor chip as a reference.
  • the second image acquisition unit 120 may acquire a two-dimensional image of the semiconductor chip under test, and the image processor 130 may obtain the reference image and the two-dimensional image of the semiconductor chip under test.
  • An image of the region of interest of the semiconductor chip under test can be obtained from the difference of the images.
  • the above-described three-dimensional image acquisition module 111 can acquire a three-dimensional image and a two-dimensional image of the semiconductor chip to be a reference, and extract and obtain a region of interest image from the three-dimensional image.
  • the image acquisition module 112 converts the region of interest image into a two-dimensional image at a predetermined angle, and generates a region of interest from the difference between the converted two-dimensional image and the two-dimensional image of the semiconductor chip, which is a reference at the same angle as the above-described predetermined angle. You can get the removed reference image.
  • the image processing unit 130 is converted into a two-dimensional image at a predetermined angle
  • An image of the region of interest of the semiconductor chip under test can be obtained from the difference between the reference image and the two-dimensional image of the semiconductor chip under test at the same angle as the above-described predetermined angle.
  • the first image acquisition unit 110, the second image acquisition unit 120, and the image processing unit 130 are separately provided. It can consist of a single device or a single device combined.
  • the inspection device 100 of the semiconductor chip package described above with reference to FIG. 7 can be used for the inspection method of the semiconductor chip package shown in FIGS. 2 and 6. That is, the inspection device 100 of the semiconductor chip package. 2 can be used to inspect the semiconductor chip package according to the first or second embodiment of the present invention.
  • Steps (X), (S1) to (4), (S207) and (i) described with reference to FIG. 6 are the first image acquisition unit provided with the inspection device 100 of the semiconductor chip package ( 110).
  • steps (c), (y), (5), and (ii) described above may be performed by the second image acquisition unit 120, and (d), ( Steps z), (6) and (iii) may be performed by the image processor 130.
  • the semiconductor chip to be referred to in this specification and the semiconductor chip to be tested may be semiconductor chips manufactured through the same or similar manufacturing process. As described above, the semiconductor chip and the semiconductor chip to be referred to may be referred to.
  • a common area of interest may contain a common area of interest, and a preset type of array may also be a ball grid array with one or more solder balls, but not necessarily a ball grid array.
  • FIG. 8 is a diagram illustrating an inspection system of a semiconductor chip package according to a fourth embodiment of the present invention.
  • the inspection system of the semiconductor chip package includes a semiconductor object under test.
  • the image acquisition device 810 and the image acquisition device 810 formed to look at the vehicle 802 or the semiconductor chip 801 to be inspected are referred to as reference to acquire a three-dimensional reference image of the semiconductor chip 800 to which the reference is made. It can be implemented in the form including a rotating means 820 for rotating the semiconductor chip.
  • the inspection system of the semiconductor chip package further includes an image processing device 830 for receiving an image acquired by the image acquisition device 810 and generating an image of a region of interest of the semiconductor chip under test. Can be implemented.
  • the image processing apparatus 830 may be implemented in the form of a PC such as a laptop.
  • the image acquisition device 810 is a semiconductor chip of the subject to be moved on the moving means (802) You can acquire a two-dimensional image (section or tomographic image).
  • the rotating means 820 is a semiconductor object being moved on the moving means 801
  • the semiconductor chip may be combined with a specific semiconductor chip 801 to form a reference, or may be combined with a semiconductor chip 800 that is a separate reference.
  • the semiconductor object being moved on the rotating means 820, the moving means 801
  • the inspection system of the semiconductor chip package can obtain a reference image.
  • the rotating means 820 may rotate the semiconductor chip 800, which is a reference to the motor or the like, up, down, left, or right.
  • the device 810 can acquire a plurality of two-dimensional images of the semiconductor chip 800 to be referred to, and obtain a three-dimensional image of the semiconductor chip 800 to be referenced from the obtained two-dimensional images.
  • the time, the number of times, the angle, and the like of photographing the semiconductor chip 800 to which the image acquisition device 810 becomes a reference may be variously modified.
  • the inspection method of the semiconductor chip package can be performed.
  • the inspection system of the semiconductor chip package shown in FIG. 8 may acquire an image.
  • the device 810 and the rotating means 820 can be used to acquire a three-dimensional image of the semiconductor chip to be referred to and a two-dimensional image of the semiconductor chip to be inspected.
  • the inspection system of the semiconductor chip package is an image processing apparatus (830). After removing the region of interest from the 3D image and converting it into a 2D image at a specific angle, the region of interest of the semiconductor chip is determined from the difference between the converted 2D reference image and the 2D image of the semiconductor chip. You can acquire an image of.
  • a photographing apparatus e.g., an X-ray photographing apparatus for photographing an image (cross section or tomographic image) of the inspection target semiconductor chip which is provided on the moving means and which is moved above the moving means.
  • FIG. 9 is a diagram for explaining a method of acquiring a three-dimensional image of a semiconductor chip 901 which is a reference by the inspection system of the semiconductor chip package according to the fourth embodiment of the present invention shown in FIG. to be.
  • the inspection system of the semiconductor chip package is A method of acquiring a three-dimensional image of a semiconductor chip 800 that becomes a reference by using the rotating means 820 and the image acquisition device 810 has been described.
  • the inspection system of the semiconductor chip package can acquire a three-dimensional image of the semiconductor chip, which is referred to only by the image acquisition device 810 without the rotation means 820.
  • a semiconductor that becomes a reference moving on a moving means
  • the image acquisition device 810 can continuously photograph the semiconductor chip 901 which is a moving reference at regular intervals, and is photographed at various angles. Two-dimensional images of the semiconductor chip 901 as reference can be obtained.
  • the two-dimensional images of the semiconductor chip 901 to be the reference taken at various angles it is possible to obtain a three-dimensional image of the semiconductor chip 901 to be the reference.
  • the three-dimensional image of the semiconductor chip 901 which is a reference can be acquired without rotating the 901.
  • FIG. 10 is a diagram for explaining a method of obtaining a 3D reference image of a semiconductor chip which becomes a reference by using a CT.
  • the image acquisition device 810 acquires a three-dimensional image of the semiconductor chip to be referred to by the rotation means 820, in the present embodiment, the semiconductor becomes a reference by using a computed tomography device.
  • the three-dimensional reference image of the chip 1001 can be obtained.
  • the inspection system of the semiconductor chip package may be formed of the image acquisition device 810, the image processing device 830, and the CT device of FIG.
  • the inspection system of the semiconductor chip package can acquire a three-dimensional image of the semiconductor chip 1001 as a reference by using the CT device shown in FIG. 10, and the acquired three-dimensional image is a separately provided database (not shown). Can be stored in Other procedures are described above and should be omitted.
  • FIG. 11 illustrates a case where a plurality of regions of interest are in accordance with various embodiments of the present invention.
  • the reference image of the semiconductor chip as a reference and the region of interest are removed.
  • the region of interest in the reference image from which the region of interest of the semiconductor chip serving as a reference obtained through the above-mentioned (X), (i), or the first image acquisition unit 110 is removed is shown in FIG.
  • the region of interest of convenience is represented by 11 and 1103, but the region of interest may be two or more regions.
  • step (A) of FIG. 11 is performed through the above-described step (X), (i) or the first image acquisition unit 110.
  • step (C) of FIG. 11 is performed through the above-described step (X), (i) or the first image acquisition unit 110.
  • 1103 is the forward projection of the removed three-dimensional reference image, and (d) is the side of the forward projection.
  • (E) of FIG. 11 is a forward projection of a three-dimensional reference image from which 11 of two regions of interest acquired through step (X), step (i) or the first image acquisition unit 110 are removed.
  • (f) is the side of forward projection.
  • FIG. 11 shows a forward of the 3D reference image in which 11 and 1103 of the two regions of interest acquired through the steps (X), (i) or the first image acquisition unit 110 are removed. Projection, and (h) is the side of forward projection.
  • Step (X) of the inspection method of the package acquires a three-dimensional image of the semiconductor chip serving as a reference, and removes at least one region of interest from among the first region of interest and the second region of interest from the three-dimensional image at a specific angle. It may be a step of acquiring a reference image converted into a two-dimensional image.
  • step (y) may be a step of acquiring a two-dimensional image of the semiconductor chip to be tested at the same angle as the above-described specific angle
  • step (z) is a reference image obtained through step (X) and (y). It may be a step of acquiring at least one of the first region of interest and the second region of interest of the semiconductor chip to be obtained from the difference of the two-dimensional image of the semiconductor chip to be obtained through the step).
  • the first image acquisition unit 110 of the inspection device 100 of the semiconductor chip package according to the third embodiment of the present invention shown in FIG. 7 uses a three-dimensional image of the semiconductor chip that becomes a reference. By removing at least one region of interest from the three-dimensional image, and converting the reference image into a two-dimensional image at a specific angle.
  • the second image acquisition unit 120 may acquire a two-dimensional image of the subject semiconductor chip at the same angle as the specific angle
  • the image processing unit 130 is a reference image
  • the subject semiconductor chip From the difference of the two-dimensional image of, the image of at least one or more regions of interest of the semiconductor chip under test can be acquired.
  • FIG. 11 is a diagram illustrating a method of obtaining a reference image by cutting only a region of interest of a semiconductor chip serving as a reference.
  • FIG. 12 there is a portion 1201 corresponding to a region of interest and a portion 1202 of a region of interest in the semiconductor chip 1200 serving as a reference.
  • the portion 1201 corresponding to the region of interest of the semiconductor chip 1200 serving as a reference may be cut to obtain a three-dimensional image or a three-dimensional reference image.
  • the portion 1201 corresponding to the region of interest shown in FIG. 12 may be an area in which an array of a preset type is formed, and the preset type of array may be a ball gray array having one or more solder balls. It may be another type of array.
  • a method of removing a region of interest from an image there is a method of setting a region of interest from a three-dimensional image of a semiconductor chip, which is a reference, and setting a pixel value of the region of interest to 0.
  • various methods may be used.
  • a method of removing a reference image converted from a specific angle described above in a two-dimensional image at an angle and a two-dimensional image at the same angle is obtained by subtracting another image based on one image using a simple arithmetic operation.
  • the method may be used, but various other methods may be used.
  • the region of interest may be automatically set using a preset algorithm or software, and the pixel value of the region of interest may be set to 0, or the pixel value of the region of interest may be set to 0 after a manual method. have.
  • two-dimensional reference image (hereinafter referred to as a "two-dimensional reference image") converted from a three-dimensional reference image of a semiconductor chip to be a reference according to various embodiments of the present invention described above and a two-dimensional semiconductor chip.
  • test two-dimensional image An example of how to compare an image (“test two-dimensional image") will now be described.
  • a two-dimensional reference image is obtained by converting a three-dimensional reference image into a two-dimensional image at a specific angle under the influence of the principal transformation mirror. 2D image at different position from the image You may get a case.
  • the position of the inspection object existing in the inspection two-dimensional image is two-dimensional.
  • the location of the inspection object that exists in the region of interest of the reference image is different.
  • the image of the region of interest cannot be accurately obtained from the difference between the two-dimensional reference image and the inspected two-dimensional image.
  • the above-mentioned problems are compensated for by comparing the similarity information (mutual information, normalized correlation coefficient) to confirm whether the two-dimensional image and the two-dimensional reference image are acquired at the same angle or direction. Can be.
  • the process of acquiring the image of the region of interest from the difference between the two-dimensional reference image and the examined two-dimensional image is performed as it is. Otherwise, various embodiments of the present invention provide different angles (directions) of the three-dimensional reference image.
  • the process of reacquiring a two-dimensional reference image can be performed at.
  • the mutual information amount is a method of comparing how common information the two images have by comparing the values stored in the pixels constituting the two images.
  • the information amount I can be obtained by using Equation (1) below.
  • Equation (1) p (x, y) is the joint probability for pixel values of images X and Y, and p (x) and p (y) are marginal probabilities for pixel values in the image, respectively.
  • Equation (3) Equation (3) below using entropy defined in Equation (2) below.
  • p (xi) is the pixel value in image X. It can be obtained by using the histogram of the image with the xi probability. Also, in the formula (2), the number b used for the log can be changed by the user's choice, but generally 2 or 10 is used.
  • the NCC value R can be obtained by using Equation (4) below.
  • Equation (4) X and ⁇ are images for obtaining similarity, and ⁇ 'and y' are indexes of pixels existing in the image.
  • Typical methods used to obtain transformation parameters for aligning images include optimization using derivatives of similarity measurements and linear optimization without using derivatives.
  • the optimization method using derivatives is typically the Stochastic Gradient Descent (SGD) method.
  • SGD Stochastic Gradient Descent
  • Equation (5) i ⁇ x, Y ⁇ T ⁇ uy, u ⁇ : represents the similarity value with image X after transforming image Y using transformation parameter u, and ui is one of the parameters for transforming the image.
  • three parameters are used to convert 2D images, and six parameters are used to convert 3D images.
  • Update the transformation parameters, where « is a value that specifies how many updates to update, usually called a step size or learning rate.
  • the derivative value of the similarity will be close to zero at the point where the similarity of the ⁇ and Y images is the highest, so that an image conversion parameter having an optimal similarity can be obtained.
  • Powell's method consists of the following steps 1 through 4.
  • the method used for image registration is used.
  • the 2D reference image is acquired while rotating the 3D reference image, and the similarity between the obtained 2D reference image and the 2D image of the semiconductor chip under test is calculated. Rotate or move the 3D reference image to find the optimal variable.
  • the 3D reference image when the 3D reference image is continuously rotated without an initial condition to find the optimal variable, it may take a long time to calculate the variable.
  • the following method can be used to reduce the calculation time.
  • the three-dimensional reference image within the range in which the semiconductor chip to be rotated is acquired in advance and stored in a separate database.
  • the location of the inspection object existing in the two-dimensional reference image is the region of interest of the two-dimensional reference image. If it is determined that the location of the test object is different from the location of the inspection target, the position of the 3D reference image is found by comparing the 2D image of the subject with the reference images stored in the database, and using the initial condition as the location of the 3D reference image. In this case, you can use gradient descent for optimization, linear optimization (po well's method), and so on.
  • the same ball grid array semiconductor chip type may be tested on a line-by-line basis, while other ball grid array semiconductor chip types may be examined. In the latter case, it is also possible to save each reference image from different ball grid array-type semiconductor chips and use it to implement different reference images depending on the type of semiconductor chip being processed during the process.
  • the present invention is applicable to automobile parts, semiconductor parts, electronic products, etc. in addition to semiconductor chips, but it does not seem to be visually checked, open, bridge, short, high lead, misaligned, solder, various soldering defects, etc. It is possible to identify the area of concern where various defects can occur and to confirm this.
  • the present invention relates to a method for inspecting a semiconductor chip package.
  • the present invention is applicable to an apparatus, method and system for inspecting a semiconductor chip package.

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Abstract

본 발명은 볼 그리드 어레이형 반도체 칩 패키지의 검사 방법, 장치 및 시스템을 개시하고 있다. 본 발명의 제1실시예는, 레퍼런스가 되는 반도체 칩의 3차원 영상을 이용하여 상기 3차원 영상으로부터 관심 영역이 제거된 레퍼런스 영상을 획득하는 제1이미지 획득부와, 피검체인 반도체 칩의 2차원 이미지를 획득하는 제2 이미지 획득부, 그리고, 상기 레퍼런스 영상 및 상기 2차원 이미지의 차이로부터 상기 피검체인 반도체 칩의 관심 영역의 이미지를 획득하는 영상 처리부를 포함하는 반도체 칩 패키지의 검사 장치를 제공한다.

Description

명세서
발명의명칭:볼그리드어레이형반도체칩패키지의검사방법 기술분야
[1] 본발명은볼그리드어레이형반도체칩패키지의검사방법에관한것으로서 , 특히비파괴투사영상기법으로볼그리드어레이형반도체칩의솔더볼을 검사하는방법에관한것이다.
배경기술
[2] 전자,통신기술의발달에힘입어전자기기는소형화및경량화추세의연구 개발이활발하다.이러한경향으로반도체칩내부구조의집적도가필수적으로 증가하게되었다.반도체칩은집적회로의핀이많을경우에반도체크기가 커지는문제를최소화하기위하여볼그리드어레이 (Ball grid array, BGA)구조의 반도체칩이실용화되었다.볼그리드배열은격자모양으로핀이한면의 일부나전면에붙어 있는핀그리드배열 (PGA)로부터유래되었다.핀그리드 배열의핀은집적회로에서칩이부착된인쇄회로기판으로전기적신호를 전달하는데사용된다.볼그리드배열에서,핀은패키지의하면에붙어있는솔더 볼 (solder ball) (땜납볼)로대체되었다.즉,볼그리드어레이형반도체칩은 격자형으로배열된솔더볼이부품의핀역할을하게된다.핀그리드배열은 집적도가상승됨에따라핀간격이세밀해져서납땜공정이복잡하고,단락될 위험이존재한다.반면볼그리드배열은정확한양의땜납을사용하여패키지를 제조하기때문에상기의문제점이없고,열전도가우수하며낮은핀인덕턴스를 갖는장점이있다.
[3] 하지만,볼그리드어레이형반도체칩은불량의검사작업이매우어려운
단점이 있다.볼그리드어레이형반도체패키지를인쇄회로기판에부착하고 나면,납램불량을파악하는것이극히어렵다.솔더볼은반도체칩의종류에 따라크기나간격이다양하게구성된다.결국,불량검사에서솔더볼은위치, 간격,크기,존재유무,품질등이확인될수있어야한다.이러한솔더볼의검사 작업은전체기기의오작동을방지하기위하여필수적으로수행되어야한다.
[4] 액스선장비와특수현미경으로볼그리드배열의검사문제를극복할수
있지만,현재이를위한비용은매우고가이다.나아가, IT디바이스의소형화및 고집적화에따라,최근볼그리드배열의반도체칩은 2D위주의기판에서 3D로 확장된집적반도체구조로등장되고있다.이차원인 2D반도체칩은볼그리드 어레이가단일층으로이루어지기때문에단순한 2D촬영으로모든솔더볼의 확인이가능하였다.하지만,전술한바와같이반도체칩기술의발전으로단일 층이아닌다층으로적층된 3D구조의반도체칩에서일영역에존재하는볼 그리드어레이층만을검사하는것은더욱어렵다. 3D구조의볼그리드 어레이형반도체칩은솔더볼이다른집적회로의소자들로인하여가려지게 되거나,다른층의솔더볼과겹치게되어일반적인촬영으로는솔더볼배열의 검사가불가하다.따라서,광학적검사기술은볼그리드어레이형반도체칩의 검사에적합하지않은것으로평가되고있다.또한, 2D X-ray검사는주변구조의 중첩영상으로인하여원하는검사부위의영상품질이크게저하되는문제점이 존재한다.
[5] 도 1은종래의볼그리드어레이형반도체칩의검사방법으로 (a) 2D양품투사 영상과의차이영상으로부터볼그리드어레이영역을획득한모습과 (b) 라노그라피로재건한 3D영상의단면을나타낸다.도 1의 (a)를참조하면, 2D양품투사영상과의차이영상으로부터획득된관심영역인볼그리드어레이 이미지는불량검출을위한 cue를얻기매우어렵다.도 1의 (a)에서양품과 동일하면화살표로표시된부분과같이차이값이없게나타나며,크기와기공이 있으면차이값을나타내게된다.하지만도시된바와같이 2D이미징기법은 각각의솔더볼의특성을찾아내기어렵고,대조도가낮은단점이있다.특히, 오른쪽상단에위
[6] 치한솔더볼은다른층의소자와중첩되어정확한정보를찾아내기가매우 어렵다.이에따라, 2D대비관심영역의영상을높은품질로얻기위해 라미노그라피기술을적용하여부분적으로 3차원영상을획득하는기술이 제시되었다.도 1의 (b)는라미노그라피로재건한영상의 예시로서, 2D대비높은 대조도를보이나다른층과의확실한구분은여전히어렵고,깊이방향의 해상도가낮다.또한,라미노그라피의 3D영상검사방법은근본적으로완벽한 3D정보가복원되지않을수있고검색시간이 2D대비비교가불가한수준까지 증가되는문제점이있다.
[7] 또다른종래기술로서 ,한국등록특허제 10- 1293532호는반도체칩의 CT검사 방법 (이하 '선행특허'라약칭함)을제시한다.상기선행특허는반도체칩을 포함한전자부품내부의비파괴투시를위한 CT검사방법으로,반도체 칩을 180도또는 360도회전하면서다수의 2차원투과영상을획득하여 3차원 단층영상으로재구성한다.상기선행특허는볼그리드어레이형반도체칩이 X-ray조사방향에대하여검사각도가사선이되도록설정되는특징을 개시한다.다만,상기선행특허역시라미노그라피와동일하게 2차원투과 영상을획득하여재건하는데다수의시간이소요되는단점이 있으며,넓은 면적의칩은고배율로촬영하는데어려움이 있다.
[8] 이처럼,볼그리드어레이형반도체칩의불량유무를검사하기위해서제안된
X-ray의 2D, 3D영상검사기법은각각단점이존재한다.신뢰도높은
디바이스의생산을위해서는제조공정중의불량검사가불가피한데고도의 검사를위한 3D이미징검사기술은기존의 2D비파괴검사보다소요시간이 매우크므로생산성저하를가져오며 , 2D이미징으로는고도로집적화된반도체 칩의볼그리드어레이영역을정확하게분석하기어려운것이다.
[9] 이에본출원인은, 2D와 3D를연계하여볼그리드어레이영역의정확한 검출과검사의소요시간을현저하게감소시킬수있는반도체칩패키지의검사 방법을고안하게되었다.
발명의상세한설명
기술적과제
[10] 따라서본발명은볼그리드어레이형반도체칩패키지의관심단면을
선명하게추출하고,관심단면을추출하는영상처리의시간이현저히단축될수 있는반도체칩의검사방법을제공하고자한다.
[11] 본발명이이루고자하는기술적과제는이상에서언급한기술적과제로
제한되지않으며,언급되지않은또다른기술적과제들은아래의기재로부터본 발명이속하는기술분야에서통상의지식을가진자에게명확하게이해될수 있을것이다.
과제해결수단
[12] 상술한기술적과제를해결하기위해본발명의제 1실시예는,레퍼런스가되는 반도체칩의 3차원영상을획득하고상기 3차원영상으로부터관심영역이 제거된레퍼런스영상을획득하는제 1이미지획득부와,피검체인반도체칩의 2차원이미지를획득하는제 2이미지획득부,그리고,상기레퍼런스영상및 상기 2차원이미지의차이로부터상기피검체인반도체칩의관심영역의 이미지를획득하는영상처리부를포함하는반도체칩패키지의검사장치를 제공한다.
[13] 3차원영상의획득은반도체칩의내부의정보와표면의정보를확보하여 3D 영상을구현할수있는과정이면특별히한정되지않고다양한방식이가능하다. 예를들어 X-ray를이용하여반도체칩의복수개의내부및표면정보를 입수하고이를 3차원영상으로구현하는것이가능하다.구체적인방식으로는 반도체칩을회전시키거나일정간격으로이동시키면서 X-my등의영상획득 방식을이용하여영상을촬영하여반도체칩의내부와표면정보를확보하고 이를소프트웨어적으로 3D영상으로구현하는것이다.이경우,반도체칩의 내부와표면정보는적어도일부분의정보이면가능하다.
[14] "반도체칩"은반도체소자,각종배선,솔더링등이집적된기판을의미하는 것으로,예컨대 PCB기판등을포함하는개념으로이해하는것이가능하다.
[15] "관심영역"이라함은분석등을위해관찰또는측정하고자하는영역을
의미하는것으로디바이스의하단또는중반에은폐되어외관검사만으로는그 모양을확인하는것이용이하지않은영역인경우가효과적일수있다.
[16] 한편,제 1이미지획득부는본반도체칩의검사장치에구성되어전술한바와 같이레퍼런스영상을획득하는것으로구성하는것도가능하고,다른방식에 의하면이미획득된레퍼런스영상을전달받아저장하여사용하는것도 가능하다.실제구현에있어서는후자의경우는별도로레퍼런스영상을 확보하기위한작업을수행한후해당레퍼런스영상을본반도체칩의검사 장치에활용하는방식이다.예컨대,반도체칩의검사장치가구현되어있는공정 라인에서레퍼런스영상을확보하기위한작업을먼저수행하여특별히 한정되지않은다양한방식을통해서 3차원영상의획득을하고이를수동또는 자동으로관심영역을제거함으로써레퍼런스영상을제작한다.그런다음이 레퍼런스영상을공정라인에서활용할수있도록제 1이미지획득부에
저장하게할수있다.
[17] 본발명의제 1실시예에있어서,상기제 1이미지획득부는,상기레퍼런스가 되는반도체칩의 3차원영상을이용하여상기 3차원영상으로부터하나이상의 관심영역을제거하고레퍼런스영상을획득하는 3차원영상획득모듈과상기 3차원영상획득모듈이획득한상기레퍼런스영상을특정각도에서의 2차원 이미지로변환한레퍼런스영상을획득하는 2차원영상획득모듈을포함할수 있다.
[18] 본발명의제 1실시예에있어서,상기제 2이미지획득부는,상기특정
각도에서의상기피검체인반도체칩의 2차원이미지를획득할수있다.
[19] 또한,상술한기술적과제를해결하기위해본발명의제 2실시예는, (x)
레퍼런스가되는반도체칩의 3차원영상을이용하여상기 3차원영상으로부터 관심영역이제거된레퍼런스영상을획득하는단계와, (y)피검체인반도체칩의 2차원이미지를획득하는단계,그리고, (z)상기 (X)단계를통해획득한상기 레퍼런스영상및상기 (y)단계를통해획득한상기피검체인반도체칩의 2차원 이미지의차이로부터상기피검체인반도체칩의관심영역의이미지를 획득하는단계를포함하는반도체칩패키지의검사방법을제공한다.
[20] 본발명의제 2실시예에있어서,상기 (X)단계는,상기 3차원영상으로부터하나 이상의관심영역을제거하고하나이상의관심영역이제거된 3차원영상을 특정각도에서의 2차원이미지로변환한레퍼런스영상을획득하는단계이고, 상기 (y)단계는,상기특정각도에서의피검체인반도체칩의 2차원이미지를 획득하는단계일수있다.
[21] 또한상술한기술적과제를해결하기위한본발명의제 3실시예는, (i)
레퍼런스가되는반도체칩의 3차원영상과 2차원이미지를이용하여상기 2차원이미지로부터관심영역이제거된레퍼런스이미지를획득하는단계와,
(ii)피검체인반도체칩의 2차원이미지를획득하는단계 ,그리고, (iii)상기 (i)단계를통해획득한레퍼런스이미지및상기 (ii)단계를통해획득한상기 피검체인반도체칩의 2차원이미지의차이로부터상기피검체인반도체칩의 관심영역의이미지를획득하는단계를포함하는반도체칩패키지의검사 방법을제공한다.
[22] 본발명의제 3실시예에있어서,상기 (i)단계는,레퍼런스가되는반도체칩의 3차원영상을획득하고,상기 3차원영상에서관심영역을추출하여추출된 영상을소정각도에서의 2차원이미지로변환하는과정과,상기반도체칩검사 장치가상기소정각도에서의상기레퍼런스가되는반도체칩의 2차원 이미지를획득하는과정과,상기반도체칩검사장치가상기변환된 2차원 이미지와상기레퍼런스가되는반도체칩의 2차원이미지의차이로부터상기 관심영역이제거된레퍼런스이미지를획득하는과정을포함할수있으며 ,상기 (ii)단계는,상기소정각도에서의피검체인반도체칩의 2차원이미지를 획득하는단계일수있다.
[23] 전술한본발명의다양한실시예에있어서,상기레퍼런스가되는반도체칩및 상기피검체인반도체칩은공통된관심영역을포함할수있고,상기공통된 관심영역에는기설정된형태의어레이가존재할수있다.'
[24] 또한,전술한본발명의다양한실시예에있어서,상기기설정된형태의
어레이는볼그리드어레이일수있다.
[25] 또한,상술한기술적과제를해결하기위해본발명에제 4실시예는,레퍼런스가 되는반도체칩과결합하여상기레퍼런스가되는반도체칩을회전시키는 회전수단과,피검체인반도체칩의특정각도에서의 2차원이미지를획득하고, 상기회전수단에의해회전되는상기레퍼런스가되는반도체칩을촬영하여 상기레퍼런스가되는반도체칩의 3차원영상을획득하는영상획득장치 , 그리고,상기 3차원영상으로부터관심영역을제거하고상기특정각도에서의 2차원이미지로변환한레퍼런스영상을획득하며 ,상기레퍼런스영상과상기 피검체인반도체칩의 2차원이미지의차이로부터상기피검체인반도체칩의 관심영역의이미지를획득하는영상처리장치를반도체칩패키지의검사 시스템을제공한다.
발명의효과
[26] 최근 IT디바이스의소형화및고집적화에따라 2D위주의기판에서 3D구조로 확장된집적반도체들이등장하고있다.본발명에따르면, 3D구조의볼그리드 어레이형반도체패키지를신속하게검사할수있다.보다상세히설명하면,본 발명은 3차원촬영이레퍼런스이미지의획득을위해서일회성으로수행되고, 반도체칩의 2차원이미지만으로관심영역을정확하게추출할수있다.결국,본 발명에따른비파괴검사기법이볼그리드어레이형반도체칩의신뢰성검사에 사용될경우소요시간이기존 3D이미징기술 (Computed Tomography,
Laminography)에비하여현저히단축될것이다.또한, 3D이미징기술을 연계하여획득한관심단면은중첩된단면없이솔더볼을명확하게파악할수 있어검사의신뢰성또한향상될수있다.이처럼,본발명은생산현장의 in-line 검사에적합한고속비파괴방사선검사기법으로모바일 IT디바이스, IoT관련 기기,자동차전장제품의제조공정중의불량검사시스템에적극활용될수 있을것이다.
[27] 본발명의효과는상기한효과로한정되는것은아니며,본발명의상세한설명 또는특허청구범위에기재된발명의구성으로부터추론가능한모든효과를 포함하는것으로이해되어야한다. 도면의간단한설명
[28] 도 1은종래의볼그리드어레이형반도체칩의검사방법을나타낸다.
[29] 도 2는본발명의제 1실시예에따른볼그리드어레이형반도체칩패키지의 검사방법의흐름도를나타낸다.
[30] 도 3은도 2의검사방법에서 ,레퍼런스영상의획득을위한반도체칩의 3 [31] 차원촬영영상을예시한것이다.
[32] 도 4는도 3의영상에서관심단면을제거한레퍼런스영상을예시한것이다.
[33] 도 5는도 2의검사방법에서,피검체인반도체칩의 2차원영상과레퍼런스 영상의차이영상으로부터관심단면인볼그리드어레이영역이획득된 예시이다.
[34] 도 6은본발명의제 2실시예에따른볼그리드어레이형반도체칩패키지 [35] 의검사방법의흐름도를나타낸다.
[36] 도 7은본발명의제 3실시예에따른반도체칩패키지의검사장치의구성을 도시한블록도이다.
[37] 도 8은본발명의제 4실시예에따른반도체칩패키지의검사시스템의구성을 개략적으로도시한도면이다.
[38] 도 9는본발명의제 4실시예에따른반도체칩패키지의검사시스템이 3차원 영상을획득하는방법을설명하기위해도시한도면이다.
[39] 도 10은 CT를이용하여레퍼런스가되는반도체칩의 3차원레퍼런스영상을 획득하는방법을설명하기위해도시한도면이다.
[40] 도 11은본발명의다양한실시예에따라관심영역이복수개인경우의
레퍼런스가되는반도체칩의영상및관심영역이제거된레퍼런스영상을 도시한것이다.
[41] 도 12는레퍼런스가되는반도체칩의관심영역만을컷팅하여레퍼런스
영상을획득하는방법을설명하기위해도시한도면이다.
발명의실시를위한최선의형태
[42] 이하에서는첨부한도면을참조하여본발명을상세히설명하기로한다. 그러나본발명은여러가지상이한형태로구현될수있으며 ,따라서여기에서 설명하는실시예로한정되는것은아니다.또한,첨부된도면은본명세서에 개시된실시예를쉽게이해할수있도록하기위한것일뿐,첨부된도면에의해 본명세서에개시된기술적사상이제한되지않으며,본발명의사상및기술 범위에포함되는모든변경물,균등물내지대체물을포함하는것으로 이해되어야한다.그리고도면에서본발명을명확하게설명하기위해서설명과 관계없는부분은생략하였으며,도면에나타난각구성요소의크기,형태, 형상은다양하게변형될수있고,명세서전체에대하여동일 /유사한부분에 대해서는동일 /유사한도면부호를붙였다.
[43] 이하의설명에서사용되는구성요소에대한접미사 "모듈"및 "부"는명세서 작성의용이함만이고려되어부여되거나흔용되는것으로서,그자체로서로 구별되는의미또는역할을갖는것은아니다.또한,본명세서에개시된 실시예를설명함에있어서관련된공지기술에대한구체적인설명이본 명세서에개시된실시 예의요지를흐릴수있다고판단되는경우그상세한 설명을생략하였다.
[44] 명세서전체에서,어떤부분이다른부분과 "연결 (접속,접촉또는결합) "되어 있다고할때,이는 "직접적으로연결 (접속,접촉또는결합) "되어 있는경우뿐만 아니라,그중간에다른부재를사이에두고 "간접적으로연결 (접속,접촉또는 결합) "되어 있는경우도포함한다.또한어떤부분이어떤구성요소를
"포함 (구비또는마련)"한다고할때,이는특별히반대되는기재가없는한다른 구성요소를제외하는것이아니라다른구성요소를더 "포함 (구비또는마련) "할 수있다는것을의미한다.
[45] 본명세서에서사용한용어는단지특정한실시예를설명하기위해사용된 것으로,본발명을한정하려는의도가아니다.단수의표현은문맥상명백하게 다르게뜻하지않는한,복수의표현을포함하며,분산되어실시되는
구성요소들은특별한제한이 있지않는한결합된형태로실시될수도있다.본 명세서에서, "포함하다"또는 "가지다"등의용어는명세서상에기재된특징, 숫자,단계 ,동작,구성요소,부품또는이들을조합한것이존재함을지정하려는 것이지,하나또는그이상의다른특징들이나숫자,단계,동작,구성요소,부품 또는이들을조합한것들의존재또는부가가능성을미리배제하지않는것으로 이해되어야한다.
[46] 또한,본명세서에서사용되는제 1,제 2등과같이서수를포함하는용어는 다양한구성요소들을설명하는데사용될수있지만,상기구성요소들은상기 용어들에의해한정되어서는안된다.상기용어들은하나의구성요소를다른 구성요소로부터구별하는목적으로만사용된다.예를들어,본발명의권리 범위를벗어나지않으면서제 1구성요소는제 2구성요소로명명될수있고, 유사하게제 2구성요소도제 1구성요소로명명될수있다.
[47] 이하에서설명되는본발명의다양한실시예에따른반도체칩패키지의검사 방법과검사장치는다양한형태를지닌반도체칩패키지에적용이가능하다.
[48] 먼저,본발명의일실시형태를개념적으로설명하면 , (x)레퍼런스가되는 반도체칩의 3차원영상을이용하여상기 3차원영상으로부터관심영역이 제거된레퍼런스영상을획득하는단계 , (y)피검체인반도체칩의 2차원 이미지를획득하는단계 ,그리고, (z)상기 (X)단계를통해획득한상기레퍼런스 영상및상기 (y)단계를통해획득한상기피검체인반도체칩의 2차원이미지의 차이로부터상기관심영역의이미지를획득하는단계로표현될수있다.
[49] 레퍼런스가되는반도체칩과피검체인반도체칩은공통된관심영역을
포함할수있고,이러한관심영역은기설정될수있으며 , (z)단계를통해 결과적으로획득되는관심영역의이미지는상기피검체인반도체칩의관심 영역의이미지이다.
[50] 특히 ,상기 (X)단계는,상기 3차원영상으로부터하나이상의관심영역을
제거하고하나이상의관심영역이제거된 3차원영상을특정각도에서의 2차원 이미지로변환한레퍼런스영상을획득하는단계일수있고,상기 (y)단계는, 상기특정각도에서의피검체인반도체칩의 2차원이미지를획득하는단계일 수있다.
[51] 다음으로,상술한개념적설명을제 1실시예로상세히설명한다.편의상볼
그리드어레이형반도체칩패키지에적용되는것으로설명한다.
[52] 도 2는본발명의제 1실시예에따른볼그리드어레이형반도체칩패키지의 검사방법의흐름도를나타낸다.
[53] 도 2를참조하면,볼그리드어레이형반도체칩패키지의검사방법은
레퍼런스가되는반도체칩을촬영하는 (a)단계 (S101),레퍼런스영상을 획득하는 (b)단계 (S103),피검체인반도체칩을촬영하는 (c)단계 (S105)및볼 그리드어레이단면의이미지를획득하는 (d)단계 (S107)를포함할수있다.
[54] (a)단계 (S101)는레퍼런스가되는반도체칩의 3차원영상을획득한다.
(a)단계 (S101)는기준영상의제작을위해일회성으로수행될수도있고실제 공정시복수회수행하는것도가능하다.
[55] (a)단계 (S 101)는 X-ray CT를이용하여,레퍼런스가되는어느일반도체칩의
3D영상을촬영한다.도 3은도 2의검사방법에서 ,레퍼런스영상의획득을위한 반도체칩 (1)의 3차원촬영영상을예시한것이다.도 3의 (a)는 (a)단계 (S101)의 수행결과,레퍼런스가되는볼그리드어레이형반도체칩의포워드
프로젝션 (forward projection)이고,도 3의 (b)는포워드프로젝션의측면도를 나타낸다.
[56] 도 3에서와같이, (a)단계 (S101)와하기에서설명하게될 (c)단계 (S105)는, 촬영되는반도체칩 (1)의볼그리드어레이에구성된솔더볼 (10)이단일층으로 제공되지않아솔더볼의상부또는하부에칩소자 (30)가집적되어중첩된볼 그리드어레이의투사영상을획득한다.즉,본발명의실시예는 3D구조의볼 그리드어레이형반도체칩검사에특히적합하다.
[57] 3D구조의반도체칩 (1)은하부기판 (C)및기타소자나기판층 (A)사이에볼 그리드어레이영역 (B)이형성될수있고,이에따라일반적인광학촬영이나 2D X-ray로는솔더볼영역 (B)만을명확하게파악하기어렵다.본실시예에의하면,
(b)단계 (S103)에서솔더볼영역 (B)을제외한백그라운드영상을레퍼런스 영상으로제작한다.이는,추후피검체인반도체칩의 2D영상과고속으로 비교될수있는기준이미지로이용된다.
[58] (b)단계 (S103)는 (a)단계 (S101)에서획득된 3차원영상에서볼그리드어레이 영역 (B)을제거한레퍼런스영상을획득한다.도 4는도 3의영상에서관심 단면을제거한레퍼런스영상을예시한것이다.도 4의 (a)는관심단면인볼 그리드어레이영역 (B)이제거된포워드프로젝션이고,도 4의 (b)는포워드 프로젝션의측면도를나타낸다.
[59] 도 4를참조하면, (b)단계 (S103)는집적된반도체칩의적층된층중솔더
볼 (10)이존재하는층을관심단면으로설정하여제거할수있다.본실시예로, 관심단면은 1개이상일수있다.소자의집적화에따라솔더볼 (10)어레이가한 층이상으로형성될수있으며,솔더볼 (10)어레이이외에신뢰성검사가필요한 소자 (30)층을관심단면으로설정해도무방하다. (a)단계 (S101)에서레퍼런스가 되는반도체칩의 3D영상이획득되면,사용자는필요에따라∑축(높이) 레이어에서관심단면을설정한다. (b)단계 (S103)는솔더볼 (10)어레이
영역 (B)을관심단면으로설정할경우,볼그리드층 (B)의레이어를삭제하여 관심단면이외의백그라운드영상을획득한다.이후,백그라운드로구성된 레퍼런스영상은 3D이므로,추후피검체의 2D영상과호환되기위해선변환 과정이요구된다.
[60] (b)단계 (S103)는 (a)단계 (S101)에서획득된 3차원영상에서반도체칩 (1)의볼 그리드어레이영역 (B)이제거된영상을고정된특정각도에서의 2차원 이미지로변환하여레퍼런스영상을획득할수있다.본명세서에서지칭하는 특정각도란사용자가기설정한각도를의미한다. 3D영상은투사각도를 고정하여 2D이미지로변환될수있으며,도 4의 (a)와같이반도체칩 (1)을 위에서바라본평면도 (Plane view)형태로레퍼런스이미지를 2D변환할수있다.
[61] (c)단계 (S105)는피검체인반도체칩의 2차원이미지를획득한다.
(c)단계 (S 105)는피검체인반도체칩을상기특정각도에서의 2차원이미지로 획득할수있다. (c)단계 (S105)는레퍼런스이미지변환과정에서전술한특정 각도와동일한각도에서 2D X-ray촬영됨에주의한다.도 3내지도 5의평면도는 모두반도체칩 (1)을위에서바라본포워드프로젝션으로특정각도가설정된 ^-λ\이미지를예시한다.
[62] (d)단계 (S107)는레퍼런스영상과 (c)단계 (S105)에서획득된 2차원이미지의 차이로부터피검체인반도체칩 (1)의볼그리드어레이영역 (B)에해당하는 2차원이미지를획득한다. (d)단계 (S 107)는피검체인 2D반도체칩이미지에서 2D레퍼런스이미지를감하여중복된백그라운드영상을제거하고,관심단면만 획득하는영상처리과정을수행한다.피검체는 2D x-ray로촬영되며, 2D 이미지는빠른영상처리가가능한점을고려하면,본실시예에의한검사 방법은볼그리드어레이형반도체칩의신뢰성검사시간을현저히저감시킬수 있을것이다.
[63] 도 5는 (d)단계 (S107)의수행결과,피검체인반도체칩의 2차원영상과
레퍼런스영상의차이영상으로부터관심단면인볼그리드어레이영역이 획득된예시이다.도 5를참조하면, (d)단계 (S107)의수행으로 3D구조의반도체 칩에서볼그리드어레이영역 (B)을명확한영상으로획득할수있다.
[64] 여기서,상기 (X)단계는전술한 (a)단계 (S101)및 (b)단계 (S103)와상웅하고, 상기 (y)단계는전술한 (c)단계 (S105)와상웅하며,상기 (z)단계는전술한 (d)단계와상웅하며 ,상웅하는각단계들은표현은다르나동일한의미일수 있다.
[65] 다음으로제 2실시형태를설명한다.제 2실시예는개념적으로 (i)레퍼런스가 되는반도체칩의 3차원영상과 2차원이미지를이용하여상기 2차원
이미지로부터관심영역이제거된레퍼런스이미지를획득하는단계와, (ii)상기 반도체칩검사장치가피검체인반도체칩의 2차원이미지를획득하는단계 , 그리고, (iii)상기 (i)단계를통해획득한레퍼런스이미지및상기 (ii)단계를통해 획득한상기피검체인반도체칩의 2차원이미지의차이로부터상기관심 영역의이미지를획득하는단계로표현될수있다.
[66] 레퍼런스가되는반도체칩과피검체인반도체칩은공통된관심영역을
포함할수있고,이러한관심영역은기설정될수있으며 , (iii)단계를통해 결과적으로획득되는관심영역의이미지는상기피검체인반도체칩의관심 영역의이미지이다.
[67] 특히 ,상기 (i)단계는,레퍼런스가되는반도체칩의 3차원영상을획득하고, 상기 3차원영상에서관심영역을추출하여추출된영상을소정각도에서의 2차원이미지로변환하는과정과,상기반도체칩검사장치가상기소정 각도에서의상기레퍼런스가되는반도체칩의 2차원이미지를획득하는 과정과,상기반도체칩검사장치가상기변환된 2차원이미지와상기
레퍼런스가되는반도체칩의 2차원이미지의차이로부터상기관심영역이 제거된레퍼런스이미지를획득하는과정을포함할수있으며 ,상기 (ii)단계는, 상기소정각도에서의피검체인반도체칩의 2차원이미지를획득하는단계일 수있다.
[68] 다음으로,상술한개념적설명을제 2실시예로상세히설명한다.편의상볼 그리드어레이형반도체칩패키지에적용되는것으로설명한다.
[69] 도 6은본발명의제 2실시예에따른볼그리드어레이형반도체칩패키지의 검사방법의흐름도를나타낸다.
[70] 도 6을참조하면,본발명의제 2실시예에따른볼그리드어레이형반도체칩 패키지의검사방법은레퍼런스가되는반도체칩을 3D촬영하는 (1)단계 (S201), 볼그리드어레이영역의영상을추출하는 (2)단계 (S203),레퍼런스가되는 반도체칩을 2D촬영하는 (3)단계 (S205),레퍼런스이미지를획득하는
(4)단계 (S207),피럼체인반도체칩을촬영하는 (5)단계 (S208)및볼그리드 어레이단면의이미지를획득하는 (6)단계 (S209)를포함할수있다.
[71] (1)단계 (S201)는레퍼런스가되는반도체칩의 3차원영상을획득할수있다.
(1)단계 (S201)는 X-ray CT를이용하여,레퍼런스가되는어느일반도체칩의 3D 영상을촬영한다. (1)단계 (S201)는전술한 (a)단계 (S101)와대웅되며도 3의 영상을획득할수있다.
[72] (2)단계 (S203)는 (1)단계 (S201)에서획득된 3차원영상에서볼그리드어레이 영역 (B)에해당하는영상을추출할수있다. (2)단계 (S203)는하기의 (3)단계및 (4)단계 (S205)와함께레퍼런스이미지를획득하는단계이다.본실시예는,관심 영역을제거했던도 2의실시예와다르게 , 3D영상에서관심영역인볼그리드 어레이영역 (B)만을추출한다.
[73] (3)단계 (S205)는레퍼런스가되는반도체칩의 2차원이미지를획득할수있다. 즉,본실시예는도 2의실시예와다르게,레퍼런스가되는반도체칩을 3D, 2D로 각각촬영하여레퍼런스영상을획득한다.
[74] (4)단계 (S207)는 (3)단계 (S205)에서획득된 2차원이미지와상기
(2)단계 (S203)에서추출된영상의차이로부터볼그리드어레이영역이제거된 레퍼런스이미지를획득할수있다.이과정에서, (3)단계 (S205)에서획득된 이미지는 2D이고, (2)단계 (S203)에서추출된영상은 3D이므로,양자의영상 처리를위해서는영상의변환과정이요구된다.
[75] (4)단계 (S207)는 (2)단계 (S203)에서추출된볼그리드어레이영역의 3차원
영상을고정된특정각도에서의 2차원이미지로변환한후,변환된 2차원 이미지를 (3)단계 (S205)에서획득된 2차원이미지에서제거할수있다.
[76] 즉,도 6의실시예는도 2의레퍼런스영상을획득하는 (b)단계 (S103)의다른 실시형태로이해될수있다.도 6의실시예에서는관심영역을추출하여 레퍼런스이미지를획득한다.도 2및도 6의실시예에서 (b)단계 (S103)와
(2)단계 (S203)의영상처리작업 (관심단면의제거또는관심단면의추출)은 사용자로하여금직접적인영상처리과정을요구할수있다.사용자는 3D 영상에서관심영역의추출이용이한경우또는관심영역의제거가용이한 경우에따라도 2또는도 6의실시예를선택적으로수행할수있다.
[77] (5)단계 (S208)는피검체인반도체칩의 2차원이미지를획득할수있다.
(5)단계 (S208)는피검체인반도체칩을상기특정각도에서의 2차원이미지로 획득할수있다. (5)단계 (S208)는전술한 (c)단계 (S105)와대웅되며중복되는 설명은생략한다.
[78] (6)단계 (S209)는레퍼런스이미지와 (5)단계 (S208)에서획득된 2차원이미지의 차이로부터피검체인반도체칩의볼그리드어레이영역의단면에해당하는 2차원이미지를획득할수있다. (6)단계 (S209)는전술한 (d)단계 (S107)와 대웅되며,중복되는설명은생략한다.
[79] 여기서,상기 (i)단계는전술한 (1)단계 (S201)내지 (4)단계 (S207)와상웅하고, 상기 (ii)단계는전술한 (5)단계 (s208)와상웅하며,상기 (iii)단계는전술한
(6)단계 (S209)와상웅할수있다.상웅하는각단계는서로다른표현으로 설명되더라도동일한의미를지닐수있다.
[80] 도 7은본발명의제 3실시예에따른반도체칩패키지의검사장치 (100)의
구성을도시한블록도로서 ,반도체칩패키지검사장치 (100)는제 1이미지 획득부 (110),제 2이미지획득부 (120)및영상처리부 (130)를포함한다.
[81] 제 1이미지획득부 (110)는레퍼런스가되는반도체칩의 3차원영상을
이용하여상기 3차원영상으로부터관심영역이제거된레퍼런스영상을 획득한다.
[82] 제 2이미지획득부 (120)는피검체인반도체칩의 2차원이미지를획득한다.
[83] 영상처리부 (130)는상기레퍼런스영상및상기 2차원이미지의차이로부터 상기관심영역의이미지를획득한다.
[84] 레퍼런스가되는반도체칩과피검체인반도체칩은공통된관심영역을
포함할수있고,이러한관심영역은기설정될수있으며 ,영상처리부 (130)가 결과적으로획득하는관심영역의이미지는상기피검체인반도체칩의관심 영역의이미지일수있다.
[85] 레퍼런스가되는반도체칩및피겁체인반도체칩은기설정된형태의
어레이 (예컨대,볼그리드어레이)를포함할수있고,상기공통된관심영역은 상술한기설정된형태의어레이가형성된영역일수있다.
[86] 구체적으로,제 1이미지획득부 (110)는레퍼런스가되는반도체칩의 3차원 영상을획득하고 3차원영상으로부터하나이상의관심영역 (또는관심단면)을 제거하여레퍼런스영상을획득하는 3차원영상획득모듈 (111)과, 3차원영상 획득모듈 (111)이획득한레퍼런스영상을특정각도에서의 2차원이미지로 변환한레퍼런스영상을획득하는 2차원영상획득모듈 (112)을포함할수있다.
[87] 2차원영상획득모듈 (112)이레퍼런스영상을특정각도에서의 2차원
이미지로변환한레퍼런스영상을획득하는경우,제 2이미지획득부 (120)는 상술한특정각도와동일한각도에서의상기피검체인반도체칩의 2차원 이미지를획득할수있다.
[88] 이에따라,영상처리부 (130)는특정각도에서의 2차원이미지로변환된
레퍼런스영상및상술한특정각도와동일한각도에서의피검체인반도체칩의 2차원이미지의차이로부터피검체인반도체칩의관심영역의이미지를획득할 수있다.
[89] 상술한설명과달리제 1이미지획득부 (110)는레퍼런스가되는반도체칩의 3차원영상과 2차원이미지를획득하고레퍼런스가되는반도체칩의 3차원 영상과 2차원이미지로부터관심영역이제거된레퍼런스이미지를획득할수도 있다.이경우,제 2이미지획득부 (120)는피검체인반도체칩의 2차원이미지를 획득할수있으며 ,영상처리부 (130)는레퍼런스이미지및피검체인반도체칩의 2차원이미지의차이로부터피검체인반도체칩의관심영역의이미지를획득할 수있다.
[90] 또한,상술한 3차원영상획득모듈 (111)은레퍼런스가되는반도체칩의 3차원 영상과 2차원이미지를획득하고 3차원영상으로부터관심영역영상을추출및 획득할수있으며,상술한 2차원영상획득모듈 (112)은관심영역영상을소정 각도에서의 2차원이미지로변환하고,변환된 2차원이미지와상술한소정 각도와동일한각도에서의레퍼런스가되는반도체칩의 2차원이미지의 차이로부터관심영역이제거된레퍼런스이미지를획득할수있다.
[91] 이에따라,영상처리부 (130)는소정각도에서의 2차원이미지로변환된 레퍼런스영상및상술한소정각도와동일한각도에서의피검체인반도체칩의 2차원이미지의차이로부터피검체인반도체칩의관심영역의이미지를획득할 수있다.
[92] 도 7을참조하여설명한,반도체칩패키지의검사장치 (100)의구성요소중, 제 1이미지획득부 (110),제 2이미지획득부 (120)및영상처리부 (130)는각각 별도의장치로이루어지거나결합된단일의장치로이루어질수있다.
[93] 이상,도 7을참조하여설명한반도체칩패키지의검사장치 (100)는도 2및도 6에도시된반도체칩패키지의검사방법에이용될수있다.즉반도체칩 패키지의검사장치 (100)를이용하여도 2및도 6에도시된본발명의제 1실시예 또는제 2실시예에따른반도체칩패키지의검사방법을수행할수있다.
[94] 구체적으로앞서도 2를참조하여설명한 (a)단계 (S101), (b)단계 (S103)및
(X)단계,도 6을참조하여설명한 (1)단계 (S201)내지 (4)단계 (S207)와 (i)단계는 반도체칩패키지의검사장치 (100)가구비한제 1이미지획득부 (110)를 이용하여수행될수있다.
[95] 또한,상술한 (c)단계, (y)단계, (5)단계,및 (ii)단계는제 2이미지획득부 (120)에 의해수행될수있으며,상술한 (d)단계, (z)단계, (6)단계및 (iii)단계는영상 처리부 (130)에의해수행될수있다.
[96] 본명세서상에서설명하는레퍼런스가되는반도체칩과피검체인반도체 칩은동일또는유사한제조공정을통해제조된반도체칩일수있다.또한,앞서 설명하였듯이,레퍼런스가되는반도체칩및피검체인반도체칩은공통된관심 영역을포함할수있고,공통된관심영역에는기설정된형태의어레이가 존재할수있다.또한,기설정된형태의어레이는하나이상의솔더볼을갖는볼 그리드어레이일수있으나,반드시볼그리드어레이어야하는것은아니다.
[97] 도 8은본발명의제 4실시예에따른반도체칩패키지의검사시스템의
개략적인구성을도시한도면이다.
[98] 도 8을참조하면,반도체칩패키지의검사시스템은피검체인반도체
칩 (801)이이동수단 (802)상에서이동될때,이동수단 (802)상부에서
이동수단 (802)또는피검체인반도체칩 (801)을바라보도록형성된영상획득 장치 (810),영상획득장치 (810)가레퍼런스가되는반도체칩 (800)의 3차원 레퍼런스영상을획득하도록레퍼런스가되는반도체칩을회전시키는 회전수단 (820)을포함하는형태로구현될수있다.
[99] 이외에도,반도체칩패키지의검사시스템은영상획득장치 (810)가획득한 영상을전송받아피검체인반도체칩의관심영역의이미지를생성하는영상 처리장치 (830)등을더포함하는형태로구현될수있다.
[100] 영상처리장치 (830)는노트북등의 PC형태로구현될수있으나,반드시
독립적인형태로구현될필요는없으며,영상획득장치 (810)또는
회전수단 (820)에종속된형태로구현될수있다.
[101] 영상획득장치 (810)는이동수단 (802)상에서이동되는피검체인반도체칩의 2차원이미지 (단면또는단층이미지)를획득할수있다.
[102] 또한,회전수단 (820)은이동수단 (801)상에서이동중인피검체인반도체
칩 (801)들중특정반도체칩 (801)과결합되어레퍼런스가되는반도체칩을 형성할수있으며,별도의레퍼런스가되는반도체칩 (800)과결합될수도있다.
[103] 예컨대,회전수단 (820)이이동수단 (801)상에서이동중인피검체인반도체
칩 (801)들중특정반도체칩 (801)과결합된경우,이를대상으로반도체칩 패키지의검사시스템은레퍼런스영상을획득할수있다.
[104] 또한,회전수단 (820)은모터등을구비하여레퍼런스가되는반도체칩 (800)을 상하또는좌우로회전시킬수있다.
[105] 회전수단 (820)이레퍼런스가되는반도체칩 (800)을회전시킬때영상획득
장치 (810)는레퍼런스가되는반도체칩 (800)의 2차원이미지를다수개획득할 수있고,획득된다수의 2차원이미지로부터레퍼런스가되는반도체칩 (800)의 3차원영상을획득할수있다.
[106] 회전수단 (820)이레퍼런스가되는반도체칩 (800)을회전시키는각도,회전
시간,영상획득장치 (810)가레퍼런스가되는반도체칩 (800)을촬영하는시간, 횟수,각도등은다양하게변형되어실시될수있다.
[107] 도 7에도시된반도체칩패키지의검사장치 (100)와마찬가지로도 8에도시된 반도체칩패키지의검사시스템을이용하여도 2및도 6에도시된본발명의 제 1실시예와제 2실시예에따른반도체칩패키지의검사방법을수행할수있다.
[108] 예컨대,도 8에도시된반도체칩패키지의검사시스템은영상획득
장치 (810)와회전수단 (820)을이용하여레퍼런스가되는반도체칩의 3차원 영상과피검체인반도체칩의 2차원이미지를획득할수있다.또한,반도체칩 패키지의검사시스템은영상처리장치 (830)를이용하여 3차원영상으로부터 관심영역을제거한후특정각도에서의 2차원이미지로변환할수있고,변환된 2차원레퍼런스영상과피검체인반도체칩의 2차원이미지의차이로부터 피검체인반도체칩의관심영역의이미지를획득할수있다.
[109] 기존의일반적인반도체칩패키지검사시스템은검사대상반도체칩이
이동되는이동수단과,이동수단의상부에마련되어이동중인검사대상 반도체칩의이미지 (단면또는단층이미지)를촬영하는촬영장치 (예컨대, X-ray 촬영장치)로이루어진다.
[110] 따라서도 8에도시된회전수단 (820)만을기존의일반적인반도체칩패키지 검사시스템에적용하면반도체칩패키지의검사시스템을구현할수있다.즉, 기존의반도체칩패키지검사시스템을그대로이용하여반도체칩패키지의 검사시스템을구현할수있게된다.
[111] 도 9는도 8에도시된본발명의제 4실시예에따른반도체칩패키지의검사 시스템이레퍼런스가되는반도체칩 (901)의 3차원영상을획득하는방법을 설명하기위해도시한도면이다.
[112] 앞서도 8을참조한설명에서는,반도체칩패키지의검사시스템이 회전수단 (820)과영상획득장치 (810)를이용하여레퍼런스가되는반도체 칩 (800)의 3차원영상을획득하는방법을설명하였다.
[113] 이와달리,반도체칩패키지의검사시스템은회전수단 (820)없이영상획득 장치 (810)만으로도레퍼런스가되는반도체칩의 3차원영상을획득할수있다.
[114] 도 9를참조하면,이동수단상에서이동중인레퍼런스가되는반도체
칩 (901)이영상획득장치 (810)의촬영가능영역에도달하면,영상획득 장치 (810)는일정간격으로이동중인레퍼런스가되는반도체칩 (901)을 연속적으로촬영할수있고,다양한각도에서촬영된레퍼런스가되는반도체 칩 (901)의 2차원이미지들을획득할수있다.
[115] 따라서,다양한각도에서촬영된레퍼런스가되는반도체칩 (901)의 2차원 이미지들을이용하여레퍼런스가되는반도체칩 (901)의 3차원영상을확보할수 있으며,이경우,레퍼런스가되는반도체칩 (901)을회전시키지않고도 레퍼런스가되는반도체칩 (901)의 3차원영상을획득할수있다.
[116] 도 10은 CT를이용하여레퍼런스가되는반도체칩의 3차원레퍼런스영상을 획득하는방법을설명하기위해도시한도면이다.
[117] 앞서도 8을참조하여설명한반도체칩패키지의검사시스템은
회전수단 (820)을구비하여영상획득장치 (810)이레퍼런스가되는반도체칩의 3차원영상을획득하도록하였으나,이와달리본실시예에서는컴퓨터 단층촬영 (Computed Tomography)장치를이용하여레퍼런스가되는반도체 칩 (1001)의 3차원레퍼런스영상을확보할수있다.
[118] 즉,본발명의또다른실시예에따른반도체칩패키지의검사시스템은도 8의 영상획득장치 (810)와영상처리장치 (830),그리고 CT장치로형성될수있다. 이러한반도체칩패키지의검사시스템은도 10에도시된 CT장치를이용하여 레퍼런스가되는반도체칩 (1001)의 3차원영상을획득할수있으며 ,획득한 3차원영상은별도로구비한데이터베이스 (도시하지않음)에저장할수있다. 이외의절차는전술하였으므로생략하도록한다.
[119] 도 11은본발명의다양한실시예에따라관심영역이복수개인경우의
레퍼런스가되는반도체칩의영상및관심영역이제거된레퍼런스영상을 도시한것이다.
[120] 얻고자하는관심영역 (관심단면)의이미지가복수개인경우에도도 1내지도 10를참조하여설명한본발명의다양한실시예에따른반도체칩패키지의검사 방법,장치및시스템을이용하여관심영역의이미지를얻을수있다.
[121] 예컨대,전술한 (X)단계, (i)단계또는제 1이미지획득부 (110)를통해획득한 레퍼런스가되는반도체칩의관심영역이제거된레퍼런스영상에서관심 영역은도 11의 (a)및 (b)에도시된 1101및 1103와같이복수개일수있다.도 11에서는편의상관심영역을 11이과 1103두영역으로표현하였으나,관심 영역은두영역이상일수도있다.
[122] 도 11의 (a)는전술한 (X)단계, (i)단계또는제 1이미지획득부 (110)를통해 획득한레퍼런스가되는반도체칩의 3차원영상의포워드프로젝션이고, (b)는 포워드프로젝션의측면도를도시한것이다.
[123] 도 11의 (c)는전술한 (X)단계, (i)단계또는제 1이미지획득부 (110)를통해
획득한두개의관심영역중 1103이제거된 3차원레퍼런스영상의포워드 프로젝션이고, (d)는포워드프로젝션의측면이다.
[124] 도 11의 (e)는 (X)단계, (i)단계또는제 1이미지획득부 (110)를통해획득한두 개의관심영역중 11이이제거된 3차원레퍼런스영상의포워드프로젝션이고,
(f)는포워드프로젝션의측면이다.
[125] 도 11의 (g)는 (X)단계, (i)단계또는제 1이미지획득부 (110)를통해획득한두 개의관심영역중 11이및 1103이모두제거된 3차원레퍼런스영상의포워드 프로젝션이고, (h)는포워드프로젝션의측면이다.
[126] 이처럼 ,앞서도 1내지도 10를참조하여설명한본발명의다양한실시예에 따른반도체칩패키지의검사방법,장치및시스템의절차,기능,구성요소등을 이용하여피검체인반도체칩의복수개의관심영역 (관심단면)도획득할수 있다.
[127] 예컨대,도 2를참조하여설명한본발명의제 1실시예에따른반도체칩
패키지의검사방법의 (X)단계는레퍼런스가되는반도체칩의 3차원영상을 획득하고상기 3차원영상으로부터제 1관심영역및제 2관심영역중적어도 어느하나의관심영역을제거한후특정각도에서의 2차원이미지로변환한 레퍼런스영상을획득하는단계일수있다.
[128] 이때 (y)단계는상술한특정각도와동일한각도에서의피검체인반도체칩의 2차원이미지를획득하는단계일수있으며, (z)단계는 (X)단계를통해획득한 레퍼런스영상및 (y)단계를통해획득한피검체인반도체칩의 2차원이미지의 차이로부터피검체인반도체칩의제 1관심영역및제 2관심영역중적어도어느 하나의이미지를획득하는단계일수있다.
[129] 마찬가지로,도 7에도시된본발명의제 3실시예에따른반도체칩패키지의 검사장치 (100)의제 1이미지획득부 (110)는레퍼런스가되는반도체칩의 3차원 영상을이용 (또는획득)하여 3차원영상으로부터적어도하나이상의관심 영역을제거한후특정각도에서의 2차원이미지로변환한레퍼런스영상을 형성할수있다.
[130] 또한,이때,제 2이미지획득부 (120)는상기특정각도와동일한각도에서의 피검체인반도체칩의 2차원이미지를획득할수있고,영상처리부 (130)는 레퍼런스영상및피검체인반도체칩의 2차원이미지의차이로부터피검체인 반도체칩의적어도하나이상의관심영역의이미지를획득할수있다.
[131] 도 11에도시된바와같이,본발명의다양한실시예에따른반도체칩패키지의 검사방법,검사장치및검사시스템을이용하면,특정형태의어레이가다수개 적층된구조의반도체칩에서원하는층의어레이형태만을검사하는데탁월한 효과를발휘할수있다. [132] 도 12는레퍼런스가되는반도체칩의관심영역만을컷팅하여레퍼런스 영상을획득하는방법을설명하기위해도시한도면이다.
[133] 도 8및도 10을참조하여설명한실시예에서는,레퍼런스가되는반도체칩 전체에대한 3차원영상또는 3차원레퍼런스영상을획득하는방법이 사용되었으나,이와달리 ,이하에서설명되는실시예에서는레퍼런스가되는 반도체칩중관심영역에대한 3차원영상또는 3차원레퍼런스영상만을 획득할수있다.
[134] 도 12를참조하면,레퍼런스가되는반도체칩 (1200)에는관심영역에해당하는 부분 (1201)과관심영역에해당하지않는부분 (1202)이존재한다.따라서
레퍼런스가되는반도체칩 (1200)중관심영역에해당하는부분 (1201)을 컷팅하여 ,이를대상으로 3차원영상또는 3차원레퍼런스영상을획득할수 있다.
[135] 이러한방법은레퍼런스가되는반도체칩전체를회전시키지않고,관심
영역에해당하는부분만을회전시킬수있어도 8및도 10을참조하여설명한 3차원영상획득방법보다공간적인측면에서보다효율적일수있다.
[136] 앞서설명한바와같이,도 12에도시된관심영역에해당하는부분 (1201)은기 설정된형태의어레이가형성된영역일수있고,기설정된형태의어레이는 하나이상의솔더볼을갖는볼그레이어레이형태일수있으나,다른형태의 어레이일수도있다.
[137] 본명세서상에서설명되는내용중,레퍼런스가되는반도체칩의 3차원
영상으로부터관심영역을제거하는방법으로는레퍼런스가되는반도체칩의 3차원영상으로부터관심영역을설정하고,관심영역의픽셀 (pixel)값을 0으로 설정하는방법이있으나,이외에도다양한방법이이용될수있다.
[138] 또한,본명세서상에서설명되는내용중,피검체인반도체칩의특정
각도에서의 2차원이미지에서상술한특정각도와동일한각도에서의 2차원 이미지로변환된레퍼런스영상을제거하는기법으로는,단순사칙연산을 이용하여하나의영상을기준으로다른영상을빼서차이를구하는방법이 사용될수있으나,이외에도다양한방법이사용될수있다.
[139] 기설정된알고리즘또는소프트웨어를이용하여자동으로관심영역을설정한 후관심영역의픽셀값을 0으로설정하거나,수동적인방법으로관심영역을 설정한후관심영역의픽셀값을 0으로설정할수도있다.
[140] 이하에서는,전술한본발명의다양한실시예에따른레퍼런스가되는반도체 칩의 3차원레퍼런스영상을변환한 2차원레퍼런스영상 (이하 "2차원레퍼런스 영상")과피검체인반도체칩의 2차원이미지 (이하 "피검 2차원이미지")를 비교하는방법의예에대해설명한다.
[141] 본발명의다양한실시예에따라피검체인반도체칩의관심영역 (관심단면)을 확인하는경우,주변환경의영향으로 3차원레퍼런스영상을특정각도에서의 2차원이미지로변환한 2차원레퍼런스영상과다른위치에서의 2차원이미지를 얻는경우가발생할수있다.
[142] 이경우에는피검 2차원이미지에존재하는검사대상의위치가 2차원
레퍼런스영상의관심영역에존재하는검사대상의위치와다르게된다.결국, 2차원레퍼런스영상과피검 2차원이미지의차이로부터관심영역의이미지를 정확히획득할수없게된다.
[143] 따라서 ,본발명의다양한실시예에서는피검 2차원이미지와 2차원레퍼런스 영상을같은각도또는방향에서획득한것인지확인하기위해유사도 (Mutual information, normalized correlation coefficient)를비교하여상술한문제를보완할 수있다.
[144] 만약,유사도비교결과값이일정값이상이면전술한본발명의다양한
실시예에따라 2차원레퍼런스영상과피검 2차원이미지의차이로부터관심 영역의이미지를획득하는과정을그대로수행하고,그렇지않은경우,본 발명의다양한실시예는 3차원레퍼런스영상의다른각도 (방향)에서 2차원 레퍼런스영상을재차획득하는과정을거칠수있다.
[145] 영상들간의유사도를측정하기위해상호정보량 (mutual information),
NCQNormalized Correlation Coefficient)등을사용할수있다.
[146] 상호정보량은두영상을구성하는픽셀에저장된값들을비교하여두영상이 얼마나공통된정보를가지고있는지비교하는방법이다.상호정보량을 계산하기위한두개의영상 X와 Y가주어졌을때,상호정보량 I는아래의수식 (1)을이용하여구할수있다.
[147] τ식 (1)
Figure imgf000020_0001
[148] 수식 (1)에서 p(x,y)는영상 X와 Y의픽셀값에대한 joint probability이고 , p(x), p(y)는각각영상에서의픽셀값에대한 marginal probability이다.수식 (1)을 아래의수식 (2)에정의된 entropy를이용하면아래의수식 (3)과같이나타낼수 있다.
[149] 수식 (2)
H(x) = ^ p (xi) logb νίχύ
[150] Ϊ(Χ; Υ) = Η(Χ) + Η(Υ) - Η(Χ, Υ) 수식 (3) [151] 수식 (2)에서 p(xi)는영상 X에서픽셀의값이 xi일확률로영상의히스토그램을 이용하면구할수있다.또한,수식 (2)에서 log에사용하는지수 b는사용자의 선택으로바뀔수있지만일반적으로는 2나 10을이용한다.
[152] 수식 (1)에서수식 (3)으로의계산과정은아래의증명 (1)과같이나타낼수 있다.
Figure imgf000021_0001
- -ΗίΥ\Χ) + H(Y)
= H(Y)― H(yjx).
증명 (1)
[154] 이외에도 NCQNormalized Correlation Coefficient)를이용하여두영상의
유사도를측정할수있다. NCC값 R은아래의수식 (4)를이용하여구할수있다.
[155] 수식 (4)
Figure imgf000021_0002
[156] 수식 (4)에서 X와 γ는유사도를구하기위한영상이고, χ', y'은영상에존재하는 픽셀의인텍스이다.
[157] 앞서설명한유사도결과를바탕으로 2차원레퍼런스영상과피검 2차원
이미지가같은위치에정렬되어있는지또는같은각도에서바라본영상인지 확인할수있고,해당영상들을정렬할수있다.영상을정렬하기위해서는 영상을변환할변환매개변수 (transformation parameter)를구해야한다.
[158] 영상을정렬하기위한 transformation parameter를구하기위해사용하는방법중 대표적인방법으로는유사도측정값의미분을이용하여최적화하는방법과 미분을사용하지않고최적화를하는선형방법이 있다.
[159] 먼저미분을이용한최적화방법에는대표적으로 SGD(Stochastic Gradient Descent)방법이 있다.이방법을이용하기위해서는먼저측정한유사도의 미분값을구해야한다.유사도를구하는수식을직접미분할수도있지만 transformation을적용한경우에픽셀의값이달라질수도있기때문에아래의 수식 (5)와같이유한차분법 (finite difference)을이용하여미분을구하는것이 바람직할수있다.
[160] 수시 (5)
dl(X, Y(T(u)); U) l{X, Y( (u)); Ui + h) - l{X, Y{T(u)); t)
5u£ h [161] 수식 (5)에서 i{x, Y{T{u y,u ^:영상 Y를 transformation parameter u를 이용해서변환한후에영상 X와의유사도값을나타낸것이고, ui는영상을 변환하는 parameter중에하나이다.일반적으로 2D영상의변환을위해서는 3개의 parameter를이용하고, 3D영상의변환을위해서는 6개의 parameter를 이용한다.
[162] 각각의 parameter에대해서미분을구한후에아래의수식 (6)을이용하여
transformation parameter를업데이트한다.이때 «는업데이트를얼마나할지 정하는값으로일반적으로 step size혹은 learning rate라고부른다.
[ 163] dl(X, Y(T(u)); u) τ식 (6)
Uj = Uj + a *
dUi
[164] 이방법을이용하여업데이트를수행하면 , Χ와 Y영상의유사도가최고가되는 지점에서는유사도의미분값이 0에가까워질것이므로,최적의유사도를갖는 영상변환 parameter를구할수있다.
[165] 하지만유사도측정법에따라서유사도가높아질수록유사도의기을기가
작아지지않고커지는구간이존재하여미분을이용한방법을이용하는 경우에는최적의 parameter를정확하게찾지못할수도있다.이러한현상을막기 위해서는미분을이용하지않는선형최적화방법을이용하여야한다.선형 최적화방법중에하나인 Powell's method는아래의①내지④의절차들로 이루어질수있다.
[166] ① n개의 parameter에대해서 n개의서로다른방향을초기화하고,② n개의 서로다른방향에대해서각각 parameter를이동하며최고의유사도를가지는 위치를찾아 parameter업데이트를수행한다.③ n개의서로다른방향에대해서 업데이트가끝난후 parameter와상기②과정에서입력된 parameter의 vector를 구해서새로운방향을추가한뒤,④유사도가층분히높아 parameter가더이상 업데이트되지않을때까지②〜③과정을반복한다.
[167] 또한, 3차원레퍼런스영상으로부터 2차원레퍼런스영상을다른방향 (또는 각도)에서획득하기위해서는피검체인반도체칩이레퍼런스가되는반도체 칩과얼마나차이를가지고있는지를확인해야한다.이를위해서본발명의 다양한실시예에서는영상정합에사용되는방법을이용한다.
[168] 먼저 , 3차원레퍼런스영상을회전시키면서 2차원레퍼런스영상을획득하고, 이렇게획득한 2차원레퍼런스영상과피검체인반도체칩의 2차원이미지의 유사도를계산한다.이유사도가최대값이되도록계속해서 3차원레퍼런스 영상을회전시키거나이동시켜최적의변수를찾는다.
[169] 그런데,초기조건없이 3차원레퍼런스영상을계속회전시켜최적의변수를 찾는경우변수를계산하는시간이오래걸릴수있다.따라서계산시간을 줄이기위해다음과같은방법을사용할수있다. [170] 먼저,피검체인반도체칩이회전할수있는범위내의 3차원레퍼런스영상을 미리획득하고,이를별도의데이터베이스에보관한다.이후피검 2차원 이미지에존재하는검사대상의위치가 2차원레퍼런스영상의관심영역에 존재하는검사대상의위치와다른것이판정되면,피검체 2차원이미지를 데이터베이스에저장된레퍼런스영상들과비교하여가장유사한 3차원 레퍼런스영상의위치를찾고,이를초기조건으로하여 3차원레퍼런스영상의 위치를최적화한다.이때,최적화를위해 gradient를이용한방법 (gradient descent), linear optimization(po well's method)을수행하는방법등을사용할수 있다.
[171] 한편,볼그리드어레이형반도체칩을검사하는실제공정에서는공정
라인별로서로같은볼그리드어레이형반도체칩유형을검사하는경우도 있지만서로다른볼그리드어레이형반도체칩유형을검사하는경우도있다. 후자의경우서로다른볼그리드어레이형반도체칩에서의각레퍼런스영상을 저장하여두고이를이용하여공정진행시진행되는반도체칩의유형에따라 레퍼런스영상을달리이용하도록구현하는것도가능하다.
[172] 한편,본발명은반도체칩이외에도자동차부품,반도체부품,전자제품등에 적용가능한데외관상으로확인이용이하지않는모양확인,오픈,브릿지,쇼트, 고납,미스얼라인,넁납,각종솔더링불량등의각종불량이발생가능한영역을 관심영역으로하고이를확인하는것이가능하다.
[173] 상술한본발명의설명은예시를위한것이며,본발명이속하는기술분야의 통상의지식을가진자는본발명의기술적사상이나필수적인특징을변경하지 않고서다른구체적인형태로쉽게변형이가능하다는것을이해할수있을 것이다.그러므로이상에서기술한실시예들은모든면에서예시적인것이며 한정적이아닌것으로이해해야만한다.본발명의범위는후술하는
특허청구범위에의하여나타내어지며,특허청구범위의의미및범위그리고그 균등개념으로부터도출되는모든변경또는변형된형태가본발명의범위에 포함되는것으로해석되어야한다.
발명의실시를위한형태
[174] 발명의실시를위한형태는위의발명의실시를위한최선의형태에서함께 기술되었다.
산업상이용가능성
[175] 본발명은반도체칩패키지의검사방법에관한것으로,반도체칩패키지의 검사장치,방법및시스템에적용가능하고,반복가능성이 있어산업상 이용가능성이존재한다.

Claims

청구범위
[청구항 1] 레퍼런스가되는반도체칩의 3차원영상을이용하여상기 3차원
영상으로부터관심영역이제거된레퍼런스영상을획득하는제 1이미지 획득부;
피검체인반도체칩의 2차원이미지를획득하는제 2이미지획득부;및 상기레퍼런스영상및상기 2차원이미지의차이로부터상기피검체인 반도체칩의관심영역의이미지를획득하는영상처리부를포함하는 것을특징으로하는반도체칩패키지의검사장치
[청구항 2] 제 1항에 있어서,
상기제 1이미지획득부는,
상기레퍼런스가되는반도체칩의 3차원영상을획득하고상기 3차원 영상으로부터하나이상의관심영역을제거하여레퍼런스영상을 획득하는 3차원영상획득모듈;및
상기 3차원영상획득모듈이획득한상기레퍼런스영상을특정 각도에서의 2차원이미지로변환한레퍼런스영상을획득하는 2차원 영상획득모듈을포함하는것을특징으로하는반도체칩패키지의검사 장치
[청구항 3] 제 2항에 있어서,
상기제 2이미지획득부는
상기특정각도에서의상기피검체인반도체칩의 2차원이미지를 획득하는것을특징으로하는반도체칩패키지의검사장치
[청구항 4] 레퍼런스가되는반도체칩의 3차원영상과 2차원이미지를이용하여 상기 2차원이미지로부터관심영역이제거된레퍼런스이미지를 획득하는제 1이미지획득부;
피검체인반도체칩의 2차원이미지를획득하는제 2이미지획득부;및 상기레퍼런스이미지및상기피검체인반도체칩의 2차원이미지의 차이로부터상기관심영역의이미지를획득하는영상처리부를 포함하는것을특징으로하는반도체칩패키지의검사장치
[청구항 5] 제 4항에 있어서,
상기제 1이미지획득부는,
상기레퍼런스가되는반도체칩의 3차원영상과 2차원이미지를 획득하고상기 3차원영상으로부터관심영역영상을추출하는 3차원 영상획득모듈；및
상기관심영역영상을소정각도에서의 2차원이미지로변환하고, 변환된 2차원이미지와상기소정각도에서의상기레퍼런스가되는 반도체칩의 2차원이미지의차이로부터상기관심영역이제거된 레퍼런스이미지를획득하는 2차원영상획득모듈을포함하는것을 특징으로하는반도체칩패키지의검사장치
[청구항 6] 제 5항에 있어서,
상기제 2이미지획득부는
상기소정각도에서의상기피검체인반도체칩의 2차원이미지를 획득하는것을특징으로하는반도체칩패키지의검사장치
[청구항 7] 제 3항또는제 6항에 있어서,
상기레퍼런스가되는반도체칩및상기피검체인반도체칩은공통된 관심영역을포함하고,
상기공통된관심영역에는기설정된형태의어레이가존재하는것을 특징으로하는반도체칩패키지의검사장치
[청구항 8] 제 7항에 있어서,
상기기설정된형태의어레이는볼그리드어레이인것을특징으로하는 반도체칩패키지의검사장치
[청구항 9] (X)레퍼런스가되는반도체칩의 3차원영상을이용하여상기 3차원
영상으로부터관심영역이제거된레퍼런스영상을획득하는단계； (y)피검체인반도체칩의 2차원이미지를획득하는단계；및 (z)상기 (X)단계를통해획득한상기레퍼런스영상및상기 (y)단계를 통해획득한상기피검체인반도체칩의 2차원이미지의차이로부터상기 피검체인반도체칩의관심영역의이미지를획득하는단계를포함하는 것을특징으로하는반도체칩패키지의검사방법.
[청구항 10] 제 9항에 있어서,
상기 (X)단계는,상기 3차원영상으로부터하나이상의관심영역을 제거하고하나이상의관심영역이제거된 3차원영상을특정각도에서의
2차원이미지로변환한레퍼런스영상을획득하는단계이고, 상기 (y)단계는,상기특정각도에서의피검체인반도체칩의 2차원 이미지를획득하는단계인것을특징으로하는반도체칩패키지의검사 방법.
[청구항 11] (i)레퍼런스가되는반도체칩의 3차원영상과 2차원이미지를이용하여
상기 2차원이미지로부터관심영역이제거된레퍼런스이미지를 획득하는단계 ;
(ii)피검체인반도체칩의 2차원이미지를획득하는단계；및
(iii)상기 (i)단계를통해획득한레퍼런스이미지및상기 (ii)단계를통해 획득한상기피검체인반도체칩의 2차원이미지의차이로부터상기 피검체인반도체칩의관심영역의이미지를획득하는단계를포함하는 것을특징으로하는반도체칩패키지의검사방법.
[청구항 12] 제 11항에 있어서,
상기 (i)단계는,레퍼런스가되는반도체칩의 3차원영상을획득하고, 상기 3차원영상에서관심영역을추출하여추출된영상을소정 각도에서의 2차원이미지로변환하는과정과,상기반도체칩검사 장치가상기소정각도에서의상기레퍼런스가되는반도체칩의 2차원 이미지를획득하는과정과,상기반도체칩검사장치가상기변환된 2차원이미지와상기레퍼런스가되는반도체칩의 2차원이미지의 차이로부터상기관심영역이제거된레퍼런스이미지를획득하는 과정을포함하며,
상기 (ii)단계는,상기소정각도에서의피검체인반도체칩의 2차원 이미지를획득하는단계인것을특징으로하는반도체칩패키지의검사 방법.
[청구항 13] 제 9항또는제 11항에 있어서,
상기레퍼런스가되는반도체칩및상기피검체인반도체칩은공통된 관심영역을포함하고,
상기공통된관심영역에는기설정된형태의어레이가존재하는것을 특징으로하는반도체칩패키지의검사방법.
[청구항 14] 제 13항에 있어서,
상기기설정된형태의어레이는볼그리드어레이인것을특징으로하는 반도체칩패키지의검사방법.
[청구항 15] 레퍼런스가되는반도체칩과결합하여상기레퍼런스가되는반도체 칩을회전시키는회전수단;
피검체인반도체칩의특정각도에서의 2차원이미지를획득하고,상기 회전수단에의해회전되는상기레퍼런스가되는반도체칩을촬영하여 상기레퍼런스가되는반도체칩의 3차원영상을획득하는영상획득 장치 ;및
상기 3차원영상으로부터관심영역을제거하고상기특정각도에서의 2차원이미지로변환한레퍼런스영상을획득하며 ,상기레퍼런스영상과 상기피검체인반도체칩의 2차원이미지의차이로부터상기피검체인 반도체칩의관심영역의이미지를획득하는영상처리장치를포함하는 것을특징으로하는반도체칩패키지의검사시스템.
PCT/IB2017/056460 2016-08-18 2017-10-18 볼 그리드 어레이형 반도체 칩 패키지의 검사 방법 WO2018033898A1 (ko)

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