WO2017133144A1 - 阵列基板及其制作方法 - Google Patents

阵列基板及其制作方法 Download PDF

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Publication number
WO2017133144A1
WO2017133144A1 PCT/CN2016/083531 CN2016083531W WO2017133144A1 WO 2017133144 A1 WO2017133144 A1 WO 2017133144A1 CN 2016083531 W CN2016083531 W CN 2016083531W WO 2017133144 A1 WO2017133144 A1 WO 2017133144A1
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Prior art keywords
array substrate
line
pixel region
data line
pixel
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English (en)
French (fr)
Inventor
姜祥卫
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/117,514 priority Critical patent/US20180046051A1/en
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Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00—Function characteristic
    • G02F2203/01—Function characteristic transmissive

Definitions

  • the invention belongs to the technical field of liquid crystal display, and in particular to an array substrate and a manufacturing method thereof.
  • LCDs liquid crystal displays
  • liquid crystal displays As the requirements for brightness, viewing angle, contrast, and response speed of liquid crystal displays become higher and higher, more liquid crystal displays are transferred from TN type to IPS (or FFS) type or VA type. As the fineness of the liquid crystal display increases, the size of the pixel becomes smaller and smaller, and thus, the aperture ratio of the pixel is smaller and smaller, which affects the display brightness of the liquid crystal display.
  • a storage capacitor is provided in the pixel, and a light shielding line is provided to shield the data line and the light leakage at the edge of the pixel electrode, which further reduces the aperture ratio of the pixel.
  • an object of the present invention is to provide an array substrate including: a transparent substrate; a gate line, a data line, and a storage electrode line disposed on the transparent substrate, the gate The line and the data line are insulated from each other and intersect each other to define a pixel region, the storage electrode line is located in the pixel region; a switching element disposed at an intersection of the gate line and the data line, The switching element includes: a control end, an input end, and an output end, the control end is connected to the gate line, the input end is connected to the data line, and the output end extends into the pixel area to Opposite the storage electrode line and insulated.
  • the switching element is a thin film transistor, wherein a control end of the switching element is a gate of a thin film transistor, an input end of the switching element is a source of a thin film transistor, and an output end of the switching element is a thin film The drain of the transistor.
  • the array substrate further includes: a common electrode disposed on the gate line, the data line, and the switching element.
  • the array substrate further includes: the pixel electrode disposed in the pixel region; wherein the pixel electrode is located above the output end extending into the pixel region, and the pixel electrode passes The via is connected to the output extending into the pixel region.
  • the array substrate further includes: the pixel electrode disposed in the pixel region; wherein the pixel electrode is connected to the output end extending into the pixel region through a via hole.
  • Another object of the present invention is to provide a method for fabricating an array substrate, comprising the steps of: A, providing a transparent substrate; B, forming gate lines, gate electrodes, and storage electrode lines on the transparent substrate; The gate is connected to the gate line; C, forming a data line, a source and a drain on the transparent substrate; the gate line and the data line are insulated from each other and intersect each other to define a pixel a region; the storage electrode line is located in the pixel region, the source is connected to the data line; and the drain extends into the pixel region to be opposite to and insulated from the storage electrode line.
  • the manufacturing method further includes the steps of: D. forming a common electrode over the gate line, the data line, and the switching element by using a transparent conductive material; wherein the common electrode and the gate The line, the data line, and the switching element are both insulated.
  • the manufacturing method further includes the steps of: E. forming a pixel electrode in the pixel region by using a transparent conductive material; wherein the pixel electrode is connected to a drain extending into the pixel region through a via hole.
  • step D and the step E are performed simultaneously, or the step E is performed before the step D.
  • the present invention utilizes a drain and a storage electrode line extending into a pixel region to form a storage capacitor, without requiring a dedicated storage capacitor, and removing the shading lines on both sides of the data line.
  • the pixel aperture ratio can be increased, thereby increasing the display brightness of the liquid crystal panel.
  • FIG. 1 is a schematic structural view of an array substrate according to an embodiment of the present invention.
  • FIG. 2 is a flow chart of a method of fabricating an array substrate in accordance with an embodiment of the present invention
  • FIG 3 is a schematic structural view of a liquid crystal panel according to an embodiment of the present invention.
  • 1 is a schematic structural view of an array substrate according to an embodiment of the present invention.
  • 2 is a flow chart of a method of fabricating an array substrate in accordance with an embodiment of the present invention.
  • a transparent substrate 10 is provided.
  • the transparent substrate 10 may be a transparent glass substrate or a transparent resin substrate; however, the invention is not limited thereto.
  • step S2 the gate line 20, the gate electrode 30, and the storage electrode line 40 are formed on the transparent substrate 10 by using a metal material; wherein the gate electrode 30 is connected to the gate line 20 to receive the gate signal from the gate line 20.
  • the storage electrode line 40 is electrically insulated from both the gate line 20 and the gate 30.
  • the metal material herein may be, for example, chromium, molybdenum or the like; however, the invention is not limited thereto.
  • the data line 50, the source 60a, and the drain 60b are formed on the transparent substrate 10 by using a metal material.
  • the gate electrode 30, the source electrode 60a, and the drain electrode 60b constitute a thin film transistor.
  • the data line 50, the source 60a, the drain 60b and the gate line 20, the gate 30, and the storage electrode line 40 Not in the same layer; that is, an insulating layer (not shown) is formed between the data line 50, the source 60a, the drain 60b, the gate line 20, the gate 30, and the storage electrode line 40.
  • the metal material herein may be, for example, chromium, molybdenum or the like; however, the invention is not limited thereto.
  • the gate line 20 and the data line 50 are insulated from each other and intersect each other to be viewed in a plan view to define the pixel area A.
  • the storage electrode line 40 is located in the pixel area A, the source 60a is connected to the data line 50, and the drain 60 extends into the pixel area A to be opposed to the storage electrode line 40 and insulated.
  • the drain 60 extending into the pixel region A forms a storage capacitor with the storage electrode line 40.
  • the common electrode 70 is formed on the transparent substrate 10 by using a transparent conductive material; wherein the common electrode 70 is located above the gate line 20, the data line 50, and the thin film transistor, and the common electrode 70 and the gate line 20, data An insulating layer (not shown) is formed between the line 50 and the thin film transistor, that is, the common electrode 70 is insulated from the gate line 20, the data line 50, and the thin film transistor.
  • the transparent conductive material may be indium tin oxide ITO; however, the invention is not limited thereto.
  • the thickness of the insulating layer between the common electrode 70 and the data line 50 can be 2 um to 3 um, the parasitic capacitance between the common electrode 70 and the data line 50 is small, and the influence on the signal delay is limited.
  • the pixel electrode 80 is formed in the pixel region A by using a transparent conductive material; wherein the pixel electrode 80 is connected to the drain electrode 60 extending into the pixel region A through the via hole 90.
  • the transparent conductive material may be indium tin oxide ITO; however, the invention is not limited thereto.
  • step S5 and step S4 may be performed simultaneously, or step S5 may be performed before step S4.
  • this embodiment is described by using a thin film transistor as an example of a three-terminal switching element, wherein the control terminal of the switching element is the gate of the thin film transistor, the input end of the switching element is the source of the thin film transistor, and the output of the switching element The terminal is the drain of the thin film transistor; however, the invention is not limited thereto.
  • FIG 3 is a schematic structural view of a liquid crystal panel according to an embodiment of the present invention.
  • a liquid crystal panel includes a color filter substrate (ie, CF substrate) 100, an array substrate 200, and a liquid crystal layer 300 according to an embodiment of the present invention.
  • the array substrate 200 is the array substrate shown in FIG. 1 or is fabricated by the manufacturing method shown in FIG. 2 .
  • Array substrate is the array substrate shown in FIG. 1 or is fabricated by the manufacturing method shown in FIG. 2 .
  • the color filter substrate 100 and the array substrate 200 are provided to the cartridge.
  • the color filter substrate 100 includes necessary components such as RGB three-color color resist, black matrix, and the like
  • the array substrate 200 includes necessary components such as a thin film transistor, a pixel electrode, and the like; A basic concrete structure, so I won't go into details here.
  • the liquid crystal layer 300 is interposed between the color filter substrate 10 and the array substrate 200.
  • the liquid crystal layer 300 has a plurality of liquid crystal molecules in which liquid crystal molecules are deflected in accordance with an energization voltage.
  • the array substrate and the method for fabricating the same form a storage capacitor extending from the drain and the storage electrode line in the pixel region compared to the prior art, thereby eliminating the need for a dedicated storage capacitor. And removing the shading lines on both sides of the data line can increase the pixel aperture ratio, thereby improving the display brightness of the liquid crystal panel.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种阵列基板及其制作方法和液晶面板，所述阵列基板包括：透明基板（10）；设置在透明基板（10）上的栅极线（20）、数据线（50）和存储电极线（40），栅极线（20）和数据线（50）彼此绝缘交叉以限定出像素区域（A），存储电极线（40）位于像素区域（A）中；设置在栅极线（20）和数据线（50）的交叉处的开关元件，开关元件的控制端、输入端分别连接至栅极线（20）和数据线（50），其输出端延伸至像素区域（A）中以与存储电极线（40）相对且绝缘设置。与现有技术相比，所述阵列基板利用延伸至像素区域（A）中的漏极（60b）与存储电极线（40）形成存储电容，无需专设一存储电容，且将数据线（50）两侧的遮光线去除，能够提高像素开口率，从而提升液晶面板的亮度。

Description

阵列基板及其制作方法 技术领域
本发明属于液晶显示技术领域，具体地讲，涉及一种阵列基板及其制作方法。
背景技术
随着光电与半导体技术的演进，也带动了平板显示器(Flat Panel Display)的蓬勃发展，而在诸多平板显示器中，液晶显示器(Liquid Crystal Display，简称LCD)因具有高空间利用效率、低消耗功率、无辐射以及低电磁干扰等诸多优越特性，已成为市场的主流。
随着对液晶显示器的亮度、视角、对比度、响应速度等特性的要求越来越高，更多的液晶显示器由TN型转到IPS(或FFS)型或者VA型。而随着液晶显示器的精细度的提高，其像素的尺寸越来越小，如此，像素的开口率也会越来越小，这样会影响液晶显示器的显示亮度。
此外，在现有的液晶显示器中，在像素内专设一存储电容，并设置遮光线来遮蔽数据线及像素电极边缘的漏光，这将会进一步地减小像素的开口率。
因此，现有技术有待改进和发展。
发明内容
为了解决上述现有技术存在的问题，本发明的目的在于提供一种阵列基板，其包括：透明基板；设置在所述透明基板上的栅极线、数据线和存储电极线，所述栅极线和所述数据线彼此绝缘并相互交叉，以限定出像素区域，所述存储电极线位于所述像素区域中；设置在所述栅极线和所述数据线的交叉处的开关元件，所述开关元件包括：控制端、输入端和输出端，所述控制端连接至所述栅极线，所述输入端连接至所述数据线，所述输出端延伸至所述像素区域中，以与所述存储电极线相对且绝缘设置。
进一步地，所述开关元件为薄膜晶体管，其中，所述开关元件的控制端为薄膜晶体管的栅极，所述开关元件的输入端为薄膜晶体管的源极，所述开关元件的输出端为薄膜晶体管的漏极。
进一步地，所述阵列基板还包括：设置在所述栅极线、所述数据线及所述开关元件之上的公共电极。
进一步地，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极位于延伸至所述像素区域中的所述输出端之上，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
进一步地，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
本发明的另一目的还在于提供一种阵列基板的制作方法，其包括步骤：A、提供一透明基板；B、在所述透明基板上形成栅极线、栅极和存储电极线；其中，所述栅极与所述栅极线连接；C、在所述透明基板上形成数据线、源极和漏极；所述栅极线和所述数据线彼此绝缘并相互交叉，以限定出像素区域；所述存储电极线位于所述像素区域中，所述源极与所述数据线连接；所述漏极延伸至所述像素区域中，以与所述存储电极线相对且绝缘设置。
进一步地，所述制作方法还包括步骤：D、利用透明导电材料在所述栅极线、所述数据线及所述开关元件之上形成公共电极；其中，所述公共电极与所述栅极线、所述数据线及所述开关元件均绝缘。
进一步地，所述制作方法还包括步骤：E、利用透明导电材料在所述像素区域中形成像素电极；其中，所述像素电极通过过孔与延伸至所述像素区域中的漏极连接。
进一步地，所述步骤D和所述步骤E同时进行，或者所述步骤E在所述步骤D之前进行。
本发明的有益效果：与现有技术相比，本发明利用延伸至像素区域中的漏极与存储电极线形成存储电容，无需专设一存储电容，并且将数据线两侧的遮光线去除，能够提高像素开口率，从而提升液晶面板的显示亮度。
附图说明
通过结合附图进行的以下描述，本发明的实施例的上述和其它方面、特点和优点将变得更加清楚，附图中：
图1是根据本发明的实施例的阵列基板的结构示意图；
图2是根据本发明的实施例的阵列基板的制作方法的流程图；
图3是根据本发明的实施例的液晶面板的结构示意图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。在附图中，为了清楚起见，夸大了层和区域的厚度。
将理解的是，在一层或元件被称为在或形成在另一层或基板“之上”或“上”时，它可以直接在或形成在该另一层或基板上，或者也可以存在中间层。
图1是根据本发明的实施例的阵列基板的结构示意图。图2是根据本发明的实施例的阵列基板的制作方法的流程图。
参照图1和图2，在步骤S1中，提供一透明基板10。在本实施例中，透明基板10可以是透明的玻璃基板或者透明的树脂基板；但本发明并不限制于此。
在步骤S2中，利用金属材料在透明基板10上形成栅极线20、栅极30和存储电极线40；其中，栅极30与栅极线20连接，以从栅极线20接收栅极信号。这里，应当理解的是，存储电极线40与栅极线20和栅极30均电绝缘。此外，这里的金属材料可例如是铬、钼等；但本发明并不限制于此。
在步骤S3中，利用金属材料在透明基板10上形成数据线50、源极60a和漏极60b。这样，栅极30、源极60a和漏极60b构成薄膜晶体管。应当说明的是，数据线50、源极60a、漏极60b与栅极线20、栅极30、存储电极线40 不在同一层；即在数据线50、源极60a、漏极60b与栅极线20、栅极30、存储电极线40之间形成绝缘层(未示出)。此外，这里的金属材料可例如是铬、钼等；但本发明并不限制于此。
进一步地，以俯视角度观看，栅极线20和数据线50彼此绝缘并相互交叉，以限定出像素区域A。存储电极线40位于像素区域A中，源极60a与数据线50连接；漏极60延伸至像素区域A中，以与存储电极线40相对且绝缘设置。这样，延伸至像素区域A中的漏极60与存储电极线40形成存储电容。
在步骤S4中，利用透明导电材料在透明基板10上形成公共电极70；其中，公共电极70位于栅极线20、数据线50及薄膜晶体管之上，并且公共电极70与栅极线20、数据线50及薄膜晶体管之间形成绝缘层(未示出)，即公共电极70与栅极线20、数据线50及薄膜晶体管都绝缘。此处，透明导电材料可采用氧化铟锡ITO；但本发明并不限制于此。这里，由于公共电极70与数据线50之间的绝缘层的厚度可达2um～3um，因此公共电极70与数据线50之间的寄生电容较小，对信号延迟的影响较为有限。
在步骤S5中，利用透明导电材料在像素区域A中形成像素电极80；其中，像素电极80通过过孔90与延伸至像素区域A中的漏极60连接。此处，透明导电材料可采用氧化铟锡ITO；但本发明并不限制于此。
需要说明的是，作为本发明的其他实施例，步骤S5和步骤S4可以同时进行，或者步骤S5在步骤S4之前进行。
进一步地，本实施例以薄膜晶体管作为三端开关元件的一个示例进行说明，其中，开关元件的控制端为薄膜晶体管的栅极，开关元件的输入端为薄膜晶体管的源极，开关元件的输出端为薄膜晶体管的漏极；但本发明并不限制于此。
图3是根据本发明的实施例的液晶面板的结构示意图。
参照图3，根据本发明的实施例的液晶面板根据本发明的实施例的液晶面板包括：彩色滤光片基板(即CF基板)100、阵列基板200、液晶层300。其中，阵列基板200为图1所示的阵列基板或者为由图2所示的制作方法制作出 的阵列基板。
彩色滤光片基板100与阵列基板200对盒设置。在本实施例中，彩色滤光片基板100包括：RGB三色色阻、黑色矩阵等必要的部件，而阵列基板200包括：薄膜晶体管、像素电极等必要的部件；由于本发明并不是针对这两个基本具体的结构，因此这里不再赘述。
液晶层300夹设于彩色滤光片基板10与阵列基板200之间。液晶层300中具有多个液晶分子，其中，液晶分子根据通电电压进行偏转。
综上所述，根据本发明的实施例的阵列基板及其制作方法，与现有技术相比，其延伸至像素区域中的漏极与存储电极线形成存储电容，从而无需专设一存储电容，并且将数据线两侧的遮光线去除，能够提高像素开口率，从而提升液晶面板的显示亮度。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (12)

  1. 一种阵列基板，其中，包括：
    透明基板；
    设置在所述透明基板上的栅极线、数据线和存储电极线，所述栅极线和所述数据线彼此绝缘并相互交叉，以限定出像素区域，所述存储电极线位于所述像素区域中；
    设置在所述栅极线和所述数据线的交叉处的开关元件，所述开关元件包括：控制端、输入端和输出端，所述控制端连接至所述栅极线，所述输入端连接至所述数据线，所述输出端延伸至所述像素区域中，以与所述存储电极线相对且绝缘设置。
  2. 根据权利要求1所述的阵列基板，其中，所述开关元件为薄膜晶体管，其中，所述开关元件的控制端为薄膜晶体管的栅极，所述开关元件的输入端为薄膜晶体管的源极，所述开关元件的输出端为薄膜晶体管的漏极。
  3. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括：设置在所述栅极线、所述数据线及所述开关元件之上的公共电极。
  4. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括：设置在所述栅极线、所述数据线及所述开关元件之上的公共电极。
  5. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极位于延伸至所述像素区域中的所述输出端之上，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
  6. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极位于延伸至所述像素区域中的所述输出端之上，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
  7. 根据权利要求3所述的阵列基板，其中，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
  8. 根据权利要求4所述的阵列基板，其中，所述阵列基板还包括：设置在所述像素区域中所述的像素电极；其中，所述像素电极通过过孔与延伸至所述像素区域中的所述输出端连接。
  9. 一种阵列基板的制作方法，其中，包括步骤：
    A、提供一透明基板；
    B、在所述透明基板上形成栅极线、栅极和存储电极线；其中，所述栅极与所述栅极线连接；
    C、在所述透明基板上形成数据线、源极和漏极；所述栅极线和所述数据线彼此绝缘并相互交叉，以限定出像素区域；所述存储电极线位于所述像素区域中，所述源极与所述数据线连接；所述漏极延伸至所述像素区域中，以与所述存储电极线相对且绝缘设置。
  10. 根据权利要求9所述的阵列基板的制作方法，其中，还包括步骤：
    D、利用透明导电材料在所述栅极线、所述数据线及所述开关元件之上形成公共电极；其中，所述公共电极与所述栅极线、所述数据线及所述开关元件均绝缘。
  11. 根据权利要求10所述的阵列基板的制作方法，其中，还包括步骤：
    E、利用透明导电材料在所述像素区域中形成像素电极；其中，所述像素电极通过过孔与延伸至所述像素区域中的漏极连接。
  12. 根据权利要求11所述的阵列基板的制作方法，其中，所述步骤D和所述步骤E同时进行，或者所述步骤E在所述步骤D之前进行。
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