WO2017118212A1 - 显示面板测试方法及测试装置 - Google Patents

显示面板测试方法及测试装置 Download PDF

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Publication number
WO2017118212A1
WO2017118212A1 PCT/CN2016/105212 CN2016105212W WO2017118212A1 WO 2017118212 A1 WO2017118212 A1 WO 2017118212A1 CN 2016105212 W CN2016105212 W CN 2016105212W WO 2017118212 A1 WO2017118212 A1 WO 2017118212A1
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Prior art keywords
sensing
unit
signal
test
voltage value
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PCT/CN2016/105212
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English (en)
French (fr)
Inventor
徐攀
袁广才
李永谦
韩东旭
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京东方科技集团股份有限公司
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Priority to US15/540,752 priority Critical patent/US10565909B2/en
Publication of WO2017118212A1 publication Critical patent/WO2017118212A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10—Dealing with defective pixels

Definitions

  • Embodiments of the present invention relate to a test method and apparatus for a display panel.
  • Mura display uneven brightness
  • AMOLED Active-Matrix Organic Light Emitting Diode
  • threshold voltage drift of a thin film transistor, aging of an OLED device, and process differences between different pixels may cause light emission between different pixels.
  • the difference in brightness, showing dark spots, dark areas or streaks on the screen seriously affects the normal picture display effect.
  • the appearance of the illuminating condition does not reflect the slight difference in brightness between the pixels, so it is easy to cause a poor leakage of Mura.
  • the inspection causes the sample with such a bad type to enter the subsequent process, resulting in waste of manpower and material resources.
  • Embodiments of the present invention provide a test method and apparatus for a display panel, which can solve the problem that the Mura defect is easily missed in the production process of the existing display device.
  • an embodiment of the present invention provides a test method for a display panel, the display panel including: a plurality of pixel regions, each of the pixel regions includes a light emitting element, and the light emitting element is coupled to a switch unit,
  • the switching unit is configured to conduct a voltage at the first end of the light emitting element to the second end of the switching unit when the first end of the switching unit is at an active level;
  • the scanning unit is connected to the plurality of first scan lines And a sensing unit connected to the plurality of columns of sensing lines; wherein the first end of any one of the switching units is connected to the first scanning line Drawing a line, the second end of any of the switch units is connected to a column of the sensing lines, and any two switching units connected to the first scan line of the same row are connected to different columns of sensing lines,
  • the test method includes:
  • the sensing signal including voltage value information of a first end of each of the light emitting elements, wherein the voltage value information is coordinated by the sensing unit Setting a timing to receive a voltage signal from a plurality of columns of sensing lines;
  • comparing the voltage value information of the first end of each of the sensing elements to the preset test screen to obtain a test result includes: according to the preset test screen Calculating a standard voltage value of the first end of each of the light emitting elements;
  • the abnormal signal is received, and a pixel corresponding to the position coordinate and the abnormal signal is displayed as an abnormal pixel in the detection result screen.
  • the sensing signal of the receiving sensing unit includes: performing one or more of the following processing on the received sensing signal: signal distortion compensation, filtering, power amplification, analog to digital conversion.
  • the switching unit includes a third transistor, a gate of the third transistor is connected to one row of the first scan line, and one of a source and a drain is connected to a first end of the light emitting element, and One connects a column of the sensing lines.
  • the plurality of pixel regions are arranged in rows and columns; any one of the first scan lines is located between pixel regions of two adjacent rows; any one of the sensing lines is located in a pixel region of two adjacent columns between.
  • another embodiment of the present invention provides a testing device for a display panel, the display panel including: a plurality of pixel regions, each of the pixel regions including a light emitting element and the light emitting element connected to a switch unit, The switching unit is configured to conduct a voltage at a first end of the light emitting element to a second end of the switching unit when the first end of the switching unit is at an active level; a scanning unit, and a plurality of rows of first scan lines And a sensing unit connected to the plurality of columns of sensing lines; wherein the first end of any one of the switching units is connected to a row of the first scanning lines, and the second end of any one of the switching units is connected to a column Sensing lines, and any two switching units connected to the first scanning line of the same row are connected to different columns of sensing lines,
  • the test device includes:
  • a first output unit configured to output a data signal of the preset test screen to the display panel to cause the plurality of light emitting elements to emit light according to the preset test screen
  • a second output unit configured to output an activation signal to the scanning unit to cause the scanning unit to sequentially output an effective level of the switching unit to the plurality of rows of first scan lines according to a preset timing
  • a receiving unit configured to receive a signal from the sensing unit to generate a sensing signal, the sensing signal including voltage value information of a first end of each of the light emitting elements, the voltage value information passing through the transmitting Receiving, by the sensing unit, the voltage signals from the plurality of columns of sensing lines in conjunction with the preset timing;
  • a comparing unit configured to compare voltage value information of the first end of each of the sensing elements with the preset test screen to obtain a test result.
  • the receiving unit is configured to perform processing of one or more of the following on the received signal: signal distortion compensation, filtering, power amplification, analog to digital conversion.
  • the comparing unit includes:
  • a calculation module configured to calculate, according to the preset test picture, a standard voltage value of the first end of each of the light emitting elements
  • a comparison module configured to compare a voltage value of the first end of each of the light emitting elements with the standard voltage value and generate an abnormal signal when the difference exceeds a preset threshold
  • a display module configured to receive the abnormal signal and position the detection result screen The pixel whose coordinates correspond to the abnormal signal is indicated as an abnormal pixel.
  • the switching unit includes a third transistor, a gate of the third transistor is connected to one row of the first scan line, and one of a source and a drain is connected to a first end of the light emitting element, and One connects a column of the sensing lines.
  • the plurality of pixel regions are arranged in rows and columns; any one of the first scan lines is located between pixel regions of two adjacent rows; any one of the sensing lines is located in a pixel region of two adjacent columns between.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • FIG. 2 is a circuit structural diagram of a display panel in a pixel area according to an embodiment of the present invention
  • FIG. 3 is a structural block diagram of a display panel testing device according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a data comparator in a display panel testing device according to an embodiment of the present invention.
  • FIG. 5 is a schematic flow chart of steps of a display panel testing method according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • the display panel includes a plurality of light emitting elements L0 disposed in a plurality of pixel regions P0, respectively.
  • the illuminating element can be any kind of electronic device that can be used for illuminating display, such as an Organic Light-Emitting Diode (OLED) or a Semiconductor Light Emitting Diode (LED).
  • OLED Organic Light-Emitting Diode
  • LED Semiconductor Light Emitting Diode
  • FIG. 1 only takes a pixel area of four rows and five columns as an example. In an actual application scenario, the number of pixel regions and the number of light-emitting elements can be set according to display requirements.
  • the display panel further includes a switch unit 11, a scanning unit 12, and a sensing unit 13.
  • the switch unit 11 is disposed in each of the pixel regions P0, and is configured to be the first end of the light-emitting element L0 when the first end of the switch unit 11 (such as the upper end of the switch unit 11 in FIG. 1) is at an active level (as in FIG. 1).
  • the voltage at the upper end of the light-emitting element L0 is conducted to the second end of the switching unit 11 (such as the right end of the switching unit 11 in FIG. 1).
  • the effective level is a parameter of the switch unit 11 and may include one or more voltage value ranges; thus, the above functions of the switch unit 11 may be implemented by existing electronic components or a combination thereof, for example.
  • a Hall switch, a transistor or a digital switch circuit, etc. can be selected and set by a person skilled in the art as needed, and the embodiment of the present invention does not limit this.
  • the scanning unit 12 is connected to a plurality of rows of first scanning lines (four rows of first scanning lines such as G1, G2, G3, and G4 shown in FIG. 1), and is configured to be in accordance with a preset timing.
  • the active level of the switching unit 11 is output to the plurality of rows of first scanning lines.
  • the first end of any of the switching units 11 is connected to a row of first scanning lines, whereby during the scanning unit 12 outputs the effective level of the switching unit 11 to the first scanning line of any row, All of the switching elements 11 connected to the first scanning line can conduct the voltage at the first end of the light-emitting element L0 in the pixel region P0 to the second end of the switching unit 11.
  • the preset timing includes a duration of outputting the active level to each of the first scan lines of each row, and a sequence of outputting the active levels to the plurality of first scan lines.
  • the foregoing functions of the scanning unit 12 can be implemented by an existing signal generating circuit or a modification thereof, such as using a multi-stage shift register to sequentially output the first scan line of each row under the action of a clock signal.
  • the effective level can be selected and set by a person skilled in the art as needed, and the embodiment of the present invention does not limit this.
  • the sensing unit 13 is connected to the multi-column sensing lines (the five sensing lines such as S1, S2, S3, S4, and S5 shown in FIG. 1), and is configured to cooperate with the preset. Timing receives voltage signals from multiple columns of sense lines. At the same time, as shown in FIG. 1, the second end of any one of the switch units 11 is connected to a column of sensing lines, and any two of the switching units connecting the first scan lines of the same row are connected to the different columns of the sensing. line.
  • the multi-column sensing lines the five sensing lines such as S1, S2, S3, S4, and S5 shown in FIG. 1
  • the sensing unit 13 can be connected to the switching unit 11
  • the sense line receives its voltage signal to obtain a specific value of the voltage at the first end of the light-emitting element L0. It should be noted that, since the turn-on time and sequence of the switching element 11 are determined by the preset timing, the sensing unit 13 needs to cooperate with the preset timing to implement all the light-emitting elements L0 through the multi-column sensing lines in a predetermined order. Acquisition of the specific value of the voltage at the first end.
  • the function of the sensing unit 13 can be implemented by an existing signal acquisition circuit or a modification thereof.
  • the sensing unit 13 can sequentially include a buffer (buffer) and a mode in the receiving sequence of the voltage signal.
  • An analog-to-digital converter (ADC) and a memory can be selected and set by a person skilled in the art as needed, and the embodiment of the present invention does not limit this.
  • the embodiment of the present invention can realize the acquisition of the voltage value at the first end of the light-emitting element based on the setting of the switch unit, the first scan line and the sensing line in the display panel; thus, during the test By comparing the difference between this voltage value and the theoretical value, the detection of poor Mura can be achieved.
  • the embodiment of the invention directly detects the existence of the poor Mura with the quantified value, not only has higher accuracy, but also can realize the automation of the detection process, and is beneficial to improve the efficiency of the testing process in the process flow.
  • a plurality of pixel regions P0 are arranged in rows and columns, and any row of first scan lines is located between pixel regions P0 of two adjacent rows, and any column is transmitted.
  • the sense line is located between the pixel areas P0 of the adjacent two columns. Therefore, the manner of setting the first scan line and the sensing line in the embodiment of the present invention may be consistent with the arrangement manner of the gate line and the data line in the conventional display panel, which is advantageous for reducing the difficulty of wiring and realizing the scan driving circuit and the data driving. Reuse of circuits.
  • the arrangement of the pixel regions P0 may not be strictly arranged in a matrix manner, for example, a row-to-interlace or a column-to-interlace arrangement may be adopted.
  • the second end of any switch unit since the first end of any one of the switch units of the display panel is connected to the first scan line, the second end of any switch unit is connected to a column of sensing lines, so as long as the first line is satisfied with the same line Any two switching units connected to the scan line are connected to different columns of sensing lines. Under the condition, the acquisition of the voltage value at the first end of the plurality of light-emitting elements in the display panel can be realized and the problem that the Mura defect is easily missed can be solved, which is not limited by the embodiment of the present invention.
  • each pixel region may be provided with a first end of the light-emitting element L0 (such as the upper end of the light-emitting element L0 in FIG. 2).
  • the second scan line can be provided with multiple rows and is arranged in pairs with the plurality of rows of first scan lines shown in FIG. 1; the data lines can be provided with multiple columns and scanned with multiple columns as shown in FIG. Lines are set in pairs.
  • any row of second scan lines may be located between adjacent two rows of pixel regions; any column of data lines may be located between adjacent two columns of pixel regions.
  • the pixel circuit 14 in the pixel region shown in FIG. 2 is connected to the second scan line Gm' and the data line Dn, wherein the second scan line Gm' and the first scan line Gm are a pair of parallel rows.
  • the wire, and the data line Dn and the sensing line Sn are a pair of column guide lines arranged in parallel. It can be understood that, as the plurality of rows of second scan lines output the active level row by row, any pixel circuit can be an active level on the connected second scan line according to the data voltage of the connected data line.
  • the amplitude provides a drive current to the light-emitting elements in the pixel area.
  • the setting of the driving current of the light-emitting elements in each pixel region can be completed with an appropriate timing cooperation, thereby realizing the light-emitting display of the entire display panel.
  • the second scan line and the data line may have different configurations (for example, different numbers or positions) in other embodiments of the present invention, and the embodiment of the present invention does not limit this. .
  • the circuit structure of the pixel circuit 14 may include a first transistor T1, a second transistor T2, and a first capacitor C1, wherein the gate of the first transistor T1 is connected to the first capacitor C1.
  • One end, one of the source and the drain is connected to the bias voltage line VDD, the other is connected to the second end of the first capacitor C1 and the first end L0 of the light emitting element; the gate of the second transistor T2 is connected to the second scan of the line The line Gm'; one of the source and the drain is connected to one column of the data line Dn, and the other is connected to the first end of the first capacitor C1. It can be understood that the upper end of the first capacitor C1 in FIG.
  • the electrode of the first transistor T1 connected to the bias voltage line VDD is the drain, and the second electrode of the first capacitor C1.
  • the electrode connected to the terminal is a source; the electrode connected to the data line Dn of the second transistor T2 is a drain.
  • the electrode connected to the first end of the first capacitor C1 is the source.
  • the connection relationship between the source and the drain needs to be exchanged with each other; and, for example, when the transistor has a source and a drain symmetrical
  • the source and the drain can be regarded as two electrodes which are not particularly distinguished.
  • the second transistor T2 when the second scan line Gm' outputs the active level of the pixel circuit 14 - high level (determined by the device characteristics of the N-type second transistor T2), the second transistor T2 can be turned on, so that the data line Dn
  • the upper data voltage charges the first capacitor C1; thus, the voltage difference between the gate and the source of the first transistor T1 operating in the linear region (the maximum current flowing through the drain and source of the first transistor T1 can be determined)
  • the size is determined by the amount of charge stored by the first capacitor C1, that is, indirectly determined by the magnitude of the data voltage on the data line Dn, and thus the first transistor T1 can be at the bias voltage line VDD (a light-emitting element can be applied)
  • the bias high voltage ELVDD) and the common voltage line connected to the second end of the light emitting element L0 (the bias low voltage ELVSS to which the light emitting element can be applied) form a driving current whose magnitude is determined by the magnitude of the data voltage.
  • the pixel circuit 14 may have further additional structures in the other embodiments of the present invention or have other different circuit structures.
  • the configuration of the pixel circuit in the conventional OLED display device may be set. The embodiment does not limit this.
  • the switching unit 11 may include a third transistor T3 whose gate is connected to the first scan line Gm, and one of the source and the drain is connected to the light emitting element L0. The other end is connected to the sensing line Sn. It can be understood that although the third transistor T3 shown in FIG.
  • the electrode connected to the sensing line Sn is the source and the electrode connected to the first end of the light-emitting element L0 is the drain
  • it may also be a P-type transistor (the electrode connected to the sensing line Sn is a drain, and the electrode connected to the first end of the light-emitting element L0 is a source), which is an embodiment of the present invention.
  • the transistor has a structure in which the source and the drain are symmetrical, the source and the drain can be regarded as two electrodes which are not particularly distinguished.
  • the third transistor T3 can turn on its source and drain, thereby The function of the above-described switching unit 11 is achieved. It can be understood that the process of forming the above-mentioned switching unit 11 by using a transistor can be adapted to the manufacturing process of the existing display panel, which is advantageous for cost reduction and performance improvement.
  • the anode of the diode is used as the first end of the light-emitting element, and in other embodiments of the present invention, the cathode of the diode may be used as the light-emitting element.
  • an embodiment of the present invention further provides a display device including any of the foregoing display panels.
  • the display device may be any product or component having a display function, such as an electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, etc., for example, may be an OLED display, and the present invention The embodiment does not limit this. Since the display device includes any of the foregoing display panels, it is also possible to automatically automate the detection process, which is advantageous for improving the efficiency of the test process in the process flow.
  • FIG. 3 is a structural block diagram of a display panel testing apparatus suitable for any of the foregoing display panels according to an embodiment of the present invention.
  • the test apparatus includes a first output unit 31, a second output unit 32, a receiving unit 33, and a comparison unit 34.
  • the first output unit 31 is configured to output a data signal of the preset test screen to the display panel, so that the plurality of light emitting elements emit light according to the preset test screen;
  • the second output unit 32 is configured to output a start signal to the scan unit, so that the scan unit sequentially outputs the active level of the switch unit to the plurality of rows of first scan lines according to a preset timing;
  • the receiving unit 33 is configured to receive a signal from the sensing unit to generate a sensing signal, the sensing signal including voltage value information of the first end of each of the light emitting elements;
  • the comparison unit 34 is configured to compare the sensing signal with a preset test picture to obtain a test result.
  • the first output unit 31 may include a test picture signal source connected to the display signal input port of the display panel, so that the display of the preset test screen (for example, a monochrome picture, a striped picture, a preset picture picture, etc.) may be displayed.
  • the signal acts on the illumination control of the light emitting element such that the plurality of light emitting elements in the display panel emit light according to the preset test screen.
  • the second output unit 32 may include a pulse signal generator so that a pulse signal as an enable signal can be output to a scanning unit including the multi-stage shift register unit for a specific first period of time, so that each of the subsequent signals
  • the scanning unit outputs the effective level of the above switching unit to one of the plurality of rows of the first scanning lines in the period of time.
  • the sensing unit 13 can receive a set of voltage values through the multi-column scan lines in each time period and store them in an internal memory in order.
  • the receiving unit 33 may include a reading component of the memory in the sensing unit, so that the numbers may be generated in order.
  • a sensing signal the sensing signal includes information of a voltage value of the first end of the light emitting element in each column of each row of pixels (that is, a position identifier of a pixel region where any of the light emitting elements are located and a voltage value of the light emitting element For example, a signal formed by a plurality of sub-pulses whose amplitudes represent voltage values).
  • the receiving unit 33 can be configured to perform one or more of the following processing on the received signal: signal distortion compensation, filtering, power amplification, analog to digital conversion. It can be understood that the parasitic capacitance effect on the sensing line affects the reading speed and causes signal attenuation and output signal distortion, so the signal processing performed in the receiving unit can eliminate the influence of the sensing signal in these aspects. Improve the accuracy of the test.
  • the comparing unit 34 Detection of poor Mura (display brightness unevenness) can be achieved by, for example, a signal comparison circuit. For example, when Mura is defective, the actual measured value of the voltage at the first end of the light-emitting element in the pixel region at the fault point is significantly deviated from the standard voltage value, so that the detection of Mura failure can be performed by this.
  • the comparison unit 34 described above may include a calculation module 34a, a comparison module 34b, and a display module 34c.
  • the calculation module 34a is configured to calculate a standard voltage value of the first end of each of the light emitting elements according to the preset test picture;
  • the comparison module 34b is configured to set a voltage value of the first end of each of the light emitting elements Comparing with the standard voltage value, and generating an abnormal signal when the difference exceeds a preset threshold;
  • the display module 34c is configured to receive the abnormal signal, and the pixel corresponding to the abnormality signal in the detection result screen Displayed as anomalous pixels.
  • the calculation module 34a may include a logic operation circuit with a fixed operation relationship for converting the input display signal to the standard voltage value of the first end of each of the light-emitting elements in the form of, for example, a digital signal.
  • the comparison module 34b may include one or more data comparators as shown in FIG. 4 to achieve a comparison between the actual measured voltage and the standard voltage value.
  • each voltage value Vs in the sensing signal can be input to the two input ends of the data comparator respectively corresponding to the standard voltage value Vd obtained by the calculation module 34a, whereby the voltage difference of the data comparator output Vout reflects the difference between the actual measured value of the voltage at the first end of the light-emitting element L0 and the standard voltage value.
  • the comparison module 34b can generate an abnormal signal to indicate the driving voltage of the light-emitting element in a certain pixel region. An exception has occurred.
  • the display module 34c The abnormal signal can be processed into the detection result screen by the structure of the logic operator, and the presence of the abnormal pixel can be marked at the corresponding position coordinate by any display manner such as red, lighting, blinking, etc., to be as intuitive as possible. The ground is shown to the inspector whether the voltage applied to the light-emitting element is normal.
  • the data comparator shown in FIG. 4 may be a difference calculation circuit under the digital circuit, or may be The differential amplifier under the analog circuit can also realize the numerical comparison of the two voltages, so that the function of the comparison unit 34 can be realized by the processing of the analog signal, which is not limited by the embodiment of the present invention.
  • the test apparatus of the embodiment of the present invention can cooperate with the display panel of any one of the above to implement the detection of the poor Mura, and can solve the problem that the Mura is difficult to be missed, which not only has higher accuracy, but also can be Automating the inspection process is beneficial to improve the efficiency of the testing process in the process.
  • FIG. 5 is a schematic flow chart of steps of a display panel testing method according to an embodiment of the present invention.
  • the test method is based on any one of the above display panels, and includes the following operations:
  • Step 501 Output a data signal of a preset test screen to the display panel, so that the plurality of light-emitting elements emit light according to the preset test screen;
  • Step 502 Output a start signal to the scan unit, so that the scan unit sequentially outputs the active level of the switch unit to the plurality of rows of first scan lines according to a preset timing;
  • Step 503 Receive a sensing signal from the sensing unit, where the sensing signal includes voltage value information of the first end of each of the light emitting elements;
  • Step 504 Compare voltage value information of the first end of each of the light-emitting elements in the sensing signal with a preset test screen to obtain a test result.
  • the steps 501 to 504 correspond to the functions of the first output unit 31, the second output unit 32, the receiving unit 33, and the comparison unit 34, respectively, and thus may have corresponding specific implementation manners, and details are not described herein again.
  • the testing method of the embodiment of the present invention can cooperate with the display panel of any one of the above to implement the poor detection of the Mura, and can solve the problem that the Mura is not easy to miss, and not only has higher accuracy, but also can be Automating the inspection process is beneficial to improve the efficiency of the testing process in the process.

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板的测试方法及装置。该测试方法包括：向显示面板输出预设测试画面的数据信号以使多个发光元件（L0）按照预设测试画面发光；向显示面板内的扫描单元（12）输出启动信号以使扫描单元（12）按照预设时序依次向连接的多行第一扫描线（Gm）输出开关单元（11）的有效电平；接收来自传感单元（13）的传感信号，包括每一发光元件（L0）的第一端的电压值信息；将电压值信息与预设测试画面进行比较以得到测试结果。该测试方法可以解决Mura不良容易漏检的问题，不仅具有更高的准确程度，还可以实现检测过程的自动化，有利于提高工艺流程中测试过程的进行效率。

Description

显示面板测试方法及测试装置 技术领域
本发明的实施例涉及一种显示面板的测试方法及装置。
背景技术
现有显示装置的生产工艺中很容易出现比如Mura(显示亮度不均匀)这种严重影响显示效果的不良。例如在AMOLED(Active-Matrix Organic Light Emitting Diode，有源矩阵有机发光二极体)显示装置中，薄膜晶体管的阈值电压漂移、OLED器件的老化以及不同像素间工艺差异等都可能导致不同像素间发光亮度的差异，在画面上呈现出暗点、暗区或者条纹，严重影响正常的画面显示效果。为避免出现该类不良的显示面板按照正常流程制成产品并流通向市场从而导致人力和物力上的浪费，需要在生产过程中非常准确而及时地检测出具有该类不良的样品。对此，虽然可以通过点灯测试从外观上检测出一些明显的Mura不良，但是外观上的发光情况并不能详尽地反映出像素之间在亮度上的细微的差别，因此很容易造成Mura不良的漏检，使得具有该类不良的样品进入到之后的工序中，造成人力和物力上的浪费。
发明内容
本发明的实施例提供一种显示面板的测试方法及装置，可以解决现有显示装置生产工艺中Mura不良容易漏检的问题。
为实现上述目的，本发明的实施例采取以下技术方案。
第一方面，本发明的一个实施例提供了一种显示面板的测试方法，所述显示面板包括：多个像素区域，每一像素区域包括发光元件并且所述发光元件连接一开关单元，所述开关单元被配置为在所述开关单元的第一端为有效电平时将发光元件的第一端处的电压传导至所述开关单元的第二端；扫描单元，与多行第一扫描线连接；以及传感单元，与多列传感线连接；其中，任一所述开关单元的第一端连接一行所述第一扫 描线，任一所述开关单元的第二端连接一列所述传感线，并且连接同一行的第一扫描线的任意两个开关单元连接不同列的传感线，
所述测试方法包括：
向所述显示面板输出预设测试画面的数据信号以使所述发光元件按照所述预设测试画面发光；
向所述扫描单元输出启动信号以使所述扫描单元按照预设时序依次向所连接的多行第一扫描线输出开关单元的有效电平；
接收来自所述传感单元的传感信号，所述传感信号包括每一所述发光元件的第一端的电压值信息，其中，所述电压值信息通过所述传感单元配合所述预设时序接收来自多列传感线的电压信号得到；
将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果。
在一个示例中，所述将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果包括：根据所述预设测试画面计算得到每一所述发光元件的第一端的标准电压值；
将每一所述发光元件的第一端的电压值与所述标准电压值进行比较，并在差值超过预设阈值时生成异常信号；以及
接收所述异常信号，并在检测结果画面中将位置坐标与该异常信号对应的像素显示为异常像素。
在一个示例中，所述接收传感单元的传感信号包括：对接收到的传感信号进行下述的一项或多项的处理：信号失真补偿、滤波、功率放大、模数转换。
在一个示例中，所述开关单元包括第三晶体管，所述第三晶体管的栅极连接一行所述第一扫描线，源极与漏极中的一个连接所述发光元件的第一端，另一个连接一列所述传感线。
在一个示例中，所述多个像素区域呈行列设置；任一行所述第一扫描线位于相邻两行的像素区域之间；任一列所述传感线位于相邻两列的像素区域之间。
第二方面，本发明的另一实施例提供了一种显示面板的测试装置，所述显示面板包括：多个像素区域，每一像素区域包括发光元件并且所述发光元件连接一开关单元，所述开关单元被配置为在所述开关单元的第一端为有效电平时将发光元件的第一端处的电压传导至所述开关单元的第二端；扫描单元，与多行第一扫描线连接；以及传感单元，与多列传感线连接；其中，任一所述开关单元的第一端连接一行所述第一扫描线，任一所述开关单元的第二端连接一列所述传感线，并且连接同一行的第一扫描线的任意两个开关单元连接不同列的传感线，
所述测试装置包括：
第一输出单元，配置为向所述显示面板输出预设测试画面的数据信号以使所述多个发光元件按照所述预设测试画面发光；
第二输出单元，配置为向所述扫描单元输出启动信号以使所述扫描单元按照预设时序依次向所述多行第一扫描线输出所述开关单元的有效电平；
接收单元，配置为接收来自所述传感单元的信号以生成传感信号，所述传感信号包括每一所述发光元件的第一端的电压值信息，所述电压值信息通过所述传感单元配合所述预设时序接收来自多列传感线的电压信号得到；以及
比较单元，配置为将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果。
在一个示例中，所述接收单元被配置为对接收到的信号进行下述的一项或多项的处理：信号失真补偿、滤波、功率放大、模数转换。
在一个示例中，所述比较单元包括：
计算模块，配置为根据所述预设测试画面计算得到每一所述发光元件的第一端的标准电压值；
比较模块，配置为将每一所述发光元件的第一端的电压值与所述标准电压值进行比较，并在差值超过预设阈值时生成异常信号；以及
显示模块，配置为接收所述异常信号，并在检测结果画面中将位置 坐标与该异常信号对应的像素标示为异常像素。
在一个示例中，所述开关单元包括第三晶体管，所述第三晶体管的栅极连接一行所述第一扫描线，源极与漏极中的一个连接所述发光元件的第一端，另一个连接一列所述传感线。
在一个示例中，所述多个像素区域呈行列设置；任一行所述第一扫描线位于相邻两行的像素区域之间；任一列所述传感线位于相邻两列的像素区域之间。
附图说明
以下将结合附图对本发明的实施例进行更详细的说明，以使本领域普通技术人员更加清楚地理解本发明，其中：
图1是本发明一个实施例提供的一种显示面板的结构示意图；
图2是本发明一个实施例提供的一种显示面板在像素区域内的电路结构图；
图3是本发明一个实施例提供的一种显示面板测试装置的结构框图；
图4是本发明一个实施例提供的一种显示面板测试装置中的数据比较器的结构示意图；
图5是本发明一个实施例提供的一种显示面板测试方法的步骤流程示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“连接”或者“相连”等类似的 词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
图1是本发明一个实施例提供的一种显示面板的结构示意图。参见图1，该显示面板包括分别设置在多个像素区域P0内的多个发光元件L0。可以理解的是，该发光元件可以是任意一种并可用于发光显示的电子器件，例如有机发光二极管(Organic Light-Emitting Diode，OLED)或者半导体发光二极管(Semiconductor Light Emitting Diode，LED)等。需要说明的是，图1仅以四行五列的像素区域作为示例，实际应用场景下可以根据显示需要设置像素区域和发光元件的数量。
在本发明的实施例中，上述显示面板还包括开关单元11、扫描单元12和传感单元13。开关单元11设置在每一像素区域P0内，配置为在开关单元11的第一端(如图1中开关单元11的上端)为有效电平时将发光元件L0的第一端(如图1中发光元件L0的上端)处的电压传导至开关单元11的第二端(如图1中开关单元11的右端)。需要说明的是，有效电平是开关单元11的一项参量，可以包括一个或一个以上的电压数值范围；由此，开关单元11的上述功能可由现有的电子元器件或其组合实现，例如霍尔开关、晶体管或者数字开关电路等，本领域技术人员可以根据需要进行选取和设置，本发明的实施例对此不做限制。
在本发明的实施例中，上述扫描单元12与多行第一扫描线(如图1所示的G1、G2、G3、G4等四行第一扫描线)相连，配置为按照预设时序逐行地向多行第一扫描线输出开关单元11的有效电平。同时如图1所示，任一开关单元11的第一端连接一行第一扫描线，由此，在扫描单元12向任一行的第一扫描线输出开关单元11的有效电平的过程中，与该第一扫描线相连的所有开关元件11就可以将所在像素区域P0内的发光元件L0的第一端处的电压传导至开关单元11的第二端。需要说明的是，上述预设时序包括了向每行第一扫描线输出上述有效电平的持续时间，以及向多行第一扫描线输出上述有效电平的先后顺序。而可以理解的是，该扫描单元12的上述功能可由现有的信号发生电路或其改型来实现，比如采用多级移位寄存器在时钟信号的作用下依次输出每行第一扫描线的上述有效电平，本领域技术人员可以根据需要进行选取和设置，本发明的实施例对此不做限制。
在本发明的实施例中，上述传感单元13与多列传感线(如图1所示的S1、S2、S3、S4、S5等五列传感线)相连，配置为配合上述预设时序接收来自多列传感线的电压信号。同时如图1所示，任一开关单元11的第二端连接一列传感线，而且，连接同一行的所述第一扫描线的任意两个所述开关单元连接不同列的所述传感线。从而，在任一开关元件11将所在像素区域P0内的发光元件L0的第一端处的电压传导至开关单元11的第二端时，该传感单元13就可以通过与该开关单元11相连的传感线接收其电压信号，从而获取发光元件L0的第一端处的电压的具体数值。需要说明的是，由于开关元件11的开启时间和顺序由上述预设时序决定，因此传感单元13需要配合该预设时序才能按照预定的顺序通过上述多列传感线实现所有发光元件L0的第一端处的电压的具体数值的获取。而可以理解的是，该传感单元13的功能可以通过现有的信号采集电路或其改型来实现，比如传感单元13可以在电压信号的接收顺序上依次包括缓冲器(Buffer)、模数转换器(Analog-to-Digital Converter，ADC)和存储器，本领域技术人员可以根据需要进行选取和设置，本发明的实施例对此不做限制。
如上所述，可以看出，本发明实施例基于显示面板内的开关单元、第一扫描线和传感线的设置，可以实现发光元件的第一端处电压值的获取；从而，在测试时通过比较这一电压值与理论值之间的差别就可以实现Mura不良的检测。本发明实施例直接以量化的数值来检测Mura不良的存在，不仅具有更高的准确程度，还可以实现检测过程的自动化，有利于提高工艺流程中测试过程的效率。
另外需要说明的是，如图1所示的显示面板的结构中，多个像素区域P0呈行列设置，而任一行第一扫描线位于相邻两行的像素区域P0之间，并且任一列传感线位于相邻两列的像素区域P0之间。由此，本发明实施例中第一扫描线和传感线的设置方式可以与通常的显示面板中的栅线和数据线的设置方式一致，有利于降低布线难度并实现扫描驱动电路和数据驱动电路的复用。而在本发明的其他实施例中，像素区域P0的排列方式可以不严格地按照行列方式进行设置，例如可以采取行向交错或者列向交错的排列方式。而在任意一种排列方式下，由于显示面板中任一开关单元的第一端连接一行第一扫描线，任一开关单元的第二端连接一列传感线，因此只要满足与同一行第一扫描线相连的任意两个开关单元分别连接不同列的传感线这一 条件，就可以实现显示面板中多个发光元件的第一端处电压值的获取并解决Mura不良容易漏检的问题，本发明的实施例对此不做限制。
图2是适用于本发明实施例提供的上述检测方法的一种示例性显示面板的像素区域的电路结构图。参见图2，在该显示面板中，每一像素区域内除了上述发光元件L0和开关单元11之外还可以设有与发光元件L0的第一端(如图2中发光元件L0的上端)相连的像素电路14，且每一像素区域内的像素电路14连接一行第二扫描线和一列数据线，配置为在第二扫描线上为有效电平时接收来自数据线的数据电压，并根据数据电压的幅值向发光元件提供驱动电流。可以理解的是，第二扫描线可以设有多行，并与图1所示的多行第一扫描线成对设置；数据线可以设有多列，并与图1所示的多列扫描线成对设置。例如，任一行第二扫描线可位于相邻两行的像素区域之间；任一列数据线可位于相邻两列的像素区域之间。举例来说，图2所示的像素区域内的像素电路14连接第二扫描线Gm′和数据线Dn，其中的第二扫描线Gm′与第一扫描线Gm是一对平行设置的行向导线，而数据线Dn与传感线Sn是一对平行设置的列向导线。可以理解的是，随着多行第二扫描线逐行地输出有效电平，任一像素电路可以在所连接的第二扫描线上为有效电平时根据所连接的数据线上的数据电压的幅值，向所在像素区域内的发光元件提供驱动电流。从而，可以在适当的时序配合下完成每一像素区域内的发光元件的驱动电流的设置，从而实现整个显示面板的发光显示。当然，视显示需求的不同，上述第二扫描线与数据线可以在本发明的其他实施例中具有不同的设置方式(例如具有不同的数量或位置)，本发明的实施例对此不做限制。
在一个示例中，如图2所示，像素电路14的电路结构可包括第一晶体管T1、第二晶体管T2和第一电容C1，其中，第一晶体管T1的栅极连接第一电容C1的第一端，源极与漏极中的一个连接偏置电压线VDD，另一个连接第一电容C1的第二端及发光元件的第一端L0；第二晶体管T2的栅极连接一行第二扫描线Gm′；源极与漏极中的一个连接一列数据线Dn，另一个连接第一电容C1的第一端。可以理解的是，图2中第一电容C1的上端为上述第一电容C1的第一端，而下端为上述第一电容C1的第二端。而且，由于图2所示出的第一晶体管T1和第二晶体管T2均为N型晶体管，因此第一晶体管T1与偏置电压线VDD相连的电极为漏极，与第一电容C1的第二端相连的电极为源极；第二晶体管T2与数据线Dn相连的电极为漏极， 与第一电容C1的第一端相连的电极为源极。可以理解的是，若第一晶体管T1和第二晶体管T2均为P型晶体管，则需要将上述源极与漏极的连接关系相互交换；并且，例如，当晶体管具有源极与漏极对称的结构时，可以将源极与漏极视为不作特别区分的两个电极。
由此，在第二扫描线Gm′输出该像素电路14的有效电平—高电平(由N型的第二晶体管T2的器件特性决定)时，第二晶体管T2可以开启，使得数据线Dn上的数据电压为第一电容C1充电；从而，工作在线性区的第一晶体管T1的栅极与源极之间的电压差(可以决定流经第一晶体管T1漏极和源极的最大电流的大小)由第一电容C1所存储的电荷量决定，即：间接地由数据线Dn上的数据电压的幅值决定，因而第一晶体管T1可以在偏置电压线VDD(可以施加有发光元件的偏置高电压ELVDD)与发光元件L0第二端所连接的公共电压线(可以施加有发光元件的偏置低电压ELVSS)之间形成大小由该数据电压的幅值决定的驱动电流，实现上述像素电路14的功能。当然，该像素电路14可以在本发明的其他实施例中具有进一步的附加结构或者具有其他不同的电路结构，举例来说，可以参照通常的OLED显示装置中像素电路的结构进行设置，本发明的实施例对此不做限制。
另外，在图2所示的电路结构中，上述开关单元11可包括第三晶体管T3，该第三晶体管T3的栅极连接第一扫描线Gm，源极与漏极中的一个连接发光元件L0的第一端而另一个连接传感线Sn。可以理解的是，虽然图2中示出的第三晶体管T3为N型晶体管(与传感线Sn相连的电极为源极，与发光元件L0的第一端相连的电极为漏极)，但在本发明的其他实施例中其也可以为P型晶体管(与传感线Sn相连的电极为漏极，与发光元件L0的第一端相连的电极为源极)，本发明的实施例对此不做限制。而且，例如，当晶体管具有源极与漏极对称的结构时，可以将源极与漏极视为不作特别区分的两个电极。由此，在第一扫描线Gm上为有效电平—高电平(由N型的第三晶体管T3的器件特性决定)时，该第三晶体管T3可以导通其源极和漏极，从而实现上述开关单元11的功能。可以理解的是，采用晶体管形成上述开关单元11的过程可以与现有的显示面板的制作工艺相适应，有利于成本的降低和性能的提升。
需要说明的是，图2中将二极管的阳极作为上述发光元件的第一端仅是一种示例，在本发明的其他实施例中还可以将二极管的阴极作为上述发光元 件的第一端，并将发光元件的第二端转为连接上述偏置高电压ELVDD，由此，将在第一晶体管连接的偏置电压线上施加上述偏置低电压ELVSS，这同样可以实现发光元件的第一端处的电压的检测。
基于同样的发明构思，本发明的实施例还提供一种显示装置，该显示装置包括前述任一显示面板。需要说明的是，该显示装置可以为电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件，例如，可以是一种OLED显示器，本发明的实施例对此不做限制。由于该显示装置包括前述任一显示面板，其相应地也同样可以实现检测过程的自动化，有利于提高工艺流程中测试过程的进行效率。
图3是本发明一个实施例提供的适用于前述任一显示面板的显示面板测试装置的结构框图。参见图3，该测试装置包括第一输出单元31、第二输出单元32、接收单元33和比较单元34。
第一输出单元31被配置为向显示面板输出预设测试画面的数据信号，以使多个发光元件按照预设测试画面发光；
第二输出单元32被配置为向扫描单元输出启动信号，以使扫描单元按照预设时序依次向多行第一扫描线输出开关单元的有效电平；
接收单元33被配置为接收来自传感单元的信号以生成传感信号，传感信号包括每一发光元件的第一端的电压值信息；
比较单元34被配置为将传感信号与预设测试画面进行比较，以得到测试结果。
例如，上述第一输出单元31可以包括与显示面板的显示信号输入端口相连的测试画面信号源，从而可以将预设测试画面(例如单色画面、条纹画面、预设图片画面等等)的显示信号作用于发光元件的发光控制，使得显示面板内的多个发光元件按照该预设测试画面发光。
例如，上述第二输出单元32可以包括脉冲信号发生器，从而可以在一特定的第一时间段内向包括多级移位寄存器单元的扫描单元输出作为启动信号的脉冲信号，使得在此后的每一时间段内扫描单元都向多行第一扫描线中的一行输出上述开关单元的有效电平。
可以理解的是，传感单元13可以在每一时间段内通过多列扫描线接收到一组电压值，并按照顺序存储至内部的一存储器中。对此，上述接收单元33可以包括传感单元中的存储器的读取组件，从而可以依照顺序生成数字 传感信号，该传感信号包括每一行每一列像素区域内发光元件第一端的电压值的信息(也就是说同时包括任一发光元件所在的像素区域的位置标识以及该发光元件的电压值，比如由幅值代表电压值的多个子脉冲形成的信号)。在一些实施方式中，该接收单元33可以被配置为对接收到的信号进行下述的一项或多项的处理：信号失真补偿、滤波、功率放大、模数转换。可以理解的是，传感线上的寄生电容效应会影响读取速度并造成信号衰减和输出信号失真，因此在该接收单元中进行的信号处理可以消除传感信号在这些方面的受到的影响，提高检测的准确性。
基于接收单元33得到的传感信号(表示发光元件的第一端处的电压的实际测量值)和预设测试画面(表示发光元件的第一端处的电压的标准电压值)，比较单元34可以通过例如信号比较电路的形式实现Mura(显示亮度不均匀)不良的检测。例如，在产生Mura不良时，故障点处的像素区域内发光元件第一端处的电压的实际测量值会明显偏离于标准电压值，因此可以通过这一点来进行Mura不良的检测。
在一个示例中，仍如图3所示，上述比较单元34可以包括计算模块34a、比较模块34b和显示模块34c。计算模块34a被配置为根据所述预设测试画面计算得到每一所述发光元件的第一端的标准电压值；比较模块34b被配置为将每一所述发光元件的第一端的电压值与所述标准电压值进行比较，并在差值超过预设阈值时生成异常信号；显示模块34c被配置为接收所述异常信号，并在检测结果画面中将位置坐标与该异常信号对应的像素显示为异常像素。
例如，上述计算模块34a可以包括运算关系固定的逻辑运算电路，用以在例如数字信号的形式下进行输入的显示信号向每一发光元件的第一端的标准电压值的转换。而上述比较模块34b可以包括如图4所示的一个或一个以上的数据比较器，以实现电压的实际测量值与标准电压值之间的比较。例如，可以将传感信号中的每一个电压值Vs与计算模块34a得到的标准电压值Vd对应地分别输入至数据比较器的两个输入端，由此，该数据比较器输出的电压差值Vout就反映了发光元件L0第一端处电压的实际测量值与标准电压值之间的差别。从而，在电压差值超过了预先设定的阈值或者与标准电压值之间的比例超过预设比例时，比较模块34b就可以生成异常信号，以表示某一像素区域内的发光元件的驱动电压出现了异常。最后，显示模块34c 可以通过逻辑运算器的结构来将异常信号处理为检测结果画面，具体可以通过标红、点亮、闪烁等任意的显示方式来在相应的位置坐标处标示出异常像素的存在，以尽可能直观地向检测人员展示发光元件上加载的电压是否正常。
当然，虽然上述电路工作原理主要以数字信号的处理方式来进行描述，然而可以理解的是，如图4所示的数据比较器除了可以是数字电路下的差值计算电路之外，还可以是模拟电路下的差分放大器，其也可以实现两个电压在数值上的比较，从而基于此可以通过模拟信号的处理方式实现上述比较单元34的功能，本发明的实施例对此不做限制。
如上所述，本发明实施例的测试装置可以与上述任意一种的显示面板相互配合，以实现Mura不良的检测，可以解决Mura不良容易漏检的问题，不仅具有更高的准确程度，还可以实现检测过程的自动化，有利于提高工艺流程中测试过程的进行效率。
基于同样的发明构思，图5是本发明一个实施例提供的一种显示面板测试方法的步骤流程示意图。参见图5，该测试方法基于上述任意一种的显示面板，包括如下操作：
步骤501：向显示面板输出预设测试画面的数据信号，以使多个发光元件按照预设测试画面发光；
步骤502：向扫描单元输出启动信号，以使扫描单元按照预设时序依次向多行第一扫描线输出开关单元的有效电平；
步骤503：接收来自传感单元的传感信号，传感信号包括每一发光元件的第一端的电压值信息；
步骤504：将传感信号中每一发光元件的第一端的电压值信息与预设测试画面进行比较，以得到测试结果。
可以理解的是，步骤501至步骤504分别对应于上述第一输出单元31、第二输出单元32、接收单元33和比较单元34的功能，因而可以具有相应的具体实现方式，在此不再赘述。可以看出，本发明实施例的测试方法可以与上述任意一种的显示面板相互配合，以实现Mura不良的检测，可以解决Mura不良容易漏检的问题，不仅具有更高的准确程度，还可以实现检测过程的自动化，有利于提高工艺流程中测试过程的进行效率。
本发明的说明书中，说明了大量具体细节。然而，能够理解，本发明的 实施例可以在没有这些具体细节的情况下实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
类似地，应当理解，为了精简本发明公开并帮助理解各个发明方面中的一个或多个，在上面对本发明的示例性实施例的描述中，本发明的各个特征有时被一起分组到单个实施例、图、或者对其的描述中。然而，并不应将该公开的方法解释呈反映如下意图：即所要求保护的本发明要求比在每个权利要求中所明确记载的特征更多的特征。更确切地说，如权利要求书所反映的那样，发明方面在于少于前面公开的单个实施例的所有特征。因此，遵循具体实施方式的权利要求书由此明确地并入该具体实施方式，其中每个权利要求本身都作为本发明的单独实施例。
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。
本申请要求于2016年1月5日递交的中国专利申请第201610005272.X号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (10)

  1. 一种显示面板的测试方法，所述显示面板包括：多个像素区域，每一像素区域包括发光元件，所述发光元件连接一开关单元，所述开关单元被配置为在第一端为有效电平时将发光元件的第一端处的电压传导至所述开关单元的第二端；扫描单元，与多行第一扫描线连接；以及传感单元，与多列传感线连接；其中，任一所述开关单元的第一端连接一行所述第一扫描线，任一所述开关单元的第二端连接一列所述传感线，并且连接同一行的第一扫描线的任意两个开关单元连接不同列的传感线，
    所述测试方法包括：
    向所述显示面板输出预设测试画面的数据信号以使所述发光元件按照所述预设测试画面发光；
    向所述扫描单元输出启动信号以使所述扫描单元按照预设时序依次向所连接的多行第一扫描线输出开关单元的有效电平；
    接收来自设置在所述显示面板内的传感单元的传感信号，其中，所述传感信号包括每一所述发光元件的第一端的电压值信息，所述电压值信息通过所述传感单元配合所述预设时序接收来自所述多列传感线的电压信号而得到；以及，
    将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果。
  2. 根据权利要求1所述的测试方法，其中，所述将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果包括：
    根据所述预设测试画面计算得到每一所述发光元件的第一端的标准电压值；
    将每一所述发光元件的第一端的电压值与所述标准电压值进行比较，并在差值超过预设阈值时生成异常信号；以及
    接收所述异常信号，并在检测结果画面中将位置坐标与该异常信号对应的像素显示为异常像素。
  3. 根据权利要求1所述的测试方法，其中，所述接收来自设置在 所述显示面板内的传感单元的传感信号包括：
    对接收到的传感信号进行下述的一项或多项的处理：信号失真补偿、滤波、功率放大、模数转换。
  4. 根据权利要求1至3中任意一项所述的测试方法，其中，所述开关单元包括第三晶体管，所述第三晶体管的栅极连接一行所述第一扫描线，源极与漏极中的一个连接所述发光元件的第一端，另一个连接一列所述传感线。
  5. 根据权利要求1至3中任意一项所述的测试方法，其中，所述多个像素区域呈行列设置；任一行所述第一扫描线位于相邻两行的像素区域之间；任一列所述传感线位于相邻两列的像素区域之间。
  6. 一种显示面板的测试装置，所述显示面板包括：多个像素区域，每一像素区域包括发光元件，所述发光元件连接一开关单元，所述开关单元被配置为在第一端为有效电平时将发光元件的第一端处的电压传导至所述开关单元的第二端；扫描单元，与多行第一扫描线连接；以及传感单元，与多列传感线连接；其中，任一所述开关单元的第一端连接一行所述第一扫描线，任一所述开关单元的第二端连接一列所述传感线，并且连接同一行的第一扫描线的任意两个开关单元连接不同列的传感线，
    所述测试装置包括：
    第一输出单元，配置为向所述显示面板输出预设测试画面的数据信号以使所述多个发光元件按照所述预设测试画面发光；
    第二输出单元，配置为向所述扫描单元输出启动信号以使所述扫描单元按照预设时序依次向所述多行第一扫描线输出所述开关单元的有效电平；
    接收单元，配置为接收来自所述传感单元的信号以生成传感信号，所述传感信号包括每一所述发光元件的第一端的电压值信息，所述电压值信息通过所述传感单元配合所述预设时序接收来自所述多列传感线的电压信号而得到；以及
    比较单元，配置为将所述传感信号中每一所述发光元件的第一端的电压值信息与所述预设测试画面进行比较以得到测试结果。
  7. 根据权利要求6所述的测试装置，其中，所述接收单元被配置 为对接收到的信号进行下述的一项或多项的处理：信号失真补偿、滤波、功率放大、模数转换。
  8. 根据权利要求6所述的测试装置，其中，所述比较单元包括：
    计算模块，配置为根据所述预设测试画面计算得到每一所述发光元件的第一端的标准电压值；
    比较模块，配置为将每一所述发光元件的第一端的电压值与所述标准电压值进行比较，并在差值超过预设阈值时生成异常信号；以及
    显示模块，配置为接收所述异常信号，并在检测结果画面中将位置坐标与该异常信号对应的像素显示为异常像素。
  9. 根据权利要求6至8中任意一项所述的测试装置，其中，所述开关单元包括第三晶体管，所述第三晶体管的栅极连接一行所述第一扫描线，源极与漏极中的一个连接所述发光元件的第一端，另一个连接一列所述传感线。
  10. 根据权利要求6至8中任意一项所述的测试装置，其中，所述多个像素区域呈行列设置；任一行所述第一扫描线位于相邻两行的像素区域之间；任一列所述传感线位于相邻两列的像素区域之间。
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