WO2017086116A1 - 半導体装置および投射型表示装置 - Google Patents
半導体装置および投射型表示装置 Download PDFInfo
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- WO2017086116A1 WO2017086116A1 PCT/JP2016/081868 JP2016081868W WO2017086116A1 WO 2017086116 A1 WO2017086116 A1 WO 2017086116A1 JP 2016081868 W JP2016081868 W JP 2016081868W WO 2017086116 A1 WO2017086116 A1 WO 2017086116A1
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
Definitions
- the present disclosure relates to a semiconductor device having a light shielding film on a semiconductor layer and a projection display device including the same.
- a projection-type liquid crystal display device (projector) generates image light by modulating light from a light source with a light valve, and displays the image light on a screen for display.
- the light valve is composed of a liquid crystal panel, and modulates light by, for example, each pixel being driven in an active matrix in accordance with an external video signal. For this reason, improvement of image defects (flicker, display unevenness, etc.) of the liquid crystal panel is demanded.
- the TFT Thin Film Transistor
- the semiconductor layer In order to suppress the occurrence of image defects in the liquid crystal panel, it is very important to block the TFT (Thin Film Transistor) element included in the pixel circuit, specifically, the semiconductor layer from being irradiated with light. .
- a semiconductor layer in particular, an LDD (Lightly Doped Drain) region
- LDD Lightly Doped Drain
- a semiconductor layer and a gate electrode are formed in this order above a scanning line, and connection holes arranged on both sides of the channel region of the semiconductor layer are buried with the gate electrode so that the gate electrode and the scanning line are integrated.
- a thin film semiconductor device in which a light shielding state with respect to a channel region is improved is disclosed.
- a semiconductor layer is disposed above the scanning line, and a light shielding film is disposed on an upper layer of the LDD region of the semiconductor layer with an insulating film interposed therebetween, thereby providing light shielding performance to the LDD region.
- An improved structure is disclosed.
- the semiconductor layer and the gate electrode portion are formed in this order above the scanning line, and the gate electrode portion is formed in the contact hole with the scanning line provided on both sides of the LDD region of the semiconductor layer.
- Patent Document 3 a second conductive film extending from the data line is formed above the first conductive film via an insulating film, and the second conductive film is embedded in a contact hole with the scanning line.
- a structure in which the light shielding property with respect to the channel region is further improved is disclosed.
- Patent Documents 1 to 3 have low light shielding performance against light incident from the side to the LDD region, low adhesion between the insulating film and the conductive film, and stress of each film. There was a problem that film peeling easily occurred due to the difference.
- a semiconductor device includes a first substrate, a first interlayer insulating layer provided on the first substrate, and a semiconductor layer and a gate insulating layer provided on the semiconductor layer. And a second substrate disposed opposite to the first substrate.
- the gate electrode has a first conductive film and a light shielding property in order from the semiconductor layer side.
- the second conductive film extends from the side surface to the bottom surface of the pair of openings provided with the semiconductor layer therebetween.
- the projection display device includes a display layer together with the semiconductor device according to the embodiment.
- the gate electrode provided on the semiconductor layer via the gate insulating layer includes the first conductive film and the light shielding property in order from the semiconductor layer side.
- the second conductive film having the structure is used.
- the second conductive film was extended from the side surface to the bottom surface of the pair of openings provided with the semiconductor layer therebetween.
- the gate electrode is a laminated film of the first conductive film and the second conductive film having a light shielding property
- the light shielding property is obtained. Adhesion between the gate electrode having a gate insulating layer and the gate insulating layer is improved.
- the second conductive film extends from the side surface to the bottom surface of the pair of openings formed between the semiconductor layers provided under the gate electrode through the gate insulating layer, the semiconductor layer The light-shielding property with respect to is improved. Therefore, it is possible to improve the light shielding performance and the resistance to film peeling. Note that the effects described here are not necessarily limited, and may be any effects described in the present disclosure.
- FIG. 3 is a cross-sectional view of the liquid crystal panel according to the first embodiment of the present disclosure.
- FIG. It is a plane schematic diagram of the liquid crystal panel shown in FIG.
- FIG. 6 is a schematic plan view of a liquid crystal panel as another example according to the first embodiment of the present disclosure.
- FIG. 2B is a cross-sectional view corresponding to the line II-II shown in FIG. 2A. It is a figure showing an example of the composition of the display concerning a 1st embodiment of this indication. It is a figure showing an example of composition of a spatial light modulation part. It is a figure showing an example of the circuit structure of a pixel. It is sectional drawing of the liquid crystal panel as an example which concerns on 2nd Embodiment of this indication.
- FIG. 14 is a cross-sectional view illustrating a part of a liquid crystal panel according to Modification 1 of the present disclosure.
- FIG. It is a characteristic view showing the improvement rate of the flicker in Example 1, 2 with respect to a comparative example. It is the characteristic view which compared the resistance value in the connection part of a scanning line and a gate electrode.
- First Embodiment a liquid crystal projection display device in which a gate electrode is composed of a first conductive film and a second conductive material having a light-shielding property, and the second conductive film extends to the bottom surface of a connection hole with a scanning line.
- Example 1-1 Configuration of liquid crystal panel 1-2.
- Action / Effect Second embodiment an example in which an electrically floating light shielding film is further provided above the gate electrode
- Modified example (example in which the second conductive film is formed as a laminated film) 4).
- Example 1 a liquid crystal projection display device in which a gate electrode is composed of a first conductive film and a second conductive material having a light-shielding property, and the second conductive film extends to the bottom surface of a connection hole with a scanning line.
- Example 1-1 Configuration of liquid crystal panel 1-2.
- Action / Effect Second embodiment an example in which an electrically floating light
- FIG. 1 illustrates a cross-sectional configuration of a liquid crystal panel 1 included in a projection display device (projector 100, see FIG. 4) according to a first embodiment of the present disclosure.
- the projector 100 includes, for example, the liquid crystal panel 1 shown in FIG. 1, a drive circuit 40 having a display control unit 41, a data driver 42, and a gate driver 43, and the like, and an image based on a video signal Din input from the outside. Is displayed on the screen 200 (see FIGS. 4 and 5).
- FIG. 2A shows a planar configuration of the liquid crystal panel 1 shown in FIG. 1, and FIG. 1 is a cross-sectional view corresponding to the line II in FIG.
- FIG. 3 shows a cross-sectional configuration taken along line II-II in FIG. 2A.
- a liquid crystal layer 30 is sealed between a drive substrate 10 and a counter substrate 20 that are disposed to face each other.
- the drive substrate 10 is provided with, for example, a scanning line WSL on the support substrate 11 (on the counter substrate 20 side), and the transistor 13, the interlayer insulating layer 14, the planarization layer 15, the pixel electrode 16, and the protection through the interlayer insulating layer 12.
- the layer 17 and the alignment film 18 are provided in this order.
- a polarizing plate 19 is disposed on the back surface of the support substrate 11.
- the drive substrate 10 further includes a signal line DTL and a common connection line COM (not shown).
- the counter substrate 20 has, for example, a counter electrode 22 and an alignment film 23 on the support substrate 21 (drive substrate 10 side), and a polarizing plate 24 on the back surface (image light emission surface side) of the support substrate 21. .
- the support substrate 11 is made of, for example, a glass substrate, and has, for example, a rectangular surface shape (surface shape parallel to the display screen).
- the scanning line WSL extends, for example, in the X-axis direction, and extends at least directly below (opposed region) of the LDD region (LDD region 13a) of the transistor 13. Specifically, the scanning line WSL extends, for example, directly below the LDD regions 13a and 13b and the channel region 13c (opposing region) and its periphery.
- the scanning line WSL is configured using a low reflectance material. Specifically, it is preferable to use a low-reflectance material such as tungsten silicide (WSi) and a conductive silicide-based semiconductor material.
- low reflectivity materials such as tungsten (W), titanium (Ti), molybdenum (Mo), chromium (Cr), tantalum (Ta), and silicide compounds thereof may be used.
- the film thickness (hereinafter simply referred to as thickness) of the scanning line WSL in the Y-axis direction is, for example, 30 nm or more and 400 nm or less.
- the interlayer insulating layers 12 and 14 are made of, for example, silicon oxide (SiO 2 ).
- the interlayer insulating layer 12 covers the scanning line WSL and is provided on the entire surface of the support substrate 11.
- a transistor 13 is provided on the interlayer insulating layer 12.
- the interlayer insulating layer 14 is provided so as to cover the gate insulating layer 13B and the gate electrode 13C of the transistor 13.
- the transistor 13 is a TFT element and has an LDD (Lightly Doped Drain) structure.
- the transistor 13 includes a semiconductor layer 13A, a gate electrode 13C that applies an electric field to the semiconductor layer 13A (particularly, the channel region 13c), and a gate insulating layer 13B that isolates and isolates the semiconductor layer 13A and the gate electrode 13C from each other. ing.
- the transistor 13 includes an LDD region 13a and an LDD region 13b provided on both sides of the channel region 13c, a source region 13d provided on the further outside of the LDD region 13a, and a drain provided on the further outside of the LDD region 13b. And a region 13e.
- the source region 13 d is connected to the signal line DTL
- the gate electrode 13 C is connected to the scanning line WSL
- the drain region 13 e is connected to the pixel electrode 16.
- a pair of openings A1 and A2 penetrating the gate insulating layer 13B and the interlayer insulating layer 12 are provided on both sides of the semiconductor layer 13A extending in the X-axis direction.
- the openings A1 and A2 are connection holes for electrically connecting the gate electrode 13C and the scanning line WSL.
- the openings A1 and A2 may be provided at least at positions corresponding to the channel region 13c and the LDD region 13b of the semiconductor layer 13A.
- the openings A1 and A2 are provided from the LDD region 13a to the LDD region 13b.
- the openings A1 and A2 only need to be arranged in parallel with the semiconductor layer 13A as in the above embodiment. That is, the openings A1 and A2 may be formed in parallel to the scanning line WSL extending in the Z-axis direction as shown in FIG. 2A, or in the X-axis direction as shown in FIG. 2B. It may be formed in parallel to the extending scanning line WSL.
- the channel region 13c, the LDD regions 13a and 13b, the source region 13d, and the drain region 13e are all formed in the same layer, for example, and are made of, for example, amorphous silicon, polycrystalline silicon, or the like.
- the source region 13d and the drain region 13e are doped with impurities such as n-type impurities to reduce the resistance.
- the LDD regions 13a and 13b are doped with impurities so that the impurity concentration is lower than that of the source region 13d and the drain region 13e.
- the gate insulating layer 13B is for electrically insulating the semiconductor layer 13A and the gate electrode 13C.
- the gate insulating layer 13B is made of, for example, silicon oxide or silicon nitride (Si 3 O 4 ), and is formed by, for example, a thermal oxidation method or a CVD (Chemical Vapor Deposition) method.
- the gate electrode 13C is provided so as to straddle the semiconductor layer 13A in the X-axis direction via the gate insulating layer 13B.
- a region facing the gate electrode 13C is a channel region 13c.
- the gate electrode 13C has a stacked structure in which a first conductive film 13C1 and a light-shielding second conductive film 13C2 are stacked in this order.
- the first conductive film 13C1 is formed of a conductive material such as polysilicon or amorphous silicon, and is doped with an impurity such as phosphorus (P).
- the thickness of the first conductive film 13C1 is preferably 40 nm or more, for example.
- the upper limit is, for example, 1 ⁇ m or less.
- the second conductive film 13C2 is made of a material having low reflectivity (low refractive index) and conductivity, and preferably has a thickness of 30 nm to 400 nm, for example. Specifically, for example, when the short diameter of the openings A1 and A2 (for example, the width of the bottom surface in the X-axis direction in FIG. 2A) is 0.7 ⁇ m, the thickness of the second conductive film 13C2 is 0.35 ⁇ m or less. It is desirable. Specific examples of the material for the second conductive film 13C2 include low reflectivity materials such as W, Ti, Mo, Cr, Ta, and silicide compounds thereof.
- the second conductive film 13C2 is formed using one or more of these materials.
- the gate electrode 13C has a stacked structure of the first conductive film 13C1 and the second conductive film 13C2, and the first conductive film 13C1 is formed between the gate insulating layer 13B and the second conductive film 13C2, thereby forming a gate.
- the adhesion of the second conductive film 13C2 to the insulating layer 13B is ensured.
- the gate electrode 13C straddling the semiconductor layer 13A in the X-axis direction extends at least to the bottom surfaces of the openings A1 and A2, and is electrically connected to the scanning line WSL at the bottom surfaces of the openings A1 and A2.
- the stacked structure of the first conductive film 13C1 and the second conductive film 13C2 of the gate electrode 13C only needs to be provided on at least the gate insulating layer 13B, and the openings A1 and A2 have the first structure as shown in FIG. It is only necessary that the two conductive films 13C2 extend.
- the second conductive film 13C2 formed of a low-reflectance material on the bottom surfaces of the openings A1 and A2 and the scanning line WSL are electrically connected to each other, whereby the channel region 13c of the semiconductor layer 13A for oblique component light and Incidence to the LDD region 13b is efficiently suppressed.
- the first conductive film 13C1 may extend in the openings A1 and A2.
- the stacked structure of the gate electrode 13C and the structure in the openings A1 and A2 of the present embodiment are formed using, for example, the following procedure.
- openings A1 and A2 penetrating to the scanning line WSL are formed by dry etching, for example.
- a second conductive film 13C2 is formed using a CVD method.
- a gate electrode 13C having a laminated structure of the first conductive film 13C1 and the second conductive film 13C2 on the gate insulating layer 13B and having only the second conductive film 13C2 formed in the openings A1 and A2 is formed. Is done.
- FIG. 1 shows an example in which the side surfaces and bottom surface of the openings A1 and A2 are covered with the second conductive film 13C2, the openings A1 and A2 may be completely embedded with the second conductive film 13C2.
- the signal line DTL extends, for example, in the Y-axis direction, and is provided, for example, immediately above the semiconductor layer 13A (opposing region) on the interlayer insulating layer 14.
- the signal line DTL is electrically connected to the semiconductor layer 13A in the opening B that penetrates the interlayer insulating layer 14 and the gate insulating layer 13B in the source region 13d of the semiconductor layer 13A.
- the signal line DTL is configured as a laminated film made of a tungsten silicide film and a metal film such as aluminum (Al), Ti, copper (Cu), for example.
- the thickness of the signal line DTL is, for example, not less than 100 nm and not more than 1 ⁇ m.
- the planarization layer 15 is formed almost uniformly on the interlayer insulating layer 14.
- the planarization layer 15 is made of, for example, an epoxy resin or an acrylic resin.
- the pixel electrode 16 is provided for each pixel (pixel 2) and is made of, for example, a transparent conductive film.
- a transparent conductive film for example, an oxide semiconductor called indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or IGZO (indium, gallium, zinc-containing oxide) is used.
- the protective layer 17 is formed in order to suppress the corrosion of the pixel electrode 16.
- the protective layer 17 is made of an inorganic material that is chemically more stable than the material forming the alignment films 18 and 23, such as silicon oxide or silicon nitride.
- the thickness of the protective layer 17 is, for example, 30 nm to 70 nm.
- the protective layer 17 is formed so as to cover at least the pixel portion 1A.
- the protective layer 17 is preferably formed by a method that is chemically more stable than the vapor deposition method, such as a CVD method or a sputtering method.
- the alignment film 18 is for controlling the alignment of the liquid crystal layer 30 and is made of an inorganic material such as silicon oxide.
- the thickness of the alignment film 18 is, for example, about 120 nm to 360 nm.
- the alignment film 18 is formed by, for example, a vapor deposition method.
- the alignment film 18 is formed so as to cover the pixel electrode 16, and is formed, for example, from the pixel portion 1A to the peripheral portion 1B.
- the surface shape of the film formation region of the alignment film 18 is, for example, a rectangular shape substantially the same as the surface shape of the support substrate 11.
- the alignment film 23 has a similar configuration.
- the support substrate 21 is made of, for example, a glass substrate.
- the support substrate 21 is provided with, for example, a color filter and a light shielding layer (black matrix layer) not shown, and these are covered with, for example, an overcoat film.
- a counter electrode 22 is provided on the overcoat film.
- the counter electrode 22 is an electrode common to each pixel, for example, and supplies a video voltage to the liquid crystal layer 30 together with the pixel electrode 16.
- the counter electrode 22 is made of a transparent conductive material as described above, for example, like the pixel electrode 16.
- the liquid crystal layer 30 has a function of controlling the transmittance of light passing therethrough according to the video voltage supplied through the pixel electrode 16 and the counter electrode 22.
- the liquid crystal layer 30 is driven to display in, for example, a VA (Vertical Alignment) mode, a TN (Twisted Nematic) mode, an ECB (Electrically controlled birefringence) mode, an FFS (Fringe Field Switching) mode, or an IPS (In Plane Switching) mode.
- VA Vertical Alignment
- TN Transmission Nematic
- ECB Electrically controlled birefringence
- FFS Frringe Field Switching
- IPS In Plane Switching
- Liquid crystal Liquid crystal.
- the liquid crystal material of the liquid crystal layer 30 is not particularly limited, but is particularly effective when alignment control is performed using an inorganic alignment film, such as the alignment films 18 and 23 described later.
- the polarizing plates 19 and 24 are, for example, arranged in crossed Nicols, and allow only light (polarized light) in a certain vibration direction to pass therethrough.
- FIG. 4 illustrates an example of the overall configuration of the projector 100.
- the projector 100 is, for example, a three-plate transmission projector, and includes, for example, a light emitting unit 110, an optical path branching unit 120, a spatial light modulation unit 130, a combining unit 140, and a projecting unit 150.
- the light emitting unit 110 supplies a light beam that irradiates the irradiated surface of the spatial light modulation unit 130, and includes, for example, a white light source lamp and a reflecting mirror formed behind the lamp. Yes.
- the light emitting unit 110 may have some optical element in a region (on the optical axis AX) through which the light 111 of the lamp passes as necessary.
- a filter that attenuates light other than visible light among the light 111 from the lamp, and an optical integrator that makes the illuminance distribution on the irradiated surface of the spatial light modulator 130 uniform. It is possible to provide them in this order from the lamp side.
- the optical path branching unit 120 separates the light 111 output from the light emitting unit 110 into a plurality of color lights having different wavelength bands, and guides each color light to the irradiated surface of the spatial light modulation unit 130.
- the optical path branching unit 120 includes one cross mirror 121, two mirrors 122, and two mirrors 123.
- the cross mirror 121 separates the light 111 output from the light emitting unit 110 into a plurality of color lights having different wavelength bands and branches the optical path of each color light.
- the cross mirror 121 is disposed on the optical axis AX, and is configured by connecting two mirrors having different wavelength selectivity so as to cross each other.
- the mirrors 122 and 123 reflect the color light (red light 111R and blue light 111B in FIG. 4) branched in the optical path by the cross mirror 121, and are disposed at a location different from the optical axis AX.
- the mirror 122 guides light (red light 111R in FIG. 4) reflected in one direction intersecting the optical axis AX by one mirror included in the cross mirror 121 to the irradiated surface of the spatial light modulator 130R. Has been placed.
- the mirror 123 guides the light (blue light 111B in FIG. 4) reflected in another direction intersecting the optical axis AX by other mirrors included in the cross mirror 121 to the irradiated surface of the spatial light modulator 130B. Has been placed.
- the light passing through the cross mirror 121 and passing on the optical axis AX (green light 111G in FIG. 4) is transmitted from the spatial light modulation unit 130G disposed on the optical axis AX. It is incident on the surface to be irradiated.
- the spatial light modulator 130 modulates a plurality of color lights for each color light according to a video signal Din input from an information processing device (not shown), and generates modulated light for each color light.
- the spatial light modulator 130 includes, for example, a spatial light modulator 130R that modulates the red light 111R, a spatial light modulator 130G that modulates the green light 111G, and a spatial light modulator 130B that modulates the blue light 111B. It is out.
- the spatial light modulator 130R is disposed in a region facing one surface of the combining unit 140.
- the spatial light modulation unit 130R modulates the incident red light 111R based on the video signal Din to generate red image light 112R, and the red image light 112R is output from the synthesis unit 140 behind the spatial light modulation unit 130R. It is designed to output on one side.
- Spatial light modulation unit 130 ⁇ / b> G is arranged in a region facing the other surface of combining unit 140.
- the spatial light modulator 130G modulates the incident green light 111G based on the video signal Din to generate a green image light 112G.
- the green image light 112G is output from the combining unit 140 behind the spatial light modulator 130R. Output to other side.
- Spatial light modulation unit 130 ⁇ / b> B is arranged in a region facing the other surface of combining unit 140.
- the spatial light modulator 130B modulates the incident blue light 111B based on the video signal Din to generate blue image light 112B, and the blue image light 112B is output from the combining unit 140 behind the spatial light modulator 130R. Output to other aspects.
- the combining unit 140 generates image light by combining a plurality of modulated lights.
- the combining unit 140 is disposed on the optical axis AX, for example, and is, for example, a cross prism configured by joining four prisms. Two selective reflection surfaces having different wavelength selectivity are formed on the joint surfaces of these prisms by, for example, a multilayer interference film or the like.
- the one selective reflection surface reflects the red image light 112 ⁇ / b> R output from the spatial light modulation unit 130 ⁇ / b> R in a direction parallel to the optical axis AX and guides it in the direction of the projection unit 150.
- the other selective reflection surface for example, reflects the blue image light 112B output from the spatial light modulation unit 130B in a direction parallel to the optical axis AX and guides it in the direction of the projection unit 150.
- the green image light 112G output from the spatial light modulation unit 130G passes through the two selective reflection surfaces and proceeds in the direction of the projection unit 150.
- the combining unit 140 functions to generate image light 113 by combining the image light generated by the spatial light modulation units 130R, 130G, and 130B, and to output the generated image light 113 to the projection unit 150.
- the projection unit 150 projects the image light 113 output from the synthesis unit 140 onto the screen 200 and displays an image.
- the projection unit 150 is disposed on the optical axis AX, for example, and is configured by a projection lens, for example.
- FIG. 5 shows an example of the overall configuration of the spatial light modulators 130R, 130G, and 130B in FIG.
- the spatial light modulators 130R, 130G, and 130B include, for example, the liquid crystal panel 1 described above and a drive circuit 40 that drives the liquid crystal panel 1.
- the drive circuit 40 includes a display control unit 41, a data driver 42, and a gate driver 43.
- the liquid crystal panel 1 has a pixel portion 1A in which a plurality of pixels 2 are formed in a matrix and a peripheral portion 1B.
- the liquid crystal panel 1 displays an image based on a video signal Din input from the outside by actively driving each pixel 2 by a data driver 42 and a gate driver 43.
- the liquid crystal panel 1 has a plurality of scanning lines WSL extending in the row direction, a plurality of signal lines DTL extending in the column direction, and a plurality of common connection lines COM extending in the row direction. Pixels 2 are provided corresponding to the intersections between the signal lines DTL and the scanning lines WSL. Each signal line DTL is connected to an output end (not shown) of the data driver 42. Each scanning line WSL is connected to an output terminal (not shown) of the gate driver 43. Each common connection line COM is connected to, for example, an output terminal (not shown) of a circuit that outputs a fixed potential.
- the display controller 41 stores, for example, the supplied video signal Din in a frame memory for each screen (for each display of one frame).
- the display control unit 41 has a function of controlling the data driver 42 and the gate driver 43 that drive the liquid crystal panel 1 to operate in conjunction with each other.
- the display control unit 41 supplies, for example, a scanning timing control signal to the data driver 42, and the data driver 42 receives an image signal for one horizontal line based on the image signal held in the frame memory.
- a display timing control signal is supplied.
- the data driver 42 supplies, for example, a video signal Din for one horizontal line supplied from the display control unit 41 to each pixel 2 as a signal voltage. Specifically, the data driver 42 supplies, for example, a signal voltage corresponding to the video signal Din to each pixel 2 constituting one horizontal line selected by the gate driver 43 via the signal line DTL. It is.
- the gate driver 43 has a function of selecting the pixel 2 to be driven according to a scanning timing control signal supplied from the display control unit 41, for example. Specifically, the gate driver 43 applies, for example, a selection pulse to the gate electrode 13C of the transistor 13 of the pixel 2 via the scanning line WSL, so that the pixel 2 formed in a matrix in the pixel portion 1A. One row is selected as a drive target. In these pixels 2, one horizontal line is displayed according to the signal voltage supplied from the data driver 42. In this way, for example, the gate driver 43 sequentially scans one horizontal line at a time in a time-division manner, and performs display over the entire display area.
- FIG. 6 illustrates an example of a circuit configuration of the pixel 2.
- the pixel 2 includes a liquid crystal element 3 and a pixel circuit 4 that drives the liquid crystal element 3.
- the liquid crystal element 3 and the pixel circuit 4 are provided corresponding to the intersection of the scanning line WSL and the signal line DTL.
- the liquid crystal element 3 includes a liquid crystal cell (liquid crystal layer 30), a pixel electrode 16 and a counter electrode 22 that sandwich the liquid crystal layer 30 therebetween. That is, the cross-sectional views of the liquid crystal panel 1 shown in FIGS. 1 and 3 correspond to the intersections of the scanning lines WSL and the signal lines DTL.
- the pixel circuit 4 includes a transistor 13 that writes a signal voltage to the liquid crystal element 3 and a storage capacitor 4 ⁇ / b> A that holds the voltage written to the liquid crystal element 3.
- the storage capacitor 4A is for preventing the signal voltage held between the pixel electrode 16 and the counter electrode 22 from leaking, and a pair of capacitor electrodes 4a and 4b facing each other through a predetermined gap. It consists of
- the capacitive electrode 4a is connected to the drain region 13e of the semiconductor layer 13A, and the capacitive electrode 4b is connected to the common connection line COM.
- the gate electrode is made of a light-shielding material, and the gate electrode extends into contact holes with scanning lines provided on both sides of the LDD region of the semiconductor layer. Some have a light-shielding film disposed on the gate electrode.
- the polysilicon film used as the light shielding film is inferior in the light shielding performance compared to the silicide film or the aluminum film, and the high temperature furnace in which the polysilicon film on the bottom surface of the connection hole is formed. In other words, it is oxidized to increase the resistance.
- the light shielding performance is not sufficient with respect to the incidence of light from the side surface of the LDD region.
- the conductive film (silicide film, aluminum film, etc.) and the insulating oxide film may have insufficient adhesion, or the conductive film may be peeled off due to the stress of each film.
- the conductive film in the vicinity is limited in material because it attenuates the threshold voltage (Vth) from the viewpoint of work function.
- the semiconductor layer 13A is extended to the bottom surfaces of the pair of openings A1 and A2 provided on both sides of the semiconductor layer 13A. This improves the adhesion between the gate insulating layer 13B provided between the semiconductor layer 13A and the gate electrode 13C and the gate electrode 13C having a light shielding property. Further, the incidence of oblique component light on the semiconductor layer 13A is suppressed.
- the gate electrode 13C of the transistor 13 provided on the drive substrate 10 of the liquid crystal panel 1 is shielded from the first conductive film 13C1. It was set as the laminated film with 2 electrically conductive film 13C2. As a result, the adhesion between the gate electrode 13C having a light shielding property and the gate insulating layer 13B is improved, and the resistance to film peeling can be improved.
- the second conductive film 13C2 having light shielding properties is extended from the side surface to the bottom surface of the pair of openings A1 and A2 provided with the semiconductor layer 13A interposed therebetween. This suppresses the incidence of oblique component light on the semiconductor layer 13A. Therefore, the light shielding performance for the semiconductor layer 13A can be improved. Therefore, it is possible to prevent the occurrence of light leakage current, and it is possible to provide a projection display device having high display characteristics and an improved manufacturing yield.
- the scanning line WSL is formed of a light-shielding material (low reflectance material), and the scanning line WSL is electrically connected to the light-shielding second conductive film 13C2 on the bottom surfaces of the openings A1 and A2. This makes it possible to further suppress the incidence of oblique component light (stray light) on the semiconductor layer 13A.
- the openings A1 and A2 provided at positions corresponding to the semiconductor layer 13A are not necessarily provided, and may be provided in either one, and the second conductive film 13C2 may be provided in one of them. You may make it extend.
- the openings A1 and A2 are provided on both sides of the semiconductor layer 13A and the second conductive film 13C2 extends to the bottom surfaces of the openings A1 and A2, the light shielding property to the semiconductor layer 13A is inferior, but constant. The light shielding performance can be improved.
- FIG. 7 illustrates a cross-sectional configuration of the liquid crystal panel 5 included in the projection display device (projector 100) according to the second embodiment of the present disclosure.
- FIG. 8A shows a planar configuration of the liquid crystal panel 1 shown in FIG. 7, and FIG. 7 is a cross-sectional view corresponding to the line III-III of FIG. 8A.
- FIG. 9 illustrates a cross-sectional configuration taken along the line IV-IV in FIG. 8A.
- the liquid crystal panel 5 of the present embodiment is different from the first embodiment in that an electrically floating light shielding film 51 is formed on the transistor 13.
- the light shielding film 51 is provided, for example, on the same layer as the signal line DTL, for example, on the interlayer insulating layer 14, and is electrically floating.
- one light shielding film 51 is provided for each pixel circuit 4.
- one light shielding film 51 may be provided for each of the plurality of pixel circuits 4, for example, one for each pixel row.
- the light-shielding film 51 may be formed at least immediately above (opposed region) of the LDD region 13b of the semiconductor layer 13A. Preferably, for example, from the LDD regions 13a and 13b and the channel region 13c of the semiconductor layer 13A. A pair of openings A1 and A2 provided on both sides of the semiconductor layer 13A are covered.
- the light shielding film 51 on the openings A1 and A2 is preferably formed along with the shape of the openings A1 and A2 together with the interlayer insulating layer 14.
- the light-shielding film formed on the side surfaces of the LDD regions 13a and 13b and the channel region 13c of the semiconductor layer 13A becomes a double layer (second conductive film 13C2 and the light-shielding film 51), and incident light of an oblique component is incident. Is more suppressed.
- the material of the light shielding film 51 as with the second conductive film 13C2 of the gate electrode 13C, for example, a low reflectivity material such as W, Ti, Mo, Cr and Ta or a silicide compound thereof can be used.
- the light shielding film 51 is formed by using one or more of these materials.
- the thickness of the light shielding film 51 is preferably not less than 30 nm and not more than 1 ⁇ m, for example. In particular, as described above, in order for the light shielding film 51 to be embedded in the openings A1 and A2, the total film thickness of at least the second conductive film 13C2, the interlayer insulating layer 14, and the light shielding film 51 is shorter than the openings A1 and A2.
- the diameter for example, the width of the bottom surface in the X-axis direction in FIG. 8A.
- the total film thickness of the three layers is desirably 0.35 ⁇ m or less.
- the openings A1 and A2 only need to be arranged in parallel with the semiconductor layer 13A, as in the first embodiment. That is, the openings A1 and A2 may be formed in parallel to the scanning line WSL extending in the Z-axis direction as shown in FIG. 8A, or in the X-axis direction as shown in FIG. 8B. It may be formed in parallel to the extending scanning line WSL.
- the electrically floating light shielding film 51 is provided on the transistor 13 of the liquid crystal panel 5 used in the projection display device (projector 100). Specifically, since it is provided immediately above the LDD region 13b (opposite region) of the semiconductor layer 13A, light from above (incident light from the counter substrate 20 side) enters the LDD regions 13a and 13b and the channel region 13c. It is possible to block the intrusion. Therefore, the light shielding performance in the above embodiment can be further improved.
- the light shielding film 51 so as to cover the pair of openings A1 and A2 provided on both sides of the semiconductor layer 13A from the LDD regions 13a and 13b and the channel region 13c of the semiconductor layer 13A, It becomes possible to further improve the light shielding property.
- FIG. 10 illustrates a part of a cross-sectional configuration of the liquid crystal panel 6 included in the projection display device (projector 100) according to the modified example of the present disclosure.
- the gate electrode 63C has a laminated structure of the first conductive film 63C1 and the second conductive film 63C2, as in the first and second embodiments, and the second conductive film 63C2 It differs from the first and second embodiments in that it is formed as a multilayer film (here, two layers; 63x, 63y) made of different materials.
- the gate electrode 63C has a structure in which the first conductive film 63C1 and the second conductive film 63C2 are stacked in this order from the support substrate 11 side as described above.
- the second conductive film 63C2 further includes a multilayer film (first conductive film).
- the second conductive films 63x and 63y) are formed in order from the 63C1 side.
- the second conductive films 63x and 63y are preferably formed using materials having different transmission wavelength ranges, for example. Examples of the material of the second conductive film 63x include Ti, Mo and oxides, nitrides or silicide films thereof. Examples of the material of the second conductive film 63y include W and its nitride or silicide film.
- the thicknesses of the second conductive film 63x and the second conductive film 63y are each preferably in the range of 30 nm to 400 nm, and the second conductive film 63x and the second conductive film 63y are combined to form the second embodiment. Similarly, it is desirable that it is smaller than the minor axis of the openings A1 and A2.
- the light-shielding second conductive film 63C2 As described above, by forming the light-shielding second conductive film 63C2 as a laminated film, it is possible to further improve the light-shielding performance in addition to the effects of the first embodiment. This is because it is possible to block stray light through grain boundaries and pinholes that may be formed in the second conductive film 63C2. Furthermore, by forming the second conductive films 63x and 63y using, for example, materials having different transmission wavelengths, there is an effect that it is possible to ensure a light shielding property against light in a wider wavelength range.
- the configuration of the second conductive film 63C2 of the present modification can also be applied to the second embodiment.
- the second embodiment and this modification light propagation in the insulating layers (interlayer insulating layers 12, 14 and gate insulating layer 13B) under the light shielding film 51 is suppressed, and higher light shielding performance is obtained. There is an effect that can be.
- FIG. 11 shows the improvement rate of flicker in Examples 1 and 2 with respect to the comparative example when the liquid crystal panels according to the examples (Examples 1 and 2) and the comparative example are irradiated with light.
- the liquid crystal panel according to Example 1 corresponds to the first embodiment in which the second conductive film 13C2 having light shielding properties is formed from the side surface to the bottom surface of the openings A1 and A2.
- the liquid crystal panel according to Example 2 corresponds to the second embodiment in which an electrically floating light shielding film 51 is further provided on the semiconductor layer 13A.
- the liquid crystal panel according to the comparative example is a general liquid crystal panel in which only a polysilicon film (corresponding to the first conductive film of the present disclosure) is formed in the openings A1 and A2.
- Example 1 the improvement rate of Example 1 with respect to the comparative example was 11.7%, and the improvement rate of Example 2 was 24.7%.
- the liquid crystal panel of the present disclosure incidence of oblique component light (stray light) into the channel region and the LDD region in the vicinity thereof is prevented and generation of light leakage current is suppressed as compared with a general liquid crystal panel. It was confirmed that Furthermore, it was found that a higher light shielding property can be obtained by forming the electrically floating light shielding film 51 on the semiconductor layer 13A.
- FIG. 12 shows the measured resistance values of the connection portion between the gate electrode and the scanning line in the openings A1 and A2 of the comparative example and the first embodiment.
- the resistance value is about 0.98 Kohm, whereas in the openings A1 and A2, the second light-shielding property is provided.
- the resistance value was 0.01 Kohm, which was reduced to about 1/100. This is considered to be because the oxide film was formed by the high-temperature furnace operation in forming the polysilicon film in the comparative example. Since the second conductive film 13C2 (for example, WSi film) having a light shielding property used in Example 1 does not require a high-temperature furnace operation for formation, an oxide film is not formed.
- the gate electrode 13C has a laminated structure of the first conductive film 13C1 made of polysilicon or the like and the second conductive film 13C2 having light shielding properties, and a pair of openings A1 and A2 provided on both sides of the semiconductor layer 13A. It can be seen that the flicker value could be kept low by extending the second conductive film 13C2 inside. It can also be seen that the flicker value can be further reduced by providing the electrically floating light-shielding film 51 on the semiconductor layer 13A. In addition, it can be seen that the electrical connection between the scanning line WSL and the gate electrode 13C is performed by the second conductive film, whereby the resistance value of the connection portion between the scanning line WSL and the gate electrode 13C can be reduced. .
- the present disclosure is not limited to these embodiments and the like, and various modifications are possible.
- the alignment film may be rectangular or the like, and is particularly useful when it has a shape including corners.
- the structure of the gate electrode 13C (and gate electrode 63C) and the openings A1, A2 and the like of the present disclosure can be applied not only to the projection display device but also to all semiconductor devices that need to be shielded from light. Further, in the above-described embodiment and the like, an example in which a liquid crystal element is used as a display element has been described. However, the present invention is not limited thereto, and for example, an organic EL element or CLED may be used.
- the semiconductor device and the projection display device of the present disclosure may have the following configurations.
- a first substrate A TFT element including a semiconductor layer and a gate electrode provided on the semiconductor layer with a gate insulating layer interposed between the first interlayer insulating layer provided on the first substrate;
- a second substrate disposed opposite to the first substrate,
- the gate electrode has a first conductive film and a light-shielding second conductive film in order from the semiconductor layer side, The second conductive film extends from a side surface to a bottom surface of a pair of openings provided with the semiconductor layer therebetween.
- a light-shielding film is provided on the TFT element via a second interlayer insulating layer.
- the second conductive film is a stacked film including a plurality of layers.
- the semiconductor layer has an LDD region.
- the semiconductor device according to any one of (1) to (9), wherein the second conductive film is formed using a low refractive index material.
Abstract
Description
1.第1の実施の形態(ゲート電極を第1導電膜および遮光性を有する第2導電から構成し、第2導電膜を走査線との接続孔の底面まで延在させた液晶投射型表示装置の例)
1-1.液晶パネルの構成
1-2.投射型表示装置の全体構成
1-3.作用・効果
2.第2の実施の形態(更に、ゲート電極の上方に電気的にフローティングな遮光膜を設けた例)
3.変形例(第2導電膜を積層膜として形成した例)
4.実施例
図1は、本開示の第1の実施の形態に係る投射型表示装置(プロジェクタ100,図4参照)に含まれる液晶パネル1の断面構成を表したものである。プロジェクタ100は、例えば、図1に示した液晶パネル1と、表示制御部41、データドライバ42およびゲートドライバ43とを有する駆動回路40等を備え、外部から入力される映像信号Dinに基づいて画像をスクリーン200に表示するものである(いずれも図4,図5参照)。
図2Aは、図1に示した液晶パネル1の平面構成を表したものであり、図1は、図2のI-I線に対応する断面図である。図3は、図2AのII-II線における断面構成を表したものである。液晶パネル1は、対向配置された駆動基板10と対向基板20との間に、液晶層30が封止されたものである。
図4は、プロジェクタ100の全体構成の一例を表したものである。プロジェクタ100は、例えば、3板式の透過型プロジェクタであり、例えば、発光部110、光路分岐部120、空間光変調部130、合成部140および投影部150を有している。
前述したように、液晶パネルの画像不良の発生を抑制するためには、画素回路に含まれるTFT素子の半導体層に光が照射されるのを遮ることが非常に重要である。このため、半導体層に対する遮光性能を向上させた様々な構造が提案されている。第1の構造としては、走査線の上方に半導体層およびゲート電極をこの順に形成し、半導体層のチャネル領域の両側に配置された接続孔をゲート電極で埋設し、ゲート電極と走査線とを一体化したものがある。第2の構造は、半導体層のLDD領域の上層に絶縁膜を挟んで遮光膜を配置することでLDD領域への遮光性能を向上させたものがある。第3の構造は、ゲート電極を、遮光性を有する材料で構成し、このゲート電極を半導体層のLDD領域の両側に設けられた走査線とのコンタクトホールに延在させたもの、あるいは、さらにゲート電極上に遮光膜を配置したものがある。
図7は、本開示の第2の実施の形態に係る投射型表示装置(プロジェクタ100)に含まれる液晶パネル5の断面構成を表したものである。図8Aは、図7に示した液晶パネル1の平面構成を表したものであり、図7は、図8AのIII-III線に対応する断面図である。図9は、図8AのIV-IV線における断面構成を表したものである。本実施の形態の液晶パネル5は、電気的にフローティングな遮光膜51がトランジスタ13上に形成された点が上記第1の実施の形態とは異なる。
図10は、本開示の変形例に係る投射型表示装置(プロジェクタ100)に含まれる液晶パネル6の断面構成の一部を表したものである。本変形例では、ゲート電極63Cは、上記第1および第2の実施の形態と同様に、第1導電膜63C1および第2導電膜63C2の積層構造を有するものであり、第2導電膜63C2が互いに異なる材料からなる多層膜(ここでは2層;63x,63y)として形成されている点が上記第1および第2の実施の形態とは異なる。
図11は、実施例(実施例1,2)および比較例に係る液晶パネルに光を照射したときの比較例に対する実施例1,2におけるフリッカの改善率を表したものである。実施例1に係る液晶パネルは、開口A1,A2の側面から底面にかけて遮光性を有する第2導電膜13C2が形成された第1の実施の形態に対応するものである。実施例2に係る液晶パネルは、さらに半導体層13A上に電気的にフローティングな遮光膜51が設けられた第2の実施の形態に対応するものである。比較例に係る液晶パネルは、一般的な液晶パネルであり、開口A1,A2内にポリシリコン膜(本開示の第1導電膜に相当)のみが形成されたものである。
(1)
第1基板と、
前記第1基板の上に設けられた第1の層間絶縁層を介すると共に、半導体層と、前記半導体層上にゲート絶縁層を介して設けられたゲート電極とを含むTFT素子と、
前記第1基板に対向配置された第2基板とを備え、
前記ゲート電極は、前記半導体層側から順に第1の導電膜および遮光性を有する第2の導電膜を有し、
前記第2の導電膜は、前記半導体層を間に設けられた一対の開口の側面から底面にかけて延在している
半導体装置。
(2)
前記第1基板と前記第1の層間絶縁層との間に走査線を有し、
前記一対の開口は前記第1の層間絶縁層および前記ゲート絶縁層を貫通し、
前記第2の導電膜は、前記一対の開口の前記底面において前記走査線と電気的に接続されている、前記(1)に記載の半導体装置。
(3)
前記TFT素子上に第2の層間絶縁層を介して遮光膜が設けられている、前記(1)または(2)に記載の半導体装置。
(4)
前記第2の導電膜は複数の層からなる積層膜である、前記(1)乃至(3)のうちのいずれかに記載の半導体装置。
(5)
前記半導体層はLDD領域を有する、前記(1)乃至(4)のうちのいずれかに記載の半導体装置。
(6)
前記一対の開口は、前記半導体層の前記LDD領域を間に設けられている、前記(5)に記載の半導体装置。
(7)
前記遮光膜は、前記LDD領域上に設けられている、前記(5)または(6)に記載の半導体装置。
(8)
前記遮光膜は、前記一対の開口によって形成される凹部の側面から底面にかけて延在している、前記(3)乃至(7)のうちのいずれかに記載の半導体装置。
(9)
前記第2導電膜、前記第2の層間絶縁層および前記遮光膜の合計膜厚は、前記一対の開口の短径よりも小さい、前記(3)乃至(8)のうちのいずれかに記載の半導体装置。
(10)
前記第2の導電膜は低屈折率材料を用いて形成されている、前記(1)乃至(9)のうちのいずれかに記載の半導体装置。
(11)
第1基板と、
前記第1基板の上に設けられた第1の層間絶縁層を介すると共に、半導体層と、前記半導体層上にゲート絶縁層を介して設けられたゲート電極とを含むTFT素子と、
前記第1基板に対向配置された第2基板と、
前記第1基板と前記第2基板との間に設けられた表示層とを備え、
前記ゲート電極は、前記半導体層側から順に第1の導電膜および遮光性を有する第2の導電膜を有し、
前記第2の導電膜は、前記半導体層を間に設けられた一対の開口の側面から底面にかけて延在している
投射型表示装置。
Claims (11)
- 第1基板と、
前記第1基板の上に設けられた第1の層間絶縁層を介すると共に、半導体層と、前記半導体層の上にゲート絶縁層を介して設けられたゲート電極とを含むTFT素子と、
前記第1基板に対向配置された第2基板とを備え、
前記ゲート電極は、前記半導体層の側から順に第1の導電膜および遮光性を有する第2の導電膜を有し、
前記第2の導電膜は、前記半導体層を間に設けられた一対の開口の側面から底面にかけて延在している
半導体装置。 - 前記第1基板と前記第1の層間絶縁層との間に走査線を有し、
前記一対の開口は前記第1の層間絶縁層および前記ゲート絶縁層を貫通し、
前記第2の導電膜は、前記一対の開口の前記底面において前記走査線と電気的に接続されている、請求項1に記載の半導体装置。 - 前記TFT素子上に第2の層間絶縁層を介して遮光膜が設けられている、請求項1に記載の半導体装置。
- 前記第2の導電膜は複数の層からなる積層膜である、請求項1に記載の半導体装置。
- 前記半導体層はLDD領域を有する、請求項1に記載の半導体装置。
- 前記一対の開口は、前記半導体層の前記LDD領域を間に設けられている、請求項5に記載の半導体装置。
- 前記遮光膜は、前記LDD領域上に設けられている、請求項3に記載の半導体装置。
- 前記遮光膜は、前記一対の開口によって形成される凹部の側面から底面にかけて延在している、請求項3に記載の半導体装置。
- 前記第2の導電膜、前記第2の層間絶縁層および前記遮光膜の合計膜厚は、前記一対の開口の短径よりも小さい、請求項3に記載の半導体装置。
- 前記第2の導電膜は低屈折率材料を用いて形成されている、請求項1に記載の半導体装置。
- 第1基板と、
前記第1基板の上に設けられた第1の層間絶縁層を介すると共に、半導体層と、前記半導体層の上にゲート絶縁層を介して設けられたゲート電極とを含むTFT素子と、
前記第1基板に対向配置された第2基板と、
前記第1基板と前記第2基板との間に設けられた表示層とを備え、
前記ゲート電極は、前記半導体層の側から順に第1の導電膜および遮光性を有する第2の導電膜を有し、
前記第2の導電膜は、前記半導体層を間に設けられた一対の開口の側面から底面にかけて延在している
投射型表示装置。
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US11662640B2 (en) | 2020-01-30 | 2023-05-30 | Seiko Epson Corporation | Electro-optical device with interlayer insulating layers and contact holes, and electronic apparatus |
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