WO2017071393A1 - 印制线路板及其制作方法 - Google Patents

印制线路板及其制作方法 Download PDF

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Publication number
WO2017071393A1
WO2017071393A1 PCT/CN2016/096900 CN2016096900W WO2017071393A1 WO 2017071393 A1 WO2017071393 A1 WO 2017071393A1 CN 2016096900 W CN2016096900 W CN 2016096900W WO 2017071393 A1 WO2017071393 A1 WO 2017071393A1
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WIPO (PCT)
Prior art keywords
copper
area
pattern
local
board
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PCT/CN2016/096900
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English (en)
French (fr)
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李娟�
史宏宇
陈蓓
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广州兴森快捷电路科技有限公司
深圳市兴森快捷电路科技股份有限公司
宜兴硅谷电子科技有限公司
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Application filed by 广州兴森快捷电路科技有限公司, 深圳市兴森快捷电路科技股份有限公司, 宜兴硅谷电子科技有限公司 filed Critical 广州兴森快捷电路科技有限公司
Publication of WO2017071393A1 publication Critical patent/WO2017071393A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377—Protective layers
    • H05K2203/1388—Temporary protective conductive layer

Definitions

  • the invention relates to the field of printed circuit boards, in particular to a printed circuit board and a manufacturing method thereof.
  • PCB Printed Circuit Board
  • Graphic plating (plating) copper-nickel gold + electroplating hard gold process referred to as hydraulic gold process
  • the nickel-gold layer is a resist layer during etching. Lateral etching of the conventional hydraulic gold process may cause side etching and over-etching. When the amount of over-etching is large and the over-etching is severe, the problem of suspended nickel may occur, which may lead to the line. Defects in the pads and/or lines in the pattern.
  • the amount of suspended nickel is generally controlled from two aspects: controlling the thickness of the base copper; controlling the stability of the etching line and making the first plate.
  • controlling the thickness of the base copper controlling the stability of the etching line and making the first plate.
  • the problem of the suspended nickel is still unavoidable. When the suspended nickel-gold layer collapses or falls off during subsequent use or transportation, it will exist. The risk of a short circuit during the test.
  • the present invention overcomes the deficiencies of the prior art, and provides a printed wiring board capable of improving the problem of pad defects and ensuring no nickel suspension in a local area of the pad and a method of fabricating the same.
  • a method for manufacturing a printed circuit board comprising the following steps:
  • Determining the local etched area determining a local etched area on one side of the entire board trace pattern, ensuring that all of the pads, lines, and copper in the partially etched area are in conduction with the base copper of the other side through the metal hole;
  • the first outer layer transfer after the local etched area pattern is formed, the first outer layer dry film is pasted on the board, and the whole board line pattern is exposed;
  • the picture is plated with copper-nickel gold: the PCB after the transfer of the first outer layer is sequentially plated with copper, nickel and gold layers in the plate, and all the pads, lines and the top and side of the copper are partially etched. All form a copper-nickel gold wrapping ring;
  • Outer pattern etching Etching the entire board pattern.
  • the step of fabricating the partially etched area pattern comprises:
  • a second outer layer pattern transfer a second outer layer dry film is attached to the PCB on the board, a dry etching window is locally etched, the local etched area pattern is exposed, and the local etched area is exposed Tin plating, re-filming treatment;
  • the specific steps of determining the local etched area are:
  • Determining a partial area on one side of the entire board line pattern as a determination area comparing the determination area with a hole bitmap in the entire board line pattern, and determining whether all pads, lines, and copper sheets in the determination area are
  • the base copper is turned on, and if it is turned on, the determination region is output as a local etched region; if not, it is further determined whether a metal hole can be made to make all the pads, lines and copper in the determination region
  • the skin is electrically connected to the base copper, and if so, a metal hole is formed in the determination region and the determination region is output as a partial etching region, and if not, a new determination region is newly determined.
  • the specific steps of determining the determination area are:
  • the through hole method is adopted to make all the pads, the lines and the copper skin in the local etching region directly communicate with the base copper; or, the blind holes and the through holes are adopted, and the blind holes, the internal lines and the through holes are combined. All of the pads, lines, and copper in the partially etched region are indirectly conductive to the base copper.
  • the method further comprises the steps of:
  • the third outer layer transfer the PCB after the copper-nickel-plated copper is plated with a gold-plated dry film on the board, and the hard gold pattern area is dried to open the window;
  • Electroplated hard gold The hard gold plating area is plated with hard gold and peeled off.
  • the step of preparing the PCB in the board comprises: preparing a plurality of core boards of the PCB in the board, fabricating the inner layer, laminating a plurality of core boards, and POFV (Plating Over Filled Via) Electroplating on the hole after the hole plug) Process, drilling and metallization of the hole.
  • a printed wiring board produced by the above-described method for manufacturing a printed wiring board is a printed wiring board produced by the above-described method for manufacturing a printed wiring board.
  • All the pads, lines and copper in the partially etched region are electrically connected to the base copper on the other side through the metal hole, and all the pads, lines and copper in the partially etched area are plated with copper-nickel gold.
  • a copper-nickel-gold wrap can be formed on the top surface and the side surface. When the outer pattern is etched, the copper-nickel gold wrap can protect the pads, lines and copper skin in the partially etched area pattern from the top surface and all sides. It can avoid the problem of hanging nickel in the local etched area, improve the pad defect problem, and ensure that there is no hanging nickel in the local area of the pad.
  • the manufacturing method of the printed circuit board is conducted by using a metal hole to form a copper-nickel gold wrapping ring on the pad, the line and the copper skin of the local etching region, without additionally increasing the wire conduction, and the copper-nickel gold wrapping after the etching is completed
  • the circle does not need to be removed, the process is simple, the operation is convenient, and the pad fabrication ability and the pass rate can be effectively improved.
  • the printed circuit board is produced by the manufacturing method of the printed circuit board, and thus has the technical effect of the manufacturing method of the printed circuit board, wherein the printed circuit board has no problem of hanging nickel in the pad and the line of the local area. The performance is stable.
  • FIG. 1 is a schematic flow chart 1 of a method for fabricating a printed circuit board according to an embodiment of the present invention
  • FIG. 2 is a schematic flow chart 2 of a method for manufacturing a printed circuit board according to an embodiment of the present invention
  • FIG. 3 is a cross-sectional view showing a circuit board after preparing a PCB in a board forming step according to an embodiment of the present invention
  • FIG. 4 is a cross-sectional view of a circuit board after the step of forming a partially etched area pattern according to an embodiment of the invention.
  • FIG. 5 is a cross-sectional view of the circuit board after the first outer layer pattern transfer step according to the embodiment of the present invention.
  • FIG. 6 is a cross-sectional view showing a circuit board after the step of plating copper and nickel gold according to an embodiment of the present invention
  • FIG. 7 is a cross-sectional view of the circuit board after the outer layer pattern etching step according to the embodiment of the present invention.
  • a method for manufacturing a printed circuit board includes the following steps:
  • the step of preparing the PCB in the board by the S110 includes:
  • S111 is prepared to make a plurality of core boards of PCB in the board
  • the inner layer board is made according to the design requirements
  • S113 laminating a plurality of core plates stacking a plurality of core plates, and moving the stacked plurality of core plates into a pressing furnace to be pressed by a hot pressing process to form a multilayer board;
  • FIG. 4 is a cross-sectional view showing the circuit board after the step of determining the local etched region 10 in S120, referring to FIG.
  • S120 determines the local etched region 10: a local etched region is determined on one side of the full-board trace pattern to ensure that all of the pads, traces, and copper in the partially etched region are conductive through the metal via 20 to the base copper 30 on the other side. Further, it is ensured that all the pads, the lines and the copper skin in the local etched region are electrically connected to the base copper 30 on the other side through the metal hole 20: the through-hole method is adopted to make all the portions in the local etched region 10 Pads, lines, and copper are directly conductive to the base copper 30; or In the blind hole and through hole manner, all the pads, lines and copper in the local etched region 10 are indirectly connected to the base copper 30 through the blind hole, the inner line and the through hole.
  • Both direct conduction and indirect conduction can meet the requirements of conduction, and the process limitation when manufacturing the metal hole 20 is small and easy to implement.
  • the metal hole 20 By using the metal hole 20 to be turned on, it is ensured that a copper-nickel-gold wrap is formed on all the pads, lines, and the top surface and all sides of the copper etched portion 10 in the subsequent process of plating copper, nickel and gold.
  • there is no need to additionally increase the wire conduction and there is no need to add another process to wash off the wire, the process is simple, and the operation is convenient.
  • the distance between the pattern and the side conductor in the determination area is set to be greater than 10 mil, that is, the distance between the pattern and the side conductor in the local etched area 10 Greater than 10 mils, providing a space for the copper-nickel gold wrap.
  • the outer layer dry film has the best film-coating ability, and it is less likely to cause gold seepage during electroplating, and the steps are easy to control and the process stability is high.
  • the step can be implemented by writing a software script, which is convenient to judge and simple to operate.
  • Determining a partial area on one side of the entire board line pattern as a determination area comparing the determination area with a hole bitmap in the entire board line pattern, and determining whether all pads, lines, and copper sheets in the determination area are
  • the base copper is turned on, and if it is turned on, the determination region is output as a local etched region; if not, it is further determined whether a metal hole can be made to make all the pads, lines and copper in the determination region
  • the skin is electrically connected to the base copper, and if so, a metal hole is formed in the determination region and the determination region is output as a partial etching region, and if not, a new determination region is newly determined.
  • the partial area is not limited to the part representing only one side of the whole board circuit pattern, and also includes the whole surface on one side of the whole board line pattern, that is, when all the areas on one side of the whole board line pattern satisfy the guide. When the conditions are met, all areas on one side of the entire board pattern can also be output as a partially etched area.
  • the determination area can be used as the local etching area 10 by comparing with the hole bitmap in the whole board circuit pattern, if the completed hole can satisfy the conduction condition, the next step can be directly performed without Adding other process steps is easy to operate. If the prepared hole cannot satisfy the conduction condition, further determination may be made, and according to the importance of the determination region in the line, whether or not the metal hole needs to be formed is actively selected, so that the determination region satisfies the condition of the local etching region 10 That is, the local etched area 10 is more actively selected to protect the key areas in the entire board circuit pattern to ensure the pad and line integrity of the key parts of the printed circuit board.
  • the step can be implemented by writing a software script, which is convenient to judge and simple to operate.
  • S130 creates a partially etched area pattern: the pads, lines, and copper in the partially etched areas are fabricated on the board.
  • the step of the S130 forming the partial etched area 10 pattern includes:
  • S131 second outer layer pattern transfer a second outer layer dry film is attached to the PCB on the board, a local etched area dry film is opened, the local etched area pattern is exposed, and the local etched area is exposed Soldering on the tin and retreating the film.
  • the PCB to which the second outer layer dry film is attached is placed in an exposure apparatus for exposure processing, and then developed to expose the pattern of the partially etched area, and then tin plating is performed to protect the partially etched area, and then The film peeling process exposes other areas.
  • the exposure processing adopts LDI (Laser direct imaging) exposure, which does not require pre-photographing film, has high alignment precision and is convenient to operate.
  • LDI Laser direct imaging
  • the pattern in the local etched area is exposed by a positive film, which can effectively avoid the problem that the dry film blocks the line during development, and improve the yield of the printed circuit board.
  • FIG. 5 is a cross-sectional view showing the circuit board after the first outer layer pattern transfer step of S140. Referring to FIG. 5,
  • the first outer layer pattern transfer of S140 the first outer layer dry film 40 is pasted on the board after the pattern of the partially etched area 10 is formed, and the dry film is opened in the partially etched area to expose the whole board line pattern.
  • the PCB to which the first outer layer dry film 40 is attached is placed in an exposure apparatus for exposure processing, and then developed to expose the entire board wiring pattern.
  • FIG. 6 is a cross-sectional view showing the circuit board after the step of plating copper and nickel gold in S150, referring to FIG.
  • S150 pattern copper-plated nickel-gold The PCB after the first outer layer transfer is sequentially plated with copper layer 50, nickel layer 60 and gold layer 70, and all the pads, lines and copper tops in the partially etched area. A copper-nickel gold wrap is formed on both the face and the side.
  • the method further comprises the steps of:
  • S160 third outer layer transfer after the copper-plated nickel-plated PCB is coated with a gold-plated dry film on the board, the hard gold pattern area is dry filmed, and the surface is formed on the area other than the hard gold-plated area.
  • Membrane plating resistance after the copper-plated nickel-plated PCB is coated with a gold-plated dry film on the board, the hard gold pattern area is dry filmed, and the surface is formed on the area other than the hard gold-plated area.
  • Electroplated hard gold is applied to the hard gold pattern area and the film is peeled off.
  • the dry film anti-plating layer is used for electroplating hard gold treatment to obtain a hard gold plating layer, and the gold plating dry film is removed by an alkaline solution.
  • the gold layer can be thickened to the required value to meet the processing requirements of the partial gold-plated surface, the process flow is simple, and the operation is convenient.
  • FIG. 7 is a cross-sectional view showing the circuit board after the S180 outer layer etching step, referring to FIG.
  • S180 outer pattern etching etch the entire board circuit pattern.
  • the PCB is integrally etched on the board, and the hard gold layer is used as a resist layer to etch the entire board pattern.
  • the pads, lines and copper skin in the partially etched region 10 are protected by a copper-nickel gold wrap, and there is no problem of hanging nickel.
  • the partially etched area 10 pattern is formed on the PCB on the board, and then the whole board pattern is exposed through the first pattern transfer, and the whole board pattern is displayed.
  • the copper plating layer 50, the nickel layer 60, and the gold layer 70 are sequentially illustrated. Since all the pads, lines, and copper in the partially etched region 10 are electrically connected to the base copper 30 on the other side, when copper-nickel gold is plated, A copper-nickel-gold wrap can be formed on all of the pads, lines, and the top and all sides of the copper etched region 10.
  • the copper-nickel gold wrapping ring can protect the pads, the lines and the copper skin in the pattern of the local etching region 10 from the top surface and all the sides, and can avoid the problem of the hanging nickel in the local etching region 10, Improve pad defect problems and ensure no nickel suspension in local areas of the pad.
  • the manufacturing method of the printed circuit board adopts a metal hole for conducting a copper-nickel gold wrapping ring on the pad, the line and the copper skin of the local etching region, without additionally increasing the wire conduction, and the copper nickel after the etching is completed.
  • the gold wrapping ring also does not need to be removed, which can ensure the integrity of the pads and lines of the key parts of the printed circuit board, reduce the problems of plating and filming, improve the qualification rate of the pad production, and reduce the production cost.
  • the manufacturing method of the printed circuit board according to the embodiment is particularly suitable for a pad with a dense structure and a small size, such as a semiconductor test board, and the pad of the local etched region 10 can achieve a true roundness of more than 95%, pads and lines.
  • the production pass rate is high.
  • a printed wiring board produced by the above-described method for manufacturing a printed wiring board is manufactured by the manufacturing method of the printed circuit board, and thus has the technical effect of the manufacturing method of the printed circuit board, and the local area pad and the line of the printed circuit board have no problem of hanging nickel, and no Defects on pads and lines, stable and safe performance when used, high production yield and high production efficiency.

Abstract

提供一种印制线路板及其制作方法，所述印制线路板的制作方法包括以下步骤：准备PCB在制板、确定局部蚀刻区域（10）、制作局部蚀刻区域图形、第一次外层图形转移、图镀铜镍金以及外层图形蚀刻。所述局部蚀刻区域（10）中所有的焊盘、线路和铜皮的顶面及侧面上能够形成铜镍金包裹圈，在进行外层图形蚀刻时，铜镍金包裹圈能够从顶面及侧面对局部蚀刻区域图形中的焊盘、线路和铜皮进行保护，能够避免局部蚀刻区域（10）中出现悬镍问题，改善焊盘缺损问题、保证焊盘局部区域无悬镍。所述印制线路板的局部区域焊盘及线路无悬镍，使用性能稳定。

Description

印制线路板及其制作方法 技术领域
本发明涉及印制线路板领域，尤其涉及一种印制线路板及其制作方法。
背景技术
印制线路板(Printed Circuit Board，PCB)，又称印刷电路板，是电子元器件电气连接的提供者。图形电镀(图镀)铜镍金+电镀硬金工艺(简称水硬金工艺)具有接触电阻低、硬度高、寿命长等优点，已被广泛应用于PCB生产制作中。但是，镍金层在蚀刻中为抗蚀层，常规水硬金工艺外层蚀刻后会存在侧蚀和过蚀现象，过蚀量大、过蚀严重时会产生悬镍问题，进而会导致线路图形中的焊盘和/或线路发生缺损。传统的，一般从两个方面进行悬镍量的控制：控制底铜厚度；控制蚀刻线稳定性与制作首板。但是，仅从控制上来说，很难保证焊盘和/或线路外观上无缺损，悬镍问题仍无法避免,当悬着的镍金层在后续使用或运输过程中塌陷、脱落时,会存在测试过程中短路的风险。
发明内容
基于此，本发明在于克服现有技术的缺陷，提供一种能够改善焊盘缺损问题、保证焊盘局部区域无悬镍的印制线路板及其制作方法。
其技术方案如下：
一种印制线路板的制作方法，包括以下步骤：
准备PCB在制板；
确定局部蚀刻区域：在整板线路图形的一面上确定局部蚀刻区域，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔与另一面的基铜处于导通；
制作局部蚀刻区域图形：在所述PCB在制板上将局部蚀刻区域中的焊盘、线路和铜皮制作出来；
第一次外层图形转移：在制作局部蚀刻区域图形后的PCB在制板上贴第一外层干膜，将整板线路图形暴露出来；
图镀铜镍金：对第一次外层图形转移后的PCB在制板依次电镀铜层、镍层和金层，局部蚀刻区域中所有的焊盘、线路和铜皮的顶面及侧面上均形成铜镍金包裹圈；
外层图形蚀刻：将整板线路图形蚀刻出来。
在其中一个实施例中，所述制作局部蚀刻区域图形的步骤包括：
第二次外层图形转移：在所述PCB在制板上贴第二外层干膜，局部蚀刻区域干膜开窗，将所述局部蚀刻区域图形暴露出来，并在所述局部蚀刻区域上镀锡，再退膜处理；
局部蚀刻：将局部蚀刻区域中的焊盘、线路和铜皮蚀刻出来。
在其中一个实施例中，所述确定局部蚀刻区域的具体步骤为：
确定整板线路图形一面上的部分区域作为判定区域，将所述判定区域和整板线路图形中的孔位图进行对比，判断所述判定区域中所有的焊盘、线路和铜皮是否均与所述基铜处于导通，若处于导通，则输出该判定区域为局部蚀刻区域；若不处于导通，进一步判定能否制作金属孔使所述判定区域中所有的焊盘、线路和铜皮均与所述基铜导通，若能，对所述判定区域制作金属孔并输出该判定区域为局部蚀刻区域，若不能，则重新确定新的判定区域。
在其中一个实施例中，确定所述判定区域的具体步骤为：
随意框选整板线路图形一面上的部分区域并进行迭代运算，执行指令：若框选区域旁导体距离该区域内图形间距≤10mil，则合并为新区域；若框选区域旁导体距离该区域内图形间距＞10mil，则不合并；依次迭代，直至区域不再扩大为止，该最终区域为所述判定区域。
在其中一个实施例中，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔与另一面的基铜处于导通的方式为：
采用钻通孔方式，使局部蚀刻区域中所有的焊盘、线路和铜皮与所述基铜直接导通；或者，采用钻盲孔和通孔方式，通过盲孔、内部线路和通孔结合使局部蚀刻区域中所有的焊盘、线路和铜皮与所述基铜间接导通。
在其中一个实施例中，在所述图镀铜镍金步骤后，所述外层图形蚀刻步骤前，还包括步骤：
第三次外层图形转移：在图镀铜镍金后的PCB在制板上贴耐镀金干膜，镀硬金图形区域干膜开窗；
电镀硬金：对镀硬金图形区域进行电镀硬金处理并退膜。
在其中一个实施例中，所述准备PCB在制板的步骤包括：准备制作PCB在制板的多块芯板、内层图形制作、层压多块芯板、POFV(Plating Over Filled Via，通孔塞孔后孔上电镀)工艺、钻孔以及孔金属化。
一种由上述所述的印制线路板的制作方法制作得到的印制线路板。
本发明的有益效果在于：
所述局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔与另一面的基铜处于导通，图镀铜镍金时，局部蚀刻区域中所有的焊盘、线路和铜皮的顶面及侧面上能够形成铜镍金包裹圈，在进行外层图形蚀刻时，铜镍金包裹圈能够从顶面及所有侧面对局部蚀刻区域图形中的焊盘、线路和铜皮进行保护，能够避免局部蚀刻区域中出现悬镍问题，改善焊盘缺损问题、保证焊盘局部区域无悬镍。所述印制线路板的制作方法，采用金属孔进行导通使局部蚀刻区域的焊盘、线路和铜皮上形成铜镍金包裹圈，无需另外增加导线导通，蚀刻完成后铜镍金包裹圈也无需去除，工艺简单，操作方便，能有效提高焊盘制作能力及合格率。
所述印制线路板由上述印制线路板的制作方法制作得到，因此具备所述印制线路板的制作方法的技术效果，所述印制线路板局部区域焊盘及线路无悬镍问题，使用性能稳定。
附图说明
图1为本发明实施例所述的印制线路板的制作方法的流程示意图一；
图2为本发明实施例所述的印制线路板的制作方法的流程示意图二；
图3为本发明实施例所述的准备PCB在制板步骤后线路板的剖示图；
图4为本发明实施例所述的制作局部蚀刻区域图形步骤后线路板的剖示 图；
图5为本发明实施例所述的第一次外层图形转移步骤后线路板的剖示图；
图6为本发明实施例所述的图镀铜镍金步骤后线路板的剖示图；
图7为本发明实施例所述的外层图形蚀刻步骤后线路板的剖示图。
附图标记说明：
10、局部蚀刻区域，20、金属孔，30、基铜，40、第一外层干膜，50、铜层，60、镍层，70、金层。
具体实施方式
下面对本发明的实施例进行详细说明：
如图1、图2所示，一种印制线路板的制作方法，包括以下步骤：
S110准备PCB在制板；
具体的，S110准备PCB在制板的步骤包括：
S111准备制作PCB在制板的多块芯板；
S112内层图形制作：按照设计要求制作内层板；
S113层压多块芯板：使多块芯板叠合，将叠合后的多块芯板移入压炉中采用热压工艺进行压合，形成多层板；
S114POFV工艺、钻孔以及孔金属化：按照设计要求制作金属孔。
采取上述流程，将PCB在制板准备好，制作得到的PCB在制板的剖面示意图如图3所示。
图4示出了S120确定局部蚀刻区域10步骤后的线路板的剖面示意图，参照图4，
S120确定局部蚀刻区域10：在整板线路图形的一面上确定局部蚀刻区域，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔20与另一面的基铜30处于导通。进一步的，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔20与另一面的基铜30处于导通的方式为：采用钻通孔方式，使局部蚀刻区域10中所有的焊盘、线路和铜皮与所述基铜30直接导通；或 者，采用钻盲孔和通孔方式，通过盲孔、内部线路和通孔结合使局部蚀刻区域10中所有的焊盘、线路和铜皮与所述基铜30间接导通。采用直接导通或间接导通两种形式，均能够满足导通的要求，对制作金属孔20时的工艺限制小，易于实现。采用金属孔20导通的方式，能够保证在后续图镀铜镍金过程中，局部蚀刻区域10中所有的焊盘、线路和铜皮的顶面及所有侧面上均形成铜镍金包裹圈，且无需另外增加导线导通，也就不需要增加另外的流程洗掉导线，工艺简单，操作方便。
进一步的，S120确定局部蚀刻区域10的具体步骤为：
确定判定区域：
随意框选整板线路图形一面上的部分区域并进行迭代运算，执行指令：若框选区域旁导体距离该区域内图形间距≤10mil，则合并为新区域；若框选区域旁导体距离该区域内图形间距＞10mil，则不合并；依次迭代，直至区域不再扩大为止，该最终区域为所述判定区域。
结合实际电镀、蚀刻、贴膜、对位等因素的控制能力，考虑制作能力、生产成本的因素下，设定判定区域内图形与其旁导体距离大于10mil，即局部蚀刻区域10内图形与其旁导体距离大于10mil，从而为铜镍金包裹圈提供包裹空间。且在上述范围中时，外层干膜的贴膜能力最佳，电镀时不易发生渗金，各个步骤易于控制，工艺稳定性高。优选的，该步骤可通过编写软件脚本实现，判断方便，操作简单。
确定局部蚀刻区域10：
确定整板线路图形一面上的部分区域作为判定区域，将所述判定区域和整板线路图形中的孔位图进行对比，判断所述判定区域中所有的焊盘、线路和铜皮是否均与所述基铜处于导通，若处于导通，则输出该判定区域为局部蚀刻区域；若不处于导通，进一步判定能否制作金属孔使所述判定区域中所有的焊盘、线路和铜皮均与所述基铜导通，若能，对所述判定区域制作金属孔并输出该判定区域为局部蚀刻区域，若不能，则重新确定新的判定区域。另外，所述部分区域并不局限于只代表整板线路图形一面上的部分，也包括整板线路图形一面上的整面，即当整板线路图形一面上的全部区域均满足导 通条件时，整板线路图形一面上的全部区域也可作为局部蚀刻区域输出。
通过与整板线路图形中的孔位图进行对比来判断所述判定区域是否可作为局部蚀刻区域10，若已制作好的孔中能够满足导通条件，则可直接进行下一步骤，而无需增加其他工艺步骤，操作简单。若已制作好的孔中不能够满足导通条件，则可以进行进一步的判定，根据该判定区域在线路中的重要性，主动选择是否需要制作金属孔，使该判定区域满足局部蚀刻区域10条件，即更为主动地选定局部蚀刻区域10，对整板线路图形中的关键区域进行保护，保证印制线路板关键部位的焊盘及线路完整性。优选的，该步骤可通过编写软件脚本实现，判断方便，操作简单。
S130制作局部蚀刻区域图形：在所述PCB在制板上将局部蚀刻区域中的焊盘、线路和铜皮制作出来。
具体的，S130制作局部蚀刻区域10图形的步骤包括：
S131第二次外层图形转移：在所述PCB在制板上贴第二外层干膜，局部蚀刻区域干膜开窗，将所述局部蚀刻区域图形暴露出来，并在所述局部蚀刻区域上镀锡，再退膜处理。将贴有第二外层干膜的PCB在制板放入曝光装置中进行曝光处理，再显影处理，使局部蚀刻区域的图形暴露出来，然后镀锡对所述局部蚀刻区域进行保护，再进行退膜处理使其他区域露出。进一步的，曝光处理采用LDI(Laser direct imaging,激光直接成像)曝光，无需预先光绘菲林，对位精度高，操作方便。
S132局部蚀刻：将局部蚀刻区域中的焊盘、线路和铜皮蚀刻出来。
采用正片的方式将局部蚀刻区域中的图形暴露出来，能够有效避免显影时干膜堵塞线路的问题，提高印制线路板制作的合格率。
图5示出了S140第一次外层图形转移步骤后的线路板的剖面示意图，参照图5，
S140第一次外层图形转移：在制作局部蚀刻区域10图形后的PCB在制板上贴第一外层干膜40，局部蚀刻区域干膜开窗，将整板线路图形暴露出来。将贴有第一外层干膜40的PCB在制板放入曝光装置中进行曝光处理，再显影处理，使整板线路图形暴露出来。
图6示出了S150图镀铜镍金步骤后的线路板的剖面示意图，参照图6，
S150图镀铜镍金：对第一次外层图形转移后的PCB在制板依次电镀铜层50、镍层60和金层70，局部蚀刻区域中所有的焊盘、线路和铜皮的顶面及侧面上均形成铜镍金包裹圈。
进一步的，在所述S150图镀铜镍金步骤后，外层图形蚀刻步骤前，还包括步骤：
S160第三次外层图形转移：在图镀铜镍金后的PCB在制板上贴耐镀金干膜，镀硬金图形区域干膜开窗，在镀硬金区域图形以外的区域上形成干膜抗镀层；
S170电镀硬金：对镀硬金图形区域进行电镀硬金处理并退膜。利用所述干膜抗镀层进行电镀硬金处理，获得镀硬金层，并采用碱性溶液将耐镀金干膜退掉。
采用上述S160、S170步骤，能够将金层加厚到要求值，达到局部镀金表面的处理要求，工艺流程简单，操作方便。
图7示出了S180外层图形蚀刻步骤后的线路板的剖面示意图，参照图7，
S180外层图形蚀刻：将整板线路图形蚀刻出来。对PCB在制板进行整体蚀刻，以硬金层为抗蚀层，蚀刻出整板线路图形。蚀刻过程中，局部蚀刻区域10中的焊盘、线路和铜皮均被铜镍金包裹圈保护，不会出现悬镍问题。
本实施例所述的印制线路板的制作方法，首先在所述PCB在制板上制作出局部蚀刻区域10图形，然后通过第一次图形转移将整板图形暴露出来，并在整板图形上依次图镀铜层50、镍层60以及金层70，由于局部蚀刻区域10中所有的焊盘、线路和铜皮均与另一面的基铜30处于导通，图镀铜镍金时，局部蚀刻区域10中所有的焊盘、线路和铜皮的顶面及所有侧面上能够形成铜镍金包裹圈。最后进行外层图形蚀刻时，铜镍金包裹圈能够从顶面及所有侧面对局部蚀刻区域10图形中的焊盘、线路和铜皮进行保护，能够避免局部蚀刻区域10中出现悬镍问题，改善焊盘缺损问题、保证焊盘局部区域无悬镍。所述印制线路板的制作方法，采用金属孔进行导通在局部蚀刻区域的焊盘、线路和铜皮上形成铜镍金包裹圈，无需另外增加导线导通，蚀刻完成后铜镍 金包裹圈也无需去除，能够保证印制线路板关键部位的焊盘和线路的完整性，减少渗镀和夹膜问题，提高焊盘制作合格率，降低生产成本。本实施例所述的印制线路板的制作方法，尤其适用于结构密集、尺寸小的焊盘如半导体测试板，局部蚀刻区域10的焊盘圆真度可达到95％以上，焊盘和线路制作合格率高。
一种由上述所述的印制线路板的制作方法制作得到的印制线路板。所述线路板由上述印制线路板的制作方法制作得到，因此具备所述印制线路板的制作方法的技术效果，所述印制线路板的局部区域焊盘及线路无悬镍问题，无焊盘及线路缺损，使用时性能稳定、安全，生产合格率高，生产效率高。
需要说明的是，除非特别指出，否则说明书中的术语“第一”、“第二”、“第三”等描述仅仅用于区分说明书中的各个组件、元素、步骤等，而不是用于表示各个组件、元素、步骤之间的逻辑关系或者顺序关系等。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (8)

  1. 一种印制线路板的制作方法，其特征在于，包括以下步骤：
    准备PCB在制板；
    确定局部蚀刻区域：在整板线路图形的一面上确定局部蚀刻区域，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔与另一面的基铜处于导通；
    制作局部蚀刻区域图形：在所述PCB在制板上将局部蚀刻区域中的焊盘、线路和铜皮制作出来；
    第一次外层图形转移：在制作局部蚀刻区域图形后的PCB在制板上贴第一外层干膜，将整板线路图形暴露出来；
    图镀铜镍金：对第一次外层图形转移后的PCB在制板依次电镀铜层、镍层和金层，局部蚀刻区域中所有的焊盘、线路和铜皮的顶面及侧面上均形成铜镍金包裹圈；
    外层图形蚀刻：将整板线路图形蚀刻出来。
  2. 根据权利要求1所述的印制线路板的制作方法，其特征在于，所述制作局部蚀刻区域图形的步骤包括：
    第二次外层图形转移：在所述PCB在制板上贴第二外层干膜，局部蚀刻区域干膜开窗，将所述局部蚀刻区域图形暴露出来，在所述局部蚀刻区域上镀锡，再退膜处理；
    局部蚀刻：将局部蚀刻区域中的焊盘、线路和铜皮蚀刻出来。
  3. 根据权利要求1所述的印制线路板的制作方法，其特征在于，所述确定局部蚀刻区域的具体步骤为：
    确定整板线路图形一面上的部分区域作为判定区域，将所述判定区域和整板线路图形中的孔位图进行对比，判断所述判定区域中所有的焊盘、线路和铜皮是否均与所述基铜处于导通，若处于导通，则输出该判定区域为局部蚀刻区域；若不处于导通，进一步判定能否制作金属孔使所述判定区域中所有的焊盘、线路和铜皮均与所述基铜导通，若能，对所述判定区域制作金属孔并输出该判定区域为局部蚀刻区域，若不能，则重新确定新的判定区域。
  4. 根据权利要求3所述的印制线路板的制作方法，其特征在于，确定所述判定区域的具体步骤为：
    随意框选整板线路图形一面上的部分区域并进行迭代运算，执行指令：若框选区域旁导体距离该区域内图形间距≤10mil，则合并为新区域；若框选区域旁导体距离该区域内图形间距＞10mil，则不合并；依次迭代，直至区域不再扩大为止，该最终区域为所述判定区域。
  5. 根据权利要求1所述的印制线路板的制作方法，其特征在于，保证局部蚀刻区域中所有的焊盘、线路和铜皮均通过金属孔与另一面的基铜处于导通的方式为：
    采用钻通孔方式，使局部蚀刻区域中所有的焊盘、线路和铜皮与所述基铜直接导通；或者，采用钻盲孔和通孔方式，通过盲孔、内部线路和通孔结合使局部蚀刻区域中所有的焊盘、线路和铜皮与所述基铜间接导通。
  6. 根据权利要求1-5任一项所述的印制线路板的制作方法，其特征在于，在所述图镀铜镍金步骤后，所述外层图形蚀刻步骤前，还包括步骤：
    第三次外层图形转移：在图镀铜镍金后的PCB在制板上贴耐镀金干膜，镀硬金图形区域干膜开窗；
    电镀硬金：对镀硬金图形区域进行电镀硬金处理并退膜。
  7. 根据权利要求1-5任一项所述的印制线路板的制作方法，其特征在于，所述准备PCB在制板的步骤包括：准备制作PCB在制板的多块芯板、内层图形制作、层压多块芯板、POFV工艺、钻孔以及孔金属化。
  8. 一种由权利要求1-7任一项所述的印制线路板的制作方法制作得到的印制线路板。
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CN107920427B (zh) * 2016-10-09 2020-07-14 北大方正集团有限公司 电路板的金属连接结构的制备方法和印刷电路板
CN109219253B (zh) * 2018-09-26 2021-02-05 东莞美维电路有限公司 一种无悬镍无引线pcb制作工艺
CN113939097A (zh) * 2021-06-02 2022-01-14 深圳市强达电路股份有限公司 一种局部薄铜印制电路板制作方法
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CN114051326A (zh) * 2022-01-13 2022-02-15 广州添利电子科技有限公司 一种线路板及其加工方法
CN117042336A (zh) * 2023-08-17 2023-11-10 清远市富盈电子有限公司 一种焊盘侧边覆盖硬金的hdi电路板制作方法、pcb板

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