WO2017024981A1 - 一种端口防护电路集成封装件 - Google Patents

一种端口防护电路集成封装件 Download PDF

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Publication number
WO2017024981A1
WO2017024981A1 PCT/CN2016/093220 CN2016093220W WO2017024981A1 WO 2017024981 A1 WO2017024981 A1 WO 2017024981A1 CN 2016093220 W CN2016093220 W CN 2016093220W WO 2017024981 A1 WO2017024981 A1 WO 2017024981A1
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WIPO (PCT)
Prior art keywords
circuit
conductive
integrated package
substrate
port protection
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PCT/CN2016/093220
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English (en)
French (fr)
Inventor
苟引刚
王久
高桂丽
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深圳市槟城电子有限公司
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Publication of WO2017024981A1 publication Critical patent/WO2017024981A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Definitions

  • the present application relates to the field of port circuit protection, and in particular to a port protection circuit integrated package.
  • the internal structure of electronic equipment is highly integrated, such as ultra-large-scale integrated circuit chips, which causes the equipment to withstand overvoltage and overcurrent levels. Or the ability to withstand overvoltage surges is reduced; on the other hand, due to the increased signal source path, the system is more susceptible to lightning wave intrusion than before, and the surge voltage can be injected into the device from power lines or signal lines. Therefore, the overvoltage protection component is a key component of lightning protection, overvoltage protection and overcurrent protection, and must be overcome, and the contradiction between miniaturization and performance must be overcome to meet the development direction of miniaturization and integration of electronic equipment.
  • the embodiment of the present application provides a port protection circuit integrated package and a manufacturing method thereof, which solves the problems that the existing port circuit realizes time-consuming, many processes, occupying a large PCB area, low production efficiency, and poor product stability.
  • an embodiment of the present application provides a port protection circuit integrated package, including:
  • At least one circuit module disposed adjacent to the substrate each of the circuit modules includes at least one component and/or includes at least one integrated package module, each of the integrated package modules including at least two components, all At least one of the components is a circuit protection component; at least one of the pin terminals of at least one of the circuit modules distributed between the adjacent substrates serves as an external electrode terminal and is distributed between adjacent ones of the substrates
  • the at least one circuit module is connected to at least one of the adjacent ones of the substrates by electrical connection of the external electrode terminals and the conductive connectors of the at least one substrate; part or all of all circuit modules have The components of the circuit interconnection relationship are interconnected by interconnecting pin connections; and/or,
  • circuit modules having circuit interconnections are interconnected by electrical connection of the interconnect pin connections to the same conductive connection; and/or,
  • the port protection circuit integrated package component further includes a first interconnect, and the components of some or all of the circuit modules having a circuit interconnection relationship are in one-to-one correspondence with the conductive connectors through the interconnect pin terminals Connecting, and interconnecting by the first interconnect disposed between the conductive connections of the corresponding connections.
  • the port protection circuit integrated package provided by the embodiment of the present application encapsulates a plurality of circuit modules by using a longitudinally distributed base structure and a conductive connecting member of the base body, thereby reducing the surface area of the printed circuit board occupied by the lateral distribution of the components, and the distribution pitch between the components.
  • the distribution distance between the PCB and the wiring is simple. Save space in electronic equipment.
  • the connection of the conductive connectors can reduce the soldering process at the application end, which can reduce the PCB patching time and high production efficiency.
  • at least one circuit protection component is integrated to enhance the port protection performance, thereby realizing miniaturization of devices in the field of port protection.
  • the regular distribution of the longitudinal connecting members improves the protection performance and product stability, and is applied to the field of overvoltage protection of the port circuit, and can solve the contradiction between small distribution volume, small accommodation space and poor overvoltage performance.
  • the embodiment reduces the application test standard of multiple components, and only adjusts and confirms the performance test standard and the product implementation standard of the integrated component, so that the port circuit of the Bob Smith port circuit overvoltage protection scheme can be standardized and produced in batches. .
  • the embodiment can reduce the actions of multiple independent performance tests and multiple component circuit combination performance tests when multiple discrete components are produced, and realize a port protection circuit application using an overvoltage protection including a Bob Smith circuit.
  • the product, the production of one patch welding, and the application performance test once greatly reduce the process of implementing the device of the port protection circuit, save the production time of the application device, and improve the production efficiency of the application device.
  • the standardized production of integrated components can ensure the stability of the circuit application connection, and the reduction of the number of board soldering during the production of the device can also improve the stability of the circuit application connection.
  • 1a is a first cross-sectional front view of the port protection circuit integrated package provided by the embodiment of the present invention
  • FIG. 1b is a second cross-sectional front view of the port protection circuit integrated package provided by the embodiment.
  • 1c is a schematic structural diagram of a circuit of a port protection circuit integrated package provided by the embodiment
  • FIG. 2 is a bottom view of the first substrate of the port protection circuit integrated package provided by the embodiment
  • 3a is a top view of a second substrate of the port protection circuit integrated package provided by the embodiment.
  • FIG. 3b is a distribution diagram of a first module of the port protection circuit integrated package provided by the embodiment.
  • 4a is a top view of a third substrate of the port protection circuit integrated package provided by the embodiment.
  • 4b is a second module component distribution diagram of the port protection circuit integrated package provided by the embodiment.
  • FIG. 5 is a structural diagram of a carrier of a port protection circuit integrated package provided by the embodiment.
  • FIG. 5b is a schematic structural diagram of a carrier of the port protection circuit integrated package provided by the embodiment.
  • FIG. 5c is another preferred structure of the carrier of the port protection circuit integrated package provided by the embodiment.
  • FIG. 6 is a circuit structural diagram of another port protection circuit integrated package provided by this embodiment.
  • FIG. 7 is a circuit structural diagram of another port protection circuit integrated package provided by this embodiment.
  • the embodiment provides a port protection circuit integrated package, including:
  • At least one circuit module distributed between adjacent substrates each circuit module comprising at least one component and/or comprising at least one integrated package module, each integrated package module comprising at least two components, each component comprising at least one reference
  • At the foot connection end at least one of all components is a circuit protection component;
  • at least one pin connection end of at least one of all circuit modules distributed between adjacent substrates serves as an external electrode terminal and is distributed between adjacent substrates
  • the at least one circuit module is connected to the at least one of the adjacent substrates through the electrical connection of the external electrode terminal and the conductive connection of the at least one substrate; all or all of the circuit modules having the circuit interconnection relationship need to pass each other Connected Pin connections are interconnected; and/or,
  • circuit modules having circuit interconnections are interconnected by electrical connections of the same conductive connections through the interconnected pin connections; and/or,
  • the port protection circuit integrated package component further includes a first interconnect member, and some or all of the circuit components having circuit interconnection relationships are connected to the conductive connector in a one-to-one correspondence through the pin terminals to be interconnected, and The first interconnects between the corresponding conductive connectors are interconnected.
  • a plurality of circuit modules are packaged by using a longitudinally distributed base structure and a conductive connecting member belonging to the base body, which reduces the surface area of the printed circuit board and the spacing of the components occupied by the lateral distribution of the components, and also reduces the PCB layout.
  • the spacing between the two is simple, and the space for accommodating electronic devices is saved.
  • the combination test step of the soldering process and the circuit connection of the discrete components can be reduced by the connection of the conductive connectors, the integrated structure can reduce the PCB processing process, the use time is small, and the production efficiency is high.
  • the module in this embodiment includes at least one circuit protection component, and the miniaturization of equipment in the field of port protection is realized while reducing the distribution volume of the protection device.
  • the distribution and position of the conductive connecting members in this embodiment can be selectively and targetedly arranged according to the actual conditions realized by the circuit, so that the longitudinal height and the surface area can be characterized according to the overall size requirements of the customer. .
  • the substrate in this embodiment is an insulating substrate, and the insulating substrate is a fiberglass cloth, a semi-glass fiber, a BT material or the like.
  • the circuit protection component may be a passive circuit protection component or an active circuit protection component, and the specific circuit protection component may include a gas discharge tube or a transient voltage suppressor or a varistor or a thermistor or Semiconductor discharge tube or fuse.
  • all circuit modules further include at least one port protection circuit basic component
  • the basic components of the port protection circuit include a passive basic component or an active basic component, specifically, a resistor, a capacitor, an inductor, and a fuse.
  • Basic components of port protection circuits such as surge protection devices.
  • all circuit modules further include at least one port protection circuit basic component, including:
  • All circuit modules also include two port protection circuit basic components, respectively a first resistor and a first capacitor having a series interconnection relationship.
  • one of the components is a circuit protection component, and the other two pin connections of the first resistor and the first capacitor are connected to each other.
  • the two pin terminals of the circuit protection component are connected one by one.
  • each of the substrates is an insulating package base
  • Each of the substrates includes at least one electrically conductive connection for electrical connection, including:
  • At least one electrically conductive connection for electrical connection is attached to the outer surface of each of the substrates.
  • the conductive connectors are printed pads.
  • each of the substrates is attached with at least one conductive connection for electrical connection, including:
  • At least one electrically conductive connection for electrical connection is attached to the upper and/or lower surface of each of the substrates.
  • the port protection circuit integrated package further includes a first interconnect, including:
  • the port protection circuit integrated package further includes a first longitudinal interconnect
  • An element distributed between different adjacent substrates and having a circuit interconnection relationship is connected to the conductive connection members in a one-to-one correspondence through the interconnection pin connection ends, and through the first longitudinal mutual mutual arrangement between the correspondingly connected conductive connection members Interconnections;
  • Correspondingly connected conductive connectors have a first intersection region in a projection perpendicular to a plane of the substrate;
  • the port protection circuit integrated package also includes:
  • Correspondingly connected conductive connectors and all of the substrates between them are disposed at a corresponding position of the first intersection region; the first longitudinal interconnects are connected to the correspondingly connected conductive connectors through the first through holes between.
  • all of the substrates are spaced apart from top to bottom in parallel, with all of the first longitudinal interconnects being perpendicular to the substrate and located on the same side of the substrate.
  • the implementation manner of the external port protection circuit integrated package in this embodiment is as follows:
  • the port protection circuit integrated package also includes:
  • Attached to the outer surface of the carrier and used for the external port protection circuit to integrate the package to the external circuit At least one second external electrical connector;
  • the conductive connecting member correspondingly connected to all the second external electrical connectors is connected to the pin connecting end of the component correspondingly connected to the external circuit, and the conductive connecting member corresponding to all the second external electrical connecting members is perpendicular to the base
  • the projection of the plane has a second intersection region, and the conductive connectors correspondingly connected to all the second external electrical connectors, and all the substrates between them are provided with a second through hole at a position corresponding to the second intersection region;
  • the second interconnecting member is connected between the second external electrical connecting member and the corresponding conductive connecting member through the second through hole;
  • all substrates, all conductive connectors, all circuit modules, all first interconnects, all second interconnects, encapsulation or encapsulation Filler For encapsulating a carrier other than the second external electrical connector, all substrates, all conductive connectors, all circuit modules, all first interconnects, all second interconnects, encapsulation or encapsulation Filler.
  • the port protection circuit integrated package further includes:
  • the solder resist layer in this embodiment is used for improving the insulation, oxidation resistance and short circuit prevention when the second external electrical connector is routed.
  • the carrier is situated parallel to all of the substrates.
  • all of the second external electrical connectors are attached to the lower surface of the carrier.
  • all of the second interconnects are perpendicular to the substrate.
  • the carrier is located parallel to all of the substrates, all of the second external electrical connections are attached to the lower surface of the carrier; all of the second interconnects are perpendicular to the substrate, and all of the second interconnects and All of the first longitudinal interconnects are located on the same side of the substrate.
  • a solder resist layer is attached to a portion of the second external electrical connector except a portion of the lower surface of the encapsulating case or the encapsulating filler;
  • the lower surface of the second external electrical connection member is adhered to the conductive plating layer except for the adhesion of the solder resist layer.
  • the conductive plating layer may be a metal plating layer, and the metal plating layer is vertically extended to the encapsulating case or the encapsulating filler body.
  • the implementation manner of the external port protection circuit integrated package in this embodiment is as follows:
  • the port protection circuit integrated package also includes:
  • the first external electrical connector is connected to a pin connection end of the component corresponding to the external circuit in the port protection circuit integrated package;
  • the port protection circuit integrated package also includes:
  • the embodiment provides a port protection circuit integrated package, including:
  • At least one circuit module distributed between adjacent substrates each circuit module comprising at least one component and/or comprising at least one integrated package module, each integrated package module comprising at least two components, each component comprising at least one reference
  • At the foot connection end at least one of all components is a circuit protection component; at least one pin connection end of at least one of all circuit modules distributed between adjacent substrates serves as an external electrode terminal and is distributed between adjacent substrates
  • the at least one circuit module is connected to the at least one of the adjacent substrates by electrical connection of the external electrode terminal and the conductive connection of the at least one substrate; all or all of the circuit modules having circuit interconnection relationships are interconnected Pin connections are interconnected; and/or,
  • circuit module having circuit interconnections are interconnected by electrical connection of the interconnecting pin connections to the same conductive connection; and/or,
  • the port protection circuit integrated package component further includes a first interconnect member, and some or all of the circuit modules having circuit interconnection relationships are connected to the conductive connectors in a one-to-one correspondence through the interconnect pin terminals, and are disposed in corresponding connections The first interconnects between the conductive connectors are interconnected.
  • one of the components is a circuit protection component
  • all of the circuit modules further include two port protection circuit basic components, which are respectively a first resistor and a first capacitor having a series interconnection relationship.
  • the following is a circuit structure in which the other two pin terminals other than the interconnecting pin connection end of the first resistor and the first capacitor are connected to the two pin terminals of the circuit protection component in a one-to-one correspondence
  • the port protection circuit integrated package corresponding to the circuit structure in this embodiment is specifically described in conjunction with FIG. 1a to FIG. 5c. 1a to FIG. 5c, FIG. 1a is a first cross-sectional front view of the port protection circuit integrated package provided in the embodiment; FIG.
  • FIG. 1b is a second cross-sectional front view of the port protection circuit integrated package provided in the embodiment.
  • FIG. 1 is a schematic diagram showing the circuit structure of the port protection circuit integrated package provided by the embodiment;
  • FIG. 2 is a bottom view of the first base of the port protection circuit integrated package provided by the embodiment;
  • FIG. A top view of the second base of the port protection circuit integrated package is provided;
  • FIG. 3b is a distribution diagram of the first module of the port protection circuit integrated package provided by the embodiment;
  • FIG. 4a is a port protection circuit integrated package provided by the embodiment
  • FIG. 4b is a second module component distribution diagram of the port protection circuit integrated package provided by the embodiment;
  • FIG. 5a is a structural diagram of the carrier of the port protection circuit integrated package provided by the embodiment;
  • FIG. 1 is a schematic diagram showing the circuit structure of the port protection circuit integrated package provided by the embodiment;
  • FIG. 2 is a bottom view of the first base of the port protection circuit integrated package provided by the embodiment;
  • FIG. 5b is a schematic structural diagram of a carrier of the port protection circuit integrated package provided by the embodiment
  • FIG. 5c is a port protection circuit set provided by the embodiment.
  • Another preferred structure for the carrier of the package In this embodiment, the other two pin terminals other than the serial connection terminal of the first resistor and the first capacitor are connected to the two pin terminals of the circuit protection component in a one-to-one correspondence.
  • the circuit structure is illustrated by taking a circuit module distributed between three substrates and adjacent substrates as an example, and is explained below in conjunction with a specific diagram. As shown in FIG. 1a and FIG.
  • the embodiment specifically provides a port protection circuit integrated package
  • the port protection circuit integrated package includes a first base body Z1, a second base body Z2, a third base body Z3, a carrier Z4, and
  • the first circuit module M1 and the second circuit module M2 are vertically spaced apart.
  • the first substrate Z1, the second substrate Z2, the third substrate Z3, and the carrier Z4 are vertically spaced apart, and the first circuit module M1 is distributed between the adjacent first substrate Z1 and the second substrate Z2, and the second circuit.
  • the module M2 is distributed between the adjacent second substrate Z2 and the third substrate Z3.
  • the lower surface of the first substrate Z1 is attached with the first conductive connecting member 110, and as shown in FIG.
  • the upper surface of the second substrate Z2 is attached with the second conductive connecting member 120, as shown in FIG. 4a.
  • Three third conductive connectors (the third conductive connector 130, the third conductive connector 131, and the third conductive connector 132, respectively) are attached to the upper surface of the three base body Z3.
  • the lower surface of the carrier Z4 is attached with two external electrical connectors for the external port protection circuit integrated package to the external circuit (the second external electrical connector 140 and the second external power, respectively).
  • the first circuit module M1 is a circuit protection component.
  • the second circuit module M2 includes a first resistor R and a first capacitor C which are distributed in parallel. In other embodiments, the first resistor R and the first A capacitor C may be longitudinally distributed, and the specific implementation is not limited by this embodiment.
  • the upper and lower opposite ends of the circuit protection component are the two pin connection ends of the circuit protection component, and the two pin connection ends of the circuit protection component are respectively the first.
  • Two external electrode terminals of the circuit module M1 In this embodiment, the first pin connection end of the first resistor R and the first pin connection end of the first capacitor C are respectively two external electrode terminals of the second circuit module M2.
  • the first circuit module M1 and the first base body Z1 and the second base body Z2 pass through two external electrode terminals of the first circuit module M1 and the first conductive connection member 110 of the first base body Z1,
  • the second conductive connecting members 120 of the two bases Z2 are connected one by one in electrical connection; and the second circuit module M2 and the third base body Z3 pass through the two external electrode terminals of the second circuit module M2 and the other two third conductive ends
  • the connecting members (the third conductive connecting member 131 and the third conductive connecting member 132) are connected one by one in electrical connection.
  • the second pin connection end of the first resistor R and the second pin connection end of the first capacitor C are connected to the third conductive connection 130.
  • the two pin terminals of the circuit protection component are electrically connected to the external circuit through two second external electrical connectors, and the circuit protection component electrically connected to the external circuit
  • the two pin terminals pass through their correspondingly connected conductive connectors (the first conductive connector 110 and the second conductive connector 120) and all the second external electrical connectors (the second external electrical connector 141 and the second
  • the external electrical connector 140 is correspondingly connected, and the conductive connection member (the first conductive connector) corresponding to all the second external electrical connectors (the second external electrical connector 141 and the second external electrical connector 140) 110 and the second conductive connecting member 120) have two second intersection regions in a projection perpendicular to the plane of the substrate.
  • the two second intersection regions overlap with the first intersection region P1 and the first intersection region P2.
  • Conductive connectors first conductive connector 110 and second conductive connector 120
  • the region is provided with a second through hole penetrating at a position corresponding to the two second intersection regions (ie, the first intersection region P1 and the first intersection region P2). Specifically, as shown in FIG.
  • the first through hole J1 and the first through hole J2 penetrate through the two external electrical connectors of the carrier Z4 and the surface of the carrier Z4 (the second external electrical connection)
  • the piece 141 and the second external electrical connection member 140) are formed to form the second through hole J3 and the third through hole J4. Therefore, as shown in FIGS. 1a and 1b, the two first longitudinal interconnects (the first longitudinal interconnect 160 and the first longitudinal interconnect 161) extend longitudinally through the second through hole J3 and respectively.
  • the third through hole J4 is connected between the second external electrical connection member 141 and the conductive connection member electrically connected to the second external electrical connection member 140 to form a second interconnection member to realize the external circuit.
  • the first longitudinal interconnect and the second interconnect may be in different positions, that is, through the through holes in the same intersection area but different positions in the figure, and may be arranged in the port protection circuit integration.
  • the two sides of the package are not limited by the embodiment.
  • the first through hole J1 and the second through hole J2 are located on the same side, and the position arrangement on the same side further reduces the volume and space of the port protection circuit integrated package.
  • the first through hole J1 and the second through hole J2 and the third through hole J3 and the fourth through hole J4 are located on the same side, and the position arrangement on the same side further reduces the port protection circuit integrated package.
  • the first through hole J1 and the second through hole J2 are respectively laterally staggered to form two columns, and the third through hole J3 and the fourth through hole J4 are also laterally staggered to form two columns.
  • the utility model effectively increases the safety distance between the connectors when the integrated structure is realized, reduces the interference of the electrical connection of the connector in the integrated package device, and improves the reliability and stability of the integrated package of the port protection circuit.
  • the port protection circuit integrated package further includes an envelope for removing two second external electrical connectors (the second external electrical connector 141 and the second external electrical connector 140) Carrier Z4, all substrates (first substrate Z1, second substrate Z2, third substrate Z3), all conductive connectors (first conductive connector 110, second conductive connector 120, and third conductive connector 130) Third conductive connector 131, third conductive connector 132), all circuit modules (first circuit module M1 and second circuit module M2), all first interconnects (ie, first longitudinal interconnects 160 and a longitudinal interconnect 161), a package of all of the second interconnects (ie, the first longitudinal interconnect 160 and the first longitudinal interconnect 161 extending to the extension of the second through hole J3 and the third through hole J4) Enclose the casing or enclose the filling body.
  • Carrier Z4 all substrates (first substrate Z1, second substrate Z2, third substrate Z3), all conductive connectors (first conductive connector 110, second conductive connector 120, and third conductive connector 130) Third conductive connector 131, third
  • the encapsulating case or the encapsulating filling body is formed by plating/printing the second external electrical connection member from the surface of the carrier Z4 (the second external electrical connection member 141 and the second external electrical connection) After the member 140), the process of sequentially stacking the package body and/or the substrate and/or the printed conductive connector on the surface of the substrate in an upwardly repeating manner achieves encapsulation of the port protection circuit integrated package.
  • the resistance of the first resistor R is 75 ⁇
  • the capacitance of the first capacitor C is 1000 pF.
  • the port protection circuit integrated package further includes a solder resist layer 150.
  • the solder resist layer 150 is a solder resist layer 150 attached to a portion of the surface of the second external electrical connector except the surface enclosed by the encapsulating case or the encapsulating filling body.
  • the solder resist layer 150 in the embodiment is an I-shaped solder resist layer, which effectively prevents the problem of electrical mutual interference when the second external electrical connector 141 and the second external electrical connector 140 are soldered.
  • the lower surface of the second external electrical connector is adhered to the metal plating layer 151 except for the adhesion of the solder resist layer, and the metal plating layer 151 is extended to the encapsulating case or the encapsulating filler. the edge of.
  • the first resistor R and the first capacitor C in the embodiment have an interconnection relationship with the circuit protection component, and an interconnection relationship between the first resistor R and the first capacitor C.
  • the first resistor R is connected to a pin connection end of the circuit protection component through a first pin connection end thereof, and the first pin connection end of the first capacitor C is connected to another pin connection end of the circuit protection component, and A second pin connection of a resistor R and a second pin connection of the first capacitor C have a series relationship.
  • the port protection circuit integrated package provided by this embodiment has the following interconnection structure implementation when implementing interconnection:
  • the port protection circuit integrated package provided by this embodiment further includes a first interconnect, and the first resistor R and the first capacitor C are interconnected by the first interconnect when interconnected with the circuit protection component, respectively.
  • the first interconnect is the two first longitudinal interconnects (the first longitudinal interconnect 160 and the first longitudinal interconnect 161, respectively) shown in Figures Ia and Ib.
  • first resistor R and the circuit protection component distributed between different adjacent substrates and having a circuit interconnection relationship through a pin connection terminal to be interconnected (the first pin connection end of the first resistor R and the circuit protection component)
  • One-pin connection end is connected in one-to-one correspondence with the conductive connection members (the first conductive connection member 110 and the third conductive connection member 132), and through the conductive connection members (the first conductive connection member 110 and the first A first longitudinal interconnect 160 connected between the three conductive connectors 132) is interconnected.
  • a first pin connection end of a capacitor C and another pin connection end of the circuit protection component are connected in one-to-one correspondence with the conductive connection members (the second conductive connection member 120 and the third conductive connection member 131), and are disposed through Another first longitudinal interconnect 161 connected between the corresponding conductive connectors (the second conductive connector 120 and the third conductive connector 131) is interconnected.
  • the first resistor R and the circuit protection component when the first resistor R and the circuit protection component are interconnected, the first resistor R is connected to the third conductive connector 132 through the first pin connection end thereof, and the circuit protection component passes through one of the pin terminals and the first
  • the conductive connectors 110 are connected, and the first resistor R and the circuit protection component are interconnected by a first longitudinal interconnect 160 disposed between the first conductive connector 110 and the third conductive connector 132; and first
  • the capacitor C and the circuit protection component are interconnected, the first capacitor C is connected to the third conductive connection member 131 through the first pin connection end thereof, and the circuit protection component passes through the other pin connection end and the second conductive connection member 120.
  • the first capacitor C and the circuit protection element are interconnected by connection and by a first longitudinal interconnect 161 disposed between the second conductive connector 120 and the third conductive connector 131.
  • the port protection circuit integrated package further includes a first through hole, and the first vertical interconnection connected between the conductive connectors between different adjacent substrates is electrically connected through the first through hole
  • the connection that is, the corresponding connection of the conductive connector has a first intersection region in a projection perpendicular to the plane of the substrate
  • the port protection circuit integrated package further comprises: a correspondingly connected conductive connector and all the substrates between the substrates (including the substrate) Inter-filled encapsulating filler or encapsulating filling layer) is provided with a first through hole at a position corresponding to the first intersection region, and then the first longitudinal interconnection is connected to the correspondingly connected conductive connection through the first through hole Between pieces.
  • the first longitudinal interconnect 160 and the first longitudinal interconnect 161 in this embodiment may be an electrical conductor formed by conducting a conductive slurry in the first through hole.
  • the correspondingly connected conductive connectors (the first conductive connector 110 and the third conductive connector 132) have a first projection perpendicular to the plane of the first substrate/third substrate.
  • intersection region P1 the corresponding conductive connecting members (the first conductive connecting member 110 and the third conductive connecting member 132) and all the substrates between them (including the encapsulating filler or the encapsulating filling layer filled between the substrates) are a first through hole J1 is provided at a position corresponding to the first intersection region P1; the first longitudinal interconnection 161 is connected to the correspondingly connected conductive connection member through the first through hole J1 (the first conductive connection member 110 and the third portion) Between the conductive connectors 132).
  • the correspondingly connected conductive connectors (the second conductive connector 120 and the third conductive connector 131) have a first intersection region P2 on the projection perpendicular to the plane of the second substrate/third substrate, and the correspondingly connected conductive connectors (second conductive connector 120 and third conductive connector 131) and All of the substrates between them, including the encapsulating filler filled between the substrates or the encapsulating filling layer, are provided with a first through hole J2 penetrating at a position corresponding to the first intersection region P2; the first longitudinal interconnect 161 passes through The first through hole J2 is connected between the correspondingly connected conductive connectors (the second conductive connector 120 and the third conductive connector 131).
  • the number of the first through holes J1 and the first through holes J2 in the illustration is not limited by the embodiment, and the plurality of holes shown in this embodiment are only illustrative.
  • first longitudinal interconnect 160 and the first longitudinal interconnect 161 in this embodiment are electrical conductors formed by conducting a conductive slurry in the first through hole J1 and the first through hole J2.
  • first longitudinal interconnect 160 and the first longitudinal interconnect 161 of the first through hole are connectors attached to the sides of the hole wall.
  • the first longitudinal interconnect is a conductive post or a conductive filament.
  • the first longitudinal interconnect is a sidewall conductive connection extending longitudinally along the sidewall of the base to be connected between the correspondingly connected conductive connectors.
  • the capacitor and the resistor are an integrated module connected in series, and the opposite ends of the integrated module are connected with the conductive connections of the two bases, thereby achieving upper and lower spacing distribution of all devices.
  • Structure That is, in the present embodiment, the pin terminals to be interconnected are directly interconnected to form a device for integrating the upper and lower structures.
  • the RC integrated module includes a first capacitor electrode layer, a first dielectric layer, and a resistance layer that are sequentially stacked.
  • the first dielectric layer includes a aligning laminate, and the N dielectric layers are pressed together, and an internal electrode layer is connected between each adjacent two dielectric layers of all the N dielectric layers; N is an integer greater than zero.
  • the integrated module further includes a second capacitor electrode layer laminated between the first dielectric layer and the resistance layer.
  • the resistive layer comprises a first resistive paste printed layer and a resistive electrode layer laminated from bottom to top.
  • the integrated module further includes a second dielectric layer laminated on the surface of the second capacitor electrode layer; wherein the second dielectric layer is provided with a through hole;
  • the resistance layer includes:
  • a first resistive paste printed layer for filling a via hole and printed on a surface of the second capacitor electrode layer in the via hole;
  • the first dielectric layer is a first ceramic dielectric substrate for making a capacitor
  • the second dielectric layer is a second ceramic dielectric substrate for making a capacitor
  • the first ceramic dielectric substrate is a cerium carbonate dielectric substrate, a calcium titanate dielectric substrate or a magnesium titanate dielectric substrate.
  • the first capacitor electrode layer, the second capacitor electrode layer, and the resistance electrode layer comprise an alloy of platinum, gold, silver, copper or nickel or at least two kinds of metals.
  • the first resistive paste printed layer is a lanthanide resistive paste.
  • the first pin connection end of the first resistor R and the first pin connection end of the first capacitor C can also serve as an external electrode terminal of the second circuit module M2. Therefore, the second pin connection end of the first resistor R and the second pin connection end of the first capacitor C function as the external electrode terminal.
  • the first resistor R and the first The capacitor C has a series interconnection relationship, so the conductive connection member corresponding to the first pin connection end of the first resistor R and the first pin connection end of the first capacitor C is the same conductive connection member, that is, the second circuit
  • the module M2 and the third substrate Z3 pass through the four external electrode terminals of the second circuit module M2 and the three third conductive connectors of the third substrate Z3 (the third conductive connector 130, the third conductive connector 131 and the third conductive The connectors 132) are connected corresponding to the electrical connections.
  • the third conductive connector of the second external electrical connector connected to the first pin connection end of the first resistor is connected through a second interconnect, and the other second external power is connected.
  • the third conductive connection of the sexual connector to the first pin connection of the first capacitor is connected by another second interconnection.
  • the first substrate Z1, the second substrate Z2, the third substrate Z3, and the carrier Z4 in the embodiment are insulating substrates, and the insulating substrate is a fiberglass cloth.
  • the circuit protection component comprises a gas discharge tube or a transient voltage suppressor or a varistor or a thermistor or a semiconductor discharge tube or fuse.
  • the first conductive connector 110, the second conductive connector 120, and all the third conductive connectors (the third conductive connector 130, the third conductive connector 131, and The third conductive connecting member 132) and the lower surface of the carrier Z4 are attached to the second external electrical connecting members (the fourth conductive connecting member 140 and the fourth conductive connecting member 141, respectively) for printing on the insulating base.
  • the conductive connector extends from the lower surface to the upper surface through the via.
  • first substrate Z1, the second substrate Z2, and the third substrate Z3 are vertically spaced apart from top to bottom, and the first longitudinal interconnect 160 and the first longitudinal interconnect 161 are perpendicular to the first substrate Z1.
  • the second substrate Z2 and the third substrate Z3 are located on the same side of all the substrates.
  • the carrier Z4 in this embodiment is square, and in other embodiments the carrier Z4 may be rectangular.
  • the two second external electrical connectors are spaced apart from opposite sides of the lower surface of the carrier Z4, and the solder resist layer is an I-shaped solder resist layer, and the middle of the I-shaped solder resist layer The portion covers the opposite sides of the two second external electrical connectors.
  • the first conductive connecting member 110 and the second conductive connecting member 120 are two L-shaped conductive connecting members which are staggered on the lateral sides, and the horizontal cross-section of the first conductive connecting member 110 and the second conductive connecting member 120 The sides are symmetrically staggered along the same side of the substrate.
  • the first substrate Z1, the second substrate Z2, the third substrate Z3, and the carrier Z4 are cuboids or cubes of equal area, and the length of all the substrates and the carrier Z4 is less than or equal to 10 mm and greater than or equal to 1 mm.
  • the width of all of the substrate and carrier Z4 is less than or equal to 10 mm and greater than or equal to 1 mm, and the height of the port protection circuit integrated package is less than or equal to 1.8 mm and greater than or equal to 0.8 mm.
  • the first substrate Z1, the second substrate Z2, the third substrate Z3, and the carrier Z4 are cuboids or cubes of equal area, and the length of all the substrates and the carrier Z4 is less than or equal to 10 mm and greater than or equal to 1 mm.
  • the width of all of the substrate and the carrier Z4 is less than or equal to 10 mm and greater than or equal to 1 mm, and the height of the port protection circuit integrated package is less than or equal to 1.8 mm and greater than or equal to 1 mm.
  • the length of all the substrates and the carrier Z4 is less than or equal to 5 mm and greater than or equal to 3 mm, and the width of all the substrates and the carrier Z4 is less than or equal to 5 mm and greater than or equal to 3 mm, and the port protection circuit is integrated.
  • the height of the package is less than or equal to 1.6 mm and greater than or equal to 1.4 mm.
  • the length of all the substrates and the carrier Z4 is less than or equal to 4.8 mm and greater than or equal to 3.2 mm, and the width of all the substrates and the carrier Z4 is less than or equal to 4.8 mm. And greater than or equal to 3.2 mm, and the height of the port protection circuit integrated package is less than or equal to 1.5 mm and greater than or equal to 0.9 mm.
  • the first conductive connector 110 is located in the middle of the first substrate Z1, and the second conductive connector 120 is located in the middle of the second substrate Z2; and is connected to the two external electrode terminals of the second circuit module.
  • the other two third conductive connectors are spaced apart on the same side of the third substrate Z3, all the first through holes are located on the same side of all the substrates, and the first conductive connecting member 110 passes through a first longitudinal interconnect and is located at the first A first through hole on the lateral side of the conductive connecting member 110 is connected to a third conductive connecting member distributed on the same side of the third base body Z3, and the second conductive connecting member 120 passes through the other first longitudinal interconnecting member and The other first via located on the lateral side of the second conductive connector 120 is connected to another third conductive connector distributed on the same side of the third substrate Z3.
  • a width of a lateral side of the first conductive connecting member and the second conductive connecting member is greater than or equal to 1 mm, less than or equal to 5 mm, and longitudinal of the first conductive connecting member and the second conductive connecting member The width of the sides is greater than or equal to 2 mm and less than or equal to 8 mm.
  • the width s1 of the lateral sides of the first conductive connecting member and the second conductive connecting member is 1 to 2 mm and any value therebetween, the first conductive connecting member and The width s2 of the longitudinal side of the second conductive connector is 2.5 to 3.0 mm and any value therebetween.
  • the width of the lateral sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 1.8 mm, and the width of the vertical sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 2.6 mm. .
  • the width of the lateral sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 4 mm, and the width of the vertical sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 7 mm.
  • the width of the lateral sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 3.5 mm, and the width of the vertical sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 6 mm.
  • the width of the lateral sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 3 mm, and the width of the vertical sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or equal to 5.5 mm.
  • the width of the lateral sides of the first conductive connecting member 110 and the second conductive connecting member 120 is less than or Equal to 2.8 mm, the width of the vertical sides of the first conductive connector 110 and the second conductive connector 120 is less than or equal to 4 mm.
  • the embodiment further provides a port protection circuit integrated package, including:
  • At least one circuit module distributed between adjacent substrates each circuit module comprising at least one component and/or comprising at least one integrated package module, each integrated package module comprising at least two components, each component comprising at least one reference
  • At the foot connection end at least one of all components is a circuit protection component; at least one pin connection end of at least one of all circuit modules distributed between adjacent substrates serves as an external electrode terminal and is distributed between adjacent substrates
  • the at least one circuit module is connected to the at least one of the adjacent substrates by electrical connection of the external electrode terminal and the conductive connection of the at least one substrate; all or all of the circuit modules having circuit interconnection relationships are interconnected Pin connections are interconnected; and/or,
  • circuit module having circuit interconnections are interconnected by electrical connection of the interconnecting pin connections to the same conductive connection; and/or,
  • the port protection circuit integrated package component further includes a first interconnect member, and some or all of the circuit modules having circuit interconnection relationships are connected to the conductive connectors in a one-to-one correspondence through the interconnect pin terminals, and are disposed in corresponding connections The first interconnects between the conductive connectors are interconnected.
  • the circuit protection component comprises a gas discharge tube or a transient voltage suppressor or a varistor or a thermistor or a semiconductor discharge tube or fuse.
  • all circuit modules further include at least one port protection circuit basic component, and the port protection circuit basic component includes at least one of a resistor, a capacitor, an inductor, a fuse, and a surge protection device. .
  • the components in all circuit modules further include at least one port protection circuit basic component, including:
  • the components of all the circuit modules further include N resistors and N capacitors, wherein the N is greater than or equal to 1.
  • the N resistors are electrically connected in series with the N capacitors, wherein any one of the resistors a first pin connection end connected to the first pin connection end of the capacitor correspondingly connected to the resistor;
  • the components in all the circuit modules further include N-1 circuit protection components, and all the N circuit protection components are electrically interconnected with the N resistors in one-to-one correspondence, the N circuit protection components and the N
  • the capacitors are electrically connected to each other, wherein a second pin connection end of each of the resistors and a second pin connection end of each of the capacitors and two pins of the circuit protection component correspondingly connected
  • the terminals are connected one-to-one, and the second pin terminals of all capacitors are interconnected.
  • FIG. 6 is a circuit structural diagram of another port protection circuit integrated package according to the embodiment.
  • the circuit protection circuit implemented in this embodiment uses two circuit protection components.
  • the circuit protection component further includes a second circuit protection component G2
  • the basic component of the port protection circuit further includes a second resistor R2 and a second capacitor C2, wherein the second circuit A pin connection end of the protection component G2 and a pin connection end of the second resistor R2 respectively serve as a common terminal for realizing the serial connection of the second circuit protection component G2 and the second resistor R2, and another reference of the second circuit protection component G2
  • the pin connection end and the one pin connection end of the second capacitor C2 respectively serve as a common terminal for realizing the serial connection of the second circuit protection component G2 and the second capacitor C2, and another pin connection terminal and the second capacitor of the second resistor R2
  • the other pin connection end of C2 is respectively used as a common terminal for interconnecting the second resistor R2 and the
  • a pin terminal of the first capacitor C is connected to a pin terminal of the second capacitor C2.
  • FIG. 7 is a circuit structural diagram of another port protection circuit integrated package provided in the embodiment. As shown in FIG. 7 , based on the port protection circuit shown in FIG. 7 , the port provided in this embodiment is provided.
  • the circuit protection component further includes a third circuit protection component G3 and a fourth circuit protection component G4, and the basic component of the port protection circuit further includes a third resistor R3, a fourth resistor R4, a third capacitor C3, and a fourth capacitor C4.
  • the one-pin connection end of the third circuit protection component G3 and the one-pin connection end of the third resistor R3 respectively serve as a common terminal for realizing the serial connection of the third circuit protection component G3 and the third resistor R3, and the third circuit protection component G3
  • the other pin connection end and the one pin connection end of the third capacitor C3 respectively serve as a common terminal for realizing the serial connection of the third circuit protection component G3 and the third capacitance C3, and the other pin connection end of the third resistor R3.
  • the other pin connection end of the third capacitor C3 is respectively used as a common terminal for interconnecting the third resistor R3 and the third capacitor C3; a pin connection end of the fourth circuit protection component G4 and a lead of the fourth resistor R4 Foot connection
  • the fourth circuit protection component G4 and the fourth resistor R4 are connected in common, the other circuit connection end of the fourth circuit protection component G4 and the one pin connection end of the fourth capacitor C4 respectively serve as the fourth circuit protection component.
  • G4 and fourth capacitor C4 are connected in series The common terminal, and the other pin connection end of the fourth resistor R4 and the other pin connection end of the fourth capacitor C4 respectively serve as a common terminal for interconnecting the fourth resistor R4 and the fourth capacitor C4;
  • a pin terminal of the first capacitor C is connected to a pin terminal of the second capacitor C2 and a pin terminal of the third capacitor C3 and a pin terminal of the fourth capacitor C4.
  • the port protection circuit integrated package corresponding to the circuit shown in FIG. 6 and FIG. 7 can be further processed based on the structure shown in FIG. 1a, and realizes modules of multiple circuit protection components and modules of multiple Bob Smith circuits. Vertical integration.
  • a plurality of circuit modules are packaged by using a longitudinally distributed base structure and a conductive connecting member belonging to the base body, which reduces the surface area of the printed circuit board and the spacing of the components occupied by the lateral distribution of the components, and also reduces the PCB layout.
  • the spacing between the two is simple, and the space for accommodating electronic devices is saved.
  • the combination test step of the soldering process and the circuit connection of the discrete components can be reduced by the connection of the conductive connectors, and the integrated structure can reduce the PCB processing process, consume less labor, and have high production efficiency.
  • the module in this embodiment includes at least one circuit protection component, and the miniaturization of equipment in the field of port protection is realized while reducing the distribution volume of the protection device.
  • the distribution and position of the conductive connecting members in this embodiment can be selectively and targetedly arranged according to the actual conditions realized by the circuit, so that the longitudinal height and the surface area can be characterized according to the overall size requirements of the customer. .
  • the circuit protection component comprises a gas discharge tube or a transient voltage suppressor or a varistor or a thermistor or a semiconductor discharge tube or fuse.
  • all circuit modules further include at least one port protection circuit basic component
  • the port protection circuit basic component includes a basic component of a port protection circuit such as a resistor or a capacitor or an inductor.
  • all circuit modules further include at least one port protection circuit basic component, including:
  • All circuit modules also include two port protection circuit basic components, respectively a first resistor and a first capacitor having a series interconnection relationship.
  • one of the components is a circuit protection component, and
  • the other two pin terminals except the serial connection pin terminal of the first resistor and the first capacitor are connected in one-to-one correspondence with the two pin terminals of the circuit protection component.
  • each of the substrates is a conductive package base
  • Each of the substrates includes at least one electrically conductive connection for electrical connection, including:
  • Each of the electrically conductive package substrates is a conductive connector for electrical connection.
  • the conductive package substrate is a conductive frame
  • the conductive frame includes a conductive pin and a conductive pin extending from the conductive tray
  • the conductive tray is used for packaging components
  • the conductive pin is used for connecting with an external circuit.
  • all of the interconnected components are interconnected by interconnecting the pin connections to the same conductive tray.
  • the conductive frame is a metal frame.
  • the metal frame is a copper lead frame.

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Abstract

一种端口防护电路集成封装件,包括:上下间隔分布的至少两个基体(Z),每一个基体(Z)包括至少一个用于电性连接的导电连接件(110);相邻基体(Z)之间分布的至少一个电路模块(M),每个电路模块(M)包括至少一个元件及/或者包括至少一个集成封装模组,每一个集成封装模组包括至少两个元件,所有元件中的至少一个元件为电路防护元件(G);相邻基体(Z)之间分布的所有电路模块(M)中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻基体(Z)之间的至少一个电路模块(M)与相邻基体(Z)中的至少一个基体(Z)通过外接电极端子和至少一个基体(Z)的导电连接件(110)的电性连接而连接;所有电路模块(M)中部分或者全部具有电路互连关系的元件通过互连引脚连接端进行互连。

Description

一种端口防护电路集成封装件
本申请要求于2015年8月12日提交中国专利局、申请号为201510493352.X、发明名称为“一种端口防护电路集成封装件及其制造方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及端口电路防护领域,具体涉及一种端口防护电路集成封装件。
背景技术
目前以大规模集成电路为核心组件的计算机网络、测量、监控、保护等先进电子设备被广泛应用于电力、航空、国防、安防、通信、广电、金融、交通、石化、医疗等行业,以及广泛应用于其它现代生活的各个领域,产品的可靠性也越来越成为大家关注的焦点。然而为了适应市场需求,很多设备制造商都在不断缩小其设备,尤其是设备上使用的器件的体积,选择小型化的设备对设备制造商的运输、维护以及产品的竞争力等等都会带来优势。目前雷电灾害所涉及的范围遍布各行各业,一方面是因为电子设备内部结构高度集成化,例如超大规模集成电路芯片,从而造成设备耐过压、耐过流的水平下降,对雷电如感应雷或操作过电压浪涌的承受能力下降;另一方面是由于信号来源路径增多,系统比以前更容易遭受雷电波的侵入,并且浪涌电压可以从电源线或信号线等途径窜入设备中。因此过压防护元件是抗雷防护、过压防护和过流防护的关键器件,必不可少,而且必须要克服小型化与性能之间的矛盾来满足电子设备小型化和集成化的发展方向。
现在小型化的先进电子设备普遍存在着对暂态过电压、过电流耐受能力较弱的缺点。在端口防护技术领域中,用作电性匹配隔离的鲍勃史密斯电路作为一种工业标准被广泛应用于接口电路中。应用鲍勃史密斯电路至接口电路的过压、过流防护方案都是将鲍勃史密斯电路的分立元件和单个防护器件通过多次贴片工艺贴放置电路板,或者通过分立元件和单个防护器件的简单焊接形成模组,再将模组贴放置电路板的形式实现接口防护电路。模组焊接及电路板多次贴片实现的工序步骤多、耗时耗力;针对每一个分立元件,生产方都要进行电路应用测试,客户应用方也需针对电路板进行产品使用性能测试,测试步骤繁 琐,生产效率严重降低。另一方面,分立元件焊接和焊接方式形成的模组占用PCB的面积较大,降低了产品使用性能。另外,普通焊接模组方式对焊接的技术要求高,电路焊接稳定性很差,不能批量化高效率生产,不能满足电子设备小型化、集成化、高效率生产和高性能的发展趋势。
发明内容
本申请实施例提供了一种端口防护电路集成封装件及其制造方法,解决了现有的端口电路实现耗时,工序多,占用PCB的面积较大,生产效率低、产品稳定性差的问题。
第一方面,本申请实施例提供一种端口防护电路集成封装件,包括:
上下间隔分布的至少两个基体,每一个所述基体包括至少一个用于电性连接的导电连接件;
相邻所述基体之间分布的至少一个电路模块,每个所述电路模块包括至少一个元件及/或者包括至少一个集成封装模组,每一个所述集成封装模组包括至少两个元件,所有元件中的至少一个元件为电路防护元件;相邻所述基体之间分布的所有电路模块中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻所述基体之间的所述至少一个电路模块与相邻所述基体中的至少一个基体通过所述外接电极端子和所述至少一个基体的所述导电连接件的电性连接而连接;所有电路模块中部分或者全部具有电路互连关系的所述元件通过互连引脚连接端进行互连;以及/或者,
所有电路模块中部分或者全部具有电路互连关系的所述元件通过所述互连引脚连接端与同一所述导电连接件的电性连接进行互连;以及/或者,
所述端口防护电路集成封装元件还包括第一互连件,所有电路模块中部分或者全部具有电路互连关系的所述元件通过所述互连引脚连接端与所述导电连接件一一对应连接,以及通过设置在对应连接的所述导电连接件之间的所述第一互连件进行互连。
本申请实施例提供的端口防护电路集成封装件,采用纵向分布的基体结构及基体的导电连接件封装多个电路模块,减少元件横向分布时占用的印刷线路板的表面积,元器件间的分布间距和PCB布线间的分布间距,集成结构简单, 节约电子设备的容置空间。另外,通过导电连接件的连接可以减少应用端焊接工序,可以减少PCB贴片时间,生产效率高。另外,减小防护器件的分布体积的同时,集成至少一个电路防护元件提升端口防护性能,得以实现端口防护领域的设备小型化发展。以及纵向连接件的规则分布提高了防护性能和产品稳定性,应用于端口电路过压防护领域,可解决分布体积小、容置空间小和过压性能差之间的矛盾。
另外,本实施例减少了多个元件的应用测试标准,仅对该集成件的性能测试标准及产品实现标准进行调整确认,就可以批量标准化生产应用鲍勃史密斯端口电路过压防护方案的端口电路。
另外,本实施例能够减少多个分立元件生产时多次独立性能测试和整机应用时多个元件电路组合性能测试的动作,实现了一个端口防护电路应用一个包含鲍勃史密斯电路的过压防护产品,一次贴片焊接的生产,一次应用性能测试,使得应用该端口防护电路的设备实现时的工序大大减少,节约了应用端设备的生产时间,提高了应用端设备的生产效率。
另外,集成件标准化的生产能够保证电路应用连接的稳定性,以及设备生产时电路板焊接次数的减少也能够提升电路应用连接的稳定性。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1a为本实施例提供的端口防护电路集成封装件的第一剖视正面示意图;
图1b为本实施例提供的端口防护电路集成封装件的第二剖视正面示意图;
图1c为本实施例提供的端口防护电路集成封装件的电路结构示意图;
图2为本实施例提供的端口防护电路集成封装件的第一基体的仰视结构图;
图3a为本实施例提供的端口防护电路集成封装件的第二基体的俯视图;
图3b为本实施例提供的端口防护电路集成封装件的第一模块的分布图;
图4a为本实施例提供的端口防护电路集成封装件的第三基体的俯视图;
图4b为本实施例提供的端口防护电路集成封装件的第二模块元件分布图;
图5a为本实施例提供的端口防护电路集成封装件的载体的结构图;
图5b为本实施例提供的端口防护电路集成封装件的载体的优选结构图;
图5c为本实施例提供的端口防护电路集成封装件的载体的另一优选结构;
图6为本实施例提供的另一种端口防护电路集成封装件的电路结构图;
图7为本实施例提供的另一种端口防护电路集成封装件的电路结构图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本申请一部分实施例,而不是全部的实施例。下面通过具体实施例,分别进行详细的说明。
由于设备的小型化,防护器件的减少或者芯片面积和体积都较以往有比较大的减少,导致防护性能降低,设备所能抵抗干扰和浪涌的能力却越来越弱。因此小型化实现也对设备的防雷要求越来越苛刻。本实施例提供一种端口防护电路集成封装件,包括:
上下间隔分布的至少两个基体,每一个基体包括至少一个用于电性连接的导电连接件;
相邻基体之间分布的至少一个电路模块,每个电路模块包括至少一个元件及/或者包括至少一个集成封装模组,每一个集成封装模组包括至少两个元件,每个元件包括至少一个引脚连接端,所有元件中的至少一个元件为电路防护元件;相邻基体之间分布的所有电路模块中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻基体之间的至少一个电路模块与相邻基体中的至少一个基体通过外接电极端子和至少一个基体的导电连接件的电性连接而连接;所有电路模块中部分或者全部具有电路互连关系的元件通过需互连的 引脚连接端进行互连;以及/或者,
所有电路模块中部分或者全部具有电路互连关系的元件通过需互连的引脚连接端与同一导电连接件的电性连接进行互连;以及/或者,
端口防护电路集成封装元件还包括第一互连件,所有电路模块中部分或者全部具有电路互连关系的元件通过需互连的引脚连接端与导电连接件一一对应连接,以及通过设置在对应连接的导电连接件之间的第一互连件进行互连。
本实施例采用纵向分布的基体结构及所属于基体的导电连接件来封装多个电路模块,减少了元件横向分布时所占用的印刷线路板的表面积和元器件的间距,而且也减少了PCB布线之间的间距,集成结构简单,节约了电子设备的容置空间。
另外,本实施例通过导电连接件的连接可以减少焊接工序和分立元件进行电路连接的组合测试步骤,该集成结构可以减少PCB加工工序,所用工时少,生产效率高。
另外,本实施例中的模块包含至少一个电路防护元件,减小防护器件的分布体积的同时,端口防护领域的设备小型化发展得以实现。
另外,本实施例中导电连接件的分布和位置可以根据电路实现的实际情况进行有选择性和有针对性的布置,使其纵向高度和表面积的尺寸可以根据客户提出的整体尺寸需求进行特色制定。
本实施例中的基体为绝缘基体,绝缘基体为玻纤布、半玻纤、BT材料等。
作为一种可选的实施方式,电路防护元件可为无源电路防护元件或者有源电路防护元件,具体电路防护元件可包括气体放电管或瞬态电压抑制器或压敏电阻或热敏电阻或半导体放电管或保险丝。
作为一种可选的实施方式,所有电路模块还包括至少一个端口防护电路基本元件,端口防护电路基本元件包括无源基础元器件或者有源基础元器件,具体可为电阻、电容、电感、保险丝和浪涌防护器件等端口防护电路基本元件。
作为一种可选的实施方式,所有电路模块还包括至少一个端口防护电路基本元件,包括:
所有电路模块还包括二个端口防护电路基本元件,分别是具有串连互连关系的第一电阻和第一电容。
作为一种可选的实施方式,所有元件中的一个元件为电路防护元件,以及第一电阻和第一电容的串连的互连引脚连接端之外的其另两个引脚连接端与电路防护元件的两个引脚连接端一一对应连接。
作为一种可选的实施方式,每一个基体为绝缘封装基体;
每一个基体包括至少一个用于电性连接的导电连接件,包括:
每一个基体的外表面附着至少一个用于电性连接的导电连接件。
作为一种可选的实施方式,导电连接件为印刷的焊盘。
作为一种可选的实施方式,每一个基体的外表面附着至少一个用于电性连接的导电连接件,包括:
每一个基体的上表面和/或下表面附着至少一个用于电性连接的导电连接件。
作为一种可选的实施方式,端口防护电路集成封装件还包括第一互连件,包括:
端口防护电路集成封装件还包括第一纵向互连件;
分布于不同相邻基体之间,且具有电路互连关系的元件通过互连引脚连接端与导电连接件一一对应连接,以及通过设置在对应连接的导电连接件之间的第一纵向互连件进行互连;
对应连接的导电连接件在垂直于基体所在平面的投影具有第一交集区域;
端口防护电路集成封装件还包括:
对应连接的导电连接件及其之间的所有基体在第一交集区域对应的位置处设置贯穿的第一通孔;第一纵向互连件穿过第一通孔连接至对应连接的导电连接件之间。
作为一种可选的实施方式,所有基体由上至下平行间隔分布,所有第一纵向互连件垂直于基体,且位于基体的同一侧。
作为一种可选的实施方式,本实施例中外接端口防护电路集成封装件的实现方式如下:
端口防护电路集成封装件还包括:
载体;
附着于载体的外表面,且用于外接端口防护电路集成封装件至外部电路的 至少一个第二外接电性连接件;
与所有第二外接电性连接件对应连接的导电连接件连接至与外部电路对应连接的元件的引脚连接端,与所有第二外接电性连接件对应连接的导电连接件在垂直于基体所在平面的投影具有第二交集区域,与所有第二外接电性连接件对应连接的导电连接件,以及其之间的所有基体在第二交集区域对应的位置处设有贯穿的第二通孔;
第二互连件,第二互连件穿过第二通孔连接至第二外接电性连接件及与其对应连接的导电连接件之间;
用于包封除第二外接电性连接件之外的载体,所有基体、所有导电连接件、所有电路模块、所有第一互连件、所有第二互连件的包封壳体或者包封填充体。
作为一种可选的实施方式,端口防护电路集成封装件还包括:
第二外接电性连接件的除被包封壳体或者包封填充体包封之外的表面的部分区域上附着的阻焊层。本实施例中的阻焊层用于提高第二外接电性连接件走线时的绝缘性、防氧化性和防短路。
作为一种可选的实施方式,载体平行位于所有基体的下方。
作为一种可选的实施方式,所有第二外接电性连接件附着于载体的下表面。
作为一种可选的实施方式,所有第二互连件垂直于基体。
作为一种可选的实施方式,载体平行位于所有基体的下方,所有第二外接电性连接件附着于载体的下表面;所有第二互连件垂直于基体,且所有第二互连件和所有第一纵向互连件位于基体的同一侧。
作为一种可选的实施方式,第二外接电性连接件的除被包封壳体或者包封填充体包封之外的下表面的部分区域上附着阻焊层;以及,
第二外接电性连接件的下表面除附着有阻焊层之外的其他区域附着导电镀层,导电镀层可以是金属镀层,金属镀层垂直延伸连接至包封壳体或者包封填充体。
作为另一种可选的实施方式,本实施例中外接端口防护电路集成封装件的实现方式如下:
端口防护电路集成封装件还包括:
附着在基体的外表面,且用于外接端口防护电路集成封装件至外部电路的至少一个第一外接电性连接件;
第一外接电性连接件连接至端口防护电路集成封装件中与外部电路对应连接的元件的引脚连接端;
端口防护电路集成封装件还包括:
用于包封端口防护电路集成封装件中的除第一外接电性连接件之外的所有基体、所有导电连接件、所有电路模块、所有第一互连件的包封壳体或者包封填充体。
另一实施例
本实施例提供一种端口防护电路集成封装件,包括:
上下间隔分布的至少两个基体,每一个基体包括至少一个用于电性连接的导电连接件;
相邻基体之间分布的至少一个电路模块,每个电路模块包括至少一个元件及/或者包括至少一个集成封装模组,每一个集成封装模组包括至少两个元件,每个元件包括至少一个引脚连接端,所有元件中的至少一个元件为电路防护元件;相邻基体之间分布的所有电路模块中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻基体之间的至少一个电路模块与相邻基体中的至少一个基体通过外接电极端子和至少一个基体的导电连接件的电性连接而连接;所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端进行互连;以及/或者,
所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端与同一导电连接件的电性连接进行互连;以及/或者,
端口防护电路集成封装元件还包括第一互连件,所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端与导电连接件一一对应连接,以及通过设置在对应连接的导电连接件之间的第一互连件进行互连。
在本实施例中,所有元件中的一个元件为电路防护元件,所有电路模块还包括二个端口防护电路基本元件,分别是具有串连互连关系的第一电阻和第一电容。下面将以第一电阻和第一电容进行串连的互连引脚连接端之外的其另两个引脚连接端与电路防护元件的两个引脚连接端一一对应连接的电路结构为 例,结合图1a至图5c对本实施例实现该电路结构对应的端口防护电路集成封装件进行具体说明。请参见图1a至图5c,图1a为本实施例提供的端口防护电路集成封装件的第一剖视正面示意图;图1b为本实施例提供的端口防护电路集成封装件的第二剖视正面示意图;图1c为本实施例提供的端口防护电路集成封装件的电路结构示意图;图2为本实施例提供的端口防护电路集成封装件的第一基体的仰视结构图;图3a为本实施例提供的端口防护电路集成封装件的第二基体的俯视图;图3b为本实施例提供的端口防护电路集成封装件的第一模块的分布图;图4a为本实施例提供的端口防护电路集成封装件的第三基体的俯视图;图4b为本实施例提供的端口防护电路集成封装件的第二模块元件分布图;图5a为本实施例提供的端口防护电路集成封装件的载体的结构图;图5b为本实施例提供的端口防护电路集成封装件的载体的优选结构图;图5c为本实施例提供的端口防护电路集成封装件的载体的另一优选结构。在本实施例中,针对第一电阻和第一电容的串连的互连引脚连接端之外的其另两个引脚连接端与电路防护元件的两个引脚连接端一一对应连接的电路结构,以三个基体和相邻基体之间各分布的一个电路模块为例进行说明,下面结合具体的图示进行解释。如图1a和图1b所示,本实施例具体提供一种端口防护电路集成封装件,该端口防护电路集成封装件包括第一基体Z1、第二基体Z2、第三基体Z3,载体Z4,以及包括上下间隔分布的第一电路模块M1和第二电路模块M2。其中,第一基体Z1、第二基体Z2、第三基体Z3和载体Z4上下平行间隔分布,第一电路模块M1分布于相邻的第一基体Z1和第二基体Z2之间,以及第二电路模块M2分布于相邻的第二基体Z2和第三基体Z3之间。如图2所示,第一基体Z1的下表面附着第一导电连接件110,以及如图3a所示,第二基体Z2的上表面附着第二导电连接件120,如图4a所示,第三基体Z3的上表面附着三个第三导电连接件(分别是第三导电连接件130、第三导电连接件131和第三导电连接件132)。如图5a所示,载体Z4的下表面附着两个用于外接端口防护电路集成封装件至外部电路的第二外接电性连接件(分别是第二外接电性连接件140和第二外接电性连接件141)。以及,如图3b所示,在本实施例中,第一电路模块M1为一个电路防护元件。如图4b所示,第二电路模块M2包括平行分布的第一电阻R和第一电容C。在其他实施例中,第一电阻R和第 一电容C可以是纵向分布,具体实现形式不受本实施例的限制。
下面结合附图说明一下本实施例中的端口防护电路集成封装件的内部结构。如图1a和图1b所示,在本实施例中,电路防护元件的上下相对的两端为电路防护元件的两个引脚连接端,电路防护元件的两个引脚连接端分别为第一电路模块M1的二个外接电极端子。以及,在本实施例中,第一电阻R的第一引脚连接端和第一电容C的第一引脚连接端分别为第二电路模块M2的二个外接电极端子。如图1a和图1b所示,第一电路模块M1与第一基体Z1、第二基体Z2通过第一电路模块M1的两个外接电极端子和第一基体Z1的第一导电连接件110、第二基体Z2的第二导电连接件120一一对应电性连接而连接;以及,第二电路模块M2与第三基体Z3通过第二电路模块M2的二个外接电极端子和另二个第三导电连接件(第三导电连接件131和第三导电连接件132)一一对应电性连接而连接。另外,第一电阻R的第二引脚连接端和第一电容C的第二引脚连接端连接至第三导电连接件130。以及,在本实施例中,设定电路防护元件的两个引脚连接端通过两个第二外接电性连接件与外接电路进行电性连接,与外部电路对应电性连接的电路防护元件的两个引脚连接端通过其对应连接的导电连接件(第一导电连接件110和第二导电连接件120)与所有第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140)对应连接,与所有第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140)对应连接的导电连接件(第一导电连接件110和第二导电连接件120)在垂直于基体所在平面的投影具有二个第二交集区域,在本实施例中二个第二交集区域与第一交集区域P1及第一交集区域P2对应重叠,与所有第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140)对应连接的导电连接件(第一导电连接件110和第二导电连接件120),以及其之间的区域在两个第二交集区域(即第一交集区域P1及第一交集区域P2)对应的位置处分别设有贯穿的第二通孔。具体地,如图5a所示,在本实施例中第一通孔J1和第一通孔J2贯穿至载体Z4及载体Z4表面的两个第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140),以形成第二通孔J3和第三通孔J4。所以如图1a和图1b所示,两个第一纵向互连件(第一纵向互连件160和第一纵向互连件161)纵向延伸分别穿过第二通孔J3和 第三通孔J4,以连接于第二外接电性连接件141及与第二外接电性连接件140对应电性连接的导电连接件之间,形成第二互连件,以实现与外部电路对应电性连接的电路防护元件同用于外接电路的外接电性连接件之间的连接。在其他实施方式中,第一纵向互连件和第二互连件可以处于不同的位置,即通过图示中同一交集区域但不同位置处的通孔进行贯穿,可以排布在端口防护电路集成封装件的两侧,具体实现时不受本实施例的限制。
在本实施例中,第一通孔J1与第二通孔J2位于同一侧,同一侧的位置排列进一步缩小了端口防护电路集成封装件的体积和空间。
优选的,在本实施例中,第一通孔J1与第二通孔J2以及第三通孔J3和第四通孔J4都位于同一侧,同一侧的位置排列进一步缩小了端口防护电路集成封装件的体积和空间。
优选的,在本实施例中,第一通孔J1与第二通孔J2分别横向错开布置,形成两列,以及第三通孔J3和第四通孔J4也分别横向错开布置,形成两列,有效增大了集成结构实现时连接件之间的安全距离,减少了集成封装器件中的连接件电性连接的干扰性,提高了端口防护电路集成封装件的可靠性和稳定性。
作为一种可选的实施方式,端口防护电路集成封装件还包括用于包封除两个第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140)之外的载体Z4,所有基体(第一基体Z1、第二基体Z2、第三基体Z3)、所有导电连接件(第一导电连接件110、第二导电连接件120和第三导电连接件130、第三导电连接件131、第三导电连接件132)、所有电路模块(第一电路模块M1和第二电路模块M2)、所有第一互连件(即第一纵向互连件160和第一纵向互连件161)、所有第二互连件(即第一纵向互连件160和第一纵向互连件161延伸至第二通孔J3和第三通孔J4的延伸部位)的包封壳体或者包封填充体。在本实施例中,包封壳体或者包封填充体的制作方法为由载体Z4的表面电镀/印刷第二外接电性连接件(第二外接电性连接件141和第二外接电性连接件140)后,依次向上重复性的层叠包封填充体及/或基体和/或位于基体表面的印刷导电连接件的工艺步骤实现端口防护电路集成封装件的包封。本实施例中,第一电阻R的阻值为75Ω,第一电容C的电容值为1000pF。
优选的,如图1a、图1b、图5b和图5c所示,本实施例中,端口防护电路集成封装件还包括阻焊层150。具体的,阻焊层150为第二外接电性连接件的除被包封壳体或者包封填充体包封之外的表面的部分区域上附着的阻焊层150。优选的,本实施例中的阻焊层150为工字型阻焊层,有效阻止第二外接电性连接件141和第二外接电性连接件140焊接时的电性相互干扰的问题发生。
优选的,如图5c所示,第二外接电性连接件的下表面除附着有阻焊层之外的其他区域附着金属镀层151,金属镀层151延伸连接至包封壳体或者包封填充体的边缘。
如图1c所示,本实施例中的第一电阻R、第一电容C分别与电路防护元件存在互连关系,以及第一电阻R和第一电容C之间存在互连关系,具体地,第一电阻R通过其第一引脚连接端连接至电路防护元件的一引脚连接端,第一电容C的第一引脚连接端连接至电路防护元件的另一引脚连接端,以及第一电阻R的第二引脚连接端和第一电容C的第二引脚连接端具有串连关系。
因此,本实施例提供的端口防护电路集成封装件在实现互连时具有如下互连结构实施方案:
如图4b所示,第一电阻R与第一电容C互连时,第一电阻R的第二引脚连接端和第一电容C的第二引脚连接端通过与同一导电连接件(第三导电连接件130)的电性连接进行互连。
以及,本实施例提供的端口防护电路集成封装件还包括第一互连件,第一电阻R、第一电容C分别与电路防护元件互连时通过第一互连件进行互连。具体地,第一互连件为图1a和图1b中所示的两个第一纵向互连件(分别是第一纵向互连件160和第一纵向互连件161)。对于分布于不同相邻基体之间,且具有电路互连关系的第一电阻R与电路防护元件通过需互连的引脚连接端(第一电阻R的第一引脚连接端和电路防护元件的一引脚连接端)与导电连接件(第一导电连接件110和第三导电连接件132)一一对应连接,以及通过设置在对应连接的导电连接件(第一导电连接件110和第三导电连接件132)之间连接的一第一纵向互连件160进行互连。对于分布于不同相邻基体之间,且具有电路互连关系的第一电容C与电路防护元件通过需互连的引脚连接端(第 一电容C的第一引脚连接端和电路防护元件的另一引脚连接端)与导电连接件(第二导电连接件120和第三导电连接件131)一一对应连接,以及通过设置在对应连接的导电连接件(第二导电连接件120和第三导电连接件131)之间连接的另一第一纵向互连件161进行互连。详细地,第一电阻R和电路防护元件进行互连时,第一电阻R通过其第一引脚连接端与第三导电连接件132连接,电路防护元件通过其一引脚连接端与第一导电连接件110连接,以及通过设置在第一导电连接件110和第三导电连接件132之间连接的第一纵向互连件160进行第一电阻R和电路防护元件的互连;以及第一电容C和电路防护元件进行互连时,第一电容C通过其第一引脚连接端与第三导电连接件131连接,电路防护元件通过其另一引脚连接端与第二导电连接件120连接,以及通过设置在第二导电连接件120和第三导电连接件131之间连接的第一纵向互连件161进行第一电容C和电路防护元件的互连。
在本实施例中,端口防护电路集成封装件还包括第一通孔,通过第一通孔使分布于不同相邻基体之间的导电连接件之间连接的第一纵向互连件与导电连接件连接,即对应连接的导电连接件在垂直于基体所在平面的投影具有第一交集区域,端口防护电路集成封装件还包括:对应连接的导电连接件及其之间的所有基体(包括基体之间填充的包封填充物或者包封填充层)在第一交集区域对应的位置处设置贯穿的第一通孔,则第一纵向互连件穿过第一通孔连接至对应连接的导电连接件之间。本实施例中的第一纵向互连件160和第一纵向互连件161可以为在第一通孔中进行导电浆液灌注形成的导电体。具体地,如图1a至图5c所示,对应连接的导电连接件(第一导电连接件110和第三导电连接件132)在垂直于第一基体/第三基体所在平面的投影具有第一交集区域P1,对应连接的导电连接件(第一导电连接件110和第三导电连接件132)及其之间的所有基体(包括基体之间填充的包封填充物或者包封填充层)在第一交集区域P1对应的位置处设置贯穿的第一通孔J1;第一纵向互连件161穿过第一通孔J1连接至对应连接的导电连接件(第一导电连接件110和第三导电连接件132)之间。以及,对应连接的导电连接件(第二导电连接件120和第三导电连接件131)在垂直于第二基体/第三基体所在平面的投影具有第一交集区域P2,对应连接的导电连接件(第二导电连接件120和第三导电连接件131)及 其之间的所有基体,包括基体之间填充的包封填充物或者包封填充层在第一交集区域P2对应的位置处设置贯穿的第一通孔J2;第一纵向互连件161穿过第一通孔J2连接至对应连接的导电连接件(第二导电连接件120和第三导电连接件131)之间。图示中第一通孔J1和第一通孔J2的个数不受本实施例的限制,本实施例显示的多个孔仅是示意性的解释说明。
以及,本实施例中的第一纵向互连件160和第一纵向互连件161为在第一通孔J1和第一通孔J2中进行导电浆液灌注形成的导电体。
作为一种可选的实施方式,第一通孔中的第一纵向互连件160和第一纵向互连件161为附着于孔壁侧边的连接件。
作为一种可选的实施方式,第一纵向互连件为导电柱或者导电丝。
作为一种可选的实施方式,第一纵向互连件为沿基体的侧壁纵向延伸的侧壁导电连接件,以连接至对应连接的导电连接件之间。
作为一种可选的实施方式,电容和电阻为一上下分布串连的集成模块,则该集成模块的相对两端与两个基体的导电连接件的对应连接,进而实现所有器件的上下间隔分布的结构。即在本实施方式中,需互连的引脚连接端直接进行互连形成一个器件进行上下结构分布的集成模块。
RC集成模块包括依次叠层的第一电容电极层、第一电介质层和电阻层。
作为一种可选的实施方式,第一电介质层包括对位叠层、压合的N个电介质层,所有N个电介质层中的每相邻的两个电介质层之间连接有内电极层;N为大于0的整数。
作为一种可选的实施方式,集成模块还包括叠层于第一电介质层和电阻层之间的第二电容电极层。
作为一种可选的实施方式,电阻层包括由下至上叠层的第一电阻浆料印刷层和电阻电极层。
作为一种可选的实施方式,集成模块还包括叠层于第二电容电极层表面的第二电介质层;其中第二电介质层开设有通孔;
以及,电阻层包括:
用于填充通孔,且印刷于通孔内的第二电容电极层表面的第一电阻浆料印刷层;
叠层于第一电阻浆料印刷层表面的电阻电极层。
作为一种可选的实施方式,第一电介质层为用于制作电容器的第一陶瓷电介质基体,第二电介质层为用于制作电容器的第二陶瓷电介质基体。
作为一种可选的实施方式,第一陶瓷电介质基体为碳酸钡电介质基体、钛酸钙电介质基体或者钛酸镁电介质基体。
作为一种可选的实施方式,第一电容电极层、第二电容电极层、电阻电极层包含把、铂、金、银、铜或镍或上述至少两种金属所成的合金。
作为一种可选的实施方式,第一电阻浆料印刷层为钌系电阻浆料。
作为一种可选的实施方式,如图4b所示,第一电阻R的第一引脚连接端和第一电容C的第一引脚连接端也可作为第二电路模块M2的外接电极端子,从而和第一电阻R的第二引脚连接端和第一电容C的第二引脚连接端作为外接电极端子起到的作用相同,在本实施例中,因第一电阻R与第一电容C具有串连互连关系,所以与第一电阻R的第一引脚连接端和第一电容C的第一引脚连接端对应连接的导电连接件是同一导电连接件,即第二电路模块M2与第三基体Z3通过第二电路模块M2的四个外接电极端子和第三基体Z3的三个第三导电连接件(第三导电连接件130、第三导电连接件131和第三导电连接件132)对应电性连接而连接。
作为一种可选的实施方式,一第二外接电性连接件与第一电阻的第一引脚连接端连接的第三导电连接件通过一第二互连件连接,另一第二外接电性连接件与第一电容的第一引脚连接端连接的第三导电连接件通过另一第二互连件连接。
作为一种可选的实施方式,本实施例中的第一基体Z1、第二基体Z2、第三基体Z3和载体Z4为绝缘基体,绝缘基体为玻纤布。
作为一种可选的实施方式,电路防护元件包括气体放电管或瞬态电压抑制器或压敏电阻或热敏电阻或半导体放电管或保险丝。
作为一种可选的实施方式,本实施例中的第一导电连接件110、第二导电连接件120、以及所有第三导电连接件(第三导电连接件130、第三导电连接件131和第三导电连接件132)和载体Z4的下表面附着两个第二外接电性连接件(分别是第四导电连接件140和第四导电连接件141)分别为印刷于绝缘基 体(玻纤布)上的焊盘(或者是金属连接件)。
作为一种可选的实施方式,导电连接件通过过孔从下表面延伸至上表面。
本实施例中,第一基体Z1、第二基体Z2和第三基体Z3由上至下平行间隔分布,第一纵向互连件160和第一纵向互连件161都垂直于第一基体Z1、第二基体Z2和第三基体Z3,且位于所有基体的同一侧。
优选的,本实施例中的载体Z4为正方形,在其他实施方式中载体Z4可为长方形。
优选的,本实施例中,两个第二外接电性连接件间隔附于载体Z4的下表面的相对的两侧,阻焊层为工字型阻焊层,工字型阻焊层的中间部位覆盖于两个第二外接电性连接件的相对的两侧。
优选的,本实施例中,第一导电连接件110和第二导电连接件120为横边交错分布的两个L型导电连接件,第一导电连接件110和第二导电连接件120的横边朝向基体的同一侧对称错落分布。
优选的,本实施例中,第一基体Z1、第二基体Z2、第三基体Z3和载体Z4为等面积的长方体或者正方体,所有基体和载体Z4的长小于或者等于10mm,且大于或者等于1mm,所有基体和载体Z4的宽小于或者等于10mm,且大于或者等于1mm,以及端口防护电路集成封装件的高小于或者等于1.8mm,且大于或者等于0.8mm。
优选的,本实施例中,第一基体Z1、第二基体Z2、第三基体Z3和载体Z4为等面积的长方体或者正方体,所有基体和载体Z4的长小于或者等于10mm,且大于或者等于1mm,所有基体和载体Z4的宽小于或者等于10mm,且大于或者等于1mm,以及端口防护电路集成封装件的高小于或者等于1.8mm,且大于或者等于1mm。
优选的,在其他实施方式中,所有基体和载体Z4的长小于或者等于5mm,且大于或者等于3mm,所有基体和载体Z4的宽小于或者等于5mm,且大于或者等于3mm,以及端口防护电路集成封装件的高小于或者等于1.6mm,且大于或者等于1.4mm。
优选的,在其他实施方式中,所有基体和载体Z4的长小于或者等于4.8mm,且大于或者等于3.2mm,所有基体和载体Z4的宽小于或者等于4.8mm, 且大于或者等于3.2mm,以及端口防护电路集成封装件的高小于或者等于1.5mm,且大于或者等于0.9mm。
优选的,在本实施方式中,第一导电连接件110位于第一基体Z1的中部,第二导电连接件120位于第二基体Z2的中部;与第二电路模块的二个外接电极端子对应连接的另二个第三导电连接件间隔分布于第三基体Z3的同一侧,所有第一通孔位于所有基体的同一侧,第一导电连接件110通过一第一纵向互连件和位于第一导电连接件110的横边上的一第一通孔连接至一分布于第三基体Z3的同一侧的一第三导电连接件,第二导电连接件120通过另一第一纵向互连件和位于第二导电连接件120的横边上的另一第一通孔连接至另一分布于第三基体Z3的同一侧的另一第三导电连接件。
优选的,所述第一导电连接件和所述第二导电连接件的横边的宽大于或者等于1mm,小于或者等于5mm,所述第一导电连接件和所述第二导电连接件的纵边的宽大于或者等于2mm,小于或者等于8mm。如图2或图3a或图3b所示,第一导电连接件和所述第二导电连接件的横边的宽s1为1至2mm及其之间的任一值,第一导电连接件和所述第二导电连接件的纵边的宽s2为2.5至3.0mm及其之间的任一值。
优选的,第一导电连接件110和第二导电连接件120的横边的宽小于或者等于1.8mm,第一导电连接件110和第二导电连接件120的竖边的宽小于或者等于2.6mm。
优选的,第一导电连接件110和第二导电连接件120的横边的宽小于或者等于4mm,第一导电连接件110和第二导电连接件120的竖边的宽小于或者等于7mm。
优选的,第一导电连接件110和第二导电连接件120的横边的宽小于或者等于3.5mm,第一导电连接件110和第二导电连接件120的竖边的宽小于或者等于6mm。
优选的,第一导电连接件110和第二导电连接件120的横边的宽小于或者等于3mm,第一导电连接件110和第二导电连接件120的竖边的宽小于或者等于5.5mm。
优选的,第一导电连接件110和第二导电连接件120的横边的宽小于或者 等于2.8mm,第一导电连接件110和第二导电连接件120的竖边的宽小于或者等于4mm。
另一实施例
本实施例还提供一种端口防护电路集成封装件,包括:
上下间隔分布的至少两个基体,每一个基体包括至少一个用于电性连接的导电连接件;
相邻基体之间分布的至少一个电路模块,每个电路模块包括至少一个元件及/或者包括至少一个集成封装模组,每一个集成封装模组包括至少两个元件,每个元件包括至少一个引脚连接端,所有元件中的至少一个元件为电路防护元件;相邻基体之间分布的所有电路模块中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻基体之间的至少一个电路模块与相邻基体中的至少一个基体通过外接电极端子和至少一个基体的导电连接件的电性连接而连接;所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端进行互连;以及/或者,
所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端与同一导电连接件的电性连接进行互连;以及/或者,
端口防护电路集成封装元件还包括第一互连件,所有电路模块中部分或者全部具有电路互连关系的元件通过互连引脚连接端与导电连接件一一对应连接,以及通过设置在对应连接的导电连接件之间的第一互连件进行互连。
作为一种可选的实施方式,电路防护元件包括气体放电管或瞬态电压抑制器或压敏电阻或热敏电阻或半导体放电管或保险丝。
作为一种可选的实施方式,所有电路模块还包括至少一个端口防护电路基本元件,端口防护电路基本元件包括电阻、电容、电感、保险丝和浪涌防护器件中的至少一种端口防护电路基本元件。
作为一种可选的实施方式,所有电路模块中的元件还包括至少一个端口防护电路基本元件,包括:
所有电路模块中的元件还包括N个电阻和N个电容,所述N大于或等于1,所述N个电阻与所述N个电容一一对应电性串连,其中,任一所述电阻的第一引脚连接端连接至与所述电阻对应连接的所述电容的第一引脚连接端;
以及,所有电路模块中的元件还包括N-1个电路防护元件,所有N个电路防护元件与所述N个电阻一一对应电性互连,所述N个电路防护元件与所述N个电容一一对应电性互连,其中,每一所述电阻的第二引脚连接端和每一所述电容的第二引脚连接端与对应连接的所述电路防护元件的两个引脚连接端一一对应连接,以及,所有电容的所述第二引脚连接端互连。
具体的请参见图6,图6为本实施例提供的另一种端口防护电路集成封装件的电路结构图,如图6所示,本实施例实现的端口防护电路中以2个电路防护元件为例进行说明,即在本实施例提供的端口防护电路中,电路防护元件还包括第二电路防护元件G2,端口防护电路基本元件还包括第二电阻R2和第二电容C2,其中第二电路防护元件G2的一引脚连接端和第二电阻R2的一引脚连接端分别作为实现第二电路防护元件G2和第二电阻R2串连的公共端,第二电路防护元件G2的另一引脚连接端与第二电容C2的一引脚连接端分别作为实现第二电路防护元件G2和第二电容C2串连的公共端,以及第二电阻R2的另一引脚连接端和第二电容C2的另一引脚连接端分别作为实现第二电阻R2和第二电容C2互连的公共端;
第一电容C的一引脚连接端连接至第二电容C2的一引脚连接端。
请参见图7,图7为本实施例提供的另一种端口防护电路集成封装件的电路结构图,如图7所示,基于图7所示的端口防护电路,在本实施例提供的端口防护电路中,电路防护元件还包括第三电路防护元件G3和第四电路防护元件G4,端口防护电路基本元件还包括第三电阻R3、第四电阻R4、第三电容C3和第四电容C4,其中第三电路防护元件G3的一引脚连接端和第三电阻R3的一引脚连接端分别作为实现第三电路防护元件G3和第三电阻R3串连的公共端,第三电路防护元件G3的另一引脚连接端与第三电容C3的一引脚连接端分别作为实现第三电路防护元件G3和第三电容C3串连的公共端,以及第三电阻R3的另一引脚连接端和第三电容C3的另一引脚连接端分别作为实现第三电阻R3和第三电容C3互连的公共端;第四电路防护元件G4的一引脚连接端和第四电阻R4的一引脚连接端分别作为实现第四电路防护元件G4和第四电阻R4串连的公共端,第四电路防护元件G4的另一引脚连接端与第四电容C4的一引脚连接端分别作为实现第四电路防护元件G4和第四电容C4串连 的公共端,以及第四电阻R4的另一引脚连接端和第四电容C4的另一引脚连接端分别作为实现第四电阻R4和第四电容C4互连的公共端;
第一电容C的一引脚连接端连接至第二电容C2的一引脚连接端和第三电容C3的一引脚连接端和第四电容C4的一引脚连接端。
图6和图7所示的电路对应的端口防护电路集成封装件可以以图1a所示的结构为基础,进一步进行层叠加工,实现多个电路防护元件的模块与多个鲍勃史密斯电路的模块的纵向集成。
本实施例采用纵向分布的基体结构及所属于基体的导电连接件来封装多个电路模块,减少了元件横向分布时所占用的印刷线路板的表面积和元器件的间距,而且也减少了PCB布线之间的间距,集成结构简单,节约了电子设备的容置空间。
另外,本实施例通过导电连接件的连接可以减少焊接工序和分立元件进行电路连接的组合测试步骤,该集成结构可以减少PCB加工工序,耗费工时少,生产效率高。
另外,本实施例中的模块包含至少一个电路防护元件,减小防护器件的分布体积的同时,端口防护领域的设备小型化发展得以实现。
另外,本实施例中导电连接件的分布和位置可以根据电路实现的实际情况进行有选择性和有针对性的布置,使其纵向高度和表面积的尺寸可以根据客户提出的整体尺寸需求进行特色制定。
作为一种可选的实施方式,电路防护元件包括气体放电管或瞬态电压抑制器或压敏电阻或热敏电阻或半导体放电管或保险丝。
作为一种可选的实施方式,所有电路模块还包括至少一个端口防护电路基本元件,端口防护电路基本元件包括电阻或者电容或者电感等端口防护电路基本元件。
作为一种可选的实施方式,所有电路模块还包括至少一个端口防护电路基本元件,包括:
所有电路模块还包括二个端口防护电路基本元件,分别是具有串连互连关系的第一电阻和第一电容。
作为一种可选的实施方式,所有元件中的一个元件为电路防护元件,以及 除第一电阻和第一电容的串连的互连引脚连接端之外的另两个引脚连接端与电路防护元件的两个引脚连接端一一对应连接。
作为一种可选的实施方式,每一个基体为导电封装基体;
则每一个基体包括至少一个用于电性连接的导电连接件,包括:
每一个导电封装基体为一个用于电性连接的导电连接件。
作为一种可选的实施方式,导电封装基体为导电框架,导电框架包括导电托盘和导电托盘延伸形成的导电引脚,导电托盘用于封装元件,导电引脚用于与外接电路进行连接,部分或者全部具有互联关系的元件通过互连引脚连接端与同一导电托盘的连接进行互连。
作为一种可选的实施方式,导电框架为金属框架。
作为一种可选的实施方式,金属框架为铜引线框架。
在本申请所提供的几个实施例中,应该理解到,以上描述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本申请的保护范围之内。

Claims (20)

  1. 一种端口防护电路集成封装件,其特征在于,包括:
    上下间隔分布的至少两个基体,每一个所述基体包括至少一个用于电性连接的导电连接件;
    相邻所述基体之间分布的至少一个电路模块,每个所述电路模块包括至少一个元件及/或者包括至少一个集成封装模组,每一个所述集成封装模组包括至少两个元件,所有元件中的至少一个元件为电路防护元件;相邻所述基体之间分布的所有电路模块中的至少一个元件的至少一个引脚连接端作为外接电极端子,分布于相邻所述基体之间的所述至少一个电路模块与相邻所述基体中的至少一个基体通过所述外接电极端子和所述至少一个基体的所述导电连接件的电性连接而连接;所有电路模块中部分或者全部具有电路互连关系的所述元件通过互连引脚连接端进行互连;以及/或者,
    所有电路模块中部分或者全部具有电路互连关系的所述元件通过所述互连引脚连接端与同一所述导电连接件的电性连接进行互连;以及/或者,
    所述端口防护电路集成封装元件还包括第一互连件,所有电路模块中部分或者全部具有电路互连关系的所述元件通过所述互连引脚连接端与所述导电连接件一一对应连接,以及通过设置在对应连接的所述导电连接件之间的所述第一互连件进行互连。
  2. 如权利要求1所述的端口防护电路集成封装件,其特征在于,
    所述电路防护元件包括无源电路防护元件或有源电路防护元件或气体放电管或瞬态电压抑制器或压敏电阻或热敏电阻或半导体放电管或保险丝。
  3. 如权利要求1所述的端口防护电路集成封装件,其特征在于,所有电路模块还包括至少一个端口防护电路基本元件,所述端口防护电路基本元件包括应用于端口防护电路中的无源器件电阻、电容、电感、保险丝和浪涌防护器件中的至少一种端口防护电路基本元件。
  4. 如权利要求3所述的端口防护电路集成封装件,其特征在于,所有电路模块还包括至少一个端口防护电路基本元件,包括:
    所有电路模块中的元件还包括N个电阻和N个电容,所述N大于或等于 1,所述N个电阻与所述N个电容一一对应电性串连,其中,任一所述电阻的第一引脚连接端连接至与所述电阻对应连接的所述电容的第一引脚连接端;
    以及,所有电路模块中的元件还包括N-1个电路防护元件,所有N个电路防护元件与所述N个电阻一一对应电性互连,所述N个电路防护元件与所述N个电容一一对应电性互连,其中,每一所述电阻的第二引脚连接端和每一所述电容的第二引脚连接端与对应连接的所述电路防护元件的两个引脚连接端一一对应连接,以及,所有电容的所述第二引脚连接端互连。
  5. 如权利要求3所述的端口防护电路集成封装件,其特征在于,所有电路模块还包括至少一个端口防护电路基本元件,包括:
    所有电路模块中的元件还包括二个端口防护电路基本元件,分别是具有串连互连关系的第一电阻和第一电容。
  6. 如权利要求5所述的端口防护电路集成封装件,其特征在于,所有元件中的一个元件为电路防护元件,以及所述第一电阻和所述第一电容除进行串连的互连引脚连接端之外的另两个引脚连接端与所述电路防护元件的两个引脚连接端一一对应连接。
  7. 如权利要求1至6中任一所述的端口防护电路集成封装件,其特征在于,每一个所述基体为绝缘封装基体;
    每一个所述基体的外表面附着至少一个用于电性连接的导电连接件。
  8. 如权利要求1至6中任一所述的端口防护电路集成封装件,其特征在于,每一个所述基体为导电封装基体;
    每一个所述导电封装基体为一个用于电性连接的导电连接件。
  9. 如权利要求7所述的端口防护电路集成封装件,其特征在于,所述第一互连件包括第一纵向互连件;
    分布于不同相邻基体间,且具有电路互连关系的所述元件通过所述互连引脚连接端与所述导电连接件一一对应连接,以及通过设置在对应连接的所述导电连接件之间的所述第一纵向互连件进行互连;
    所述对应连接的所述导电连接件在垂直于所述基体所在平面的投影具有第一交集区域;
    所述端口防护电路集成封装件还包括:
    对应连接的所述导电连接件及其之间的区域在所述第一交集区域对应的位置处设置贯穿的第一通孔;所述第一纵向互连件穿过所述第一通孔连接至所述对应连接的所述导电连接件之间。
  10. 如权利要求9所述的端口防护电路集成封装件,其特征在于,
    所有基体上下平行间隔分布,所有第一纵向互连件垂直于所述基体,且位于所述基体的同一侧。
  11. 如权利要求10所述的端口防护电路集成封装件,其特征在于,还包括:
    附着在所述基体的外表面,且用于外接所述端口防护电路集成封装件至外部电路的至少一个第一外接电性连接件;
    用于包封所述端口防护电路集成封装件中的除所述第一外接电性连接件之外的所有基体、所有导电连接件、所有电路模块、所有第一互连件的包封壳体或者包封填充体;
    所述第一外接电性连接件连接至所述端口防护电路集成封装件中与所述外部电路对应连接的所述元件的引脚连接端。
  12. 如权利要求10所述的端口防护电路集成封装件,其特征在于,还包括:
    载体;
    附着于所述载体的外表面,且用于外接所述端口防护电路集成封装件至外部电路的至少一个第二外接电性连接件;
    与所述外部电路对应电性连接的所述元件的所述引脚连接端通过其对应连接的导电连接件与所有第二外接电性连接件对应连接,与所有第二外接电性连接件对应连接的所述导电连接件在垂直于所述基体所在平面的投影具有第二交集区域,所述与所有第二外接电性连接件对应连接的所述导电连接件,以及其之间的区域在所述第二交集区域对应的位置处设有贯穿的第二通孔;
    第二互连件,所述第二互连件穿过所述第二通孔连接至所述第二外接电性连接件及与其对应电性连接的所述导电连接件之间;
    用于包封除所述第二外接电性连接件之外的所述载体,所有基体、所有导电连接件、所有电路模块、所有第一互连件、所有第二互连件的包封壳体或者 包封填充体。
  13. 如权利要求12所述的端口防护电路集成封装件,其特征在于,还包括:
    所述第二外接电性连接件的除被包封之外的表面的部分区域上附着的阻焊层。
  14. 如权利要求13所述的端口防护电路集成封装件,其特征在于,
    所述载体平行位于所有基体的下方,所有第二外接电性连接件附着于所述载体的下表面;所有第二互连件垂直于所述基体,且所有第二互连件和所有第一纵向互连件位于所述基体的所述同一侧。
  15. 如权利要求14所述的端口防护电路集成封装件,其特征在于,
    所述第二外接电性连接件的除被所述包封壳体或者所述包封填充体包封之外的下表面的部分区域上附着所述阻焊层;
    所述第二外接电性连接件的下表面除附着有所述阻焊层之外的其他区域附着导电镀层。
  16. 如权利要求15所述的端口防护电路集成封装件,其特征在于,包括:
    所有基体分别为上下平行间隔分布的第一基体、第二基体、第三基体;其中,所述第一基体的下表面附着第一导电连接件,所述第二基体的上表面附着第二导电连接件,所述第三基体的上表面附着三个第三导电连接件,所述载体的下表面附着两个所述第二外接电性连接件;
    上下间隔分布的第一电路模块和第二电路模块;其中,所述第一电路模块包括一个所述电路防护元件,所述第二电路模块包括所述第一电阻和所述第一电容,所述电路防护元件的两个引脚连接端分别为所述第一电路模块的二个外接电极端子;所述第一电阻的第一引脚连接端和所述第一电容的第一引脚连接端分别为所述第二电路模块的二个外接电极端子;
    所述第一电路模块与所述第一基体、所述第二基体通过所述第一电路模块的两个外接电极端子和所述第一导电连接件、所述第二导电连接件一一对应电性连接而连接;以及,所述第一电阻的第二引脚连接端和所述第一电容的第二引脚连接端连接至一所述第三导电连接件,以及,所述第二电路模块与所述第三基体通过所述第二电路模块的二个外接电极端子和另二个所述第三导电连 接件一一对应电性连接而连接;
    所述第一导电连接件和与所述第一电阻的第一引脚连接端连接的所述第三导电连接件通过所述第一纵向互连件连接;所述第二导电连接件和与所述第一电容的第一引脚连接端连接的所述第三导电连接件通过另一所述第一纵向互连件连接;
    一所述第二外接电性连接件与所述第一电阻的第一引脚连接端连接的所述第三导电连接件通过一所述第二互连件连接,另一所述第二外接电性连接件与所述第一电容的第一引脚连接端连接的所述第三导电连接件通过另一所述第二互连件连接。
  17. 如权利要求16所述的端口防护电路集成封装件,其特征在于,所述电路防护元件为瞬态电压抑制器、压敏电阻、热敏电阻、半导体放电管、保险丝之中的任一种器件。
  18. 如权利要求17所述的端口防护电路集成封装件,其特征在于,
    所述载体为正方形或者长方形,两个所述第二外接电性连接件间隔附于所述载体相对的两侧,所述阻焊层为工字型阻焊层,所述工字型阻焊层的中间部位覆盖于两个所述第二外接电性连接件的相向的两侧;
    所述第一导电连接件和所述第二导电连接件为交错分布的两个L型导电连接件,所述第一导电连接件和所述第二导电连接件的横边朝向所述基体的所述同一侧对称错落分布。
  19. 如权利要求18所述的端口防护电路集成封装件,其特征在于,所述第一导电连接件位于所述第一基体的中部,所述第二导电连接件位于所述第二基体的中部;与所述第二电路模块的二个所述外接电极端子对应连接的所述另二个所述第三导电连接件间隔分布于所述第三基体的所述同一侧,所有第一通孔位于所有基体的所述同一侧,所述第一导电连接件通过一所述第一纵向互连件和位于所述第一导电连接件的横边上的一所述第一通孔连接至一分布于所述第三基体的所述同一侧的一所述第三导电连接件,所述第二导电连接件通过另一所述第一纵向互连件和位于所述第二导电连接件的横边上的另一所述第一通孔连接至另一分布于所述第三基体的所述同一侧的另一所述第三导电连接件。
  20. 如权利要求21所述的端口防护电路集成封装件,其特征在于,位于所述第一导电连接件的横边上的一所述第一通孔和位于所述第二导电连接件的横边上的另一所述第一通孔横向交错分布,所有第二通孔为所有第一通孔纵向延伸至所述载体形成,所有第二互连件为所有第一纵向互连件纵向延伸至所述载体形成。
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CN105047642B (zh) * 2015-08-12 2024-01-19 深圳市槟城电子股份有限公司 一种端口防护电路集成封装件
CN105429456A (zh) * 2015-12-19 2016-03-23 天津光电惠高电子有限公司 一种光电倍增管用小体积负高压电源及其制作方法
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