WO2017000886A2 - 低压差线性稳压器与增加其稳定性的方法及锁相环 - Google Patents

低压差线性稳压器与增加其稳定性的方法及锁相环 Download PDF

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WO2017000886A2
WO2017000886A2 PCT/CN2016/087707 CN2016087707W WO2017000886A2 WO 2017000886 A2 WO2017000886 A2 WO 2017000886A2 CN 2016087707 W CN2016087707 W CN 2016087707W WO 2017000886 A2 WO2017000886 A2 WO 2017000886A2
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Prior art keywords
voltage
linear regulator
dropout linear
reference voltage
compensation
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PCT/CN2016/087707
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English (en)
French (fr)
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WO2017000886A3 (zh
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张津海
蔡飞
周盛华
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华为技术有限公司
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Priority to EP16817250.0A priority Critical patent/EP3296832A4/en
Priority to BR112017027689A priority patent/BR112017027689A2/pt
Publication of WO2017000886A2 publication Critical patent/WO2017000886A2/zh
Publication of WO2017000886A3 publication Critical patent/WO2017000886A3/zh
Priority to US15/857,037 priority patent/US10296028B2/en
Priority to US16/376,358 priority patent/US10915123B2/en

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Definitions

  • the present invention relates to the field of semiconductors, and more particularly to a low dropout linear regulator and a method for increasing its stability and a phase locked loop.
  • Phase Locked Loop refers to the automatic phase changer (Phase Detector), loop filter (Loop Fi lter) and voltage controlled oscillator (Voltage Control Oscillator) (VCO). Control the closed loop system. Since the PLL can perform phase synchronization of two electrical signals, it is widely used in the fields of broadcast communication, frequency synthesis, automatic control, and clock synchronization. Since power supply noise and fluctuations affect the stability of the PLL, in actual use, it is usually necessary to use a Low Dropout Regulator (LDO) to overcome the influence of power supply noise and fluctuation on the PLL, and to ensure noise sensitivity such as PLL. The characteristics of the circuit. As shown in FIG.
  • the conventional LDO can be composed of a reference voltage source 101, an error amplifier 102, a compensation circuit 103, a transistor 104, a voltage dividing circuit 105, and a load 106.
  • the compensation circuit is composed of a zeroing resistor 1031 and a Miller compensation capacitor 1032.
  • the voltage dividing circuit is composed of a first voltage dividing resistor 1051 and a second voltage dividing resistor 1052. Due to the existence of the compensation circuit, the noise distribution of the existing LDO is as shown in FIG. Characterizing the equivalent input noise of the error amplifier 102, Characterizing the reference voltage source 101 to output noise, Characterizing the thermal noise of resistor 1051, The thermal noise of the resistor 1052 is characterized.
  • the LDO noise performance can be improved in the existing LDO by significantly increasing the transconductance of the error amplifier.
  • the zeroing resistance has a minimum value in the layout implementation, the minimum value is usually on the order of 10 ohms; the capacitance value of the Miller compensation capacitor also has a maximum value in the layout implementation, so the gain bandwidth of the error amplifier has a maximum value.
  • Lower limit Since the gain amplifier of the error amplifier has a lower limit of the maximum value, which determines that the upper limit of the transconductance of the error amplifier is lower, once the transconductance of the error amplifier exceeds the upper limit, the stability of the LDO system is degraded.
  • the embodiment of the invention provides a low-dropout linear regulator and a method for increasing the stability thereof and a phase-locked loop to overcome the problem of poor noise performance of the existing low-dropout linear regulator.
  • an embodiment of the present invention provides a low dropout linear regulator, including: a reference voltage source for providing a reference voltage; an error amplifier coupled to the reference voltage source for receiving a feedback voltage and the a reference voltage, comparing the feedback voltage and the reference voltage, and outputting a control voltage according to a comparison result of the feedback voltage and the reference voltage; and an adjustment circuit coupled to the error amplifier for receiving the control voltage, And outputting a regulated current under control of the control voltage; a load coupled to the regulating circuit and the error amplifier, the regulated current flowing through the load to form a voltage on a load, the feedback voltage and the a voltage dependent on the load, a first compensation circuit coupled to the adjustment circuit for adjusting a primary pole and a secondary principal pole of the low dropout linear regulator to adjust a phase margin; and a second compensation circuit
  • the first compensation circuit coupling is configured to, after the first compensation circuit has adjusted the main pole and the second main pole of the low dropout linear regulator, The main section is reduced LDO Pole and secondary primary pole is further increased
  • the conditioning circuit comprises a transistor.
  • the first compensation circuit includes a zeroing resistor and a Miller compensation capacitor, and one end of the Miller compensation capacitor is The drain of the transistor is connected, and the other end is connected to one end of the zeroing resistor; the other end of the zeroing resistor is connected to the second compensation circuit.
  • the second compensation circuit includes a compensation resistor, and one end of the compensation resistor is connected to an output end of the error amplifier The other end is connected to one end of the zeroing resistor and the gate of the transistor.
  • the resistance of the compensation resistor is not less than a resistance value of the equivalent load resistance of the error amplifier, and is less than or equal to R B-MAX , wherein R B-MAX is a resistance value of the compensation resistor when the noise reduced by the compensation resistor is equal to the noise introduced by the compensation resistor, and the noise reduced by the compensation resistor refers to the low voltage Noise introduced by other components in the differential linear regulator and eliminated by the compensation resistor.
  • the low dropout linear regulator further includes a feedback circuit, and the feedback circuit, The error amplifier and the load are coupled for receiving a voltage on the load and generating the feedback voltage according to a voltage on the load.
  • the low-dropout linear voltage regulator further includes a noise filtering circuit, a noise filtering circuit, and a The reference voltage source and the error amplifier are coupled to perform noise filtering on a reference voltage provided by the reference voltage source, and send the noise-filtered reference voltage to the error amplifier.
  • the embodiment of the present invention further provides a phase-locked loop, which comprises the low-dropout linear regulator in the first aspect or any one of the possible implementations of the first aspect.
  • an embodiment of the present invention further provides a method for increasing the stability of a low dropout linear regulator of a low dropout linear regulator, comprising: receiving a reference voltage and a feedback voltage; comparing the feedback a voltage and the reference voltage, and generating a control voltage according to a comparison result of the feedback voltage and the reference voltage; generating a regulation current under the control of the control voltage; adjusting the low-dropout linear stability according to the adjustment current a main pole and a second main pole of the voltage regulator; further adjusting the low-dropout linear voltage regulator according to the adjusting current based on adjusting a main pole and a second main pole of the low-dropout linear regulator according to the adjusting current The main pole and the second main pole of the device, and adjust the gain bandwidth product of the low dropout linear regulator according to the regulated current.
  • the method further includes: performing noise filtering on the reference voltage; comparing the feedback voltage and the reference voltage
  • the method includes: comparing the feedback voltage and the noise-filtered reference voltage.
  • the low dropout linear regulator in the embodiment of the invention includes a reference voltage source for providing reference power And an error amplifier coupled to the reference voltage source for receiving a feedback voltage and the reference voltage, comparing the feedback voltage and the reference voltage, and outputting according to a comparison result of the feedback voltage and the reference voltage a control circuit coupled to the error amplifier for receiving the control voltage and outputting a regulated current under control of the control voltage; a load coupled to the adjustment circuit and the error amplifier, Adjusting a current flowing through the load to form a voltage on the load, the feedback voltage being related to a voltage on the load, a first compensation circuit coupled to the adjustment circuit for regulating the low dropout linear regulator a primary pole and a secondary pole to adjust a phase margin; and a second compensation circuit coupled to the first compensation circuit for adjusting a primary pole of the low dropout linear regulator at the first compensation circuit And adjusting the main pole of the low-dropout linear regulator based on the sub-primary pole, and further increasing the sub-primary pole to adjust the phase margin and adjust Gain-bandwidth
  • the low-dropout linear regulator provided by the embodiment of the present invention can significantly reduce the gain bandwidth product value and the size of the main pole, and increase the size of the secondary main pole, so the introduction of the second compensation circuit can be
  • the system stability of the low dropout linear regulator is greatly increased, so that the transconductance of the error amplifier of the present invention can be larger than that of the existing error amplifier, so that the error amplifier of the present invention has better noise performance.
  • FIG. 2 is a schematic structural view of an embodiment of an LDO of the present invention.
  • FIG. 3 is a schematic structural view of another embodiment of an LDO of the present invention.
  • FIG. 4 is a schematic structural view of an embodiment of an error amplifier in an LDO of the present invention.
  • FIG. 5 is a schematic structural view of another embodiment of an LDO of the present invention.
  • FIG. 6 is a schematic flow chart of an embodiment of a method for increasing the stability of a low dropout linear regulator by an LDO according to the present invention.
  • FIG. 2 is a schematic structural view of an embodiment of an LDO of the present invention.
  • the LDO of the present invention may include a reference voltage source 201, an error amplifier 202, an adjustment circuit 203, a first compensation circuit 204, a second compensation circuit 205, and a load 206.
  • the reference voltage source 201 is configured to provide a reference voltage; the error amplifier 202 is coupled to the reference voltage source 201 for receiving a feedback voltage and the reference voltage, comparing the feedback voltage and the reference voltage, and according to The comparison result of the feedback voltage and the reference voltage outputs a control voltage; the adjustment circuit 203 is coupled to the error amplifier 202 for receiving the control voltage, and outputs a regulation current under the control of the control voltage; a load 206 coupled to the adjustment circuit 203 and the error amplifier 202, the regulated current flowing through the load 206 to form a voltage on the load, and a first compensation circuit 204 coupled to the adjustment circuit 203 for Adjusting a primary pole and a secondary pole of the low dropout linear regulator to adjust a phase margin; and a second compensation circuit 205 coupled to the first compensation circuit 204 for use in the first compensation circuit 204 Adjusting the main pole and the second main pole of the low dropout linear regulator to further adjust the main pole and the second main pole of the low dropout linear regulator to adjust the phase Margin, and adjusting
  • the feedback voltage is related to the voltage on the load, which typically means that the feedback voltage is linear with the voltage across the load.
  • the feedback voltage is a voltage on the load, or the feedback voltage is in a predetermined proportional relationship with a voltage on the load, and the like.
  • the reduction of the main pole refers to that the main pole of the low dropout linear regulator is smaller than that of the first compensation circuit 204 after being adjusted by the first compensation circuit 204.
  • the main pole of the time; the increase of the secondary pole means that the secondary main pole is larger than that of the first compensation circuit 204 after being adjusted by the first compensation circuit 204; and the gain bandwidth is reduced.
  • the product means that the gain bandwidth product after adjustment by the first compensation circuit 204 is smaller than the gain bandwidth product when not adjusted by the first compensation circuit 204.
  • circuit structure of the LDO can be as shown in FIG. 3.
  • the negative input of the error amplifier 202 is coupled to the reference voltage source 201 for receiving a reference voltage from a reference voltage source.
  • the forward input of the error amplifier 202 is coupled to a load for receiving a feedback voltage.
  • the first compensation circuit 204 may be a Miller capacitance-zero resistance compensation circuit, that is, the first compensation circuit 204 may include a zeroing resistor 2041 and a Miller compensation capacitor 2042, and the Miller compensation capacitor 2042 and The drain of the transistor 203 is connected to another end of the zeroing resistor 2041; the other end of the zeroing resistor 2041 is connected to the second compensation circuit 205.
  • the adjustment circuit 203 can be a power MOS device such as a transistor.
  • the second compensation circuit 205 may include a compensation resistor 2051. One end of the compensation compensation resistor 2051 is connected to the output end of the error amplifier 202, and the other end is connected to one end of the zero-reduction resistor 2041 and the gate of the adjustment circuit 203. Extremely connected.
  • the compensation resistor 2051 may be a silicon diffusion resistor, a MOS device resistor or a metal trace resistor.
  • the zero point of the LDO is:
  • the GBW of the LDO can be expressed as:
  • C C is the capacitance value of the Miller compensation capacitor 2042
  • R nl is the resistance value of the zeroing resistor 2041
  • g m2 is the transconductance of the adjustment circuit 203
  • g m1 is the transconductance of the error amplifier 202
  • R LOAD is the load
  • the load resistance value C LOAD is the load capacitance value of the load 206
  • R 1 is the resistance value of the equivalent load resistance of the error amplifier 202
  • C 1 is the capacitance value of the equivalent load capacitance of the error amplifier 202
  • R B is the resistance of the compensation resistor 2051. value.
  • the second compensation circuit can be significantly increased. Decreasing the gain bandwidth product GBW and the main pole p1, and increasing the secondary main pole p3, so the introduction of the second compensation circuit greatly increases the system stability, so that the transconductance of the error amplifier of the present invention can be compared to the existing error amplifier The conductance is larger, so that the error amplifier of the present invention has better noise performance.
  • the introduction of the second compensation circuit can not only reduce the area of the LDO by reducing the value of C C ; but also increase the phase margin of the LDO by lowering the GBW of the LDO, thereby improving the ability of the LDO to drive the load.
  • the resistor itself introduces noise
  • the formula for the noise introduced by the compensation resistor can be expressed as:
  • V n, out of the LDO is the output noise
  • V n, ea refers to the noise introduced by the error amplifier 202
  • V n refers to the time constant of sRC noise filter
  • V n ref refers to the noise introduced by the reference voltage source 201
  • V n PFET refers to the noise introduced by the transistor 203
  • a V refers to the gain of the error amplifier 202
  • k refers to the Boltzmann constant
  • T refers to the temperature.
  • the resistance value of the compensation resistor is larger, the noise introduced by other components of the LDO can be reduced.
  • the larger the resistance of the compensation resistor is the larger the noise introduced by the compensation resistor is, and when the compensation resistor is When the resistance exceeds a certain value, the noise introduced by the resistor may exceed the noise reduced by the compensation resistor, wherein the noise reduced by the compensation resistor refers to the other components introduced in the low-dropout linear regulator and is The noise eliminated by the compensation resistor.
  • R B R B-MAX refers compensating resistor 2051 compensate for the decreased resistance of compensation resistor 2051 equal to the noise introduced The noise value of the supplemental voltage 2051.
  • R B-MAX can be calculated based on the noise introduced by the error amplifier 202, the noise introduced by the reference voltage source 201, the noise introduced by the transistor 203, and the gain of the error amplifier 202.
  • the value range of R B can be R 1 ⁇ R B ⁇ R B-MAX , and R B takes values within this range, which can effectively reduce the noise of the LDO.
  • the error amplifier 202 can be comprised of a bias current source 2021, an input pair transistor 2022, and an output current mirror 2023, wherein the input pair tube 2022 is coupled to the bias current.
  • the source 2021 is between the output current mirror 2023.
  • the equivalent input noise of the error amplifier 202 can be expressed as:
  • g m,in is the transconductance of the input pair tube 2022
  • g m,out is the transconductance of the output current mirror 2023
  • (WL) in is the product of the width and length of the input pair tube 2022
  • (WL) out is The product of the width and length of the output current mirror 2023
  • K in is the carrier mobility of the input pair tube 2022
  • K out is the carrier mobility of the output current mirror 2023
  • C ox is the unit of the gate oxide of the MOS device.
  • Capacitance k is the Boltzmann constant
  • T is the Kelvin temperature
  • ⁇ is the channel coefficient of the device.
  • a noise filter circuit may be disposed between the reference voltage source 201 and the error amplifier 202, and the noise filter circuit may be coupled to the reference voltage source 201 and the error amplifier 202. And configured to perform noise filtering on the reference voltage provided by the reference voltage source 201, and send the noise-filtered reference voltage to the error amplifier 202.
  • the output voltage of the low dropout linear regulator can be directly used as the feedback voltage of the error amplifier 202.
  • the feedback circuit 207 may also generate a feedback voltage according to the voltage on the load.
  • the feedback circuit 207 can be composed of a first voltage dividing resistor 2071 and a second voltage dividing resistor 2072.
  • One end of the first voltage dividing resistor 2071 is connected to the positive input of the error amplifier 202, and the other end is connected.
  • the power supply ground is connected, and one end of the second voltage dividing resistor 2072 is connected to the forward input of the error amplifier 202, and the other end is connected to the drain of the transistor 203 and the load. Therefore, the resistance of the first partial resistor and the resistance of the second voltage dividing resistor 2072 can be adjusted.
  • the magnitude of the feedback voltage is varied to vary the magnitude of the voltage across the LDO load.
  • the gain bandwidth product value and the main pole point can be significantly reduced, and the size of the secondary main pole is increased, so the introduction of the second compensation circuit greatly increases the system.
  • the stability makes the transconductance of the error amplifier of the present invention larger than the transconductance of the existing error amplifier, so that the error amplifier of the present invention has better noise performance.
  • an embodiment of the present invention further provides a method for increasing the stability of a low dropout linear regulator by an LDO.
  • the LDO noise adjustment method includes:
  • Step 601 Receive a reference voltage and a feedback voltage.
  • the LDO noise adjustment device first receives the reference voltage and the feedback voltage.
  • the reference voltage is provided by a reference voltage source that is related to a voltage on the LDO load.
  • Step 602 Compare the feedback voltage and the reference voltage, and generate a control voltage according to a comparison result of the feedback voltage and the reference voltage.
  • the LDO noise adjusting device may compare the feedback voltage and the reference voltage, and generate a control voltage according to the comparison result of the feedback voltage and the reference voltage.
  • the reference voltage may be a voltage directly output by the reference voltage source, or may be a voltage directly output by the reference voltage source and filtered by the noise filter circuit;
  • the feedback voltage may be a voltage on a load of the LDO, A voltage generated by the feedback circuit based on the voltage on the LDO load.
  • Step 603 generating a regulation current under the control of the control voltage.
  • the LDO noise adjusting device may generate a regulated current according to the control voltage.
  • the LDO noise adjusting device may generate the adjusting current according to the adjusting circuit, and the adjusting circuit may be a power MOS component such as a transistor.
  • the specific generation method of adjusting the current can be referred to the foregoing, and will not be described herein.
  • Step 604 adjusting a main pole and a second main pole of the low dropout linear regulator according to the adjustment current.
  • the LDO noise adjustment device may adopt a circuit structure or a signal processing process having an effect of zero-pole splitting, such as a compensation circuit composed of a zero-reduction resistor and a Miller compensation capacitor, and adjust the low-dropout linearity.
  • the main pole and the second main pole of the voltage regulator are such that the adjusted main pole point is smaller than the main pole point before the adjustment, and the adjusted sub-master pole point is larger than the main pole point before the adjustment.
  • Step 605 further adjusting a main pole and a sub-master of the low-dropout linear regulator according to the adjustment current, according to adjusting a main pole and a sub-pole pole of the low-dropout linear regulator according to the adjustment current. a pole, and adjusting a gain bandwidth product of the low dropout linear regulator according to the regulated current.
  • the LDO noise adjusting device adopting a circuit structure or a signal processing process having an effect of zero-pole splitting, on the basis of adjusting the main pole and the second main pole of the low-dropout linear regulator, another compensation circuit may be used, according to
  • the regulation current further adjusts a primary pole and a secondary principal pole of the low dropout linear regulator, and adjusts a gain bandwidth product of the low dropout linear regulator according to the regulated current.
  • further adjusting the main pole and the second main pole of the low-dropout linear regulator can be implemented by using a resistor compensation method.
  • the gain bandwidth product value and the main pole point can be significantly reduced, and the number of times is increased.
  • the size of the main pole, so the introduction of the second compensation circuit greatly increases the stability of the system, so that the transconductance of the error amplifier of the present invention can be more transconductance than the existing error amplifier, thereby making the error amplifier of the present invention better. Noise performance.
  • the present invention provides a phase locked loop in addition to the LDO described in the foregoing embodiments, and the LDO in the phase locked loop may be the LDO described in the foregoing embodiment.
  • the techniques in the embodiments of the present invention can be implemented by means of software plus a necessary general hardware platform. Based on such understanding, the technical solution in the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product, which may be stored in a storage medium such as a ROM/RAM. , a disk, an optical disk, etc., including instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to perform the methods described in various embodiments of the present invention or portions of the embodiments.
  • a computer device which may be a personal computer, server, or network device, etc.

Abstract

一种低压差线性稳压器与增加其稳定性的方法及锁相环。低压差线性稳压器包括：参考电压源（201）、误差放大器（202）、调节电路（203）、负载（206）、第一补偿电路（204）及第二补偿电路（205）。第一补偿电路（204），与调节电路（203）耦合，用于调节低压差线性稳压器的主极点及次主极点以调节相位裕度；第二补偿电路（205），用于在第一补偿电路（204）已调节低压差线性稳压器的主极点及次主极点的基础上，减小低压差线性稳压器的主极点，并进一步增大次主极点，以调节相位裕度和低压差线性稳压器的增益带宽积。低压差线性稳压器能够显著的降低增益带宽积值和主极点的大小，同时增加次主极点的大小，从而使得误差放大器（202）具有更好的噪声性能。

Description

低压差线性稳压器与增加其稳定性的方法及锁相环
本申请要求于2015年6月30日提交中国专利局、申请号为201510374098.1、发明名称为“低压差线性稳压器与增加其稳定性的方法及锁相环”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及半导体领域，尤其涉及低压差线性稳压器与增加其稳定性的方法及锁相环。
背景技术
锁相环(Phase Locked Loop，简称PLL)是指由鉴相器(Phase Detector)、环路滤波器(Loop Fi lter)和压控振荡器(Voltage Control Osci l lator，简称VCO)等组成的自动控制闭环系统。由于PLL能够完成两个电信号相位同步，因此被广泛应用于广播通信、频率合成、自动控制及时钟同步等领域。由于电源噪声和波动会影响PLL的稳定性，因此在实际使用中，通常需要使用低压差线性稳压器(Low Dropout Regulator，简称LDO)克服电源噪声和波动对PLL的影响，保证PLL等噪声敏感电路的特性。如图1所示，现有LDO可以由参考电压源101、误差放大器102、补偿电路103、晶体管104、分压电路105构成及负载106构成。其中，所述补偿电路由调零电阻1031和米勒补偿电容1032构成，所述分压电路由第一分压电阻1051及第二分压电阻1052构成。由于补偿电路的存在，现有LDO的噪声分布如图1所示其中，
Figure PCTCN2016087707-appb-000001
表征误差放大器102的等效输入噪声，
Figure PCTCN2016087707-appb-000002
表征参考电压源101输出噪声，
Figure PCTCN2016087707-appb-000003
表征电阻1051的热噪声，
Figure PCTCN2016087707-appb-000004
表征电阻1052的热噪声。从现有LDO的噪声分布可知，在现有LDO中可以通过显著的增加误差放大器的跨导的方式提升LDO的噪声性能。但是由于调零电阻在版图实现中存在最小值，该最小值通常为10欧姆量级；米勒补偿电容的电容值在版图实现中也会存在最大值，因此误差放大器的增益带宽积存在最大值下限。由于误差放大器的增益带宽积存在最大值下限，这就决定了误差放大器的跨导上限较低，误差放大器的跨导一旦超过该上限就会导致LDO系统稳定性下降。
由此可以看出，现有LDO由于误差放大器的跨导上限较低，从而会导致噪声性能较差。
发明内容
本发明实施例提供了低压差线性稳压器与增加其稳定性的方法及锁相环，以克服现有低压差线性稳压器噪声性能差的问题。
第一方面，本发明实施例提供了一种低压差线性稳压器，包括：参考电压源，用于提供参考电压；误差放大器，与所述参考电压源耦合，用于接收反馈电压及所述参考电压，比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果输出控制电压；调节电路，与所述误差放大器耦合，用于接收所述控制电压，并在所述控制电压的控制下，输出调节电流；负载，与所述调节电路及所述误差放大器耦合，所述调节电流流经所述负载形成负载上的电压，所述反馈电压与所述负载上的电压相关，第一补偿电路，与所述调节电路耦合，用于调节所述低压差线性稳压器的主极点及次主极点以调节相位裕度；及第二补偿电路，与所述第一补偿电路耦合，用于在所述第一补偿电路已调节所述低压差线性稳压器的主极点及次主极点的基础上，调节减小所述低压差线性稳压器的主极点，并进一步增大次主极点，以调节相位裕度，并调节所述低压差线性稳压器的增益带宽积。
结合第一方面，在第一方面第一种可能的实现方式中，所述调节电路包括晶体管。
结合第一方面第一种可能的实现方式，在第一方面第二种可能的实现方式中，所述第一补偿电路包括调零电阻及米勒补偿电容，所述米勒补偿电容的一端与所述晶体管的漏极连接，另一端与所述调零电阻的一端连接；所述调零电阻的另一端与所述第二补偿电路连接。
结合第一方面第二种可能的实现方式，在第一方面第三种可能的实现方式中，所述第二补偿电路包括补偿电阻，所述补偿电阻的一端与所述误差放大器的输出端连接，另一端与所述调零电阻的一端及晶体管的栅极连接。
结合第一方面第三种可能的实现方式，在第一方面第四种可能的实现方 式中，所述补偿电阻的阻值不小于所述误差放大器等效负载电阻的电阻值，并且小于等于RB-MAX，其中，RB-MAX是所述补偿电阻所降低的噪声等于补偿电阻所引入的噪声时，所述补偿电阻的电阻值，所述补偿电阻所降低的噪声是指由所述低压差线性稳压器中其他组成部分所引入并被所述补偿电阻所消除的噪声。
结合第一方面或第一方面第一至四种可能的实现方式，在第一方面第五种可能的实现方式中，所述低压差线性稳压器还包括反馈电路，所述反馈电路，与所述误差放大器及所述负载连接，用于接收所述负载上的电压，并根据所述负载上的电压生成所述反馈电压。
结合第一方面或第一方面第一至五种可能的实现方式，在第一方面第六种可能的实现方式中，所述低压差线性稳压器还包括噪声滤波电路，噪声滤波电路与所述参考电压源及所述误差放大器耦合，用于对所述参考电压源所提供的参考电压进行噪声滤波，并将经噪声滤波后的参考电压发送给所述误差放大器。
第二方面，本发明实施例还提供了一种锁相环，所述锁相环包括第一方面或第一方面任意一种可能的实现方式中的低压差线性稳压器。
第三方面，本发明实施实施例还提供了一种低压差线性稳压器的增加低压差线性稳压器稳定性的方法，其特征在于，包括：接收参考电压及反馈电压；比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果生成控制电压；在所述控制电压的控制下，生成调节电流；根据所述调节电流调节所述低压差线性稳压器的主极点及次主极点；在根据所述调节电流调节所述低压差线性稳压器的主极点及次主极点的基础上，根据所述调节电流进一步调节所述低压差线性稳压器的主极点及次主极点，并根据所述调节电流调节所述低压差线性稳压器的增益带宽积。
结合第三方面，在第三方面第一种可能的实现方式中，在接收参考电压及反馈电压之后还包括：对所述参考电压进行噪声滤波；所述比较所述反馈电压及所述参考电压包括：比较所述反馈电压及经过噪声滤波后的所述参考电压。
本发明实施例中的低压差线性稳压器包括参考电压源，用于提供参考电 压；误差放大器，与所述参考电压源耦合，用于接收反馈电压及所述参考电压，比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果输出控制电压；调节电路，与所述误差放大器耦合，用于接收所述控制电压，并在所述控制电压的控制下，输出调节电流；负载，与所述调节电路及所述误差放大器耦合，所述调节电流流经所述负载形成负载上的电压，所述反馈电压与所述负载上的电压相关，第一补偿电路，与所述调节电路耦合，用于调节所述低压差线性稳压器的主极点及次主极点以调节相位裕度；及第二补偿电路，与所述第一补偿电路耦合，用于在所述第一补偿电路已调节所述低压差线性稳压器的主极点及次主极点的基础上，调节减小所述低压差线性稳压器的主极点，并进一步增大次主极点，以调节相位裕度，并调节所述低压差线性稳压器的增益带宽积。通过增加第二补偿电路，本发明实施例所提供的低压差线性稳压器可以显著的降低增益带宽积值及主极点的大小，并且增加次主极点的大小，因此第二补偿电路的引入可以极大的增加低压差线性稳压器的系统稳定性，使得本发明误差放大器的跨导可以比现有误差放大器的跨导更大，从而使得本发明误差放大器有更好的噪声性能。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中LDO的结构示意图；
图2为本发明LDO一个实施例的结构示意图；
图3为本发明LDO另一个实施例的结构示意图；
图4为本发明LDO中误差放大器一个实施例的结构示意图；
图5为本发明LDO另一个实施例的结构示意图；
图6为本发明LDO增加低压差线性稳压器稳定性的方法一个实施例的流程示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整的描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
参见图2，为本发明LDO一个实施例的结构示意图。
如图2所示，本发明LDO可以包括：参考电压源201，误差放大器202，调节电路203，第一补偿电路204，第二补偿电路205以及负载206。
其中，参考电压源201，用于提供参考电压；误差放大器202，与所述参考电压源201耦合，用于接收反馈电压及所述参考电压，比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果输出控制电压；调节电路203，与所述误差放大器202耦合，用于接收所述控制电压，并在所述控制电压的控制下，输出调节电流；负载206，与所述调节电路203及所述误差放大器202耦合，所述调节电流流经所述负载206，形成负载上的电压，第一补偿电路204，与所述调节电路203耦合，用于调节所述低压差线性稳压器的主极点及次主极点以调节相位裕度；及第二补偿电路205，与所述第一补偿电路204耦合，用于在所述第一补偿电路204已调节所述低压差线性稳压器的主极点及次主极点的基础上，进一步调节所述低压差线性稳压器的主极点及次主极点以调节相位裕度，并调节所述低压差线性稳压器的增益带宽积。所述反馈电压与所述负载上的电压相关，通常情况下是指所述反馈电压与所述负载上的电压成线性关系。例如，所述反馈电压为所述负载上的电压，或者所述反馈电压与所述负载上的电压成预定比例关系等。
在此需要说明的是，这里所说的减小主极点是指经过所述第一补偿电路204调节后，所述低压差线性稳压器的主极点小于未经所述第一补偿电路204调节时的主极点；增大次主极点是指是指经过所述第一补偿电路204调节后，次主极点大于未经所述第一补偿电路204调节时的次主极点；而减小增益带宽积是指指经过所述第一补偿电路204调节后，增益带宽积小于未经所述第一补偿电路204调节时的增益带宽积。
在具体实现中，所述LDO的电路结构可以如图3所示。
其中，误差放大器202的负向输入与所述参考电压源201连接，用于接收来自参考电压源的参考电压。所述误差放大器202的正向输入则与负载耦合，用于接收反馈电压。
所述第一补偿电路204，可以是米勒电容-调零电阻补偿电路，即，所述第一补偿电路204可以包括调零电阻2041及米勒补偿电容2042，所述米勒补偿电容2042与所述晶体管203的漏极连接，另与所述调零电阻2041的一端连接；所述调零电阻2041的另一端与所述第二补偿电路205连接。所述调节电路203可以为晶体管等功率MOS器件。所述第二补偿电路205，可以包括补偿电阻2051，所述补偿补偿电阻2051的一端与所述误差放大器202的输出端连接，另一端与所述调零电阻2041的一端及调节电路203的栅极连接。其中，所述补偿电阻2051可以为硅扩散电阻、MOS器件电阻或金属走线电阻。
根据本发明LDO的负载分布，通过列解节点电流电压方程，可以解得，该LDO的三个极点为：
Figure PCTCN2016087707-appb-000005
Figure PCTCN2016087707-appb-000006
Figure PCTCN2016087707-appb-000007
该LDO的零点为：
Figure PCTCN2016087707-appb-000008
该LDO的GBW可以表示为：
Figure PCTCN2016087707-appb-000009
其中，CC为米勒补偿电容2042的电容值，Rnl为调零电阻2041的电阻值， gm2为调节电路203的跨导，gm1为误差放大器202的跨导，RLOAD为负载的负载电阻值，CLOAD为负载206的负载电容值，R1为误差放大器202等效负载电阻的电阻值，C1为误差放大器202等效负载电容的电容值，RB为补偿电阻2051的阻值。
由此可以看出，由于极点p2被零点所抵消，因此本发明LDO的主极点为p1，而次主极点为p3，在本发明实施例所提供的LDO中通过增加第二补偿电路，可以显著的降低增益带宽积GBW及主极点p1，并且增加次主极点p3，因此第二补偿电路的引入极大的增加了系统稳定性，使得本发明误差放大器的跨导可以比现有误差放大器的跨导更大，从而使得本发明误差放大器有更好的噪声性能。而且，第二补偿电路的引入不但可以通过减小CC的值，减小LDO的面积；还可以通过降低LDO的GBW，增加LDO的相位裕度，从而可以提高LDO的驱动负载的能力。
进一步，由于电阻本身也会引入噪声，当第二补偿电路为补偿电阻时，补偿电阻所引入噪声的公式可以表示为：
Figure PCTCN2016087707-appb-000010
其中，Vn,out是指LDO的输出噪声，Vn,ea是指误差放大器202引入的噪声，sRC是指噪声滤波器的时间常数，Vn,ref是指参考电压源201引入的噪声，Vn,PFET是指晶体管203引入的噪声，AV是指误差放大器202的增益，k是指波尔兹曼常数，T是指温度。
虽然补偿电阻的阻值越大，越能够降低LDO其他组成部分引入的噪声，但是从前述公式可以看出补偿电阻的阻值越大，补偿电阻所引入的噪声也越大，而且当补偿电阻的阻值超过一定值时，电阻所引入的噪声可能会超过补偿电阻所降低的噪声，其中所述补偿电阻所降低的噪声是指所述低压差线性稳压器中其他组成部分所引入并被所述补偿电阻所消除的噪声。
为防止补偿电阻所引入噪声过大，因此在实际使用中RB的取值需要小于RB-MAX，其中RB-MAX是指补偿电阻2051所补偿电阻所降低的噪声等于补偿电阻2051所引入的噪声时，所述补充电压2051的电阻值。其中，RB-MAX可以根据误差放大器202引入的噪声，参考电压源201引入的噪声，晶体 管203引入的噪声及误差放大器202的增益计算得出。
根据极点的计算公式可以看出，当RB≥R1时GBW和p1开始有显著的变化，因此在通常情况下，可以设置RB≥R1。因此，RB的取值范围可以为R1≤RB≤RB-MAX，RB在此范围内取值，可以有效降低LDO的噪声。
为进一步提升LDO的噪声性能，如图4所示，误差放大器202可以由偏置电流源2021，输入对管2022，输出电流镜2023组成，其中所述输入对管2022耦合在所述偏置电流源2021与输出电流镜2023之间。
该误差放大器202的等效输入噪声可以表示为：
Figure PCTCN2016087707-appb-000011
其中，gm,in为输入对管2022的跨导，gm,out为输出电流镜2023的跨导，(WL)in为输入对管2022的尺寸宽和长的乘积，(WL)out为输出电流镜2023的尺寸宽和长的乘积，Kin为输入对管2022的载流子迁移率，Kout为输出电流镜2023的载流子迁移率，Cox为MOS器件的栅氧的单位电容，k为波尔兹曼常数，T为开尔文温度，γ为器件的沟道系数。
为进一步提升LDO的噪声性能，还可以在所述参考电压源201与所述误差放大器202之间设置噪声滤波电路，该噪声滤波电路可以与所述参考电压源201及所述误差放大器202耦合，用于对所述参考电压源201所提供的参考电压进行噪声滤波，并将经噪声滤波后的参考电压发送给所述误差放大器202。
另外，在本发明实施例中，可以直接将所述低压差线性稳压器的输出电压作为误差放大器202的反馈电压。为使LDO的输出电压可以调节，本发明另一个实施例中，也可以由反馈电路207根据负载上的电压生成反馈电压。
如图5所示，所述的反馈电路207可以由第一分压电阻2071及第二分压电阻2072构成，第一分压电阻2071的一端与误差放大器202的正向输入连接，另一端与电源地连接，而第二分压电阻2072的一端与误差放大器202的正向输入连接，另一端与所述晶体管203的漏极及负载连接。从而可以通过调节第一分电阻的阻值及第二分压电阻2072的阻值，可以 改变反馈电压的大小，从而改变所述LDO负载上的电压的大小。
由上述实施例可以看出，通过增加第二补偿电路，可以显著的降低增益带宽积值及主极点的大小，并且增加次主极点的大小，因此第二补偿电路的引入极大的增加了系统稳定性，使得本发明误差放大器的跨导可以比现有误差放大器的跨导更大，从而使得本发明误差放大器有更好的噪声性能。
与本发明LDO实施例相对应，本发明实施例还提供了一种LDO增加低压差线性稳压器稳定性的方法。
如图6所示，所述LDO噪音调节方法包括：
步骤601，接收参考电压及反馈电压。
LDO噪音调节装置首先接收参考电压及反馈电压。其中所述参考电压由参考电压源提供，所述反馈电压与所述LDO负载上的电压相关。
步骤602，比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果生成控制电压。
LDO噪音调节装置在接收到参考电压及反馈电压后，可以比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果生成控制电压。其中，所述参考电压可以是由参考电压源直接输出的电压，也可以是由参考电压源直接输出并经过噪声滤波电路滤波后的电压；所述反馈电压可以是LDO的负载上的电压，也可以由反馈电路根据所述LDO负载上的电压生成的电压。参考电压具体生成方式可以参见前述，在此就不再赘述。
步骤603，在所述控制电压的控制下，生成调节电流。
在所述控制电压生成生后，LDO噪音调节装置可以根据所述控制电压生成调节电流。其中，LDO噪音调节装置可以根据利用调节电路生成所述调节电流，所述调节电路可以是晶体管等功率MOS组件。调节电流的具体生成方式可以参见前述，在此就不再赘述。
步骤604，根据所述调节电流调节所述低压差线性稳压器的主极点及次主极点。
在所述调节电路生成后，LDO噪音调节装置可以采用具有零极点劈裂的效果的电路结构或信号处理过程，例如由调零电阻及米勒补偿电容构成的补偿电路，调节所述低压差线性稳压器的主极点及次主极点，以使经调节后的主极点小于调节前的主极点，并使得经调节后的次主极点大于调节前的主极点。具体实现方式可以参见前述实施例，在此就不再赘述。步骤605，在根据所述调节电流调节所述低压差线性稳压器的主极点及次主极点的基础上，根据所述调节电流进一步调节所述低压差线性稳压器的主极点及次主极点，并根据所述调节电流调节所述低压差线性稳压器的增益带宽积。
在LDO噪音调节装置采用具有零极点劈裂的效果的电路结构或信号处理过程，调节所述低压差线性稳压器的主极点及次主极点的基础上，还可以使用另外一个补偿电路，根据所述调节电流进一步调节所述低压差线性稳压器的主极点及次主极点，并根据所述调节电流调节所述低压差线性稳压器的增益带宽积。其中，进一步调节所述低压差线性稳压器的主极点及次主极点，可以采用电阻补偿的方式实现。具体实现方式可以参见前述实施例，在此就不再赘述。
由此可以看出，通过采用两级调节方式对所述低压差线性稳压器的主极点及次主极点进行调节，可以显著的降低了增益带宽积值及主极点的大小，并且增加了次主极点的大小，因此第二补偿电路的引入极大的增加了系统稳定性，使得本发明误差放大器的跨导可以比现有误差放大器的跨导更多，从而使得本发明误差放大器有更好的噪声性能。
本发明实施除提供了前述实施例中所述的LDO之外，还提供了一种锁相环，该锁相环中的LDO可以是前述实施例中所述LDO。
本领域的技术人员可以清楚地了解到本发明实施例中的技术可借助软件加必需的通用硬件平台的方式来实现。基于这样的理解，本发明实施例中的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品可以存储在存储介质中，如ROM/RAM、磁碟、光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例或者实施例的某些部分所述的方法。
本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于系统实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
以上所述的本发明实施方式，并不构成对本发明保护范围的限定。任何在本发明的精神和原则之内所作的修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种低压差线性稳压器，其特征在于，包括：
    参考电压源，用于提供参考电压；
    误差放大器，与所述参考电压源耦合，用于接收反馈电压及所述参考电压，比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果输出控制电压；
    调节电路，与所述误差放大器耦合，用于接收所述控制电压，并在所述控制电压的控制下，输出调节电流；
    负载，与所述调节电路及所述误差放大器耦合，所述调节电流流经所述负载形成负载上的电压，所述反馈电压与所述负载上的电压相关；
    第一补偿电路，与所述调节电路耦合，用于调节所述低压差线性稳压器的主极点及次主极点以调节相位裕度；及
    第二补偿电路，与所述第一补偿电路耦合，用于在所述第一补偿电路已调节所述低压差线性稳压器的主极点及次主极点的基础上，调节减小所述低压差线性稳压器的主极点，并进一步增大次主极点，以调节相位裕度，并调节所述低压差线性稳压器的增益带宽积。
  2. 如权利要求1所述的低压差线性稳压器，其特征在于，所述调节电路包括晶体管。
  3. 如权利要求2所述的低压差线性稳压器，其特征在于，
    所述第一补偿电路包括调零电阻及米勒补偿电容，所述米勒补偿电容的一端与所述晶体管的漏极连接，另一端与所述调零电阻的一端连接；所述调零电阻的另一端与所述第二补偿电路连接。
  4. 如权利要求3所述的低压差线性稳压器，其特征在于，
    所述第二补偿电路包括补偿电阻，所述补偿电阻的一端与所述误差放大器的输出端连接，另一端与所述调零电阻的一端及晶体管的栅极连接。
  5. 如权利要求4所述的低压差线性稳压器，其特征在于，所述补偿电阻的阻值不小于所述误差放大器等效负载电阻的电阻值，并且小于等于RB-MAX，其中，RB-MAX是所述补偿电阻所降低的噪声等于补偿电阻所引入 的噪声时所述补偿电阻的电阻值，所述补偿电阻所降低的噪声是指由所述低压差线性稳压器中其他组成部分所引入并被所述补偿电阻所消除的噪声。
  6. 如权利要求1至5任一项所述的低压差线性稳压器，其特征在于，还包括反馈电路，
    所述反馈电路，与所述误差放大器及所述负载连接，用于接收所述负载上的电压，并根据所述负载上的电压生成所述反馈电压。
  7. 如权利要求1至6任一项所述的低压差线性稳压器，其特征在于，还包括：
    噪声滤波电路，与所述参考电压源及所述误差放大器耦合，用于对所述参考电压源所提供的参考电压进行噪声滤波，并将经噪声滤波后的参考电压发送给所述误差放大器。
  8. 一种锁相环，其特征在于，包括如权利要求1至7任一项所述的低压差线性稳压器。
  9. 一种增加低压差线性稳压器稳定性的方法，其特征在于，包括：
    接收参考电压及反馈电压；
    比较所述反馈电压及所述参考电压，并根据所述反馈电压及所述参考电压的比较结果生成控制电压；
    在所述控制电压的控制下，生成调节电流；
    根据所述调节电流调节低压差线性稳压器的主极点及次主极点；
    在根据所述调节电流调节所述低压差线性稳压器的主极点及次主极点的基础上，根据所述调节电流进一步调节所述低压差线性稳压器的主极点及次主极点，并根据所述调节电流调节所述低压差线性稳压器的增益带宽积。
  10. 如权利要求9所述的装置，其特征在于，在接收参考电压及反馈电压之后还包括：
    对所述参考电压进行噪声滤波；
    所述比较所述反馈电压及所述参考电压包括：比较所述反馈电压及经过噪声滤波后的所述参考电压。
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