WO2016206274A1 - 内嵌式触摸显示屏、其驱动方法及显示装置 - Google Patents

内嵌式触摸显示屏、其驱动方法及显示装置 Download PDF

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Publication number
WO2016206274A1
WO2016206274A1 PCT/CN2015/093898 CN2015093898W WO2016206274A1 WO 2016206274 A1 WO2016206274 A1 WO 2016206274A1 CN 2015093898 W CN2015093898 W CN 2015093898W WO 2016206274 A1 WO2016206274 A1 WO 2016206274A1
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Prior art keywords
sub
signal
module
control
node
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PCT/CN2015/093898
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English (en)
French (fr)
Inventor
杨盛际
董学
薛海林
王海生
陈小川
陈希
谢建云
刘红娟
刘英明
赵卫杰
刘建涛
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/110,359 priority Critical patent/US10698521B2/en
Priority to EP15894514.7A priority patent/EP3316085A4/en
Publication of WO2016206274A1 publication Critical patent/WO2016206274A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G06F3/041661—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving using detection at multiple resolutions, e.g. coarse and fine scanning; using detection within a limited area, e.g. object tracking window
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04111—Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate

Definitions

  • the present invention relates to the field of touch display technologies, and in particular, to an in-cell touch display screen, a driving method thereof, and a display device.
  • the Touch Screen Panel With the rapid development of display technology, the Touch Screen Panel has gradually spread throughout people's lives.
  • the touch screen can be divided into an add-on touch panel, an on-cell touch panel, and an in-cell touch panel according to the composition structure.
  • the external touch screen is produced separately from the display screen, and then attached together to become a touch screen display function.
  • the external touch screen has the disadvantages of high production cost, low light transmittance, and thick module.
  • the in-cell touch screen embeds the touch electrodes of the touch screen inside the display screen, which can reduce the overall thickness of the module, and can greatly reduce the manufacturing cost of the touch screen, and is favored by major panel manufacturers.
  • OLED Organic Light Emitting Diode
  • LCD liquid crystal display
  • an embodiment of the present invention provides an in-cell touch display screen, a driving method thereof, and a display device for implementing an in-cell touch display screen based on an organic electroluminescence display screen.
  • An in-cell touch display screen includes an array substrate, a plurality of sub-pixels on the array substrate, each of the sub-pixels including an organic light-emitting device, wherein the organic light-emitting device includes An anode layer, a light emitting layer and a cathode layer on the array substrate; wherein at least two sub-pixels are one sub-pixel group, and cathode layers belonging to different sub-pixel groups are independent of each other.
  • each of the sub-pixels further includes a sub-pixel circuit electrically connected to the organic light-emitting device, the sub-pixel circuit comprising: a data writing module, a compensation module, a reset control module, an illumination control module, The drive control module, the data signal end, the write control signal end, the reset control signal end, the illumination control signal end, the compensation control signal end, the first reference signal end and the second reference signal end.
  • the reset control module is configured to provide a signal of the second reference signal end to the third node and an anode layer of the organic light emitting device under the control of the reset control signal end;
  • the data writing module is configured to provide the signal of the data signal end to the first node under the control of the write control signal end;
  • the light emission control module is configured to be under the control of the light emission control signal end a signal of the first reference signal end is provided to the second node;
  • the compensation module is configured to save a data voltage and a threshold voltage of the driving control module, and the third is controlled under the control of the compensation control signal end a signal of the node is provided to the first node such that a threshold voltage of the drive control module and a current flowing through the organic light emitting device are compensated;
  • the drive control module is used in common with the illumination control module and the compensation module The organic light emitting device is driven to emit light under control.
  • the data writing module comprises: a first switching transistor whose gate is a control end of the data writing module, a source is extremely input to the data writing module, and a drain is written for the data
  • the driving control module includes: a driving transistor, a gate thereof is a control end of the driving control module, a source is an input end of the driving control module, and a drain is an output end of the driving control module.
  • the reset control module includes: a second switching transistor and a third switching transistor; wherein a gate of the second switching transistor is connected to a gate of the third switching transistor, a control terminal of the control module, the source is an input end of the reset control module, and a drain is a first output end of the reset control module; a source of the third switching transistor is an input end of the reset control module, and a drain is The second output of the reset control module.
  • the illuminating control module includes: a fifth switching transistor, a gate thereof is a control end of the illuminating control module, a source is an input end of the illuminating control module, and a drain is an output end of the illuminating control module.
  • the compensation module includes: a fourth switching transistor and a capacitor; wherein the fourth switching transistor has a gate of a control end of the compensation module, and a source is connected to one end of the capacitor and is The second input end of the compensation module has a drain that is an output end of the compensation module; and the other end of the capacitor is a first input end of the compensation module.
  • all of the switching transistors are N-type transistors or both are P-type transistors.
  • the sub-pixel circuit is located between the anode layer and the array substrate; the array substrate further includes a data signal end in each sub-pixel circuit. Connected to the data lines of the driving chip respectively; the wires are in the same layer and insulated from the data lines.
  • all the transistors in the sub-pixel circuit include an active layer, a gate insulating layer, a gate, an insulating layer, and a source sequentially on the array substrate. a drain and a drain; the data line is disposed in the same layer as the source and the drain; and the wire is connected to the corresponding cathode layer through the via.
  • the method further includes: a planarization layer between the layer where the source and the drain are located and the anode, located at the cathode layer and a sub-pixel defining layer between the planarizing layers and surrounding each of the light emitting layers; and a cathode connecting portion disposed in the same layer as the anode layer; wherein the cathode connecting portion passes through the planarizing layer
  • the holes are connected to corresponding wires, and the cathode layer is connected to the corresponding cathode connection portion through a via hole penetrating the sub-pixel defining layer.
  • each of the sub-pixels has a hexagonal shape, and all the sub-pixels are regularly arranged on the array substrate; wherein, each sub-pixel in the row direction
  • the side pixels are arranged side by side, and the sub-pixels of the corresponding positions in the adjacent two rows of sub-pixels are arranged in a misalignment in the column direction, and in each row of sub-pixels, a via hole for connecting the cathode layer and the wires is disposed between the adjacent two sub-pixels a via for connecting the anode layer and the drain is disposed at a gap between adjacent two rows of sub-pixels; or, each sub-pixel is arranged side by side in the column direction, and a corresponding position of the adjacent two columns of sub-pixels
  • the pixels are arranged in a misalignment in the row direction, and in each column of sub-pixels, a via hole for connecting the cathode layer and the wire is disposed
  • the embodiment of the invention further provides a display device, which comprises any of the above-mentioned in-cell touch display screens provided by the embodiments of the invention.
  • the embodiment of the present invention further provides a driving method for any of the above-mentioned in-cell touch display screens, for each sub-pixel, within one frame time:
  • the reset control module supplies a signal of the second reference signal end to the third node and an anode layer of the organic light emitting device under control of a reset control signal; Providing, according to the write control module, the signal of the data signal end to the first node according to the write control signal; the light emission control module controls charging of the compensation module under the control of the light emission control signal;
  • the data writing module provides a signal of the data signal end to the first node under control of a write control signal;
  • the reset control module returns the second under control of a reset control signal a signal of a reference signal end is provided to the third node and an anode layer of the organic light emitting device;
  • the light emission control module causes the second node to be in a floating state, at the first node and the second node Controlling the compensation module to discharge the data signal and driving the threshold voltage of the driving transistor in the control module;
  • the illumination control module provides a signal of the first reference signal end to the second node under control of an illumination control signal, and the reset control module causes the third node to be in a floating state.
  • the data writing module disconnects the first node from the data signal end, and the compensation module provides a signal of the third node to the first node under control of a compensation control signal;
  • the driving control The module drives the organic light emitting device to emit light under the common control of the light emission control module and the compensation module;
  • the driving chip outputs a first reference signal superimposed touch scan signal to the first reference signal end, and outputs a third reference signal superimposed touch scan signal to the cathode layer, the sub-pixel circuit
  • the operating state of each module is the same as that in the third phase, and the driving chip detects the change in the capacitance value of the cathode layer through the corresponding wire to determine the touch position.
  • the in-cell touch display screen, the driving method thereof and the display device provided by the embodiments of the present invention have at least two sub-pixels as one sub-pixel group, and the cathode layers of different sub-pixel groups are independent from each other, that is, equivalent to existing
  • the cathode layer disposed on the whole surface of the technology is divided, and one sub-pixel group corresponds to one divided cathode layer, and the cathode layer of each sub-pixel group is connected to the driving chip through a wire, thereby multiplexing the cathode layer into a self-capacitance touch electrode.
  • the driving chip detects the change of the capacitance value of the cathode layer through the wire to determine the touch position, thereby implementing the touch function.
  • the signals outputted by the driving chip to the signal terminals and the cathode layer of the sub-pixel circuit in the fourth stage are superimposed on the signals outputted to the signal terminals and the cathode layer in the third stage.
  • the same touch scan signal can realize that the working state of each module of the sub-pixel circuit is the same as that in the third stage (ie, the light-emitting display stage) to ensure normal display, thereby realizing an organic electroluminescent display based on In-line touch display.
  • FIG. 1 is a schematic structural diagram of an in-cell touch display screen according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a sub-pixel circuit according to an embodiment of the present invention.
  • 3 is a schematic diagram showing waveforms of signals outputted by the driving chip to each signal terminal and the cathode layer of the sub-pixel circuit in one frame time;
  • FIG. 4 is a schematic structural diagram of a sub-pixel circuit according to an embodiment of the present invention.
  • 5a to 5d are schematic diagrams showing the working states of the sub-pixel circuits in each stage according to the first embodiment of the present invention.
  • 6a to 6e are respectively schematic structural diagrams of a sub-pixel circuit according to an embodiment of the present invention.
  • 7a to 7e are waveform diagrams of input signals corresponding to the sub-pixel circuits shown in FIGS. 6a to 6e, respectively;
  • FIG. 8 is a partial schematic structural diagram of an in-cell touch display screen according to Embodiment 2 of the present invention.
  • 9a and 9b are schematic diagrams showing a sub-pixel arrangement of an in-cell touch display screen according to an embodiment of the present invention.
  • FIG. 10 is a schematic flowchart diagram of a driving method of an in-cell touch display screen according to an embodiment of the present invention.
  • each film layer in the drawings do not reflect the true scale, and are merely intended to illustrate the present invention.
  • An in-cell touch display screen includes an array substrate 1 , and several sub-pixels 2 on the array substrate 1 , each sub-pixel 2 including an organic light-emitting device 21 and the organic
  • the sub-pixel circuit 22 electrically connected to the light-emitting device 21 (the specific structure of the sub-pixel circuit is not shown in FIG. 1); wherein the organic light-emitting device 21 includes an anode layer 211, a light-emitting layer 212 and a cathode layer 213 which are sequentially arranged on the array substrate;
  • the at least two sub-pixels 2 are one sub-pixel group 11, and the cathode layers 213 belonging to different sub-pixel groups 11 are independent of each other.
  • the touch display screen further includes: a driving chip for outputting signals to each signal terminal of each sub-pixel circuit 22 and the cathode layer 213 of each sub-pixel group (the driving chip is not shown in FIG. 1, but within one frame time)
  • a driving chip for outputting signals to each signal terminal of each sub-pixel circuit 22 and the cathode layer 213 of each sub-pixel group (the driving chip is not shown in FIG. 1, but within one frame time)
  • a waveform diagram of a signal outputted by the driving chip to each signal terminal and the cathode layer of the sub-pixel circuit is as shown in FIG. 3;
  • each sub-pixel circuit includes: a data writing module 01, a compensation module 02, a reset control module 03, an illumination control module 04, a drive control module 05, a data signal terminal Data, a write control signal terminal Scan2, and a reset.
  • the control signal terminal Scan1 the illumination control signal terminal EM, the compensation control signal terminal Scan3, the first reference signal terminal VDD and the second reference signal terminal Vint.
  • the input end of the data writing module 01 is connected to the data signal end Data, the control end is connected to the write control signal end Scan2, the output end is connected to the first node A; the input end of the illumination control module 04 is connected to the first reference signal end VDD.
  • the control end is connected to the illumination control terminal EM, the output end is connected to the second node B; the input end of the reset control module 03 is connected to the second reference signal terminal Vint, and the control terminal is connected to the reset control signal end Scan1, and the first output end is connected with
  • the third node C is connected, the second output end is connected to the output end of the driving control module 05 and the anode layer 211 of the corresponding organic light emitting device 21;
  • the first input end of the compensation module 02 is connected to the second node B, and the second input end Connected to the third node C, the control end is connected to the compensation control signal end Scan3, the output end is connected to the first node A;
  • the input end of the drive control module 05 is connected to the second node B, and the control end is connected to the first node A;
  • the cathode layer 213 of the sub-pixel group 11 is connected to the driving chip through a corresponding wire 110.
  • the reset control module 03 is configured to provide the signal of the second reference signal terminal Vint to the anode node 211 of the third node C and the organic light emitting device 21 under the control of the reset control signal terminal Scan1; the data writing module 01 is used for writing The signal of the data signal end Data is supplied to the first node A under the control of the control signal terminal Scan1; the compensation module 02 is configured to charge or discharge according to the conduction condition of the reset control module 03 and the illumination control module 04, at the third node.
  • the voltage difference between the second node B and the third node C is maintained at a fixed value, that is, the data voltage and the threshold voltage of the drive control module are saved, and under the control of the compensation control signal end Scan3
  • the signal of the third node C is provided to the first node A;
  • the illumination control module 04 is configured to provide the signal of the first reference signal terminal VDD to the second node B under the control of the illumination control signal terminal EM;
  • the drive control module 05 Driving the organic light emitting device 21 to emit light under the common control of the illumination control module 04 and the compensation module 02;
  • the driving chip is used to sub-pixel circuit in the first stage T1 to the sub-pixel 2 in one frame time.
  • the illumination control signal terminal EM of 22 outputs an illumination control signal, outputs a reset control signal to the reset control signal terminal Scan1, outputs a write control signal to the write control signal terminal Scan2, and outputs a data signal to the data signal terminal Data; in the second stage T2 Outputting a reset control signal to the reset control signal terminal Scan1, outputting a write control signal to the write control signal terminal Scan2, and outputting a data signal to the data signal terminal Data; and outputting a light emission control signal to the light emission control signal terminal EM in the third stage T3,
  • the compensation control signal terminal Scan3 outputs a compensation control signal; in the first phase T1 to the third phase T3, the first reference signal is output to the first reference signal terminal VDD, and the second reference signal is output to the second reference signal terminal Vint
  • At least two sub-pixels are used as one sub-pixel group, and cathode layers of different sub-pixel groups are independent of each other, that is, equivalent to setting the entire surface of the prior art.
  • the cathode layer is divided, one sub-pixel group corresponds to one divided cathode layer, and the cathode layer of each sub-pixel group is connected to the driving chip through a wire, thereby multiplexing the cathode layer into a self-capacitance touch electrode, and driving the chip through the wire to the cathode
  • the layer applies a touch scan signal, and detects a change in the capacitance value of the cathode layer through the wire to determine the touch position, thereby implementing the touch function.
  • the signals output from the driver chip to the signal terminals and the cathode layer of the sub-pixel circuit in the fourth stage are the basis of the signals output to the signal terminals and the cathode layer in the third stage.
  • the same touch scan signal is superimposed on the same, so that the working state of each module of the fourth stage sub-pixel circuit is the same as that of the sub-pixel circuit in the third stage (ie, the light-emitting display stage), thereby ensuring normal display.
  • the working state of the module means that the transistor in the module is in an on state or an off state.
  • the working state of each module of the sub-pixel circuit is the same as that of the modules of the third-stage sub-pixel circuit. Taking the light-emitting control module as an example, if the transistor in the light-emitting control module is turned on in the third stage. State, then in the fourth phase is also in the on state.
  • the capacitance of the respective capacitor electrodes is a fixed value.
  • the capacitance of the corresponding self-capacitance electrode is a fixed value superimposed on the human body capacitance.
  • the touch detection chip can determine the touch position by detecting a change in the capacitance value of each capacitor electrode during the touch period.
  • the capacitances of the respective capacitor electrodes that is, the cathode layers of the sub-pixel groups
  • the voltage difference between the electrodes other than the layer) be consistent. Therefore, in the fourth stage, the signals output from the driving chip to the signal terminals and the cathode layer of the sub-pixel circuit are superimposed with the same touch scanning signals on the basis of the signals outputted to the signal terminals and the cathode layer in the third stage, thereby ensuring The accuracy of touch judgment.
  • the driving current is mainly determined by the voltage of the data signal terminal, and the driving transistor of the driving control module is driven by the cooperation of the modules of the sub-pixel circuit.
  • the threshold voltage is independent, and the influence of the threshold voltage of the driving transistor in the driving control module on the current flowing through the organic light emitting device can be avoided, so that the operating current for driving the light emitting device to be kept consistent, and the uniformity of the brightness of the image in the display area of the display device can be improved.
  • the data writing module 01 may specifically include: a first switching transistor T1 whose gate is a data writing module 01.
  • the control terminal, the source is the input end of the data writing module 01, and the drain is the output end of the data writing module 01.
  • the signal of the data signal terminal Data is supplied to the first node A through the first switching transistor T1.
  • the first switching transistor T1 may be a P-type transistor or an N-type transistor, which is not limited herein.
  • the above is only a specific structure of the data writing module in the in-cell touch display.
  • the specific structure of the data writing module is not limited to the above structure provided by the embodiment of the present invention, and may also be a person skilled in the art. Other structures that are known are not limited herein.
  • the drive control module 05 may specifically include a driving transistor DT0 whose gate is a control end of the driving control module 05.
  • the source is driven to the input of the control module 05 and the drain is the output of the drive control module 05.
  • the type of the driving transistor DT0 is generally a P-type transistor.
  • the threshold voltage of a P-type transistor is generally a negative value.
  • the voltage of the corresponding first reference signal is generally a positive voltage, and the voltage of the third reference signal received by the cathode layer is generally grounded or negative.
  • the above is only an example to illustrate the specific structure of the drive control module in the in-cell touch display.
  • the specific structure of the drive control module is not limited to the above-mentioned structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.
  • the reset control module 03 may specifically include: a second switching transistor T2 and a third switching transistor T3;
  • the gate of the second switching transistor T2 is connected to the gate of the third switching transistor T3 and is the control terminal of the reset control module 03.
  • the source is the input terminal of the reset control module 03, and the drain is the first output terminal of the reset control module 03;
  • the source of the three-switch transistor T3 is the input terminal of the reset control module 03, and the drain is the second output terminal of the reset control module 03.
  • the turned-on second switching transistor T2 when the second switching transistor T2 and the third switching transistor T3 are in an on state under the control of the reset control signal terminal Scan1, the turned-on second switching transistor T2 provides a signal of the second reference signal terminal Vint. To the third node C, the turned-on third switching transistor T3 supplies the signal of the second reference signal terminal Vint to the output of the drive control module 05.
  • the second switching transistor T2 and the third switching transistor T3 may both be P-type transistors or N-type transistors, which are not limited herein.
  • the above is only a specific example of the structure of the reset control module in the in-cell touch display.
  • the specific structure of the reset control module is not limited to the above-mentioned structure provided by the embodiment of the present invention, and may also be known to those skilled in the art. Other structures are not limited herein.
  • the data writing module includes a first switching transistor
  • the reset control module includes a second switching transistor and a third switching transistor
  • the second switching transistor and the third switching transistor may both be N-type transistors or both P-type transistors, which are not limited herein.
  • the first switching transistor, the second switching transistor, and the third switching transistor are both N-type transistors or P-type transistors
  • the sub-pixels the sub-pixels
  • the reset control signal terminal in the circuit is the same signal terminal as the write control signal terminal.
  • the compensation module 02 may specifically include: a fourth switching transistor T4 and a capacitor C1; wherein, the fourth switching transistor T4 The gate is the control end of the compensation module 02, the source is connected to one end of the capacitor C1 and is the second input end of the compensation module 02, the drain is the output end of the compensation module 02; the other end of the capacitor C1 is the first input of the compensation module 02 end.
  • the capacitor C1 is charged or discharged according to the conduction condition of the second switching transistor T2 and the illumination control module 04 in the reset control module 03, when the second node B is in a floating state. (ie, the illumination control module 04 does not output a signal to the second node B) and the capacitor C1 is discharged when the driving transistor DT0 is turned on until the potential of the second node B is lowered such that the driving transistor DT0 is turned off, and then is in a floating state at the third node C.
  • the voltage difference between the second node B and the third node C is maintained to be a fixed value, and when the fourth switching transistor T4 is When the compensation control signal terminal Scan3 is in the on state, the turned-on fourth switching transistor T4 supplies the signal of the third node C to the first node A.
  • the fourth switching transistor T4 may be a P-type transistor or an N-type transistor, which is not limited herein.
  • the above is only a specific example of the structure of the compensation module in the in-cell touch display.
  • the specific structure of the compensation module is not limited to the above structure provided by the embodiment of the present invention, and may be other structures known to those skilled in the art. , not limited here.
  • the voltage of the second reference signal end in the first stage to the third stage may be the same as the voltage of the cathode layer, which is not limited herein.
  • the reset control signal terminal, the write control signal terminal, and the compensation control signal terminal in the sub-pixel circuit may be the same signal terminal; or, when the first switching transistor, the second switching transistor, and the third switching transistor are both P-type In the case of a transistor, and when the fourth switching transistor is an N-type transistor, the reset control signal terminal, the write control signal terminal, and the compensation control signal terminal in the sub-pixel circuit may be the same signal terminal.
  • the illumination control module 04 may specifically include: a fifth switching transistor T5 whose gate is the control end of the illumination control module 04.
  • the source is the input end of the illumination control module 04, and the drain is the output end of the illumination control module 04.
  • the fifth switching transistor T5 when the fifth switching transistor T5 is in an on state under the control of the light emission control signal terminal EM, the signal of the first reference signal terminal VDD is transmitted to the second node B through the turned-on fifth switching transistor T5.
  • the fifth switching transistor T5 may be an N-type transistor or a P-type transistor, which is not limited herein.
  • the driving transistor and the switching transistor mentioned in the above embodiments of the present invention may be It is a thin film transistor (TFT), and may be a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Scmiconductor), which is not limited herein.
  • TFT thin film transistor
  • MOS metal oxide semiconductor field effect transistor
  • all of the switching transistors may be P-type transistors or N-type transistors, which are not limited herein.
  • the driving transistor is a P-type transistor
  • all switching transistors are also designed with a P-type transistor, that is, all transistors are P-type transistors. This simplifies the fabrication process of the sub-pixel circuit.
  • the driving transistor DT0 and all the switching transistors are P-type transistors.
  • the P-type transistor is in an on state when its gate potential is low, and is in an off state when its gate potential is high.
  • the corresponding input timing diagram is shown in FIG. .
  • a high potential signal is indicated by 1
  • a low potential signal is indicated by 0.
  • the potential of the first reference signal outputted by the driving chip to the first reference signal terminal VDD is V dd
  • the potential of the second reference signal outputted to the second reference signal terminal Vint is V Ss
  • the potential of the third reference signal outputted to the cathode layer 213 is V ss
  • the amplitude of the superimposed touch scan signal is
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, and the fifth switching transistor T5 are in an on state, and the fourth switching transistor T4 is in an off state.
  • the first reference signal of the first reference signal terminal VDD is transmitted to the second node B through the turned-on fifth switching transistor T5, and the second reference signal of the second reference signal terminal Vint is transmitted to the second via the turned-on second switching transistor T2.
  • the three nodes C are such that the potential of the third node C is the potential V ss of the second reference signal, and the capacitor C1 starts to be charged.
  • the second reference signal of the second reference signal terminal Vint is transmitted to the anode layer 211 of the organic light emitting device 21 through the turned-on third switching transistor T3, so that the potential of the anode layer 211 of the organic light emitting device 21 is the potential V of the second reference signal.
  • Ss The data signal of the data signal terminal Data is transmitted to the first node A through the turned-on first switching transistor T1, so that the potential of the first node A is the potential V data of the data line number.
  • the first switching transistor T1, the second switching transistor T2, and the third switching transistor T3 are in an on state
  • the fourth switching transistor T4 and the fifth switching transistor T5 are in an off state.
  • the second reference signal of the second reference signal terminal Vint is transmitted to the third node C through the turned-on second switching transistor T2, so that the potential of the third node C is the potential V ss of the second reference signal, and the fifth switching transistor T5 is at The off state causes the second node B to float.
  • the second reference signal of the second reference signal terminal Vint is transmitted to the anode layer 211 of the organic light emitting device 21 through the turned-on third switching transistor T3, so that the potential of the anode layer 211 of the organic light emitting device 21 is the potential V of the second reference signal.
  • Ss The data signal of the data signal terminal Data is transmitted to the first node A through the turned-on first switching transistor T1, so that the potential of the first node A is the potential V data of the data line number.
  • the gate potential of the driving transistor DT0 is V data
  • the source potential is V dd
  • the drain potential is V ss
  • the driving transistor DT0 is turned on, and the capacitor C1 starts to discharge until the second node B
  • V th0 is the threshold voltage of the driving transistor DT0
  • the driving transistor DT0 is turned off to stop the discharging of the capacitor C1.
  • VBC V data -V th0 -V ss .
  • the fourth switching transistor T4, the fifth switching transistor T5, and the driving transistor DT0 are in an on state, and the first switching transistor T1, the second switching transistor T2, and the third switching transistor T3 are in an off state. Since the second switching transistor T2 is turned off, the third node C is in a floating state, and the first reference signal of the first reference signal terminal VDD is transmitted to the second node B through the turned-on fifth switching transistor T5, so that the second The potential of the node B is changed from V data -V th0 of the previous stage to the potential V dd of the first reference signal.
  • V ss is the ground potential
  • the potential VC of the third node C jumps to V dd — V data + V th0 . Since the fourth switching transistor T4 is turned on, the signal of the third node C is transmitted to the first node A through the turned-on fourth switching transistor T4, so the potential VA of the first node A is also V dd - V data - V th0 .
  • the operating current I OLED of the organic light-emitting device 21 is not affected by the threshold voltage V th0 of the driving transistor DT0, and is mainly determined by the data signal, completely solving the driving process caused by the process and long-time operation.
  • the effect of the threshold voltage drift of the transistor on the operating current of the organic light emitting device improves the display unevenness of the panel display.
  • the working states of the modules of the sub-pixel circuit at this stage are The working state of each module of the three-stage sub-pixel circuit is the same, that is, the potential state of the signal of the control terminal of each module is still the same as that of the third phase, so Scan1 is still a high signal at this stage, Scan2 is still a high signal, and Scan3 is still low. Signal, EM is still a low signal.
  • the fourth switching transistor T4, the fifth switching transistor T5, and the driving transistor DT0 are in an on state, and the first switching transistor T1, the second switching transistor T2, and the third switching transistor T3 are in an off state. Since the second switching transistor T2 is turned off, the third node C is in a floating state, and the first reference signal of the first reference signal terminal VDD is transmitted to the second node B through the turned-on fifth switching transistor T5, so that the second The potential of the node B is changed from the V dd of the previous stage to the potential V dd +
  • the signal of the third node C is transmitted to the first node A through the turned-on fourth switching transistor T4, so the potential of the first node A is also V dd - V data + V th0 +
  • ) ⁇ V th0 ] 2 K V data 2 , it can be
  • the cathode layer is multiplexed into a self-capacitance electrode, and the driving chip determines the touch position by detecting a change in the capacitance value of the cathode layer. Since the signals of the cathode layer and the signal terminals of the sub-pixel circuit are superimposed with the same touch scan signal, the capacitance of the cathode layer (ie, the self-capacitance electrode) can be ensured to be a fixed value, thereby ensuring the accuracy of the touch determination.
  • An in-cell touch display based on an organic electroluminescent display is realized.
  • the first embodiment described above is described by taking a driving transistor in a sub-pixel circuit and all switching transistors as P-type transistors as an example.
  • the driving transistor DT1 and all the switching transistors are P-type transistors, and are written.
  • the input control signal end Scan2 and the reset control signal end Scan1 are connected to the same end, and the corresponding input timing chart is as shown in FIG. 7a.
  • the specific working principle is the same as that in the first embodiment, and details are not described herein again.
  • the fourth switching transistor T4 is an N-type transistor
  • a driving transistor DT0 and other switching transistors (T1, T2, T3 and T5) is a P-type transistor
  • the write control signal end Scan2 the reset control signal end Scan1 and the compensation control signal end Scan3 are connected to the same end
  • the corresponding input timing chart is as shown in FIG. 7b, and the specific working principle is the same as that of the first embodiment. , will not repeat them here.
  • all the switching transistors may also be N-type transistors.
  • the driving transistor DT0 is a P-type transistor
  • the first switching transistor is T1
  • the second switching transistor T2 the third switching transistor T3, the fourth switching transistor T4, and the fifth switching transistor T5 are all N-type transistors
  • the corresponding input timing diagram is shown in FIG. 7c, and the specific working principle is the same as the above-mentioned first embodiment. The same, no longer repeat here.
  • the driving transistor DT0 is a P-type transistor, and all of the switching transistors (T1, T2, T3, T4, and T5) are N.
  • the type of the transistor, the write control signal terminal Scan2 and the reset control signal terminal Scan1 are connected to the same end, and the corresponding input timing chart is shown in FIG. 7d.
  • the specific working principle is the same as that of the first embodiment, and details are not described herein again.
  • the driving transistor DT0 and the fourth switching transistor T4 are P-type transistors, and other switching transistors (T1, T2, T3 and T5) is an N-type transistor, the write control signal terminal Scan2, the reset control signal terminal Scan1 and the compensation control signal terminal Scan3 are connected to the same end, and the corresponding input timing chart is as shown in FIG. 7e, and the specific working principle is the same as that of the first embodiment. , will not repeat them here.
  • the sub-pixel circuit is generally located between the anode layer and the array substrate; in order to simplify the preparation process, the wires connecting the cathode layer and the sub-pixel circuit may be
  • the source, the gate or the drain of the transistor or other signals on the array substrate are prepared in the same layer, so that it can be prepared without changing a new preparation process, and only needs to change the composition of the corresponding film layer, which simplifies.
  • the process steps save production costs and increase production efficiency.
  • the sub-pixel circuit is located between the anode layer and the array substrate; the array substrate further includes connecting the data signal ends of the sub-pixel circuits to the driving respectively.
  • the data line of the chip; the wire connecting the cathode layer is in the same layer and insulated from the data line.
  • all transistors in the sub-pixel circuit include an active layer, a gate insulating layer, a gate, and an interlayer insulating layer sequentially on the array substrate. a layer, and a source and a drain; the data line is disposed in the same layer as the source and the drain; and the wire connecting the cathode layer is connected to the corresponding cathode layer through the via.
  • the in-cell touch display panel provided by the embodiment of the invention further includes: a planarization layer between the layer where the source and the drain are located and the anode; between the cathode layer and the planarization layer and a sub-pixel defining layer surrounding each of the light emitting layers; and a cathode connecting portion disposed in the same layer as the anode layer; wherein the cathode connecting portion is connected to a corresponding wire connected to the cathode layer through a via penetrating the planarizing layer, and the cathode layer passes through the sub-pixel
  • the vias of the defined layer are connected to corresponding cathode connections.
  • the in-cell touch display panel provided by the embodiment of the invention further includes: a buffer layer between the sub-pixel circuit and the array substrate.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • a buffer layer 221, an active layer 222, a gate insulating layer 223, a gate electrode 224, an interlayer insulating layer 225, and a source disposed in the same layer are sequentially disposed on the array substrate 1.
  • the cathode layer 213 is connected to the cathode connection portion 214 through a via hole penetrating the sub-pixel defining layer 215.
  • the anode layer 211 is connected to the drain electrode 227 through a via hole penetrating the planarization layer 228, and the cathode connection portion 214 passes through the planarization layer 228.
  • the via is connected to the wire 110, and the source 226 and the drain 227 are respectively connected to the active layer 222 through via holes penetrating the interlayer insulating layer 225 and the gate insulating layer 223, and the active layer 222 is at the source 226 and The region 2220 where the drain 227 contacts is doped. Only the active layer 222, the gate 224, the source 226 and the drain 227 of the driving transistor DT0 are shown in FIG. 8. The structure of the specific switching transistor is similar to that of the driving transistor, and details are not described herein again.
  • the via hole for connecting the cathode layer 213 and the wire 110 is generally disposed between adjacent sub-pixels, thereby avoiding A via hole is provided in the light emitting layer to destroy the performance of the light emitting layer.
  • each sub-pixel 2 has a hexagonal shape, and all the sub-pixels 2 are regular on the array substrate 1. arrangement.
  • the sub-pixels 2 are arranged side by side in the row direction, and the sub-pixels 2 of corresponding positions in the adjacent two rows of sub-pixels 2 are arranged in a misaligned manner in the column direction, and in each row of sub-pixels 2, adjacent to each other
  • a via hole V1 for connecting the cathode layer 213 and the wiring 110 is disposed between the sub-pixels 2; and a via hole V2 for connecting the anode layer 211 and the drain electrode 227 is disposed at a gap between adjacent two rows of sub-pixels.
  • the sub-pixels 2 are arranged side by side in the column direction, and the sub-pixels 2 of the corresponding positions in the adjacent two columns of sub-pixels 2 are arranged in a misalignment in the row direction, and in each column of sub-pixels 2,
  • a via hole V1 for connecting the cathode layer 213 and the wiring 110 is disposed between the adjacent two sub-pixels 2; and a via hole V2 for connecting the anode layer 211 and the drain electrode 227 is disposed at a gap between adjacent two columns of sub-pixels.
  • the embodiment of the present invention further provides a driving method for any of the above-mentioned in-cell touch display screens; as shown in FIG. 10, for each sub-pixel, four stages may be included in one frame time:
  • the driving chip outputs a reset control signal to the reset control signal end of the sub-pixel sub-pixel circuit, a write control signal to the write control signal end, and a data signal to the data signal end. And outputting a light-emitting control signal to the light-emitting control signal end, outputting a first reference signal to the first reference signal end, and outputting a second reference signal to the second reference signal end, and outputting to the cathode layer of the organic light-emitting device in the sub-pixel through the corresponding wire a third reference signal; the reset control module supplies the signal of the second reference signal end to the third node and the anode layer of the organic light emitting device; Providing, according to the writing module, the signal of the data signal end to the first node; the lighting control module providing the signal of the first reference signal end to the second node; charging the compensation module;
  • the driving chip In the second stage (discharge phase), the driving chip outputs a write control signal to the write control signal end of the sub-pixel sub-pixel circuit, outputs a data signal to the data signal end, and outputs a reset control signal to the reset control signal end.
  • the data writing module inputs the data The signal of the signal end is supplied to the first node; the reset control module supplies the signal of the second reference signal end to the third node and the anode layer of the organic light emitting device; and discharges the compensation module until the compensation module stores the threshold of the driving transistor in the driving control module Voltage;
  • the driving chip outputs an emission control signal to the illumination control signal end of the sub-pixel circuit of the sub-pixel, outputs a compensation control signal to the compensation control signal end, and outputs the first to the first reference signal end.
  • the reference signal outputs a second reference signal to the second reference signal end, and outputs a third reference signal to the cathode layer of the organic light emitting device in the subpixel through the corresponding wire;
  • the illumination control module provides the signal of the first reference signal end to the second node
  • the third node is in a floating state, the compensation module maintains a voltage difference between the second node and the third node as a fixed value, and provides a signal of the third node to the first node;
  • the driving control module is in the illumination control module and compensates Driving the organic light emitting device to emit light under the common control of the module;
  • the signal output by the driving chip to each signal end and the cathode layer of the sub-pixel circuit in the sub-pixel is the basis of the signal output to each signal end and the cathode layer in the third stage.
  • the same touch scan signal is superimposed on the same, and the working state of each module of the sub-pixel circuit is the same as that in the third stage, and the driving chip detects the change of the capacitance value of the cathode layer through the corresponding wire to determine the touch position.
  • an embodiment of the present invention further provides a display device, including the above-mentioned embedded touch display screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer. , digital photo frame, navigator, etc. Any product or component with display function.
  • a display device including the above-mentioned embedded touch display screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer. , digital photo frame, navigator, etc. Any product or component with display function.
  • the display device reference may be made to the embodiment of the in-cell touch display screen described above, and the repeated description is omitted.
  • the in-cell touch display screen, the driving method thereof and the display device provided by the embodiments of the present invention have at least two sub-pixels as one sub-pixel group, and the cathode layers of different sub-pixel groups are independent from each other, that is, equivalent to existing
  • the cathode layer disposed on the whole surface of the technology is divided, and one sub-pixel group corresponds to one
  • the cathode layer of each sub-pixel group is connected to the driving chip through a wire, thereby multiplexing the cathode layer into a self-capacitance touch electrode, and the driving chip applies a touch scanning signal to the cathode layer through the wire, and passes the wire
  • the change of the capacitance value of the cathode layer is detected to determine the touch position, thereby implementing the touch function.
  • the signals output from the driver chip to the signal terminals and the cathode layer of the sub-pixel circuit in the fourth stage are the basis of the signals output to the signal terminals and the cathode layer in the third stage.
  • the working state of each module of the fourth stage sub-pixel circuit and the working state of each module of the sub-pixel circuit in the third stage ie, the light-emitting display stage
  • an in-cell touch display screen based on an organic electroluminescence display screen is realized.

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Abstract

本发明公开了一种内嵌式触摸显示屏、其驱动方法及显示装置，以至少两个子像素为一个子像素组，不同子像素组的阴极层之间相互独立，即相当于将现有技术中整面设置的阴极层进行分割，各子像素组的阴极层通过导线与驱动芯片相连，从而将阴极层复用为自电容触控电极，驱动芯片通过导线检测阴极层的电容值变化以判断触控位置，从而实现触控功能。在该触摸显示屏中，驱动芯片在第四阶段向子像素电路的各信号端以及阴极层输出的信号是在第三阶段输出的信号的基础上叠加了相同的触控扫描信号，可以实现子像素电路各模块的工作状态与第三阶段时是相同的，以保证能够正常显示，从而实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。

Description

内嵌式触摸显示屏、其驱动方法及显示装置 技术领域
本发明涉及触控显示技术领域，具体涉及一种内嵌式触摸显示屏、其驱动方法及显示装置。
背景技术
随着显示技术的飞速发展，触摸屏(Touch Screen Panel)已经逐渐遍及人们的生活中。目前，触摸屏按照组成结构可以分为：外挂式触摸屏(Add on Mode Touch Panel)、覆盖表面式触摸屏(On Cell Touch Panel)、以及内嵌式触摸屏(In Cell Touch Panel)。其中，外挂式触摸屏是将触摸屏与显示屏分开生产，然后贴合到一起成为具有触摸功能的显示屏，外挂式触摸屏存在制作成本较高、光透过率较低、模组较厚等缺点。而内嵌式触摸屏将触摸屏的触控电极内嵌在显示屏内部，可以减薄模组整体的厚度，又可以大大降低触摸屏的制作成本，受到各大面板厂家青睐。
但是目前的内嵌式触摸屏主要采用的是液晶显示屏中。众所周知，有机电致发光显示屏(Organic Light Emitting Diode，OLED)是当今平板显示器研究领域的热点之一，与液晶显示屏相比，OLED具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点，目前，在手机、PDA、数码相机等显示领域OLED已经开始取代传统的LCD显示屏。因此，提供一种应用于有机电致发光显示屏的内嵌式触摸显示屏是本领域技术人员亟需解决的技术问题。
发明内容
有鉴于此，本发明实施例提供一种内嵌式触摸显示屏、其驱动方法及显示装置，用于实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。
本发明实施例提供的一种内嵌式触摸显示屏，包括阵列基板，位于所述阵列基板上的若干子像素，每个所述子像素包括有机发光器件；其中，所述有机发光器件包括依次位于阵列基板上的阳极层、发光层和阴极层；其中，以至少两个子像素为一个子像素组，属于不同子像素组的阴极层之间相互独立。
根据本发明实施例，每个所述子像素还包括与所述有机发光器件电连接的子像素电路，所述子像素电路包括：数据写入模块，补偿模块，复位控制模块、发光控制模块、驱动控制模块、数据信号端、写入控制信号端、复位控制信号端、发光控制信号端、补偿控制信号端、第一参考信号端和第二参考信号端。
根据本发明实施例，所述复位控制模块用于在所述复位控制信号端的控制下，将所述第二参考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；所述数据写入模块用于在所述写入控制信号端的控制下将所述数据信号端的信号提供给所述第一节点；所述发光控制模块用于在所述发光控制信号端的控制下，将所述第一参考信号端的信号提供给所述第二节点；所述补偿模块用于保存数据电压和所述驱动控制模块的阈值电压，并且在所述补偿控制信号端的控制下将所述第三节点的信号提供给所述第一节点，使得补偿驱动控制模块的阈值电压与流过有机发光器件的电流的影响；所述驱动控制模块用于在所述发光控制模块和所述补偿模块的共同控制下驱动所述有机发光器件发光。
根据本发明实施例，所述数据写入模块包括：第一开关晶体管，其栅极为所述数据写入模块的控制端，源极为所述数据写入模块的输入端，漏极为所述数据写入模块的输出端；所述驱动控制模块包括：驱动晶体管，其栅极为所述驱动控制模块的控制端，源极为所述驱动控制模块的输入端，漏极为所述驱动控制模块的输出端。
根据本发明实施例，所述复位控制模块包括：第二开关晶体管和第三开关晶体管；其中，所述第二开关晶体管的栅极与所述第三开关晶体管的栅极相连，为所述复位控制模块的控制端，源极为所述复位控制模块的输入端，漏极为所述复位控制模块的第一输出端；所述第三开关晶体管的源极为所述复位控制模块的输入端，漏极为所述复位控制模块的第二输出端。所述发光控制模块包括：第五开关晶体管，其栅极为所述发光控制模块的控制端，源极为所述发光控制模块的输入端，漏极为所述发光控制模块的输出端。
根据本发明实施例，所述补偿模块包括：第四开关晶体管和电容；其中，所述第四开关晶体管，其栅极为所述补偿模块的控制端，源极与所述电容的一端相连且为所述补偿模块的第二输入端，漏极为所述补偿模块的输出端；所述电容的另一端为所述补偿模块的第一输入端。
在本发明实施例提供的上述内嵌式触摸显示屏中，所有开关晶体管均为N型晶体管或均为P型晶体管。
在本发明实施例提供的上述内嵌式触摸显示屏中，所述子像素电路位于所述阳极层与所述阵列基板之间；所述阵列基板还包括将各子像素电路中的数据信号端分别连接至驱动芯片的数据线；所述导线与所述数据线同层且绝缘设置。
在本发明实施例提供的上述内嵌式触摸显示屏中，所述子像素电路中的所有晶体管均包括依次位于阵列基板上的有源层、栅极绝缘层、栅极、绝缘层、以及源极和漏极；所述数据线与所述源极和漏极同层设置；所述导线通过过孔与对应的阴极层连接。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，还包括：位于所述源极和漏极所在层与所述阳极之间的平坦化层，位于所述阴极层与所述平坦化层之间且包围各所述发光层的子像素限定层；以及与所述阳极层同层设置的阴极连接部；其中，所述阴极连接部通过贯穿所述平坦化层的过孔与对应的导线相连，所述阴极层通过贯穿所述子像素限定层的过孔与对应的阴极连接部相连。
在本发明实施例提供的上述内嵌式触摸显示屏中，各所述子像素的形状为六边形，且所有子像素在所述阵列基板上呈规律排列；其中，在行方向上各子像素并排设置，且相邻两行子像素中的对应位置的子像素在列方向上呈错位排列，并且在各行子像素中，相邻两个子像素之间设置有用于连接阴极层与导线的过孔；用于连接阳极层与漏极的过孔设置在相邻两行子像素之间的间隙处；或者，在列方向上各子像素并排设置，且相邻两列子像素中的对应位置的子像素在行方向上呈错位排列，并且在各列子像素中，相邻两个子像素之间设置有用于连接阴极层与导线的过孔；用于连接阳极层与漏极的过孔设置在相邻两列子像素之间的间隙处。
相应地，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述任一种内嵌式触摸显示屏。
相应地，本发明实施例还提供了一种上述任一种内嵌式触摸显示屏的驱动方法，针对各子像素，在一帧时间内：
在第一阶段，所述复位控制模块在复位控制信号的控制下将所述第二参考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；所述数 据写入模块在写入控制信号的控制下将所述数据信号端的信号提供给所述第一节点；所述发光控制模块在发光控制信号的控制下控制对所述补偿模块充电；
第二阶段，所述数据写入模块在写入控制信号的控制下将所述数据信号端的信号提供给所述第一节点；所述复位控制模块在复位控制信号的控制下将所述第二参考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；所述发光控制模块使得所述第二节点处于浮置状态，在所述第一节点和所述第二节点的控制下使所述补偿模块放电以保存数据信号和驱动控制模块中驱动晶体管的阈值电压；
在第三阶段，所述发光控制模块在发光控制信号的控制下将所述第一参考信号端的信号提供给所述第二节点，所述复位控制模块使得所述第三节点处于浮置状态，所述数据写入模块使所述第一节点与数据信号端断开，所述补偿模块在补偿控制信号的控制下将所述第三节点的信号提供给所述第一节点；所述驱动控制模块在所述发光控制模块和所述补偿模块的共同控制下驱动所述有机发光器件发光；
在第四阶段，所述驱动芯片向所述第一参考信号端输出第一参考信号叠加触控扫描信号，并且向所述阴极层输出第三参考信号叠加触控扫描信号，所述子像素电路各模块的工作状态与第三阶段时相同，并且所述驱动芯片通过所述对应的导线检测所述阴极层的电容值变化以判断触控位置。
本发明实施例提供的上述内嵌式触摸显示屏、其驱动方法及显示装置，以至少两个子像素为一个子像素组，不同子像素组的阴极层之间相互独立，即相当于将现有技术中整面设置的阴极层进行分割，一个子像素组对应一个分割后的阴极层，各子像素组的阴极层通过导线与驱动芯片相连，从而利用阴极层复用为自电容触控电极，驱动芯片通过导线检测阴极层的电容值变化以判断触控位置，从而实现触控功能。在该内嵌式触摸显示屏中，驱动芯片在第四阶段向子像素电路的各信号端以及阴极层输出的信号是在第三阶段时向各信号端和阴极层输出的信号的基础上叠加了相同的触控扫描信号，可以实现子像素电路各模块的工作状态与第三阶段(即发光显示阶段)时是相同的以保证能够正常显示，从而实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。
附图说明
图1为本发明实施例提供的内嵌式触摸显示屏的结构示意图；
图2为本发明实施例提供的子像素电路的结构示意图；
图3为在一帧时间内驱动芯片向子像素电路的各信号端以及阴极层输出的信号的波形示意图；
图4为本发明实施例提供的一种子像素电路的具体结构示意图；
图5a至图5d分别为本发明实施例一提供的子像素电路的在各阶段的工作状态示意图；
图6a至图6e分别为本发明实施例提供的子像素电路的具体结构示意图；
图7a至图7e分别为图6a至图6e所示的子像素电路对应的输入信号的波形示意图；
图8为本发明实施例二提供的内嵌式触摸显示屏的局部结构示意图；
图9a和图9b分别为本发明实施例提供的内嵌式触摸显示屏的子像素排列示意图；
图10为本发明实施例提供的内嵌式触摸显示屏的驱动方法的流程示意图。
具体实施方式
下面结合附图，对本发明实施例提供的内嵌式触摸显示屏、其驱动方法及显示装置的具体实施方式进行详细地说明。
附图中各膜层的厚度和形状不反映真实比例，目的只是示意说明本发明内容。
本发明实施例提供的一种内嵌式触摸显示屏，如图1所示，包括阵列基板1，位于阵列基板1上的若干子像素2，每个子像素2包括有机发光器件21和与该有机发光器件21电连接的子像素电路22(图1中未示出子像素电路的具体结构)；其中，有机发光器件21包括依次位于阵列基板上的阳极层211、发光层212和阴极层213；以至少两个子像素2为一个子像素组11，属于不同子像素组11的阴极层213之间相互独立。此外，触摸显示屏还包括：用于向各子像素电路22的各信号端以及各子像素组的阴极层213输出信号的驱动芯片(图1中未示出驱动芯片，但是在一帧时间内驱动芯片向子像素电路的各信号端以及阴极层输出的信号的波形示意图如图3所示)；其中，
如图2所示，每个子像素电路包括：数据写入模块01，补偿模块02，复位控制模块03、发光控制模块04、驱动控制模块05、数据信号端Data、写入控制信号端Scan2、复位控制信号端Scan1、发光控制信号端EM、补偿控制信号端Scan3、第一参考信号端VDD和第二参考信号端Vint。
数据写入模块01的输入端与数据信号端Data相连，控制端与写入控制信号端Scan2相连，输出端与第一节点A相连；发光控制模块04的输入端与第一参考信号端VDD相连，控制端与发光控制端EM相连，输出端与第二节点B相连；复位控制模块03的输入端与第二参考信号端Vint相连，控制端与复位控制信号端Scan1相连，第一输出端与第三节点C相连，第二输出端与驱动控制模块05的输出端和对应的有机发光器件21的阳极层211相连；补偿模块02的第一输入端与第二节点B相连，第二输入端与第三节点C相连，控制端与补偿控制信号端Scan3相连，输出端与第一节点A相连；驱动控制模块05的输入端与第二节点B相连，控制端与第一节点A相连；各子像素组11的阴极层213通过对应的导线110与驱动芯片相连。
复位控制模块03用于在复位控制信号端Scan1的控制下，将第二参考信号端Vint的信号提供给第三节点C和有机发光器件21的阳极层211；数据写入模块01用于在写入控制信号端Scan1的控制下将数据信号端Data的信号提供给第一节点A；补偿模块02用于根据复位控制模块03和发光控制模块04的导通情况进行充电或放电，在第三节点C处于浮置状态时维持第二节点B与第三节点C之间的电压差为固定值，即保存数据电压和所述驱动控制模块的阈值电压，并且在补偿控制信号端Scan3的控制下将第三节点C的信号提供给第一节点A；发光控制模块04用于在发光控制信号端EM的控制下，将第一参考信号端VDD的信号提供给第二节点B；驱动控制模块05用于在发光控制模块04和补偿模块02的共同控制下驱动有机发光器件21发光；
针对各子像素，以子像素电路中各控制信号端的有效控制电平为例，如图3所示，驱动芯片用于在一帧时间内，在第一阶段T1向子像素2中子像素电路22的发光控制信号端EM输出发光控制信号，向复位控制信号端Scan1输出复位控制信号，向写入控制信号端Scan2输出写入控制信号，向数据信号端Data输出数据信号；在第二阶段T2向复位控制信号端Scan1输出复位控制信号，向写入控制信号端Scan2输出写入控制信号，向数据信号端Data输出数据信号；在第三阶段T3向发光控制信号端EM输出发光控制信号，向 补偿控制信号端Scan3输出补偿控制信号；在第一阶段T1至第三阶段T3均向第一参考信号端VDD输出第一参考信号，向第二参考信号端Vint输出第二参考信号，通过对应的导线110向子像素2中有机发光器件21的阴极层213输出第三参考信号；在第四阶段T4向子像素电路22的各信号端(Scan1、Scan2、Scan3、Vint、Data、EM和VDD)以及阴极层213输出的信号为在第三阶段T3向各信号端和阴极层213输出的信号的基础上叠加相同的触控扫描信号，使在第四阶段T4子像素电路22各模块的工作状态与在第三阶段T3子像素电路22各模块的工作状态相同，并通过对应的导线110检测阴极层213的电容值变化以判断触控位置。
在本发明实施例提供的内嵌式触摸显示屏中，以至少两个子像素为一个子像素组，不同子像素组的阴极层之间相互独立，即相当于将现有技术中整面设置的阴极层进行分割，一个子像素组对应一个分割后的阴极层，各子像素组的阴极层通过导线与驱动芯片相连，从而将阴极层复用为自电容触控电极，驱动芯片通过导线向阴极层施加触控扫描信号，并通过导线检测阴极层的电容值变化以判断触控位置，从而实现触控功能。而且，在该内嵌式触摸显示屏中，驱动芯片在第四阶段向子像素电路的各信号端以及阴极层输出的信号是在第三阶段时向各信号端和阴极层输出的信号的基础上叠加了相同的触控扫描信号，可以实现在第四阶段子像素电路各模块的工作状态与在第三阶段(即发光显示阶段)子像素电路各模块的工作状态相同，从而保证能够正常显示，由此实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。
需要说明的是，在本发明实施例提供的上述内嵌式触摸显示屏中，模块的工作状态是指该模块中的晶体管处于导通状态或截止状态。在第四阶段子像素电路各模块的工作状态与在第三阶段子像素电路各模块的工作状态相同，以发光控制模块为例，是指如果发光控制模块中的晶体管在第三阶段处于导通状态，那么在第四阶段也处于导通状态。
根据自电容触控原理，当人体未触碰屏幕时，各自电容电极所承受的电容为一固定值，当人体触碰屏幕时，对应的自电容电极所承受的电容为固定值叠加人体电容，触控侦测芯片在触控时间段通过检测各自电容电极的电容值变化可以判断出触控位置。因此在上述内嵌式触摸显示屏中要保证在第四阶段各自电容电极即各子像素组的阴极层所承受的电容为固定值，需要使各阴极层与与其相对的地电极(即除了阴极层之外的其它电极)的电压差始终 保持一致。因此在第四阶段驱动芯片向子像素电路的各信号端以及阴极层输出的信号为在第三阶段时向各信号端和阴极层输出的信号的基础上叠加相同的触控扫描信号，来保证触控判断的准确性。
而且，在上述内嵌式触摸显示屏中，通过子像素电路的各模块的配合工作，使有机发光器件在发光显示时，驱动电流主要由数据信号端的电压决定，与驱动控制模块中驱动晶体管的阈值电压无关，能避免驱动控制模块中驱动晶体管的阈值电压对流过有机发光器件的电流的影响，从而使驱动发光器件发光的工作电流保持一致，可以提高显示装置显示区域图像亮度的均匀性。
下面结合具体实施例，对本发明进行详细说明。需要说明的是，本实施例是为了更好的解释本发明，但不限制本发明。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图4所示，数据写入模块01，具体可以包括：第一开关晶体管T1，其栅极为数据写入模块01的控制端，源极为数据写入模块01的输入端，漏极为数据写入模块01的输出端。
在具体实施时，当第一开关晶体管T1在写入控制信号端Scan2的控制下处于导通状态时，数据信号端Data的信号通过第一开关晶体管T1提供给第一节点A。
在具体实施时，第一开关晶体管T1可以为P型晶体管，也可以为N型晶体管，在此不作限定。
以上仅是举例说明内嵌式触摸显示屏中数据写入模块的具体结构，在具体实施时，数据写入模块的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不做限定。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图4所示，驱动控制模块05，具体可以包括：驱动晶体管DT0，其栅极为驱动控制模块05的控制端，源极为驱动控制模块05的输入端，漏极为驱动控制模块05的输出端。
进一步地，在具体实施时，在本发明实施例提供的上述内嵌式触摸显示屏中，驱动晶体管DT0的类型一般为P型晶体管。P型晶体管的阈值电压一般为负值。对应的第一参考信号的电压一般为正电压，阴极层接收的第三参考信号的电压一般接地或为负值。
以上仅是举例说明内嵌式触摸显示屏中驱动控制模块的具体结构，在具 体实施时，驱动控制模块的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不做限定。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图4所示，复位控制模块03，具体可以包括：第二开关晶体管T2和第三开关晶体管T3；其中，第二开关晶体管T2的栅极与第三开关晶体管T3的栅极相连并且为复位控制模块03的控制端，源极为复位控制模块03的输入端，漏极为复位控制模块03的第一输出端；第三开关晶体管T3的源极为复位控制模块03的输入端，漏极为复位控制模块03的第二输出端。
在具体实施时，当第二开关晶体管T2和第三开关晶体管T3在复位控制信号端Scan1的控制下处于导通状态时，导通的第二开关晶体管T2将第二参考信号端Vint的信号提供给第三节点C，导通的第三开关晶体管T3将第二参考信号端Vint的信号提供给驱动控制模块05的输出端。
在具体实施时，第二开关晶体管T2和第三开关晶体管T3可以均为P型晶体管，也可以均为N型晶体管，在此不作限定。
以上仅是举例说明内嵌式触摸显示屏中复位控制模块的具体结构，在具体实施时，复位控制模块的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不做限定。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，当数据写入模块包括第一开关晶体管，复位控制模块包括第二开关晶体管和第三开关晶体管时，第一开关晶体管、第二开关晶体管和第三开关晶体管可以均为N型晶体管或均为P型晶体管，在此不作限定。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，当第一开关晶体管、第二开关晶体管和第三开关晶体管均为N型晶体管或均为P型晶体管时，子像素电路中的复位控制信号端与写入控制信号端为同一信号端。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图4所示，补偿模块02具体可以包括：第四开关晶体管T4和电容C1；其中，第四开关晶体管T4的栅极为补偿模块02的控制端，源极与电容C1的一端相连且为补偿模块02的第二输入端，漏极为补偿模块02的输出端；电容C1的另一端为补偿模块02的第一输入端。
在具体实施时，电容C1根据复位控制模块03中第二开关晶体管T2和发光控制模块04的导通情况进行充电或放电，在第二节点B处于浮置状态时 (即发光控制模块04不向第二节点B输出信号)且驱动晶体管DT0导通时电容C1放电，直至第二节点B的电位降低使得驱动晶体管DT0截止，然后在第三节点C处于浮置状态(即复位控制模块03中第二开关晶体管T2不向第三节点C输出信号时)，维持第二节点B与第三节点C之间的电压差为固定值，并且当第四开关晶体管T4在补偿控制信号端Scan3的控制下处于导通状态时，导通的第四开关晶体管T4将第三节点C的信号提供给第一节点A。
在具体实施时，第四开关晶体管T4可以为P型晶体管，也可以为N型晶体管，在此不作限定。
以上仅是举例说明内嵌式触摸显示屏中补偿模块的具体结构，在具体实施时，补偿模块的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不做限定。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，在第一阶段至第三阶段第二参考信号端的电压可以与阴极层的电压相同，在此不作限定。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，当第一开关晶体管、第二开关晶体管和第三开关晶体管均为N型晶体管时，且当第四开关晶体管为P型晶体管时，子像素电路中的复位控制信号端、写入控制信号端和补偿控制信号端可以为同一信号端；或者，当第一开关晶体管、第二开关晶体管和第三开关晶体管均为P型晶体管时，且当第四开关晶体管为N型晶体管时，子像素电路中的复位控制信号端、写入控制信号端和补偿控制信号端可以为同一信号端。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图4所示，发光控制模块04具体可以包括：第五开关晶体管T5，其栅极为发光控制模块04的控制端，源极为发光控制模块04的输入端，漏极为发光控制模块04的输出端。
在具体实施时，当第五开关晶体管T5在发光控制信号端EM的控制下处于导通状态时，第一参考信号端VDD的信号通过导通的第五开关晶体管T5传输至第二节点B。
在具体实施时，第五开关晶体管T5可以为N型晶体管，也可以为P型晶体管，在此不作限定。
需要说明的是本发明上述实施例中提到的驱动晶体管和开关晶体管可以 是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Scmiconductor)，在此不做限定。
较佳地，为了简化制作工艺，在本发明实施例提供的上述子像素电路中，所有开关晶体管可以均为P型晶体管或均为N型晶体管，在此不作限定。
较佳地，为了简化制作工艺，在本发明实施例提供的上述子像素电路中，由于驱动晶体管为P型晶体管，因此所有开关晶体管也采用P型晶体管设计，即所有晶体管均为P型晶体管，这样可以简化子像素电路的制作工艺流程。
下面分别以图4所示的子像素电路为例对本发明实施例提供的子像素电路的工作过程作以描述，其中，在图4中，驱动晶体管DT0和所有开关晶体管(T1、T2、T3、T4和T5)均为P型晶体管，P型晶体管在其栅极电位为低电位时处于导通状态，在其栅极电位为高电位时处于截止状态，对应的输入时序图如图3所示。为了便于说明，下述描述中以1表示高电位信号，0表示低电位信号。其中，假设在第一阶段至第三阶段，驱动芯片向第一参考信号端VDD输出的第一参考信号的电位为Vdd，向第二参考信号端Vint输出的第二参考信号的电位为Vss，向阴极层213输出的第三参考信号的电位为Vss，在第四阶段，所叠加的触控扫描信号的幅值为|ΔV|。
实施例一：
在第一阶段T1(复位充电阶段)，Scan1＝0，Scan2＝0，Scan3＝1，EM＝0。
如图5a所示，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3和第五开关晶体管T5处于导通状态，第四开关晶体管T4处于截止状态。第一参考信号端VDD的第一参考信号通过导通的第五开关晶体管T5传输给第二节点B，第二参考信号端Vint的第二参考信号通过导通的第二开关晶体管T2传输给第三节点C，使第三节点C的电位为第二参考信号的电位Vss，电容C1开始充电。第二参考信号端Vint的第二参考信号通过导通的第三开关晶体管T3传输给有机发光器件21的阳极层211，使有机发光器件21的阳极层211的电位为第二参考信号的电位Vss。数据信号端Data的数据信号通过导通的第一开关晶体管T1传输给第一节点A，使第一节点A的电位为数据线号的电位Vdata。在第二节点B的电位上升到Vdata－Vth0(Vth0为驱动晶体管DT0的阈值电压，且Vth0<0)时，驱动晶体管DT0开始导通。在该第一阶段T1结束时，第二节点B的电位为第一参考信号的电位Vdd，电容C1两端的电压差为VBC＝Vdd－Vss，Vdd>Vdata－Vth0。
在第二阶段T2(放电阶段)，Scan1＝0，Scan2＝0，Scan3＝1，EM＝1。
如图5b所示，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3处于导通状态，第四开关晶体管T4和第五开关晶体管T5处于截止状态。第二参考信号端Vint的第二参考信号通过导通的第二开关晶体管T2传输给第三节点C，使第三节点C的电位为第二参考信号的电位Vss，第五开关晶体管T5处于截止状态，使第二节点B浮置。第二参考信号端Vint的第二参考信号通过导通的第三开关晶体管T3传输给有机发光器件21的阳极层211，使有机发光器件21的阳极层211的电位为第二参考信号的电位Vss。数据信号端Data的数据信号通过导通的第一开关晶体管T1传输给第一节点A，使第一节点A的电位为数据线号的电位Vdata。在该第二阶段T2开始时，驱动晶体管DT0的栅极电位为Vdata，源极电位为Vdd，漏极电位为Vss，驱动晶体管DT0导通，电容C1开始放电，直至第二节点B的电位变为Vdata－Vth0(Vth0为驱动晶体管DT0的阈值电压)时，驱动晶体管DT0截止使得电容C1停止放电。由此，在该第二阶段T2结束时，电容C1两端的电压差为VBC＝Vdata－Vth0－Vss。
在第三阶段T3(发光显示阶段)，Scan1＝1，Scan2＝1，Scan3＝0，EM＝0。如图5c所示，第四开关晶体管T4、第五开关晶体管T5和驱动晶体管DT0处于导通状态，第一开关晶体管T1、第二开关晶体管T2和第三开关晶体管T3处于截止状态。由于第二开关晶体管T2截止，第三节点C处于浮置(Floating)状态，第一参考信号端VDD的第一参考信号通过导通的第五开关晶体管T5传输给第二节点B，使第二节点B的电位由上一阶段的Vdata－Vth0变为第一参考信号的电位Vdd，由于电容C1的自举作用，第三节点C的电位跳变至Vdd－VBC＝Vdd–Vdata+Vth0+Vss。如前所述，假设Vss为地电位，则第三节点C的电位VC跳变至Vdd–Vdata+Vth0。由于第四开关晶体管T4导通，第三节点C的信号通过导通的第四开关晶体管T4传输给第一节点A，因此第一节点A的电位VA也为Vdd–Vdata–Vth0。在此阶段中，驱动晶体管DT0工作处于饱和状态，驱动晶体管DT0的栅源电压VGS＝VA－VB＝(Vdd–Vdata+Vth0)－Vdd，根据饱和状态电流特性可知，流过驱动晶体管DT0且用于驱动有机发光器件21发光的工作电流IOLED满足公式：IOLED＝K(VGS–Vth0)2＝K[(Vdd–Vdata+Vth0)–Vdd－Vth0]2＝K Vdata 2，其中K为结构参数，相同结构中此数值相对稳定，可以算作常量。从上式可以看出有机 发光器件21的工作电流IOLED已经不受驱动晶体管DT0的阈值电压Vth0的影响，主要由与数据信号决定，彻底解决了由于工艺制程以及长时间的操作造成的驱动晶体管的阈值电压漂移对有机发光器件的工作电流造成的影响，从而改善了面板显示的显示不均匀性。
在第四阶段T4(触控显示阶段)，Scan1＝1，Scan2＝1，Scan3＝0，EM＝0。
由于子像素电路的各信号端以及阴极层213的信号是在第三阶段T3各自信号的基础上叠加了一个相同的触控扫描信号，而在该阶段子像素电路各模块的工作状态与在第三阶段子像素电路各模块的工作状态相同，即各模块的控制端的信号的电位状态仍与第三阶段时相同，因此在该阶段Scan1仍为高位信号，Scan2仍为高位信号，Scan3仍为低位信号，EM仍为低位信号。
因此，如图5d所示，第四开关晶体管T4、第五开关晶体管T5和驱动晶体管DT0处于导通状态，第一开关晶体管T1、第二开关晶体管T2和第三开关晶体管T3处于截止状态。由于第二开关晶体管T2截止，第三节点C处于浮置(Floating)状态，第一参考信号端VDD的第一参考信号通过导通的第五开关晶体管T5传输给第二节点B，使第二节点B的电位由上一阶段的Vdd变为第一参考信号的电位Vdd+|ΔV|，由于电容C1的自举作用，第三节点C的电位变为Vdd–Vdata+Vth0+|ΔV|，第三节点C的信号通过导通的第四开关晶体管T4传输给第一节点A，因此第一节点A的电位也为Vdd–Vdata+Vth0+|ΔV|。在此阶段中，驱动晶体管DT0工作处于饱和状态，驱动晶体管DT0的栅源电压VGS＝VA－VB＝(Vdd+|ΔV|–Vdata+Vth0)－(Vdd+|ΔV|)，根据饱和状态电流特性可知，流过驱动晶体管DT0且用于驱动有机发光器件21发光的工作电流IOLED满足公式：IOLED＝K(VGS–Vth0)2＝K[(Vdd–Vdata+Vth0+|ΔV|)–(Vdd+|ΔV|)–Vth0]2＝K Vdata 2，可以看出在第四阶段T4中有机发光器件21的工作电流IOLED与在第三阶段T3中有机发光器件21的工作电流IOLED的一致，子像素电路各信号端以及阴极层上叠加的触控扫描信号|ΔV|对有机发光器件21的工作电流IOLED没有带来影响。
而且，在该阶段中，阴极层被复用为自电容电极，驱动芯片通过检测阴极层的电容值变化以判断触控位置。由于阴极层以及子像素电路的各信号端的信号均叠加相同的触控扫描信号，因此可以保证阴极层(即自电容电极)所承受的电容为固定值，从而保证触控判断的准确性，进而实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。
需要说明的是在图5a至图5d中，用符号“X”标识的各晶体管处于截止状态，没有用符号“X”标识的各晶体管处于导通状态。
上述实施例一是以子像素电路中驱动晶体管和所有开关晶体管均为P型晶体管为例进行说明的。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图6a所示，驱动晶体管DT1和所有开关晶体管(T1、T2、T3、T4和T5)均为P型晶体管，写入控制信号端Scan2与复位控制信号端Scan1连接为同一端，对应的输入时序图如图7a所示，具体工作原理与上述实施例一相同，在此不再赘述。
更进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图6b所示，第四开关晶体管T4为N型晶体管，驱动晶体管DT0和其它开关晶体管(T1、T2、T3和T5)为P型晶体管，写入控制信号端Scan2、复位控制信号端Scan1和补偿控制信号端Scan3连接为同一端，对应的输入时序图如图7b所示，具体工作原理与上述实施例一相同，在此不再赘述。
在具体实施时，在本发明实施例提供的上述内嵌式触摸显示屏中，所有开关晶体管也可以均为N型晶体管，如图6c所示，驱动晶体管DT0为P型晶体管，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4和第五开关晶体管T5均为N型晶体管，对应的输入时序图如图7c所示，具体工作原理与上述实施例一相同，在此不再赘述。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图6d所示，驱动晶体管DT0为P型晶体管，所有开关晶体管(T1、T2、T3、T4和T5)均为N型晶体管，写入控制信号端Scan2与复位控制信号端Scan1连接为同一端，对应的输入时序图如图7d所示，具体工作原理与上述实施例一相同，在此不再赘述。
更进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，如图6e所示，驱动晶体管DT0和第四开关晶体管T4为P型晶体管，其它开关晶体管(T1、T2、T3和T5)为N型晶体管，写入控制信号端Scan2、复位控制信号端Scan1和补偿控制信号端Scan3连接为同一端，对应的输入时序图如图7e所示，具体工作原理与上述实施例一相同，在此不再赘述。
需要说明的是，由于在图6a至图6e所示的子像素电路中第一参考信号端VDD、第二参考信号端Vint、数据信号端Data以及阴极层213的信号的 波形时序均与图4所示的子像素电路的波形时序相同，因此在说明书附图7a至图7e中，只是示出了复位控制信号端Scan1、写入控制信号端Scan2和发光控制信号端EM的信号的波形时序图。
进一步地，在本发明实施例提供的上述内嵌式触摸显示屏中，子像素电路一般位于阳极层与阵列基板之间；为了简化制备工艺，可以将连接阴极层的导线与子像素电路中的晶体管的源极、栅极或漏极或者阵列基板上的其它信号同层制备，这样在制备时，可以不用增加新的制备工艺，仅需变更对应的膜层的构图即可制得，简化了工艺步骤，节省了生产成本，提高了生产效率。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，子像素电路位于阳极层与阵列基板之间；阵列基板还包括将各子像素电路中的数据信号端分别连接至驱动芯片的数据线；连接阴极层的导线与数据线同层且绝缘设置。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，子像素电路中的所有晶体管均包括依次位于阵列基板上的有源层、栅极绝缘层、栅极、层间绝缘层、以及源极和漏极；数据线与源极和漏极同层设置；连接阴极层的导线通过过孔与对应的阴极层连接。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，还包括：位于源极和漏极所在层与阳极之间的平坦化层；位于阴极层与平坦化层之间且包围各发光层的子像素限定层；以及与阳极层同层设置的阴极连接部；其中，阴极连接部通过贯穿平坦化层的过孔与连接阴极层的对应导线相连，阴极层通过贯穿子像素限定层的过孔与对应的阴极连接部相连。
较佳地，在本发明实施例提供的上述内嵌式触摸显示屏中，还包括：位于子像素电路与阵列基板之间的缓冲层。
下面通过一个具体的实施例说明本发明实施例提供的上述内嵌式触摸显示屏中连接阴极层的导线的位置。
实施例二：
以一个子像素为例，如图8所示，在阵列基板1上依次包括缓冲层221，有源层222，栅极绝缘层223，栅极224，层间绝缘层225，同层设置的源极226、漏极227和导线110，平坦化层228，阳极层211和阴极连接部214，发光层212，包围发光层212的子像素限定层215，以及阴极层213。
其中，阴极层213通过贯穿子像素限定层215的过孔与阴极连接部214连接，阳极层211通过贯穿平坦化层228的过孔与漏极227相连，阴极连接部214通过贯穿平坦化层228的过孔与导线110连接，源极226和漏极227分别通过贯穿层间绝缘层225和栅极绝缘层223的过孔与有源层222连接，且有源层222在与源极226和漏极227接触的区域2220是经过掺杂处理的。图8中仅示出了驱动晶体管DT0的有源层222，栅极224，源极226和漏极227，具体开关晶体管的结构与驱动晶体管的结构相似，在此不再赘述。
具体地，在具体实施时，在本发明实施例提供的上述内嵌式触摸显示屏中，用于连接阴极层213与导线110的过孔一般设置于相邻子像素之间，这样可以避免由于在发光层中设置过孔从而破坏发光层的性能。
进一步地，在本发明实施提供的上述内嵌式触摸显示屏中，如图9a和图9b所示，各子像素2的形状为六边形，且所有子像素2在阵列基板1上呈规律排列。
如图9a所示，在行方向上子像素2并排设置，且相邻两行子像素2中的对应位置的子像素2在列方向上呈错位排列，并且在各行子像素2中，相邻两个子像素2之间设置有用于连接阴极层213与导线110的过孔V1；而用于连接阳极层211与漏极227的过孔V2设置在相邻两行子像素之间的间隙处。
替代地，如图9b所示，在列方向上子像素2并排设置，且相邻两列子像素2中的对应位置的子像素2在行方向上呈错位排列，并且在各列子像素2中，相邻两个子像素2之间设置有用于连接阴极层213与导线110的过孔V1；而用于连接阳极层211与漏极227的过孔V2设置在相邻两列子像素之间的间隙处。
基于同一发明构思，本发明实施例还提供了一种上述任一种内嵌式触摸显示屏的驱动方法；如图10所示，针对各子像素，在一帧时间内可以包括四个阶段：
S101、在第一阶段(复位充电阶段)，驱动芯片向子像素中子像素电路的复位控制信号端输出复位控制信号，向写入控制信号端输出写入控制信号，向数据信号端输出数据信号，向发光控制信号端输出发光控制信号，向第一参考信号端输出第一参考信号，向第二参考信号端输出第二参考信号，通过对应的导线向子像素中有机发光器件的阴极层输出第三参考信号；复位控制模块将第二参考信号端的信号提供给第三节点和有机发光器件的阳极层；数 据写入模块将数据信号端的信号提供给第一节点；发光控制模块将第一参考信号端的信号提供给第二节点；对补偿模块充电；
S102、在第二阶段(放电阶段)，驱动芯片向子像素中子像素电路的写入控制信号端输出写入控制信号，向数据信号端输出数据信号，向复位控制信号端输出复位控制信号，向第一参考信号端输出第一参考信号，向第二参考信号端输出第二参考信号，通过对应的导线向子像素中有机发光器件的阴极层输出第三参考信号；数据写入模块将数据信号端的信号提供给第一节点；复位控制模块将第二参考信号端的信号提供给第三节点和有机发光器件的阳极层；对补偿模块放电，直至补偿模块存储了驱动控制模块中驱动晶体管的阈值电压；
S103、在第三阶段(发光显示阶段)，驱动芯片向子像素中子像素电路的发光控制信号端输出发光控制信号，向补偿控制信号端输出补偿控制信号，向第一参考信号端输出第一参考信号，向第二参考信号端输出第二参考信号，通过对应的导线向子像素中有机发光器件的阴极层输出第三参考信号；发光控制模块将第一参考信号端的信号提供给第二节点，第三节点处于浮置状态，补偿模块维持第二节点与第三节点之间的电压差为固定值，并将第三节点的信号提供给第一节点；驱动控制模块在发光控制模块和补偿模块的共同控制下驱动有机发光器件发光；
S104、在第四阶段(触控显示阶段)，驱动芯片向子像素中子像素电路的各信号端以及阴极层输出的信号为在第三阶段时向各信号端和阴极层输出的信号的基础上叠加相同的触控扫描信号，子像素电路各模块的工作状态与第三阶段时相同，并且驱动芯片通过对应的导线检测阴极层的电容值变化以判断触控位置。
基于同一发明构思，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述内嵌式触摸显示屏，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述内嵌式触摸显示屏的实施例，重复之处不再赘述。
本发明实施例提供的上述内嵌式触摸显示屏、其驱动方法及显示装置，以至少两个子像素为一个子像素组，不同子像素组的阴极层之间相互独立，即相当于将现有技术中整面设置的阴极层进行分割，一个子像素组对应一个 分割后的阴极层，各子像素组的阴极层通过导线与驱动芯片相连，从而将阴极层复用为自电容触控电极，驱动芯片通过导线向阴极层施加触控扫描信号，并通过该导线检测阴极层的电容值变化以判断触控位置，从而实现触控功能。并且，在该内嵌式触摸显示屏中，驱动芯片在第四阶段向子像素电路的各信号端以及阴极层输出的信号是在第三阶段时向各信号端和阴极层输出的信号的基础上叠加了相同的触控扫描信号，可以实现在第四阶段子像素电路各模块的工作状态与第三阶段(即发光显示阶段)子像素电路各模块的工作状态相同，从而保证能够正常显示，由此实现一种基于有机电致发光显示屏的内嵌式触摸显示屏。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。
本申请要求2015年06月23日提交的申请号为“201510350194.2”且发明名称为“一种内嵌式触摸显示屏、其驱动方法及显示装置”的中国优先申请的优先权，通过引用将其全部内容并入于此。

Claims (13)

  1. 一种内嵌式触摸显示屏，包括阵列基板，位于所述阵列基板上的若干子像素，每个所述子像素包括有机发光器件；其中，所述有机发光器件包括依次位于阵列基板上的阳极层、发光层和阴极层；其中，
    以至少两个子像素为一个子像素组，属于不同子像素组的阴极层之间相互独立。
  2. 如权利要求1所述的内嵌式触摸显示屏，其中，每个所述子像素还包括与所述有机发光器件电连接的子像素电路，
    所述子像素电路包括：数据写入模块，补偿模块，复位控制模块、发光控制模块、驱动控制模块、数据信号端、写入控制信号端、复位控制信号端、发光控制信号端、补偿控制信号端、第一参考信号端和第二参考信号端；
    其中，所述数据写入模块的输入端与数据信号端相连，控制端与写入控制信号端相连，输出端与第一节点相连，所述第一节点为所述数据写入模块与所述驱动控制模块的连接点；
    所述发光控制模块的输入端与所述第一参考信号端相连，控制端与所述发光控制端相连，输出端与第二节点相连，所述第二节点为所述发光控制模块与所述驱动控制模块的连接点；
    所述复位控制模块的输入端与所述第二参考信号端相连，控制端与所述复位控制信号端相连，第一输出端与第三节点相连，第二输出端与所述驱动控制模块的输出端和对应的有机发光器件的阳极层相连，所述第三节点为所述复位控制模块与所述补偿模块的连接点；
    所述补偿模块的第一输入端与所述第二节点相连，第二输入端与所述第三节点相连，控制端与所述补偿控制信号端相连，输出端与所述第一节点相连；
    所述驱动控制模块的输入端与所述第二节点相连，控制端与所述第一节点相连，输出端与有机发光器件的阳极连接。
  3. 如权利要求2所述的内嵌式触摸显示屏，其中，
    所述复位控制模块用于在所述复位控制信号端的控制下，将所述第二参 考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；
    所述数据写入模块用于在所述写入控制信号端的控制下将所述数据信号端的信号提供给所述第一节点；
    所述发光控制模块用于在所述发光控制信号端的控制下，将所述第一参考信号端的信号提供给所述第二节点；
    所述补偿模块用于保存数据电压和所述驱动控制模块的阈值电压，并且在所述补偿控制信号端的控制下将所述第三节点的信号提供给所述第一节点，使得补偿驱动控制模块的阈值电压与流过有机发光器件的电流的影响；
    所述驱动控制模块用于在所述发光控制模块和所述补偿模块的共同控制下驱动所述有机发光器件发光。
  4. 如权利要求2所述的内嵌式触摸显示屏，其中，所述触摸显示屏还包括：用于向各所述子像素电路的各信号端以及各所述子像素组的阴极层输出信号的驱动芯片；其中，
    所述子像素组的阴极层通过对应的导线与所述驱动芯片相连，
    其中，所述驱动芯片用于在一帧时间内，
    在第一阶段，向发光控制信号端输出发光控制信号，向复位控制信号端输出复位控制信号，向写入控制信号端输出写入控制信号，向数据信号端输出数据信号；
    在第二阶段，向复位控制信号端输出复位控制信号，向写入控制信号端输出写入控制信号，向数据信号端输出数据信号；
    在第三阶段，向发光控制信号端输出发光控制信号，向补偿控制信号端输出补偿控制信号，通过对应的导线向所述子像素中有机发光器件的阴极层输出第三参考信号；
    在第四阶段，向所述子像素电路的各信号端以及所述阴极层输出的信号为在第三阶段时向各信号端和阴极层输出的信号的基础上叠加相同的触控扫描信号，并通过所述对应的导线检测所述阴极层的电容值变化以判断触控位置。
  5. 如权利要求3所述的内嵌式触摸显示屏，其中，
    所述数据写入模块包括：第一开关晶体管，其栅极为所述数据写入模块 的控制端，源极为所述数据写入模块的输入端，漏极为所述数据写入模块的输出端；
    所述驱动控制模块包括：驱动晶体管，其栅极为所述驱动控制模块的控制端，源极为所述驱动控制模块的输入端，漏极为所述驱动控制模块的输出端。
  6. 如权利要求3所述的内嵌式触摸显示屏，其中，所述复位控制模块包括：第二开关晶体管和第三开关晶体管；其中，所述第二开关晶体管的栅极与所述第三开关晶体管的栅极相连，为所述复位控制模块的控制端，源极为所述复位控制模块的输入端，漏极为所述复位控制模块的第一输出端；所述第三开关晶体管的源极为所述复位控制模块的输入端，漏极为所述复位控制模块的第二输出端；
    所述发光控制模块包括：第五开关晶体管，其栅极为所述发光控制模块的控制端，源极为所述发光控制模块的输入端，漏极为所述发光控制模块的输出端。
  7. 如权利要求3所述的内嵌式触摸显示屏，其中，所述补偿模块包括：第四开关晶体管和电容；其中，
    所述第四开关晶体管，其栅极为所述补偿模块的控制端，源极与所述电容的一端相连且为所述补偿模块的第二输入端，漏极为所述补偿模块的输出端；
    所述电容的另一端为所述补偿模块的第一输入端。
  8. 如权利要求7所述的内嵌式触摸显示屏，其中，所述子像素电路位于所述阳极层与所述阵列基板之间；
    所述阵列基板还包括将各子像素电路中的数据信号端分别连接至驱动芯片的数据线；以及
    所述导线与所述数据线同层且绝缘设置。
  9. 如权利要求8所述的内嵌式触摸显示屏，其中，所述子像素电路中的所有晶体管均包括依次位于阵列基板上的有源层、栅极绝缘层、栅极、绝缘 层、以及源极和漏极；
    所述数据线与所述源极和漏极同层设置；以及
    所述导线通过过孔与对应的阴极层连接。
  10. 如权利要求9所述的内嵌式触摸显示屏，还包括：
    位于所述源极和漏极所在层与所述阳极之间的平坦化层，
    位于所述阴极层与所述平坦化层之间且包围各所述发光层的子像素限定层；以及
    与所述阳极层同层设置的阴极连接部；
    其中，所述阴极连接部通过贯穿所述平坦化层的过孔与对应的导线相连，所述阴极层通过贯穿所述子像素限定层的过孔与对应的阴极连接部相连。
  11. 如权利要求9所述的内嵌式触摸显示屏，其中，各所述子像素的形状为六边形，且所有子像素在所述阵列基板上呈规律排列；其中，
    在行方向上各子像素并排设置，且相邻两行子像素中的对应位置的子像素在列方向上呈错位排列，并且在各行子像素中，相邻两个子像素之间设置有用于连接阴极层与导线的过孔；用于连接阳极层与漏极的过孔设置在相邻两行子像素之间的间隙处；或者，
    在列方向上各子像素并排设置，且相邻两列子像素中的对应位置的子像素在行方向上呈错位排列，并且在各列子像素中，相邻两个子像素之间设置有用于连接阴极层与导线的过孔；用于连接阳极层与漏极的过孔设置在相邻两列子像素之间的间隙处。
  12. 一种显示装置，包括如权利要求1-11任一项所述的内嵌式触摸显示屏。
  13. 一种如权利要求2-11任一项所述的内嵌式触摸显示屏的驱动方法，针对各子像素，在一帧时间内：
    在第一阶段，所述复位控制模块在复位控制信号的控制下将所述第二参考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；所述数据写入模块在写入控制信号的控制下将所述数据信号端的信号提供给所述第 一节点；所述发光控制模块在发光控制信号的控制下控制对所述补偿模块充电；
    在第二阶段，所述数据写入模块在写入控制信号的控制下将所述数据信号端的信号提供给所述第一节点；所述复位控制模块在复位控制信号的控制下将所述第二参考信号端的信号提供给所述第三节点和所述有机发光器件的阳极层；所述发光控制模块使得所述第二节点处于浮置状态，在所述第一节点和所述第二节点的控制下使所述补偿模块放电以保存数据信号和驱动控制模块中驱动晶体管的阈值电压；
    在第三阶段，所述发光控制模块在发光控制信号的控制下将所述第一参考信号端的信号提供给所述第二节点，所述复位控制模块使得所述第三节点处于浮置状态，所述数据写入模块使所述第一节点与数据信号端断开，所述补偿模块在补偿控制信号的控制下将所述第三节点的信号提供给所述第一节点；所述驱动控制模块在所述发光控制模块和所述补偿模块的共同控制下驱动所述有机发光器件发光；
    在第四阶段，所述驱动芯片向所述第一参考信号端输出第一参考信号叠加触控扫描信号，并且向所述阴极层输出第三参考信号叠加触控扫描信号，所述子像素电路各模块的工作状态与第三阶段时相同，并且所述驱动芯片通过所述对应的导线检测所述阴极层的电容值变化以判断触控位置。
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