WO2016197501A1 - 阵列基板及其制备方法、触控显示面板 - Google Patents

阵列基板及其制备方法、触控显示面板 Download PDF

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Publication number
WO2016197501A1
WO2016197501A1 PCT/CN2015/092199 CN2015092199W WO2016197501A1 WO 2016197501 A1 WO2016197501 A1 WO 2016197501A1 CN 2015092199 W CN2015092199 W CN 2015092199W WO 2016197501 A1 WO2016197501 A1 WO 2016197501A1
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Prior art keywords
touch electrode
electrode connection
touch
sub
array substrate
Prior art date
Application number
PCT/CN2015/092199
Other languages
English (en)
French (fr)
Inventor
王磊
杨盛际
陈小川
许睿
卢鹏程
李昌峰
吕振华
董学
刘英明
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP15894765.5A priority Critical patent/EP3309663A4/en
Priority to US15/302,994 priority patent/US10203788B2/en
Publication of WO2016197501A1 publication Critical patent/WO2016197501A1/zh

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    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02—OPTICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
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    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present disclosure relates to the field of touch display technologies, and in particular, to an array substrate, a method for fabricating the same, and a touch display panel.
  • the embedded capacitive touch technology can be divided into embedded self-inductive capacitive touch technology and embedded mutual capacitive touch technology.
  • the embedded self-inductive capacitive touch has the advantages of high signal-to-noise ratio and low cost.
  • the touch electrode needs to reach a certain driving frequency to have basic touch performance.
  • the driving frequency is closely related to the signal delay of the touch electrode connection connected to the touch electrode.
  • Embodiments of the present disclosure provide an array substrate, a method for fabricating the same, and a touch display panel, which can reduce signal delay and improve touch performance.
  • an array substrate including: a transparent electrode disposed on a base substrate; and a touch electrode connection; the transparent electrode includes a plurality of sub-electrodes, and the sub-electrode is connected to the touch electrode;
  • the touch electrode connection line includes a first touch electrode connection line and a second touch electrode connection line on different layers, and the first touch electrode connection line and the second touch electrode connection line are on the base substrate The projections on the top overlap.
  • the array substrate further includes a thin film transistor and a pixel electrode electrically connected to a drain of the thin film transistor; in a display phase, the sub-electrode further functions as a common electrode.
  • the first touch electrode is connected to the source and the drain of the thin film transistor The same layer is disposed; or the first touch electrode connection is disposed in the same layer as the gate of the thin film transistor.
  • the first touch electrode connection and the second touch electrode connection each include: a trace portion and a protruding portion connected to the trace portion; the sub-electrode passes and The via corresponding to the protruding portion is electrically connected to the first touch electrode connection and/or the second touch electrode connection.
  • the first touch electrode connection and the second touch electrode connection are located in a non-transparent area.
  • the sub-electrode and the touch electrode are in a one-to-one correspondence.
  • the projection portions of the first touch electrode line and the second touch electrode line on the substrate substrate overlap or overlap.
  • the first touch electrode connection line and the second touch electrode connection line in the touch electrode connection line corresponding to one sub-electrode are directly electrically connected or electrically connected through the sub-electrode.
  • the second touch electrode connection is disposed between the first touch electrode connection and the sub-electrode, and the sub-electrode is disposed away from the base substrate, the first touch The control electrode connection is disposed adjacent to the base substrate.
  • a touch display panel including the array substrate described above.
  • another touch display panel including an array substrate and a counter substrate; the array substrate includes: a first touch electrode connection disposed on the first substrate; the opposite substrate includes a transparent electrode disposed on the second substrate and a second touch electrode; the transparent electrode includes a plurality of sub-electrodes, and the sub-electrode is connected to the second touch electrode; wherein The first touch electrode connection line and the second touch electrode connection line are in one-to-one correspondence and electrically connected by a conductive adhesive; the first touch electrode connection line and the second touch electrode connection line are in the The projections on a substrate substrate overlap.
  • the array substrate further includes a thin film transistor and a pixel electrode electrically connected to a drain of the thin film transistor; in a display phase, the sub-electrode further functions as a common electrode.
  • the first touch electrode connection is disposed in the same layer as the source and the drain of the thin film transistor; or the first touch electrode connection is in the same layer as the gate of the thin film transistor. Settings.
  • the second touch electrode connection includes: a trace portion and a protruding portion connected to the trace portion; the sub-electrode passes through a via corresponding to the protruding portion and the first The two touch electrodes are electrically connected.
  • a method for fabricating an array substrate including: forming on a substrate a transparent electrode and a touch electrode are connected; the transparent electrode includes a plurality of sub-electrodes, and the sub-electrode is connected to the touch electrode; the touch electrode connection includes a first touch electrode connected to different layers The line and the second touch electrode are connected, and the projections of the first touch electrode line and the second touch electrode line on the base substrate overlap.
  • the first touch electrode connection is formed by the same patterning process as the source and the drain of the thin film transistor; or the first touch electrode is connected to the gate of the thin film transistor The same patterning process is formed.
  • the first touch electrode connection and the second touch electrode connection each include: a trace portion and a protruding portion connected to the trace portion; the sub-electrode passes and The via corresponding to the protruding portion is electrically connected to the first touch electrode connection and/or the second touch electrode connection.
  • the present disclosure provides an array substrate, a method for fabricating the same, and a touch display panel.
  • the first touch electrode connection and the second touch electrode connection are designed in parallel to reduce the connection of the touch electrodes.
  • the resistor can reduce the signal delay, thereby improving the touch performance of the touch display panel.
  • FIG. 1 is a top plan view of an array substrate according to an embodiment of the present disclosure
  • FIG. 2 is a top view of an array substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of a sub-electrode according to an embodiment of the present disclosure
  • Figure 4 is a cross-sectional view taken along line AA' of Figure 2;
  • FIG. 5 is a schematic structural diagram of a first touch electrode connection line and a second touch electrode connection line according to an embodiment of the present disclosure
  • FIG. 6 is a schematic structural diagram 1 of a touch display panel according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic structural diagram 2 of a touch display panel according to an embodiment of the present disclosure.
  • the embodiment of the present disclosure provides an array substrate 01.
  • the array substrate 01 includes: a transparent electrode 10 disposed on a substrate, and a touch electrode connection 20; the transparent electrode 10
  • the plurality of sub-electrodes 101 are connected to the touch electrode connection 20;
  • the touch electrode connection 20 includes a first touch electrode connection 201 and a second touch electrode connection at different layers.
  • the line 202 has a projection of the first touch electrode connection 201 and the second touch electrode connection 202 on the substrate.
  • the array substrate 01 is composed of a plurality of pixel units arranged in a matrix, and each pixel unit includes at least three sub-pixel units, wherein, as shown in FIG. 2, each sub- The pixel unit includes a thin film transistor 30 including a gate, a gate insulating layer, an active layer, a source and a drain, and a pixel electrode 40 electrically connected to the drain.
  • the first touch electrode connection 201 and the second touch electrode connection 202 are generally made of a metal material. In order to increase the aperture ratio, the first touch electrode is preferred in the embodiment of the present disclosure.
  • the connection 201 and the second touch electrode connection 202 are located in the non-transparent area.
  • the sub-electrode 101 and the touch electrode connection 20 are in one-to-one correspondence, that is, one sub-electrode 101 and a first touch electrode connection 201 and a second touch electrode connection 202
  • the formed touch electrode lines 20 are in one-to-one correspondence.
  • the shape of the sub-electrode 101 may be a rectangle, preferably a square, which may correspond to a plurality of pixel units as shown in FIG. 2 .
  • the size of the sub-electrode 101 is not the same according to the size of the touch display panel, which is not limited herein.
  • the side length of the square sub-electrode 101 may be between 3.5 and 5 mm.
  • the projection of the first touch electrode line 201 and the second touch electrode line 202 on the substrate may be partially overlapped or overlapped, which is not limited herein.
  • first touch electrode connection 201 and the second touch electrode connection 202 in the touch electrode connection 20 corresponding to one sub-electrode 101 may be directly electrically connected or may be electrically connected through the sub-electrode 101. . That is, the first touch electrode connection 201 and the second touch electrode connection 202 are electrically connected through the via, and the sub-electrode 101 passes through the via and the adjacent first touch electrode connection 201. Or the second touch electrode connection 202 is electrically connected.
  • the sub-electrodes 101 may be electrically connected to the first touch electrode connection 201 or the second touch electrode connection 202, respectively.
  • the substrate is not limited, and may be a substrate substrate in which no film layer is formed, or may be a substrate on which a buffer layer is formed, for example.
  • the embodiment of the present disclosure provides an array substrate 01, including: a transparent electrode 10 disposed on a base substrate and a touch electrode connection 20; the transparent electrode 10 includes a plurality of sub-electrodes 101, and the sub-electrodes 101 and The touch electrode connection 20 is connected to the first touch electrode connection 201 and the second touch electrode connection 202, and the first touch electrode connection The projections of the line 201 and the second touch electrode line 202 on the substrate overlap.
  • the resistance of the touch electrode wires 20 formed by the two can be reduced, thereby reducing the signal delay, thereby improving the touch display panel. Touch performance.
  • the sub-electrode 101 also functions as a common electrode.
  • the sub-electrode 101 is a common electrode; in the touch phase, the sub-electrode 101 is a touch electrode. This avoids an increase in the number of patterning processes.
  • the display phase refers to a time period for realizing the function of displaying an image in the case where the array substrate 01 is applied to the touch display panel;
  • the touch phase refers to application on the array substrate 01.
  • the time phase for implementing the touch function.
  • a mode of driving the sub-electrode 101 in a time-division manner (refer to that the display phase and the touch phase are separately driven) is adopted, that is, in the display phase, the sub-electrode 101 is used as a common electrode, and is The sub-electrode 101 and the pixel electrode 40 respectively apply a corresponding voltage for realizing the function of displaying an image, thereby realizing the function of displaying an image.
  • the sub-electrode 101 is a touch electrode, and the touch function is applied to the sub-electrode 101. The corresponding voltage while the pixel electrode 40 is not working to avoid the influence on the touch.
  • the sub-electrode 101 or the pixel electrode 40 located above is a strip-shaped electrode.
  • the sub-electrode 101 is divided into strip electrodes by the slit 1011.
  • the strip-shaped sub-electrode 101 and the plate-shaped pixel electrode 40 in different planes can generate a multi-dimensional electric field.
  • the array substrate 01 is applied to the touch display panel, the liquid crystal molecules in the liquid crystal layer can be rotated. To achieve the display image function.
  • the sub-electrode 101 functions as a touch electrode. Due to the electric field of the human body, when the finger touches the light-emitting side of the touch display panel, the capacitance at the sub-electrode 101 corresponding to the finger changes from a fixed value when the touch is not changed to a fixed value plus a finger capacitance, and thus, according to the touch When the position of the handle is changed, the position of the touch point can be calculated, thereby implementing the touch function.
  • the first touch electrode connection 201 is disposed in the same layer as the source and the drain of the thin film transistor.
  • the first touch electrode connection 201 is disposed in the same layer as the gate of the thin film transistor. In this way, the number of patterning processes can be reduced.
  • the first touch electrode connection 201, the source and the drain may be formed by one patterning process, and of course, the data line electrically connected to the source may be simultaneously formed, and the first touch electrode connection 201 and The data lines are parallel.
  • the first touch electrode connection 201 and the gate may be formed by one patterning process, and of course, the gate line electrically connected to the gate may be simultaneously formed, the first touch electrode connection 201 and the gate The lines are parallel.
  • the second touch electrode connection 202 may be disposed between the first touch electrode connection 201 and the sub-electrode 101, and the sub-electrode 101 is away from the
  • the base substrate is disposed, and the first touch electrode connection 201 is disposed adjacent to the base substrate.
  • the first touch electrode connection 201, the second touch electrode connection 202, and the sub-electrode 101 are electrically connected through a via located on the insulating layer.
  • the first touch electrode connection 201 and the second touch electrode connection 202 each include: a trace portion 2011 and a protruding portion connected to the trace portion
  • the sub-electrode 101 is electrically connected to the first touch electrode connection 201 and/or the second touch electrode connection 202 through a via corresponding to the protruding portion 2012.
  • the first via hole corresponding to the protruding portion 2012 is disposed on the first insulating layer between the first touch electrode connection 201 and the second touch electrode connection 202 to make the first
  • the touch electrode connection 201 and the protruding portion 2012 of the second touch electrode connection 202 are electrically connected through the first via; the second touch electrode connection 202 and the sub-electrode 101 adjacent to the sub-electrode 101
  • a second via corresponding to the protruding portion 2012 is disposed on the second insulating layer to electrically connect the protruding portion 2012 of the sub-electrode 101 and the second touch electrode line 202 through the second via.
  • the partial protruding portion 2012 of the first touch electrode connection 201 is not covered by the protruding portion 2012 of the second touch electrode connection 202, and is disposed on the first insulating layer.
  • a first via corresponding to the partial protruding portion 2012 of the touch electrode connection 201, and a second via corresponding to the protruding portion 2012 of the second touch electrode connection 202 is disposed on the second insulating layer.
  • the electrode 101 is electrically connected to the protruding portions 2012 of the first touch electrode connection 201 and the second touch electrode connection 202 through the first via hole and the second via hole, respectively.
  • the electrode connection generally has only the trace portion, and the trace portion 2011 generally has a relatively narrow width, and there is a problem that the electrical connection cannot be made when the electrical connection is made through the via.
  • the embodiment of the present disclosure can avoid the above problem by designing the protruding portion 2012 connected to the wiring portion 2011 by providing a through hole above the protruding portion 2012.
  • the embodiment of the present disclosure further provides a touch display panel.
  • the touch display panel includes the array substrate 01 described above, and may further include a pair of the substrate 12 and the array substrate 01 and the pair.
  • the typical scanning frequency is 60 Hz
  • the working principle of the display and the touch control of the touch display panel provided by the embodiment of the present disclosure is specifically described: setting the scanning frequency of the touch display panel to a typical value of 60 Hz, that is, each The frame time is approximately 16.67 ms; however, for the thin film transistor 30 therein, the gate thereof
  • the width of the driven pulse is small, and the time taken to perform one frame of image line by line is often less than the standard time set by each frame of image (ie, 16.67 ms).
  • the touch display panel has a certain time margin when used for displaying images, and the time margin is not equal according to the pixels of each frame image, and the order of magnitude is generally several milliseconds (ms).
  • the touch display panel is idle during the time.
  • the touch display panel of the embodiment of the present disclosure can utilize the time margin as the touch sensing time of the sub-electrode 101, thereby separating the touch sensing from the working timing of the image display, so that the touch display panel has Display and touch functions.
  • the embodiment of the present disclosure further provides a touch display device including a touch display panel and a circuit board, and the circuit board further includes a driving IC connected to the touch electrode connection 20, the driving The IC is electrically connected to the touch electrode wiring 20 through the pads provided on the array substrate 01, thereby applying a driving signal to each of the sub-electrodes 101, and receiving a feedback signal.
  • the touch display device may specifically be a product or component having any display function, such as a liquid crystal display, a liquid crystal television, a digital photo frame, a mobile phone, or a tablet computer.
  • the embodiment of the present disclosure further provides a touch display panel, as shown in FIGS. 1 and 7 , the touch display panel includes an array substrate 01 and a counter substrate 02, and the array substrate 01 includes: disposed on the first substrate a first touch electrode connection 201 on the substrate; the counter substrate 02 includes: a transparent electrode 10 disposed on the second substrate, and a second touch electrode connection 202; the transparent electrode 10 includes a plurality of sub-
  • the electrode 101 is connected to the second touch electrode connection 202.
  • the first touch electrode connection 201 and the second touch electrode connection 202 are in one-to-one correspondence and are electrically conductive.
  • the glue is electrically connected, for example, to a sealant doped with a conductive gold ball; the projections of the first touch electrode wire 201 and the second touch electrode wire 202 on the first substrate are overlapped.
  • the array substrate 01 is composed of a plurality of pixel units arranged in a matrix, and each pixel unit includes at least three sub-pixel units, wherein each sub-pixel unit includes a thin film transistor 30.
  • the thin film transistor 30 includes a gate electrode, a gate insulating layer, an active layer, a source and a drain, and further includes a pixel electrode 40 electrically connected to the drain.
  • the area where the pixel electrode 40 is located in each of the sub-pixel units is transparent, that is, the area where the pixel electrode 40 is located is a light-transmitting area.
  • the metal material is used.
  • the first touch electrode connection 201 is preferably located in the non-transmissive region.
  • the sub-electrode 101 has a one-to-one correspondence with the pair of first touch electrode lines 201 and the second touch electrode lines 202.
  • the first touch electrode connection 201 and the second touch electrode connection 202 are two corresponding first touch electrode lines 201 and the second touch electrode line 202.
  • the projections of the first touch electrode line 201 and the second touch electrode line 202 on the first substrate may be partially overlapped or overlapped, which is not limited herein.
  • the embodiment of the present disclosure provides a touch display panel.
  • the resistance of the touch electrode wires 20 formed by the two can be reduced. Therefore, the signal delay can be reduced, thereby improving the touch performance of the touch display panel.
  • the sub-electrode 101 also functions as a common electrode.
  • the display phase refers to a time period for realizing the function of displaying an image in the case where the array substrate 01 is applied to the touch display panel;
  • the touch phase refers to application on the array substrate 01.
  • the time phase for implementing the touch function.
  • a mode of driving the sub-electrode 101 in a time-division manner (refer to that the display phase and the touch phase are separately driven) is adopted, that is, in the display phase, the sub-electrode 101 is used as a common electrode, and is The sub-electrode 101 and the pixel electrode 40 respectively apply a corresponding voltage for realizing the function of displaying an image, thereby realizing the function of displaying an image.
  • the sub-electrode 101 is a touch electrode, and the touch function is applied to the sub-electrode 101. The corresponding voltage while the pixel electrode 40 is not working to avoid the influence on the touch.
  • the first touch electrode connection 201 is disposed in the same layer as the source and the drain of the thin film transistor 30 .
  • the first touch electrode connection 201 is disposed in the same layer as the gate of the thin film transistor 50. In this way, the number of patterning processes can be reduced.
  • the first touch electrode connection 201, the source and the drain may be formed by one patterning process, and of course, the data line electrically connected to the source may be simultaneously formed, and the first touch electrode connection 201 and The data lines are parallel.
  • the first touch electrode connection 201 and the gate may be formed by one patterning process, and of course, the gate line electrically connected to the gate may be simultaneously formed, the first touch electrode connection 201 and the gate The lines are parallel.
  • the second touch electrode connection 202 includes a trace portion 2011 and a protruding portion 2012 connected to the trace portion; the sub-electrode 101 corresponds to the protruding portion 2012.
  • the via is electrically connected to the second touch electrode connection 202.
  • the electrode connection generally has only the trace portion, and the trace portion 2011 generally has a relatively narrow width.
  • the electrical connection is made through the via, there is a problem that the electrical connection cannot be made.
  • the embodiment of the present disclosure is designed and routed.
  • the protruding portion 2012 of the portion 2011 is connected, and by providing a through hole above the protruding portion 2012, the above problem can be avoided.
  • the embodiment of the present disclosure further provides a method for fabricating an array substrate.
  • the method includes: forming a transparent electrode 10 and a touch electrode connection 20 on a substrate; the transparent electrode 10 includes a plurality of sub-electrodes 101 connected to the touch electrode connection 20; the touch electrode connection 20 includes a first touch electrode connection 201 and a second touch electrode at different layers.
  • the connection 202 is performed, and the projections of the first touch electrode connection 201 and the second touch electrode connection 202 on the substrate are overlapped.
  • the resistance of the touch electrode wires 20 formed by the two can be reduced, thereby reducing the signal delay, thereby improving the touch display panel. Touch performance.
  • the first touch electrode connection 201, the source and the drain of the thin film transistor 30 may be formed by one patterning process, and of course, the data line electrically connected to the source may be simultaneously formed, the first touch The control electrode connection 201 is parallel to the data line.
  • the first touch electrode connection 201 and the gate of the thin film transistor 30 may be formed by one patterning process, and of course, the gate line electrically connected to the gate may be simultaneously formed, and the first touch electrode connection 201 Parallel to the gate line. In this way, the number of patterning processes can be reduced.
  • the first touch electrode connection 201 and the second touch electrode connection 202 each include: a trace portion 2011 and a protruding portion connected to the trace portion
  • the sub-electrode 101 is electrically connected to the first touch electrode connection 201 and/or the second touch electrode connection 202 through a via corresponding to the protruding portion 2012.
  • the method for preparing the array substrate may include the following steps:
  • S102 Form a source, a data line electrically connected to the source, a drain electrically connected to the pixel electrode 40, and a first touch electrode connected in parallel with the data line and located in the non-transmissive area.
  • Line 201 Form a source, a data line electrically connected to the source, a drain electrically connected to the pixel electrode 40, and a first touch electrode connected in parallel with the data line and located in the non-transmissive area.
  • the first touch electrode connection 201 includes a trace portion 2011 and a protruding portion 2012 connected to the trace portion.
  • the second touch electrode connection 202 includes a trace portion 2011 and a protruding portion connected to the trace portion. 2012.

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Abstract

本公开实施提供一种阵列基板及其制备方法、触控显示面板。该阵列基板包括：设置在衬底基板上的透明电极以及触控电极连线；所述透明电极包括多个子电极，所述子电极与所述触控电极连线相连；所述触控电极连线包括位于不同层的第一触控电极连线和第二触控电极连线，且第一触控电极连线和第二触控电极连线在所述基板上的投影重叠。

Description

阵列基板及其制备方法、触控显示面板
相关申请的交叉引用
本申请主张在2015年6月10日在中国提交的中国专利申请号No.201510317116.2的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及触控显示技术领域，尤其涉及一种阵列基板及其制备方法、触控显示面板。
背景技术
随着显示技术的飞速发展，触控屏(Touch Panel，简称TP)的诞生使人们的生活更加便捷。如今，内嵌电容式触控技术已经被广泛应用于显示领域。
其中，内嵌电容式触控技术又可分为内嵌自感电容式触控技术和内嵌互感电容式触控技术。相比内嵌互感电容式触控，内嵌自感电容式触控具有高信噪比、低成本的优点。
对于内嵌自感电容式触控来说，触控电极需要达到一定的驱动频率才可以有基本的触控性能。而驱动频率的高低与触控电极相连的触控电极连线的信号延迟有密切关系。
发明内容
本公开的实施例提供一种阵列基板及其制备方法、触控显示面板，可降低信号延迟，提升触控性能。
为达到上述目的，本公开的实施例采用如下技术方案：
一方面，提供一种阵列基板，包括：设置在衬底基板上的透明电极以及触控电极连线；所述透明电极包括多个子电极，所述子电极与所述触控电极连线相连；所述触控电极连线包括位于不同层的第一触控电极连线和第二触控电极连线，且第一触控电极连线和第二触控电极连线在所述衬底基板上的投影重叠。
可选地，所述阵列基板还包括薄膜晶体管和与所述薄膜晶体管的漏极电连接的像素电极；在显示阶段，所述子电极还用作公共电极。
进一步可选地，所述第一触控电极连线与所述薄膜晶体管的源极和漏极 同层设置；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同层设置。
可选地，所述第一触控电极连线和所述第二触控电极连线均包括：走线部分和与所述走线部分连接的凸出部分；所述子电极通过与所述凸出部分对应的过孔与所述第一触控电极连线和/或所述第二触控电极连线电连接。
可选地，所述第一触控电极连线和第二触控电极连线位于非透光区。
可选地，所述子电极和所述触控电极连线一一对应。
可选地，所述第一触控电极连线和所述第二触控电极连线在所述衬底基板上的投影部分重叠或全部重叠。
可选地，与一个子电极对应的所述触控电极连线中的第一触控电极连线和第二触控电极连线直接电连接，或，通过该子电极电连接。
可选地，所述第二触控电极连线设置在所述第一触控电极连线与所述子电极之间，且所述子电极远离所述衬底基板设置，所述第一触控电极连线靠近所述衬底基板设置。
另一方面，提供一种触控显示面板，包括上述的阵列基板。
再一方面，提供另一种触控显示面板，包括阵列基板和对盒基板；所述阵列基板包括：设置在第一衬底基板上的第一触控电极连线；所述对盒基板包括：设置在第二衬底基板上的透明电极以及第二触控电极连线；所述透明电极包括多个子电极，所述子电极与所述第二触控电极连线相连；其中，所述第一触控电极连线和所述第二触控电极连线一一对应且通过导电胶电连接；所述第一触控电极连线和所述第二触控电极连线在所述第一衬底基板上的投影重叠。
可选地，所述阵列基板还包括薄膜晶体管和与所述薄膜晶体管的漏极电连接的像素电极；在显示阶段，所述子电极还用作公共电极。
进一步可选地，所述第一触控电极连线与所述薄膜晶体管的源极和漏极同层设置；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同层设置。
可选地，所述第二触控电极连线包括：走线部分和与所述走线部分连接的凸出部分；所述子电极通过与所述凸出部分对应的过孔与所述第二触控电极连线电连接。
又一方面，还提供一种阵列基板的制备方法，包括：在衬底基板上形成 透明电极以及触控电极连线；所述透明电极包括多个子电极，所述子电极与所述触控电极连线相连；所述触控电极连线包括位于不同层的第一触控电极连线和第二触控电极连线，且第一触控电极连线和第二触控电极连线在所述衬底基板上的投影重叠。
可选地，所述第一触控电极连线与所述薄膜晶体管的源极和漏极通过同一次构图工艺形成；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同一次构图工艺形成。
可选地，所述第一触控电极连线和所述第二触控电极连线均包括：走线部分和与所述走线部分连接的凸出部分；所述子电极通过与所述凸出部分对应的过孔与所述第一触控电极连线和/或所述第二触控电极连线电连接。
本公开实施提供了一种阵列基板及其制备方法、触控显示面板，通过并行设计的第一触控电极连线和第二触控电极连线可以减少二者构成的触控电极连线的电阻，从而可以降低信号延迟，进而可以提升触控显示面板的触控性能。
附图说明
为了更清楚地说明本公开实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施例提供的一种阵列基板的俯视示意图一；
图2为本公开实施例提供的一种阵列基板的俯视示意图二；
图3为本公开实施例提供的一种子电极的结构示意图；
图4为图2中AA’向剖视示意图；
图5为本公开实施例提供的一种第一触控电极连线和第二触控电极连线的结构示意图；
图6为本公开实施例提供的一种触控显示面板的结构示意图一；
图7为本公开实施例提供的一种触控显示面板的结构示意图二。
附图标记：
01-阵列基板；02-对盒基板；03-液晶层；10-透明电极；101-子电极；1011- 狭缝；20-触控电极连线；201-第一触控电极连线；2011-走线部分；2012-凸出部分；202-第二触控电极连线；30-薄膜晶体管；40-像素电极。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
本公开实施例提供了一种阵列基板01，如图1和图2所示，该阵列基板01包括：设置在衬底基板上的透明电极10以及触控电极连线20；所述透明电极10包括多个子电极101，所述子电极101与所述触控电极连线20相连；所述触控电极连线20包括位于不同层的第一触控电极连线201和第二触控电极连线202，且第一触控电极连线201和第二触控电极连线202在所述衬底基板上的投影重叠。
需要说明的是，第一，本领域技术人员应该知道，阵列基板01由矩阵排列的多个像素单元构成，而每个像素单元包括至少三个子像素单元，其中，如图2所示，每个子像素单元包括薄膜晶体管30，薄膜晶体管30包括栅极、栅绝缘层、有源层、源极和漏极，还包括与漏极电连接的像素电极40。
其中，当所述阵列基板01应用于触控显示面板时，只有每个子像素单元中的像素电极40所在的区域是可以透光的。即所述像素电极40所在的区域为透光区。在此基础上，由于第一触控电极连线201和第二触控电极连线202一般都为金属材料，为了提高开口率，本公开实施例优选所述第一触控电极 连线201和第二触控电极连线202位于非透光区。
第二，所述子电极101和所述触控电极连线20一一对应，即，一个子电极101与由一根第一触控电极连线201和一根第二触控电极连线202构成的触控电极连线20一一对应。其中，所述子电极101的形状可以为矩形，优选正方形，其如图2所示，可对应多个像素单元。
其中，当所述阵列基板01应用于触控显示面板时，根据所述触控显示面板的尺寸不同，所述子电极101的尺寸也不尽相同，在此不做限定。对于6寸以下的触控显示面板，方形子电极101的边长可以为3.5-5mm之间。
第三，第一触控电极连线201和第二触控电极连线202在所述衬底基板上的投影可以是部分重叠也可以是全部重叠，在此不做限定。
此外，与一个子电极101对应的所述触控电极连线20中的第一触控电极连线201和第二触控电极连线202可以直接电连接，也可通过该子电极101电连接。即：可以是所述第一触控电极连线201和第二触控电极连线202通过过孔电连接，所述子电极101通过过孔与靠近的所述第一触控电极连线201或第二触控电极连线202电连接。也可以是所述子电极101分别与所述第一触控电极连线201或第二触控电极连线202电连接。
第四，不对所述基板进行限定，其可以是没有形成任何膜层的衬底基板，也可以是形成有例如缓冲层的基板。
本公开实施例提供了一种阵列基板01，包括：设置在衬底基板上的透明电极10以及触控电极连线20；所述透明电极10包括多个子电极101，所述子电极101与所述触控电极连线20相连；所述触控电极连线20包括位于不同层且电连接的第一触控电极连线201和第二触控电极连线202，且第一触控电极连线201和第二触控电极连线202在所述基板上的投影重叠。通过并行设计两根第一触控电极连线201和第二触控电极连线202可以减少二者构成的触控电极连线20的电阻，从而可以降低信号延迟，进而可以提升触控显示面板的触控性能。
可选地，在显示阶段，所述子电极101还用作公共电极。
即，在显示阶段，所述子电极101为公共电极；在触控阶段，所述子电极101为触控电极。这样可以避免构图工艺次数的增加。
这里，所述显示阶段，是指在所述阵列基板01应用于触控显示面板的情况下，用以实现显示图像功能的时间段；所述触控阶段，是指在所述阵列基板01应用于触控显示面板的情况下，用以实现触控功能的时间阶段。在具体操作过程中，采用对所述子电极101分时驱动(指显示阶段和触控阶段分开驱动)的模式，即，在显示阶段，将所述子电极101作为公共电极，并为所述子电极101和像素电极40施加实现显示图像功能的相应电压，从而实现显示图像的功能；在触控阶段，所述子电极101为触控电极，并为所述子电极101施加实现触控功能的相应电压，同时使所述像素电极40不工作，以避免对触控的影响。
基于上述描述，要实现正常的图像显示，对应一个子像素单元，则需保证位于在上的子电极101或像素电极40为条形电极。例如，如图3所示，当所述子电极101位于所述像素电极40的上方时，则该子电极101通过狭缝1011被划分为条形电极。这样，在显示阶段，处于不同平面的条形子电极101与板状像素电极40便可产生多维电场，当该阵列基板01应用于触控显示面板时，便可使液晶层内液晶分子发生旋转，从而实现显示图像功能。
在触控阶段，所述子电极101作为触控电极。由于人体的电场作用，当手指接触触控显示面板的出光一侧时，与手指对应处的子电极101处的电容由未触控时的固定值变为固定值加手指电容，因而，根据触控点位置电容的变化情况，便可计算出触摸点的位置，进而实现触控功能。
进一步可选地，如图4所示，所述第一触控电极连线201与所述薄膜晶体管的源极和漏极同层设置。或者，所述第一触控电极连线201与所述薄膜晶体管的栅极同层设置。这样，可以减少构图工艺的次数。
即：可通过一次构图工艺形成所述第一触控电极连线201、源极和漏极，当然还可同时形成与源极电连接的数据线，所述第一触控电极连线201与所述数据线平行。或者，可通过一次构图工艺形成所述第一触控电极连线201和栅极，当然还可同时形成与栅极电连接的栅线，所述第一触控电极连线201与所述栅线平行。
进一步的，参考图4所示，所述第二触控电极连线202可以设置在所述第一触控电极连线201与所述子电极101之间，且所述子电极101远离所述 衬底基板设置，所述第一触控电极连线201靠近所述衬底基板设置。其中，所述第一触控电极连线201、第二触控电极连线202、子电极101之间通过位于绝缘层上的过孔电连接。
可选地，如图5所示，所述第一触控电极连线201和所述第二触控电极连线202均包括：走线部分2011和与所述走线部分连接的凸出部分2012；所述子电极101通过与所述凸出部分2012对应的过孔与所述第一触控电极连线201和/或所述第二触控电极连线202电连接。
具体的，可以是：在位于第一触控电极连线201和第二触控电极连线202之间的第一绝缘层上设置与凸出部分2012对应的第一过孔，以使第一触控电极连线201和第二触控电极连线202的凸出部分2012通过该第一过孔电连接；在靠近子电极101的第二触控电极连线202和所述子电极101之间的第二绝缘层上设置与凸出部分2012对应的第二过孔，以使所述子电极101和第二触控电极连线202的凸出部分2012通过该第二过孔电连接。
也可以是：使所述第一触控电极连线201的部分凸出部分2012不被所述第二触控电极连线202的凸出部分2012覆盖，并在第一绝缘层上设置与第一触控电极连线201的上述部分凸出部分2012对应的第一过孔，在第二绝缘层上设置与第二触控电极连线202的凸出部分2012对应的第二过孔，子电极101通过第一过孔和第二过孔分别与第一触控电极连线201和第二触控电极连线202的凸出部分2012电连接。
相比现有技术中电极连接一般只有走线部分，而走线部分2011一般宽度都比较窄，在通过过孔电连接的时候会出现无法电连接的问题。本公开实施例通过设计与走线部分2011连接的凸出部分2012，通过在凸出部分2012上方设置过孔，可以避免上述问题。
本公开实施例还提供了一种触控显示面板，如图6所示，该触控显示面板包括上述的阵列基板01，当然还可以包括对盒基板02和设置在所述阵列基板01和对盒基板02之间的液晶层03。
以典型扫描频率为60Hz为例，具体说明本公开实施例提供的触控显示面板分时实现显示和触控的工作原理：设定触控显示面板的扫面频率为典型值60Hz，即每一帧时间约为16.67ms；然而对于其中的薄膜晶体管30，其栅极 驱动的脉冲的宽度较小，逐行成像完成一帧图像所用的时间往往小于每一帧图像设定的标准时间(即，16.67ms)。基于此，触控显示面板在用于显示图像时具有一定的时间裕度，根据每帧图像的像素不同，该时间裕度也不尽相等，其数量级一般为几个毫秒(ms)，在此时间内，触控显示面板处于空闲状态。本公开实施例所述的触控显示面板即可利用这个时间裕度作为所述子电极101的触摸感应时间，从而将触摸感应与图像显示的工作时序分开来，使得所述触控显示面板具有显示和触控功能。
进一步的，本公开实施例还提供一种触控显示装置，其包括触控显示面板以及电路板，所述电路板还应包括与所述触控电极连线20相连接的驱动IC，该驱动IC通过设置在阵列基板01上的焊盘与触控电极连线20进行电连接，从而为各子电极101施加驱动信号，并接收反馈信号。
上述触控显示装置具体可以为液晶显示器、液晶电视、数码相框、手机、平板电脑等具有任何显示功能的产品或者部件。
本公开实施例还提供了一种触控显示面板，如图1和7所示，该触控显示面板包括阵列基板01和对盒基板02，所述阵列基板01包括：设置在第一衬底基板上的第一触控电极连线201；所述对盒基板02包括：设置在第二衬底基板上的透明电极10以及第二触控电极连线202；所述透明电极10包括多个子电极101，所述子电极101与所述第二触控电极连线202相连；其中，所述第一触控电极连线201和所述第二触控电极连线202一一对应且通过导电胶例如掺杂有导电金球的密封胶电连接；所述第一触控电极连线201和所述第二触控电极连线202在所述第一衬底基板上的投影重叠。
需要说明的是，第一，本领域技术人员应该知道，阵列基板01由矩阵排列的多个像素单元构成，而每个像素单元包括至少三个子像素单元，其中，每个子像素单元包括薄膜晶体管30，薄膜晶体管30包括栅极、栅绝缘层、有源层、源极和漏极，还包括与漏极电连接的像素电极40。
其中，由于只有每个子像素单元中的像素电极40所在的区域是可以透光的，即所述像素电极40所在的区域为透光区，在此基础上，由于第一触控电极连线201一般都为金属材料，为了提高开口率，本公开实施例优选所述第一触控电极连线201位于非透光区。
第二，所述子电极101与一对第一触控电极连线201和第二触控电极连线202一一对应。其中一对第一触控电极连线201和第二触控电极连线202即为一一对应的两根第一触控电极连线201和所述第二触控电极连线202。
第三，第一触控电极连线201和第二触控电极连线202在所述第一衬底基板上的投影可以是部分重叠也可以是全部重叠，在此不做限定。
本公开实施例提供了一种触控显示面板，通过并行设计两根第一触控电极连线201和第二触控电极连线202可以减少二者构成的触控电极连线20的电阻，从而可以降低信号延迟，进而可以提升触控显示面板的触控性能。
可选地，在显示阶段，所述子电极101还用作公共电极。
这里，所述显示阶段，是指在所述阵列基板01应用于触控显示面板的情况下，用以实现显示图像功能的时间段；所述触控阶段，是指在所述阵列基板01应用于触控显示面板的情况下，用以实现触控功能的时间阶段。在具体操作过程中，采用对所述子电极101分时驱动(指显示阶段和触控阶段分开驱动)的模式，即，在显示阶段，将所述子电极101作为公共电极，并为所述子电极101和像素电极40施加实现显示图像功能的相应电压，从而实现显示图像的功能；在触控阶段，所述子电极101为触控电极，并为所述子电极101施加实现触控功能的相应电压，同时使所述像素电极40不工作，以避免对触控的影响。
进一步可选地，如图7所示，所述第一触控电极连线201与所述薄膜晶体管30的源极和漏极同层设置。或者，所述第一触控电极连线201与所述薄膜晶体管50的栅极同层设置。这样，可以减少构图工艺的次数。
即：可通过一次构图工艺形成所述第一触控电极连线201、源极和漏极，当然还可同时形成与源极电连接的数据线，所述第一触控电极连线201与所述数据线平行。或者，可通过一次构图工艺形成所述第一触控电极连线201和栅极，当然还可同时形成与栅极电连接的栅线，所述第一触控电极连线201与所述栅线平行。
参考图5所示，所述第二触控电极连线202包括：走线部分2011和与所述走线部分连接的凸出部分2012；所述子电极101通过与所述凸出部分2012对应的过孔与所述第二触控电极连线202电连接。
相比现有技术中电极连接一般只有走线部分，而走线部分2011一般宽度都比较窄，在通过过孔电连接的时候会出现无法电连接的问题，本公开实施例通过设计与走线部分2011连接的凸出部分2012，通过在凸出部分2012上方设置过孔，可以避免上述问题。
本公开实施例还提供了一种阵列基板的制备方法，参考图1、2和4所示，该方法包括：在衬底基板上形成透明电极10以及触控电极连线20；所述透明电极10包括多个子电极101，所述子电极101与所述触控电极连线20相连；所述触控电极连线20包括位于不同层的第一触控电极连线201和第二触控电极连线202，且第一触控电极连线201和第二触控电极连线202在所述衬底基板上的投影重叠。
通过并行设计两根第一触控电极连线201和第二触控电极连线202可以减少二者构成的触控电极连线20的电阻，从而降低信号延迟，进而可以提升触控显示面板的触控性能。
可选地，可通过一次构图工艺形成所述第一触控电极连线201、薄膜晶体管30的源极和漏极，当然还可同时形成与源极电连接的数据线，所述第一触控电极连线201与所述数据线平行。或者，可通过一次构图工艺形成所述第一触控电极连线201和薄膜晶体管30的栅极，当然还可同时形成与栅极电连接的栅线，所述第一触控电极连线201与所述栅线平行。这样，可以减少构图工艺的次数。
可选地，参考图5所示，所述第一触控电极连线201和所述第二触控电极连线202均包括：走线部分2011和与所述走线部分连接的凸出部分2012；所述子电极101通过与所述凸出部分2012对应的过孔与所述第一触控电极连线201和/或所述第二触控电极连线202电连接。
示例的，参考图4所示，所述阵列基板的制备方法可以包括如下步骤：
S101、在衬底基板上形成依次形成栅极、栅绝缘层、半导体有源层、像素电极40；
S102、在S101的基础上形成源极、与源极电连接的数据线、与像素电极40电连接的漏极、以及与所述数据线平行且位于非透光区的第一触控电极连线201。
其中，参考图5所示，所述第一触控电极连线201包括走线部分2011和与所述走线部分连接的凸出部分2012。
S103、在S102的基础上形成第一绝缘层。
S104、在S103的基础上形成第二触控电极连线202，参考图5所示，所述第二触控电极连线202包括走线部分2011和与所述走线部分连接的凸出部分2012。
其中，所述第一触控电极连线201和所述第二触控电极连线202在基板上的投影重叠，且所述第一触控电极连线201的部分凸出部分2012不被所述第二触控电极连线202的凸出部分2012覆盖。
S105、在S104的基础上形成第二绝缘层，并采用构图工艺，对所述第一绝缘层和所述第二绝缘层继续刻蚀，形成过孔，所述过孔露出所述第一触控电极连线201的上述部分凸出部分2012和所述第二触控电极连线202的凸出部分2012。
S106、在S105的基础上形成子电极101，所述子电极通过所述过孔分别与所述第一触控电极连线201和所述第二触控电极连线202的凸出部分2012电连接。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (17)

  1. 一种阵列基板，包括：设置在衬底基板上的透明电极以及触控电极连线；所述透明电极包括多个子电极，所述子电极与所述触控电极连线相连；
    所述触控电极连线包括位于不同层的第一触控电极连线和第二触控电极连线，且第一触控电极连线和第二触控电极连线在所述衬底基板上的投影重叠。
  2. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括薄膜晶体管和与所述薄膜晶体管的漏极电连接的像素电极；
    在显示阶段，所述子电极还用作公共电极。
  3. 根据权利要求2所述的阵列基板，其中，所述第一触控电极连线与所述薄膜晶体管的源极和漏极同层设置；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同层设置。
  4. 根据权利要求1所述的阵列基板，其中，所述第一触控电极连线和所述第二触控电极连线均包括：走线部分和与所述走线部分连接的凸出部分；
    所述子电极通过与所述凸出部分对应的过孔与所述第一触控电极连线和/或所述第二触控电极连线电连接。
  5. 根据权利要求1所述的阵列基板，其中，
    所述第一触控电极连线和第二触控电极连线位于非透光区。
  6. 根据权利要求1所述的阵列基板，其中，
    所述子电极和所述触控电极连线一一对应。
  7. 根据权利要求1所述的阵列基板，其中，
    所述第一触控电极连线和所述第二触控电极连线在所述衬底基板上的投影部分重叠或全部重叠。
  8. 根据权利要求1所述的阵列基板，其中，
    与一个子电极对应的所述触控电极连线中的第一触控电极连线和第二触控电极连线直接电连接，或，通过该子电极电连接。
  9. 根据权利要求1所述的阵列基板，其中，
    所述第二触控电极连线设置在所述第一触控电极连线与所述子电极之间， 且所述子电极远离所述衬底基板设置，所述第一触控电极连线靠近所述衬底基板设置。
  10. 一种触控显示面板，包括权利要求1-9任一项所述的阵列基板。
  11. 一种触控显示面板，包括阵列基板和对盒基板；其中，
    所述阵列基板包括：设置在第一衬底基板上的第一触控电极连线；
    所述对盒基板包括：设置在第二衬底基板上的透明电极以及第二触控电极连线；所述透明电极包括多个子电极，所述子电极与所述第二触控电极连线相连；
    其中，所述第一触控电极连线和所述第二触控电极连线一一对应且通过导电胶电连接；所述第一触控电极连线和所述第二触控电极连线在所述第一衬底基板上的投影重叠。
  12. 根据权利要求11所述的触控显示面板，其中，所述阵列基板还包括薄膜晶体管和与所述薄膜晶体管的漏极电连接的像素电极；
    在显示阶段，所述子电极还用作公共电极。
  13. 根据权利要求12所述的触控显示面板，其中，所述第一触控电极连线与所述薄膜晶体管的源极和漏极同层设置；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同层设置。
  14. 根据权利要求11所述的触控显示面板，其中，所述第二触控电极连线包括：走线部分和与所述走线部分连接的凸出部分；所述子电极通过与所述凸出部分对应的过孔与所述第二触控电极连线电连接。
  15. 一种阵列基板的制备方法，包括：在衬底基板上形成透明电极以及触控电极连线；所述透明电极包括多个子电极，所述子电极与所述触控电极连线相连；
    所述触控电极连线包括位于不同层的第一触控电极连线和第二触控电极连线，且第一触控电极连线和第二触控电极连线在所述衬底基板上的投影重叠。
  16. 根据权利要求15所述的方法，其中，所述第一触控电极连线与所述薄膜晶体管的源极和漏极通过同一次构图工艺形成；或者，所述第一触控电极连线与所述薄膜晶体管的栅极同一次构图工艺形成。
  17. 根据权利要求15所述的方法，其中，所述第一触控电极连线和所述第二触控电极连线均包括：走线部分和与所述走线部分连接的凸出部分；
    所述子电极通过与所述凸出部分对应的过孔与所述第一触控电极连线和/或所述第二触控电极连线电连接。
PCT/CN2015/092199 2015-06-10 2015-10-19 阵列基板及其制备方法、触控显示面板 WO2016197501A1 (zh)

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