WO2016165163A1 - 液晶显示装置及其液晶显示面板 - Google Patents
液晶显示装置及其液晶显示面板 Download PDFInfo
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- WO2016165163A1 WO2016165163A1 PCT/CN2015/078002 CN2015078002W WO2016165163A1 WO 2016165163 A1 WO2016165163 A1 WO 2016165163A1 CN 2015078002 W CN2015078002 W CN 2015078002W WO 2016165163 A1 WO2016165163 A1 WO 2016165163A1
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/133345—Insulating layers
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
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- G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
- G02F1/134354—Subdivided pixels, e.g. for grey scale or redundancy the sub-pixels being capacitively coupled
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
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- G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
Definitions
- the present invention relates to the field of display technologies, and in particular, to a liquid crystal display device and a liquid crystal display panel thereof.
- a pixel design of Charge Sharing is adopted, that is, the pixel is divided into a main pixel (Main Pixel) and a sub pixel (Sub Pixel). Two areas.
- the charge scan gate (Charge Gate) is turned on, while the charge sharing scan line (Share Gate) is turned off, the main pixel and the pixel electrode are charged to the same potential; then the charge scan line (Charge Gate) is turned off, and the charge sharing scan line is simultaneously charged.
- Share Gate is turned on, and the potential of Sub Pixel is lower than the potential of Main Pixel due to the action of the charge sharing capacitor (Cst3).
- the different potentials cause the liquid crystal molecules in the two display regions to have different steering distributions, thereby having the effect of improving the bias of the large-view character.
- the charge sharing capacitor (Cst3) is composed of an ITO (Indium tin oxide) layer 2, a metal layer 3, and an insulating layer between the two layers.
- the ITO layer 2 is connected to the charge sharing TFT (T3) 6 through the via 5 (VIA), and the metal layer 3 is a pixel common electrode (Com).
- an ITO layer residual problem may occur in actual production, so that the ITO layer 2 of Cst3 is connected to the sub-pixel electrode 7 (such as the short-circuit connection line 1 in FIG. 1b) to form a short circuit, resulting in Charge.
- the Sharing function is invalid.
- the sub-pixels of the pixel unit with the short-circuit problem in the gray scale will be brighter than the sub-pixels of the other pixel units, and the micro-brightness phenomenon appears on the panel.
- the detection method commonly used in the factory is to open all the scan lines at the same time (or open parity) and charge all the pixels so that the main pixel and the sub-pixel are at the same potential. In this detection mode, even the above ITO layer appears.
- the phenomenon of short-circuiting with the sub-pixel electrode 7 cannot be effectively detected, resulting in a decrease in yield and an increase in product cost.
- the present invention provides a liquid crystal display device and a liquid crystal display panel thereof, which solve the technical problem that the phenomenon of short circuit between the ITO layer and the sub-pixel in the prior art cannot be effectively detected, resulting in a decrease in yield and an increase in product cost.
- a technical solution adopted by the present invention is to provide a liquid crystal display panel including an upper substrate, a lower substrate, and a liquid crystal layer, wherein the upper substrate is provided with an upper common electrode; and the lower substrate is disposed opposite to the upper substrate, There are several data lines, several charging scan lines, a plurality of pixel units arranged at intervals, a plurality of charge sharing scanning lines, and a plurality of lower common electrodes; the liquid crystal layer is disposed between the upper substrate and the lower substrate; each pixel unit includes respectively a first thin film transistor, a second thin film transistor, a third thin film transistor, a main pixel, a sub-pixel disposed at intervals from the main pixel, and a charge sharing sheet disposed between the main pixel and the sub-pixel; a gate of a thin film transistor is coupled to the charge scan line, a source of the first thin film transistor is coupled to the data line, a drain of the first thin film transistor is coupled to the main pixel, and a gate of
- half of the charge sharing sheet is disposed at the end of the sub-pixel, and the other half of the charge sharing sheet extends to the end of the adjacent sub-pixel.
- 1/5 of the charge sharing sheet is spaced apart at the end of the sub-pixel, and 4/5 of the charge sharing sheet is extended to the adjacent sub-pixel end.
- extension portions are overlapped above the connecting line.
- extension portions are overlapped below the connecting line.
- a technical solution adopted by the present invention is to provide a liquid crystal display panel including an upper substrate, a lower substrate, and a liquid crystal layer, wherein the upper substrate is provided with an upper common electrode; and the lower substrate is disposed opposite to the upper substrate, There are several data lines, several charging scan lines, a plurality of pixel units arranged at intervals, a plurality of charge sharing scanning lines, and a plurality of lower common electrodes; the liquid crystal layer is disposed between the upper substrate and the lower substrate; each pixel unit includes respectively a first thin film transistor, a second thin film transistor, a third thin film transistor, a main pixel, a sub-pixel disposed at intervals from the main pixel, and a charge sharing sheet disposed between the main pixel and the sub-pixel; The gate of a thin film transistor is coupled to the charging scan line, the first thin film crystal The source of the transistor is coupled to the data line, the drain of the first thin film transistor is coupled to the main pixel; the gate of the second thin film transistor
- half of the charge sharing sheet is disposed at the end of the sub-pixel, and the other half of the charge sharing sheet extends to the end of the adjacent sub-pixel.
- 1/5 of the charge sharing sheet is spaced apart at the end of the sub-pixel, and 4/5 of the charge sharing sheet is extended to the adjacent sub-pixel end.
- the lower common electrode is provided with an extension portion, and the data line and the source of the first thin film transistor are electrically connected by a connection line, and the connection line is spaced apart from the extension portion.
- extension portions are overlapped above the connecting line.
- extension portions are overlapped below the connecting line.
- another technical solution adopted by the present invention is to provide a liquid crystal display device including the above liquid crystal display panel.
- the liquid crystal display device provided by the present invention and the sub-pixels in the liquid crystal display panel are disposed on the insulating layer and spaced apart from the charge sharing sheet, and the charge sharing sheet is electrically connected to the third thin film transistor through the via hole. And extending to the adjacent sub-pixel end, and the charge sharing sheet forms a charge sharing capacitor with the lower common electrode under the adjacent sub-pixel, and the drain of the third thin film transistor is coupled to the charge sharing capacitor so that the adjacent When the sub-pixel and the charge-sharing capacitor are short, the adjacent two pixel units display a solid color picture, which makes the detection method simple and effective, and improves the yield.
- 1a is a top view of a pixel structure of a VA type liquid crystal display panel
- 1b is a partial equivalent circuit diagram of a VA type liquid crystal display panel
- Figure 1c is a partial front view showing a structure of a VA type liquid crystal display panel
- FIG. 2 is a top plan view showing a pixel structure of a liquid crystal display panel of the present invention
- FIG. 3 is an equivalent circuit diagram of a pixel structure of a liquid crystal display panel of the present invention.
- Figure 4 is a front elevational view of the liquid crystal display panel of the present invention.
- FIG. 5 is a flow chart of a method of fabricating a liquid crystal display panel of the present invention.
- Fig. 6 is a flow chart showing a method of darkening the liquid crystal display panel of the present invention.
- FIG. 2 is a front view of a liquid crystal display panel of the present invention
- FIG. 3 is a top view of the liquid crystal display panel of the present invention
- FIG. 4 is a pixel unit of the liquid crystal display panel of the present invention.
- the equivalent circuit diagram of FIG. 5 is an equivalent circuit diagram of two adjacent sub-pixels of the liquid crystal display panel of the present invention.
- the liquid crystal display panel of the present invention includes an upper substrate (not shown), a lower substrate 10, and a liquid crystal layer (not shown), and the liquid crystal layer is disposed between the upper substrate and the lower substrate.
- the upper substrate of the present invention is provided with an upper common electrode (not shown), and the lower substrate 10 is disposed opposite to the upper substrate.
- the lower substrate 10 is provided with a plurality of data lines 21, a plurality of charging scan lines 22, and a plurality of
- the pixel unit 23 is provided at intervals, the plurality of charge sharing scanning lines 24, and the plurality of lower common electrodes 25.
- Each of the pixel units 23 includes a first thin film transistor 231, a second thin film transistor 232, a third thin film transistor 233, a main pixel 234, and a sub-pixel 235 spaced apart from the main pixel 234, and are disposed on the plurality of lower substrates 10, respectively.
- a gate of the first thin film transistor 231 is coupled to the charge scan line 22, and a source of the first thin film transistor 231 is coupled to the data line 21, first
- the drain of the thin film transistor 231 is coupled to the main pixel 234; the gate of the second thin film transistor 232 is coupled to the charge scan line 22, the source of the second thin film transistor 232 is coupled to the data line 21, and the second thin film transistor 232 is coupled.
- the drain is coupled to the sub-pixel 235; the gate of the third thin film transistor 233 is coupled to the charge-sharing scan line 24, and the source of the third thin-film transistor 233 is coupled to the drain of the second thin film transistor 232, wherein A first storage capacitor (C st1 ) 241 is formed between the main pixel 234 and the upper common electrode, and a first liquid crystal capacitor 251 (C 1c1 ) is formed between the main pixel 234 and the lower common electrode 25, and between the sub-pixel 235 and the upper common electrode. forming the second storage capacitor 242 (C st2), 235 is formed between the pixel and the common electrode 25 of the second liquid crystal capacitor 252 (C 1c2).
- the lower substrate 10 further includes an insulating layer 40 between the lower common electrode 25 and the charge sharing sheet 236.
- the sub-pixel 235 is disposed on the insulating layer 40 and spaced apart from the charge sharing sheet 236.
- the shared chip 236 is electrically connected to the third thin film transistor 233 through the via 41 and extends toward the end of the adjacent sub-pixel 235', and the charge sharing sheet 236 forms a charge sharing with the lower common electrode 25 under the adjacent sub-pixel 235'.
- the capacitor 237 (C st3 ), the drain of the third thin film transistor 233 is coupled to the charge sharing capacitor 237 (C st3 ) such that when the adjacent sub-pixel 235 ′ is short-circuited with the charge sharing capacitor 237 (C st3 ), the phase
- the adjacent two pixel units 23 display a solid color picture, the short circuit equivalent circuit diagram is as shown in FIG. 5, and the short circuit line is a broken line 11.
- One half of the charge sharing sheet 236 of the present invention is disposed at the end of the sub-pixel 235, and the other half of the charge sharing sheet 236 extends to the end of the adjacent sub-pixel 235', or may be 1/3 of the charge sharing sheet 236.
- the partial spacing is disposed at the end of the sub-pixel 235, and the 2/3 portion of the charge sharing sheet 236 extends to the end of the adjacent sub-pixel 235', and the 1/5 portion of the charge sharing sheet 236 may be spaced apart from the sub-pixel.
- the 4/5 portion of the charge sharing plate 236 extends to the end of the adjacent sub-pixel 235'.
- the lower common electrode 25 is provided with an extension portion 131, and the data line 21 and the source of the first thin film transistor 231 are electrically connected through the extension portion 131.
- the extending portion 131 is spaced apart from the connecting line 132 , and the extending portion 131 is overlapped above or below the data line 21 .
- the extending portion 131 extends from the lower common electrode 25 toward the source of the first thin film transistor 231 , and The end is adjacent to the source of the thin film transistor 231, and is disposed above or below the connection line 132 of the data line 21 and the source of the first thin film transistor 231, and the connection line 132 and the extension 131 are insulated from each other, so that In the dark spotting operation, the data line 21 and the connection line 132 of the source of the first thin film transistor 231 are segmented (the figure indicates that the circuit is broken during the dark dot operation), and the extension portion 131 is replaced by a laser.
- connection line 132 of the source of the first thin film transistor 231 is turned on (reference numeral 16 in the figure indicates that the two lines are turned on by the laser), so that the voltage of the main pixel 234 is equal to the voltage of the lower common electrode 25 and further to the upper common electrode.
- the voltages are equal, thus making The liquid crystal molecules corresponding to the deflection of the light guide does not occur in The dark point operation is completed, the operation is simple, the dark point operation is difficult, the problem of broken spots caused by dark spots is avoided, and the product repair rate and yield are improved.
- the present invention also provides a liquid crystal display device comprising the above liquid crystal display panel.
- the liquid crystal display device and the sub-pixel 235 in the liquid crystal display panel of the present invention are disposed on the insulating layer 40 and spaced apart from the charge sharing sheet 236, and the charge sharing sheet 236 is electrically connected to the third thin film transistor 233 through the via 41. Extending to the end of the adjacent sub-pixel 235', and the charge sharing sheet 236 forms a charge sharing capacitor 237 with the lower common electrode 25 under the adjacent sub-pixel 235', and the drain of the third thin film transistor 233 is coupled to the charge sharing The capacitor 237 is such that when the adjacent sub-pixel 235' and the charge sharing capacitor 237 are short, the adjacent two pixel units 23 display a solid color picture, making the detection method simple and effective, and improving the yield.
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- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
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- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
一种液晶显示装置及其液晶显示面板,其包括上基板、下基板(10)以及液晶层,下基板(10)还包括层叠下共电极(25)与电荷共享片(236)之间的绝缘层(40),次像素(235)设于绝缘层(40)上并与电荷共享片(236)间隔设置,电荷共享片(236)通过过孔(41)与第三薄膜晶体管(233)电连接并向相邻的次像素(235')端部延伸,并且电荷共享片(236)与相邻的次像素(235')下的下共电极(25)形成电荷共享电容(237),第三薄膜晶体管(233)的漏极耦接到电荷共享电容(237),以使得在相邻的次像素(235')与电荷共享电容(237)短路时,相邻的两个像素单元(23)显示纯色画面,使得产品的检测方法简单且有效,提高良品率。
Description
本发明涉显示技术领域,特别是涉及一种液晶显示装置及其液晶显示面板。
为了改善垂直取向型(VA型)液晶显示面板在大视角出现的色偏现象,会采用Charge Sharing(电荷分配)的像素设计,即像素分为主像素(Main Pixel)和次像素(Sub Pixel)两个区域。在正常显示时,充电扫描线(Charge Gate)打开,同时电荷共享扫描线(Share Gate)关闭,主像素和像素电极充电到相同电位;随后充电扫描线(Charge Gate)关闭,同时电荷共享扫描线(Share Gate)打开,由于电荷共享电容(Cst3)的作用使得Sub Pixel的电位低于Main Pixel的电位。不同的电位使得两个显示区域的液晶分子转向分布不同,从而具备改善大视角色偏的作用。
在实际产品中,可采用如图1a、1b所示的像素结构,电荷共享电容(Cst3)由ITO(Indium tin oxide,氧化铟锡)层2、金属层3以及两层之间的绝缘层4构成,其中ITO层2通过过孔5(VIA)与电荷共享TFT(T3)6相连接,金属层3为像素共电极(Com)。
如图1c的像素电路的等效电路图,实际生产中可能会出现ITO层残留问题,使得Cst3的ITO层2与次像素电极7连接(如图1b中的短路连接线1)形成短路,导致Charge Sharing功能失效。同样灰阶下存在短路问题的像素单元的次像素会比其他像素单元的次像素更亮,在面板上呈现微亮点现象。厂内通常采用的检测方式是将所有的扫描线同时打开(或分奇偶打开),并给所有像素充电,使得主像素和次像素都处于同样电位,在这种检测方式下即使出现上述ITO层与次像素电极7间短路的现象也无法有效检出,导致良率下降,产品成本增加。
【发明内容】
本发明提供一种液晶显示装置及其液晶显示面板,以解决现有技术中ITO层与次像素间短路的现象无法有效检出,导致良率下降,产品成本增加的技术问题。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种液晶显示面板,其包括上基板、下基板以及液晶层,上基板设有上共电极;下基板与上基板相对设置,设有数条数据线、数条充电扫描线、数个间隔设置的像素单元、数条电荷共享扫描线、数条下共电极;液晶层设于上基板和下基板之间;每一像素单元包含分别设于数条下基板上的第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、主像素、与主像素间隔设置的次像素以及设于主像素与次像素之间的电荷共享片;第一薄膜晶体管的栅极耦接到充电扫描线,第一薄膜晶体管的源极则耦接至数据线,第一薄膜晶体管的漏极耦接到主像素;第二薄膜晶体管的栅极耦接到充电扫描线,第二薄膜晶体管的源极则耦接至数据线,第二薄膜晶体管的漏极耦接到次像素;第三薄膜晶体管的栅极耦接到电荷共享扫描线,第三薄膜晶体管的源极则耦接至第二薄膜晶体管的漏极;其中,下基板还包括层叠下共电极与电荷共享片之间的绝缘层,次像素设于绝缘层上并与电荷共享片间隔设置,电荷共享片通过过孔与第三薄膜晶体管电连接并向相邻的次像素端部延伸,并且电荷共享片与相邻的次像素下的下共电极形成电荷共享电容,第三薄膜晶体管的漏极耦接到电荷共享电容,以使得在相邻的次像素与电荷共享电容短时,相邻的两个像素单元显示纯色画面;下共电极设有延伸部,数据线和第一薄膜电晶体管的源极通过连接线电连接,连接线与延伸部间隔交迭。
其中,电荷共享片中的一半间隔设于次像素端部,电荷共享片中的另一半延伸至相邻的次像素端部。
其中,电荷共享片中的1/5部分间隔设于次像素端部,电荷共享片中的4/5部分延伸至相邻的次像素端部。
其中,延伸部间隔交迭于连接线的上方。
其中,延伸部间隔交迭于连接线的下方。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种液晶显示面板,其包括上基板、下基板以及液晶层,上基板设有上共电极;下基板与上基板相对设置,设有数条数据线、数条充电扫描线、数个间隔设置的像素单元、数条电荷共享扫描线、数条下共电极;液晶层设于上基板和下基板之间;每一像素单元包含分别设于数条下基板上的第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、主像素、与主像素间隔设置的次像素以及设于主像素与次像素之间的电荷共享片;第一薄膜晶体管的栅极耦接到充电扫描线,第一薄膜晶体
管的源极则耦接至数据线,第一薄膜晶体管的漏极耦接到主像素;第二薄膜晶体管的栅极耦接到充电扫描线,第二薄膜晶体管的源极则耦接至数据线,第二薄膜晶体管的漏极耦接到次像素;第三薄膜晶体管的栅极耦接到电荷共享扫描线,第三薄膜晶体管的源极则耦接至第二薄膜晶体管的漏极;其中,下基板还包括层叠下共电极与电荷共享片之间的绝缘层,次像素设于绝缘层上并与电荷共享片间隔设置,电荷共享片通过过孔与第三薄膜晶体管电连接并向相邻的次像素端部延伸,并且电荷共享片与相邻的次像素下的下共电极形成电荷共享电容,第三薄膜晶体管的漏极耦接到电荷共享电容,以使得在相邻的次像素与电荷共享电容短时,相邻的两个像素单元显示纯色画面。
其中,电荷共享片中的一半间隔设于次像素端部,电荷共享片中的另一半延伸至相邻的次像素端部。
其中,电荷共享片中的1/5部分间隔设于次像素端部,电荷共享片中的4/5部分延伸至相邻的次像素端部。
其中,下共电极设有延伸部,数据线和第一薄膜电晶体管的源极通过连接线电连接,连接线与延伸部间隔交迭。
其中,延伸部间隔交迭于连接线的上方。
其中,延伸部间隔交迭于连接线的下方。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种液晶显示装置,其包括上述的液晶显示面板。
与现有技术相比,本发明所提供的液晶显示装置及其液晶显示面板中的次像素设于绝缘层上并与电荷共享片间隔设置,电荷共享片通过过孔与第三薄膜晶体管电连接并向相邻的次像素端部延伸,并且电荷共享片与相邻的次像素下的下共电极形成电荷共享电容,第三薄膜晶体管的漏极耦接到电荷共享电容,以使得在相邻的次像素与电荷共享电容短时,相邻的两个像素单元显示纯色画面,使得检测方法简单且有效,提高良品率。
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,
还可以根据这些附图获得其他的附图,其中:
图1a是VA型液晶显示面板像素结构俯视图;
图1b是VA型液晶显示面板的部分等效电路图;
图1c是VA型液晶显示面板的部分结构主视图;
图2是本发明液晶显示面板像素结构的俯视图;
图3是本发明液晶显示面板的像素结构的等效电路图;
图4是本发明液晶显示面板的主视图;
图5是本发明液晶显示面板的制作方法的流程图;
图6是本发明的液晶显示面板暗点化作业方法流程图。
下面将结合附图和实施方式对本发明进行详细说明。
请一并参阅图2-图5,图2是本发明液晶显示面板的部分结构的主视图,图3是图2的本发明液晶显示面板的俯视图,图4是本发明液晶显示面板的像素单元的等效电路图,图5是本发明液晶显示面板的相邻两个次像素的等效电路图。
本发明的液晶显示面板包括上基板(图未示)、下基板10以及液晶层(图未示),液晶层设于上基板和下基板之间。
如图4所示,本发明的上基板设有上共电极(图未示),下基板10与上基板相对设置,下基板10设有数条数据线21、数条充电扫描线22、数个间隔设置的像素单元23、数条电荷共享扫描线24、数条下共电极25。每一像素单元23包含分别设于数条下基板10上的第一薄膜晶体管231、第二薄膜晶体管232、第三薄膜晶体管233、主像素234、与主像素234间隔设置的次像素235以及设于主像素234与次像素235之间的电荷共享片236;第一薄膜晶体管231的栅极耦接到充电扫描线22,第一薄膜晶体管231的源极则耦接至数据线21,第一薄膜晶体管231的漏极耦接到主像素234;第二薄膜晶体管232的栅极耦接到充电扫描线22,第二薄膜晶体管232的源极则耦接至数据线21,第二薄膜晶体管232的漏极耦接到次像素235;第三薄膜晶体管233的栅极耦接到电荷共享扫描线24,第三薄膜晶体管233的源极则耦接至第二薄膜晶体管232的漏极,其中,
主像素234与上共电极之间形成第一储存电容(Cst1)241,主像素234与下共电极25之间形成第一液晶电容251(C1c1),次像素235与上共电极之间形成第二储存电容242(Cst2),次像素235与下共电极25之间形成第二液晶电容252(C1c2)。
如图2和图3所示,下基板10还包括层叠下共电极25与电荷共享片236之间的绝缘层40,次像素235设于绝缘层40上并与电荷共享片236间隔设置,电荷共享片236通过过孔41与第三薄膜晶体管233电连接并向相邻的次像素235’端部延伸,并且电荷共享片236与相邻的次像素235’下的下共电极25形成电荷共享电容237(Cst3),第三薄膜晶体管233的漏极耦接到电荷共享电容237(Cst3),以使得在相邻的次像素235’与电荷共享电容237(Cst3)短路时,相邻的两个像素单元23显示纯色画面,该短路等效电路图如图5,短路线为虚线11。
本发明电荷共享片236中的一半间隔设于次像素235端部,电荷共享片236中的另一半延伸至相邻的次像素235’端部,也可以是电荷共享片236中的1/3部分间隔设于次像素235端部,电荷共享片236中的2/3部分延伸至相邻的次像素235’端部,还可以是电荷共享片236中的1/5部分间隔设于次像素235端部,电荷共享片236中的4/5部分延伸至相邻的次像素235’端部。
图6是本发明液晶显示面板主像素结构的俯视图,在其它实施例中,下共电极25设有延伸部131,数据线21和第一薄膜电晶体管231的源极通过延伸部131电连接,延伸部131与连接线132间隔交迭,延伸部131间隔交迭于数据线21的上方或下方,具体地,延伸部131自下共电极25向第一薄膜电晶体管231的源极延伸,且其末端邻近薄膜电晶体管231的源极,并设于数据线21与第一薄膜电晶体管231的源极的连接线132的上方或下方,且连接线132与延伸部131之间彼此绝缘,使得在暗点化作业时,将数据线21和第一薄膜晶体管231的源极的连接线132段开(图中打×表示在暗点化作业时电路断开),并用激光将延伸部131与第一薄膜晶体管231的源极的连接线132导通(图中标号16表示采用激光使两条线导通),使得主像素234的电压与下共电极25的电压相等并进一步与上共电极的电压相等,从而使得对应的液晶分子不发生偏转导光以
完成暗点化作业,操作简便,暗点化作业难度低,避免暗点化作业导致的碎亮点问题,提高产品修复率及良率。
本发明还提供一种液晶显示装置,其包括上述的液晶显示面板。
本发明所提供的液晶显示装置及其液晶显示面板中的次像素235设于绝缘层40上并与电荷共享片236间隔设置,电荷共享片236通过过孔41与第三薄膜晶体管233电连接并向相邻的次像素235’端部延伸,并且电荷共享片236与相邻的次像素235’下的下共电极25形成电荷共享电容237,第三薄膜晶体管233的漏极耦接到电荷共享电容237,以使得在相邻的次像素235’与电荷共享电容237短时,相邻的两个像素单元23显示纯色画面,使得检测方法简单且有效,提高良品率。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (12)
- 一种液晶显示面板,其中其中,所述液晶显示面板包括:上基板,设有上共电极;下基板,与所述上基板相对设置,设有数条数据线、数条充电扫描线、数个间隔设置的像素单元、数条电荷共享扫描线、数条下共电极;液晶层,设于所述上基板和所述下基板之间;每一像素单元包含分别设于所述数条下基板上的第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、主像素、与主像素间隔设置的次像素以及设于所述主像素与所述次像素之间的电荷共享片;所述第一薄膜晶体管的栅极耦接到所述充电扫描线,所述第一薄膜晶体管的源极则耦接至所述数据线,所述第一薄膜晶体管的漏极耦接到所述主像素;所述第二薄膜晶体管的栅极耦接到所述充电扫描线,所述第二薄膜晶体管的源极则耦接至所述数据线,所述第二薄膜晶体管的漏极耦接到所述次像素;所述第三薄膜晶体管的栅极耦接到所述电荷共享扫描线,所述第三薄膜晶体管的源极则耦接至所述第二薄膜晶体管的漏极;其中,所述下基板还包括层叠所述下共电极与所述电荷共享片之间的绝缘层,所述次像素设于所述绝缘层上并与所述电荷共享片间隔设置,所述电荷共享片通过过孔与所述第三薄膜晶体管电连接并向相邻的次像素端部延伸,并且所述电荷共享片与所述相邻的次像素下的下共电极形成电荷共享电容,所述第三薄膜晶体管的漏极耦接到所述电荷共享电容,以使得在所述相邻的次像素与所述电荷共享电容短时,相邻的两个像素单元显示纯色画面;所述下共电极设有延伸部,所述数据线和所述第一薄膜电晶体管的源极通过连接线电连接,所述连接线与所述延伸部间隔交迭。
- 根据权利要求1所述的液晶显示面板,其中其中,所述电荷共享片中的一半间隔设于所述次像素端部,所述电荷共享片中的另一半延伸至所述相邻的次像素端部。
- 根据权利要求1所述的液晶显示面板,其中其中,所述电荷共享片中的1/5部分间隔设于所述次像素端部,所述电荷共享片中的4/5部分延伸至所述相邻的次像素端部。
- 根据权利要求2所述的液晶显示面板,其中,所述延伸部间隔交迭于所 述连接线的上方。
- 根据权利要求2所述的液晶显示面板,其中,所述延伸部间隔交迭于所述连接线的下方。
- 一种液晶显示面板,其中,所述液晶显示面板包括:上基板,设有上共电极;下基板,与所述上基板相对设置,设有数条数据线、数条充电扫描线、数个间隔设置的像素单元、数条电荷共享扫描线、数条下共电极;液晶层,设于所述上基板和所述下基板之间;每一像素单元包含分别设于所述数条下基板上的第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、主像素、与主像素间隔设置的次像素以及设于所述主像素与所述次像素之间的电荷共享片;所述第一薄膜晶体管的栅极耦接到所述充电扫描线,所述第一薄膜晶体管的源极则耦接至所述数据线,所述第一薄膜晶体管的漏极耦接到所述主像素;所述第二薄膜晶体管的栅极耦接到所述充电扫描线,所述第二薄膜晶体管的源极则耦接至所述数据线,所述第二薄膜晶体管的漏极耦接到所述次像素;所述第三薄膜晶体管的栅极耦接到所述电荷共享扫描线,所述第三薄膜晶体管的源极则耦接至所述第二薄膜晶体管的漏极;其中,所述下基板还包括层叠所述下共电极与所述电荷共享片之间的绝缘层,所述次像素设于所述绝缘层上并与所述电荷共享片间隔设置,所述电荷共享片通过过孔与所述第三薄膜晶体管电连接并向相邻的次像素端部延伸,并且所述电荷共享片与所述相邻的次像素下的下共电极形成电荷共享电容,所述第三薄膜晶体管的漏极耦接到所述电荷共享电容,以使得在所述相邻的次像素与所述电荷共享电容短时,相邻的两个像素单元显示纯色画面。
- 根据权利要求6所述的液晶显示面板,其中,所述电荷共享片中的一半间隔设于所述次像素端部,所述电荷共享片中的另一半延伸至所述相邻的次像素端部。
- 根据权利要求6所述的液晶显示面板,其中,所述电荷共享片中的1/5部分间隔设于所述次像素端部,所述电荷共享片中的4/5部分延伸至所述相邻的次像素端部。
- 根据权利要求6所述的液晶显示面板,其中,所述下共电极设有延伸部,所述数据线和所述第一薄膜电晶体管的源极通过连接线电连接,所述连接线与 所述延伸部间隔交迭。
- 根据权利要求9所述的液晶显示面板,其中,所述延伸部间隔交迭于所述连接线的上方。
- 根据权利要求9所述的液晶显示面板,其中,所述延伸部间隔交迭于所述连接线的下方。
- 一种液晶显示装置,其中,所述液晶显示装置包括权利要求11所述的液晶显示面板。
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