CN104460152B - 阵列基板及显示装置 - Google Patents

阵列基板及显示装置 Download PDF

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CN104460152B
CN104460152B CN201410752841.8A CN201410752841A CN104460152B CN 104460152 B CN104460152 B CN 104460152B CN 201410752841 A CN201410752841 A CN 201410752841A CN 104460152 B CN104460152 B CN 104460152B
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CN104460152A (zh
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王醉
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明公开了一种阵列基板及显示装置，属于显示技术领域，解决了现有技术对于透明电极短路，不能及时发现并修复的技术问题。该阵列基板包括若干个像素单元，每个所述像素单元包括主像素区域、次像素区域和分压电容；所述主像素区域设置有主像素电极，所述次像素区域设置有次像素电极，所述分压电容由公共端电极和分压端电极构成；所述主像素电极、所述次像素电极、所述公共端电极位于同一图层。本发明可用于VA型显示装置中。

Description

阵列基板及显示装置
技术领域
本发明涉及显示技术领域，具体地说，涉及一种阵列基板及显示装置。
背景技术
随着显示技术的发展，液晶显示器已经成为最为常见的显示装置。
垂直排列(Vertical Alignment，简称VA)型液晶显示器是一种常见的液晶显示器。目前，为了改善VA型液晶显示器的大视角色偏现象，会将每个像素单元分为主像素区域和次像素区域，再增设分压电容。如图1所示，主像素区域设置有主像素电极10，次像素区域设置有次像素电极20，分压电容由公共电极线30的一部分与分压电极40重叠形成。
在显示过程中，先将主像素电极10和次像素电极20充入相同的电位，然后利用分压电容对次像素电极20进行分压，使次像素电极20上的电位低于主像素电极10。这样会使次像素区域的亮度略低于主像素区域，同时主像素区域与次像素区域中液晶分子的偏转角度也不同，从而改善了VA型液晶显示器的大视角色偏现象。
现有技术中，分压电极40、主像素电极10、次像素电极20都位于透明电极层，在液晶显示器的生产过程中，经常会出现透明电极残留问题，使分压电极40与主像素电极10(或次像素电极20)发生短路。这会导致该像素单元中的分压电容的功能失效，则次像素区域的亮度总是与主像素区域的亮度相同，造成该像素单元呈现出亮点的不良现象。
现有的检测方式通常是将所有扫描线同时打开，给所有的像素单元充电，使每个像素单元的主像素区域和次像素区域的亮度都相等，而不能检测出透明电极短路的问题。因此，现有技术中，不能及时发现透明电极短路的问题，也不能针对透明电极短路的问题进行及时的修复。
发明内容
本发明的目的在于提供一种阵列基板及显示装置，以解决现有技术对于透明电极短路，不能及时发现并修复的技术问题。
本发明提供一种阵列基板，包括若干个像素单元，每个所述像素单元包括主像素区域、次像素区域和分压电容；
所述主像素区域设置有主像素电极，所述次像素区域设置有次像素电极，所述分压电容由公共端电极和分压端电极构成；
所述主像素电极、所述次像素电极、所述公共端电极位于同一图层。
进一步的是，所述公共端电极与所述分压端电极之间设置有绝缘层。
优选的是，每个像素单元对应设置有驱动扫描线、分压扫描线和数据线；
所述分压端电极与所述数据线位于同一图层。
进一步的是，每个所述像素单元中还设置有第一开关管、第二开关管和第三开关管；
所述第一开关管的栅极连接所述驱动扫描线，源极连接所述数据线，漏极连接所述主像素电极；
所述第二开关管的栅极连接所述驱动扫描线，源极连接所述数据线，漏极连接所述次像素电极；
所述第三开关管的栅极连接所述分压扫描线，源极连接所述次像素电极，漏极连接所述分压端电极。
优选的是，所述第三开关管的漏极和所述分压端电极为一体式结构。
优选的是，位于同一行的各个像素单元中的公共端电极连接成一整体的公共端电极线。
优选的是，所述公共端电极线与所述阵列基板的板边区域的公共电压总线连接。
进一步的是，各条公共端电极线通过连接线互相连接。
本发明还提供一种显示装置，包括彩膜基板和上述的阵列基板。
进一步的是，所述显示装置为垂直排列型显示装置。
本发明带来了以下有益效果：本发明提供的阵列基板中，像素单元的主像素电极、次像素电极及分压电容的公共端电极都位于同一图层。如果出现透明电极残留，会使公共端电极与主像素电极(或次像素电极)发生短路，则主像素电极(或次像素电极)上的电位总是等于公共电压，导致该像素单元呈现出暗点。
采用现有的检测方法进行检测时，该像素单元仍然会呈现出暗点，而且很容易检测出该暗点，所以能够及时发现并修复透明电极短路的问题，从而提高了产品的良品率。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要的附图做简单的介绍：
图1是现有的阵列基板中像素单元的示意图；
图2是本发明实施例提供的阵列基板中像素单元的示意图；
图3是本发明实施例提供的阵列基板中像素单元的电路图；
图4是本发明实施例提供的阵列基板的示意图；
图5是本发明另一实施例提供的阵列基板的示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
本发明实施例提供一种阵列基板，可应用于VA型液晶显示器中。该阵列基板包括若干个像素单元，每个像素单元包括主像素区域、次像素区域和分压电容。如图2所示，主像素区域设置有主像素电极1，次像素区域设置有次像素电极2。分压电容由公共端电极3和分压端电极4构成，且公共端电极3与分压端电极4之间设置有绝缘层(图中未示出)。主像素电极1、次像素电极2、公共端电极3位于同一图层，即均位于透明电极层。
如图3所示，本实施例中，每个像素单元对应设置有驱动扫描线Gate1、分压扫描线Gate2、数据线Data及公共电极线Com，每个像素单元中设置有第一开关管T1、第二开关管T2和第三开关管T3，T1、T2、T3均优选为薄膜晶体管(Thin Film Transistor，简称TFT)。
T1的栅极连接Gate1，源极连接Data，漏极连接主像素电极1。在主像素区域中，主像素电极1与Com之间形成主存储电容Cst1，主像素电极1与彩膜基板上的公共电极之间形成主液晶电容Clc1。
T2的栅极连接Gate1，源极连接Data，漏极连接次像素电极2。在次像素区域中，次像素电极2与Com之间形成次存储电容Cst2，次像素电极2与彩膜基板上的公共电极之间形成次液晶电容Clc2。
T3的栅极连接Gate2，源极连接次像素电极2，漏极连接分压端电极4。公共端电极3(与Com等电位)与分压端电极4之间形成分压电容Cst3。
在显示过程中，先打开Gate1，关闭Gate2，使T1和T2导通，T3关闭，同时由数据线通过T1和T2分别向主像素电极1和次像素电极2充电，使主像素电极1和次像素电极2具有相同的电位，Clc1、Cst1、Clc2和Cst2具有相等的电压。然后关闭Gate1，打开Gate2，使T1和T2关闭，T3导通，Cst3就会通过T3分掉次像素电极2的一部分电压，使次像素电极2的电位降低，使Clc2和Cst2的电压降低，而Clc1和Cst1的电压保持不变。此时，Clc2的电压低于Clc1的电压，所以次像素区域的亮度略低于主像素区域，且主像素区域与次像素区域中液晶分子的偏转角度也不同，从而改善了VA型液晶显示器的大视角色偏现象。
本发明实施例提供的阵列基板中，主像素电极1、次像素电极2及分压电容Cst3的公共端电极3都位于同一图层。如果出现透明电极残留，会使公共端电极3与主像素电极1(或次像素电极2)发生短路，则主像素电极1(或次像素电极2)上的电位总是等于公共电压，导致该像素单元呈现出暗点。
采用现有的检测方法进行检测时，该像素单元仍然会呈现出暗点，而且很容易检测出该暗点，所以能够及时发现并修复透明电极短路的问题，从而提高了产品的良品率。
本实施例中，分压端电极与数据线位于同一图层，因此分压端电极和数据线可以在同一次构图工艺中同时制成。因为T1、T2、T3的源极和漏极也都与数据线位于同一图层，所以作为一个优选方案，T3的漏极和分压端电极可以为一体式结构。
现有技术中，如图1所示，因为分压电容由公共电极线30的一部分与分压电极40重叠形成，所以分压电极40需要通过过孔50与T3的漏极连接。
相比于现有技术，本实施例中不需要为分压电容设置过孔，减少了像素单元内的过孔数量，从而增加了像素单元的开口率。
如图4所示，本实施例中，位于同一行的各个像素单元中的公共端电极连接成一整体的公共端电极线31，使同一行的各个像素单元中公共端电极的电位更为均匀、稳定。进一步的是，公共端电极线31可以与阵列基板的板边区域的公共电压总线5连接，从而更为方便的将公共电压输入至公共端电极线31。
图5是本发明提供的阵列基板的另一种实施方式。在同一行的各个像素单元中的公共端电极连接成一整体的公共端电极线31的基础上，还将各条公共端电极线31通过纵向的连接线32互相连接，连接线32可以设置在数据线的正上方。通过设置连接线32，将阵列基板上所有像素单元的公共端电极连接成一整体的网状结构，使所有的像素单元中公共端电极的电位更为均匀、稳定。
本发明实施例还提供一种显示装置，优选为VA型显示装置，具体可以是液晶电视、液晶显示器、手机、平板电脑等。该显示装置包括彩膜基板和上述本发明实施例提供的阵列基板。
本发明实施例提供的显示装置，与上述实施例提供的阵列基板具有相同的技术特征，所以也能解决相同的技术问题，达到相同的技术效果。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (8)

1.一种阵列基板，包括若干个像素单元，每个所述像素单元包括主像素区域、次像素区域和分压电容；
所述主像素区域设置有主像素电极，所述次像素区域设置有次像素电极，所述分压电容由公共端电极和分压端电极构成；
所述主像素电极、所述次像素电极、所述公共端电极位于同一图层，
其中，每个像素单元对应设置有驱动扫描线、分压扫描线和数据线；
所述分压端电极与所述数据线位于同一图层，
每个所述像素单元中还设置有第一开关管、第二开关管和第三开关管；
所述第一开关管的栅极连接所述驱动扫描线，源极连接所述数据线，漏极连接所述主像素电极；
所述第二开关管的栅极连接所述驱动扫描线，源极连接所述数据线，漏极连接所述次像素电极；
所述第三开关管的栅极连接所述分压扫描线，源极连接所述次像素电极，漏极连接所述分压端电极，
所述公共端电极的电位等于公共电压。
2.如权利要求1所述的阵列基板，其特征在于，所述公共端电极与所述分压端电极之间设置有绝缘层。
3.如权利要求1所述的阵列基板，其特征在于，所述第三开关管的漏极和所述分压端电极为一体式结构。
4.如权利要求1所述的阵列基板，其特征在于，位于同一行的各个像素单元中的公共端电极连接成一整体的公共端电极线。
5.如权利要求4所述的阵列基板，其特征在于，所述公共端电极线与所述阵列基板的板边区域的公共电压总线连接。
6.如权利要求4所述的阵列基板，其特征在于，各条公共端电极线通过连接线互相连接。
7.一种显示装置，包括彩膜基板和如权利要求1至6任一项所述的阵列基板。
8.如权利要求7所述的显示装置，其特征在于，所述显示装置为垂直排列型显示装置。
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