WO2016145936A1 - Cellule solaire à jonctions multiples retournée et son procédé de préparation - Google Patents

Cellule solaire à jonctions multiples retournée et son procédé de préparation Download PDF

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WO2016145936A1
WO2016145936A1 PCT/CN2016/070463 CN2016070463W WO2016145936A1 WO 2016145936 A1 WO2016145936 A1 WO 2016145936A1 CN 2016070463 W CN2016070463 W CN 2016070463W WO 2016145936 A1 WO2016145936 A1 WO 2016145936A1
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flip
solar cell
junction solar
junction
growth
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Chinese (zh)
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毕京锋
陈文浚
林桂江
李森林
刘冠洲
宋明辉
王笃祥
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天津三安光电有限公司
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    • C—CHEMISTRY; METALLURGY
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0735—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising only AIIIBV compound semiconductors, e.g. GaAs/AlGaAs or InP/GaInAs solar cells
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    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/078—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers including different types of potential barriers provided for in two or more of groups H01L31/062 - H01L31/075
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    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a lattice matched flip-chip multi-junction solar cell and a method of fabricating the same, and belongs to the field of semiconductor material technology.
  • CN201010193582.1 discloses a flip-chip growth method in which the length of the MR is lattice matched to the substrate GaAs. . 5 0&. ⁇ and 0-8 top cell, and then through the gradient buffer layer (InGaP, ⁇ or InGaAs) transition to InGaAs bottom cell and subsequent substrate stripping, new substrate bonding and other processes are gradually implemented to achieve the full structure of the entire battery .
  • the advantage of this technology is that it can effectively reduce the dislocation density, and the stripped substrate can be recycled, which reduces the cost.
  • the main technical difficulty is that the whole manufacturing process: overcome nm 0 3 Ga from the GaAs lattice constant of 0.5653 to In..
  • a GalnNAsSb quaternary nitrogen-based material that uses molecular beam epitaxy (MBE) growth and lattice matching of a GaAs substrate is disclosed in US Patent Publication No. 20110232730A1, which is incorporated herein by reference.
  • MBE molecular beam epitaxy
  • MOCVD metal organic chemical vapor deposition
  • the present invention discloses a lattice matched flip-chip multi-junction solar cell and a method of fabricating the same, which first adopts M
  • the OCVD device performs epitaxial growth of the wide bandgap cell, and then uses MBE to grow the epitaxial structure of the narrow bandgap subcell, thereby obtaining a high efficiency flip-chip multi-junction solar cell.
  • a specific technical solution of the present invention is: a method for fabricating a flip-chip multi-junction solar cell, comprising the steps of: (1) providing a growth substrate for epitaxial growth of a semiconductor material; (2) using the growth substrate Placed in a M OCVD apparatus, flip-grown the first epitaxial structure over the substrate by MOCVD, having a multi-junction cell stack; (3) transferring the above-described growth-completed structure to the MBE device, using the MBE method Forming a second epitaxial structure thereon, comprising at least one junction cell, forming a series flip-chip multi-junction solar cell; wherein the band gap of the first epitaxial structure is larger than the band gap of the second epitaxial structure.
  • a flip-chip multijunction solar cell obtained by the method is prepared, wherein a lattice constant of the first epitaxial structure matches a lattice constant of the second epitaxial structure.
  • the first epitaxial structure formed in the step (2) further includes a transfer isolation layer formed on a top surface thereof, and the transfer isolation layer is removed before the step (3) is performed. After cleaning, polishing to a directly epitaxial state (Epi-ready state), then immediately transfer the above structure to the MBE device for step (3).
  • a directly epitaxial state Eti-ready state
  • the step (2) includes the following sub-steps: forming an etch-off layer on the growth substrate; flip-chip growth with a wide band gap by MOCVD method over the etch-off layer a multi-junction cell stack for absorbing short-wavelength sunlight; forming a transfer isolation layer on the wide-bandgap multi-junction cell; after completing step (2), removing the transfer isolation layer by etching with a selective etching solution The surface is cleaned, polished to a directly epitaxial state (Epi-ready state), and then the above structure is immediately transferred to the MBE device for step (3).
  • the transfer isolation layer is used to perform external oxidation, vulcanization, organic pollution, impurity adsorption, and water vapor adsorption in the process of switching to different growth equipment (MBE equipment) after the first epitaxial growth, before performing the next epitaxy. It erodes away along with surface impurities, thereby protecting the underlying functional layer.
  • MBE equipment growth equipment
  • the growth temperature of the step (2) is higher than the growth temperature of the step (3).
  • the use of flip-chip growth avoids the effects of different substrate temperatures, forming a multi-junction solar cell raft, protecting the grown wide bandgap cell from high temperature damage.
  • the growth temperature of the MOCVD in the step (2) may be 620 to 700 ° C
  • the growth temperature of the MBE in the step (3) may be 5 00 ⁇ 600. C.
  • the method for fabricating the flip-chip multi-junction solar cell further includes the step (4): performing surface cleaning, polishing, and bonding the support substrate on the epitaxial structure of the formed flip-chip multi-junction solar cell, and removing The substrate is grown, and an electrode structure is fabricated to realize a flip-chip multi-junction solar cell.
  • the MBE method involves atomic or molecular beam strikes the substrate, and may not require too high a substrate temperature to grow at a relatively low temperature.
  • the M OCVD method uses the organic source cracking reaction chamber to deposit and grow. The substrate temperature needs to be cracked by the organic source, and then a chemical reaction occurs for deposition, so the substrate temperature is generally high.
  • the manufacturing method of the present invention combines the difference between the two growth methods, and uses MOCVD to grow a broadband gap cell, which has a large mass production capability, but the substrate temperature is relatively high, which is superior to the MBE-grown sub-battery, which is the overall battery structure.
  • the original intention of flip-chip epitaxy is such that high-efficiency multi-junction solar cells with high crystal quality can be obtained, while avoiding the effects of different substrate temperatures.
  • the growth of a partial sub-cell by MOCVD can reduce the epitaxial cost and increase the mass production capability.
  • the respective sub-cells obtained by the fabrication method of the present invention are all lattice-matched and have high crystal quality, so that the photoelectric conversion efficiency is high.
  • FIG. 1 is a flow chart of a method for preparing a flip-chip multi-junction solar cell according to an embodiment of the present invention.
  • FIG. 2 to FIG. 4 show various processes of a method for fabricating a flip-chip four-junction solar cell according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of the structure after epitaxially growing the first epitaxial structure by using the MOCVD method
  • FIG. 3 is a cross-sectional view after the second epitaxial structure is completed by the MBE method
  • FIG. 4 is a cross-sectional view after the completion of the chip process.
  • a flow chart of a flip-chip multi-junction solar cell includes steps S11-S31, wherein steps S11-S13 are used to grow a first epitaxial structure by MOCVD, and steps S21-S23 are employed.
  • the M BE method grows the second epitaxial structure, and step S31 forms a flip-chip multi-junction solar cell by using a chip process, as follows:
  • Step S11 epitaxially growing an etch-stop layer (ESL) and an ohmic contact layer in the MOCVD device;
  • Step S12 epitaxially growing a functional layer of the first epitaxial structure in the MOCVD device, which contains a multi-junction cell stack Layer for absorbing short-wavelength sunlight;
  • Step S13 epitaxially growing a transfer isolation layer in the MCVD device to perform external oxidation, vulcanization, organic pollution, impurity adsorption, and the like in the process of switching to different growth devices (MBE devices) after the first epitaxial growth. Water vapor adsorption, etc., is etched away together with surface impurities before the next epitaxy, thereby protecting the lower functional layer;
  • Step S21 taking the previously processed sample out of the MOCVD device, removing the transfer isolation layer, cleaning, polishing to an Epi-ready state, and transferring to the MBE device;
  • Step S22 epitaxially growing a functional layer of the second epitaxial structure in the MBE device, the method comprising at least a junction cell stack, and a band gap smaller than a band gap of the first epitaxial structure for absorbing long-wavelength sunlight;
  • Step S23 extending the raw ohmic contact layer outside the MBE device
  • Step S31 forming a flip-chip multi-junction solar cell by using a chip process, including bonding a support substrate, stripping a growth substrate, removing an etch stop layer, fabricating a metal electrode, and the like.
  • FIG. 3 shows an epitaxial structure of a flip-chip four-junction solar cell, and the bottom-up includes: a growth substrate 001, an etch stop layer 002, an ohmic contact layer 003, a GalnP first sub-cell 100, and GaAs.
  • the structure will be described in detail below in conjunction with its preparation method.
  • Step 1 Select a n-type GaAs substrate with a (111) crystal plane off angle of 9 as the growth substrate 001, the thickness is about 350 microns, and the impurity concentration is lxl0 18 cm -3 to 4xl0. Between 18 cm - 3 .
  • the substrate was placed in an MOCVD system, and an InGaP etch stop layer 002 and a GaAs ohmic contact layer 003 were sequentially grown on the substrate.
  • the thickness of the InGaP etch stop layer 002 is 100 nm, the impurity is about 1 ⁇ 10 18 cm -3 , and the thickness of the GaAs ohmic contact layer 003 is 200 nm, which is about 1 ⁇ 10 18 cm -3 .
  • the second step flipping the first sub-cell 100 over the GaAs ohmic contact layer 003, the band gap is
  • the thickness of the ⁇ +- ⁇ 1 ⁇ window layer 101 is 25 nm, and the impurity concentration is about 1 ⁇ 10 18 cm 3 ; the thickness of the n+-InGaP emission region 102 is 100 nm, and the impurity concentration is 2 ⁇ 10 18 cm 3 . ;
  • the thickness of the p+-InGaP base region 103 is preferably 900 nm, and the impurity concentration is 5 ⁇ 10 17 cm 3 .
  • the thickness of the p-type AlGalnP back field layer 104 is twice the thickness of the conventional back field layer, and may be 100 nm, and the impurity concentration is about lxl0 18 cm -3 .
  • the third step a heavily miscellaneous p++/n++-AlGaAs/GaInP tunneling junction 501 is grown over the first subcell 100, having a thickness of 50 nm and a bulk concentration of up to 2x10 3 ⁇ 4 m -3 .
  • the fourth step flip-chip growth of the GaAs second sub-cell 200 with a band gap of 1.42 eV above the tunneling junction 401, specifically including: a window layer 201, an emitter region 202, a base region 203, and a back field layer 204.
  • the thickness of the ⁇ +- ⁇ 1 ⁇ window layer 201 is 50 nm, which is twice the thickness of the conventional window layer, and the gradual change is from the high to the low of the tunnel junction interface, and the concentration variation range is l ⁇ 5xl0 18 cm -3 or so;
  • the thickness of the n+ -GaA S emitter region 202 is 150 nm, the impurity concentration is 2x10 18 cm -3 ;
  • the thickness of the P+-GaAs base region 203 is preferably 3200 nm, and the impurity concentration is 5x10 17 cm - 3 ;
  • the thickness of the p-type AlGaAs back field layer 204 is 100 nm, which is twice the thickness of the conventional back-field layer, and the gradual change is from high to low from the tunnel junction interface.
  • Step 5 A heavily miscellaneous p++/n++-GaA S tunneling junction 502 is grown over the second subcell with a thickness of 50 nm and a bulk concentration of up to 2 ⁇ 10 19 cm ⁇ 3 .
  • the sixth step forming the transfer isolation layer 005 over the tunnel junction 502, so that the first epitaxial structure is completed in the MOCVD apparatus, and its structural diagram is as shown in FIG.
  • the transfer isolation layer 005 is mainly used to perform external oxidation, vulcanization, organic pollution, impurity adsorption, water vapor adsorption and the like in the process of switching to different growth equipment (MBE equipment) after the first epitaxial growth, in the next time It is etched away along with surface impurities prior to epitaxy to protect the underlying functional layer.
  • the transfer isolation layer 005 is made of n+-GaInP, and has a thickness of 5 nm and a habit of about 5 ⁇ 10 18 cm -3 .
  • Step 7 Transfer the above-mentioned growth-completed structure to the MBE apparatus, etch away the transfer spacer GaInP 005 with the selective solution before transfer, and clean and polish the surface until it can be directly used for the epi-ready state.
  • the eighth step flip-growing the third sub-battery 300 on the polished surface with a band gap of about 0.9 ⁇ leV, specifically including: a window layer 301, an emitter region 302, a base region 303, and a back field layer 304. .
  • the thickness of the n +-GaInP window layer 301 is 25 nm, and the impurity concentration is about 1 ⁇ 10 18 cm 3 ; the thickness of the n+-GaInNAsSb emitter region 302 is 250 nm, and the impurity concentration is 2 ⁇ 10 18 cm ⁇ 3 ;
  • the thickness of the P+-GaInNAsSb base region 303 is preferably 3000 nm, the impurity concentration is 5 ⁇ 10 17 cm -3 ; the thickness of the p-type GalnP back field layer 304 is 50 nm, and the impurity concentration is about 1 ⁇ 10 18 cm 3 .
  • Step 9 Epitaxially growing a heavily miscible p++/n++-GaA S tunneling junction 503 over the third subcell, the thickness of which is 50 nm, and the impurity concentration is as high as 2x10 3 ⁇ 4 m -3 .
  • the tenth step flipping the fourth sub-battery 400 at the tunneling junction 503, and thus completing the epitaxial growth of the flip-chip four-junction solar cell, the structure of which is shown in FIG.
  • the band gap of the fourth sub-battery 400 is about 0.6-0.7 eV, and specifically includes: a window layer 401, a base region 403 of the emitter region 402, and a back-field layer 404.
  • the thickness of the n+-GaInP window layer 401 is 25 nm, and the impurity concentration is about 1 ⁇ 10 18 cm 3 ; the thickness of the n+-GaInNAsSb emitter region 402 is 250 nm, and the impurity concentration is 2 ⁇ 10 3 ⁇ 4 m -3 ;
  • the thickness of the P+-GaInNAsSb base region 403 is preferably 3500 nm, and the impurity concentration is 5 ⁇ 10 17 cm ⁇ 3 ; the thickness of the p-type GalnP back field layer 404 is 50 nm, and the impurity concentration is about 1 ⁇ 10 18 cm ⁇ 3 .
  • Step 12 After the epitaxial growth of the battery is completed, performing a chip process, including bonding the support substrate 004, stripping the growth substrate 001, removing the etch stop layer 002, evaporating the anti-reflection film 600, and fabricating the front metal
  • the electrode 70 0 and the back metal electrode 800 complete the preparation of the flip-chip four-junction solar cell, and its structure is shown in FIG.
  • All of the sub-batteries obtained by the above manufacturing method have lattice matching and high crystal quality, so the photoelectric conversion efficiency is high, and high-temperature MOCVD epitaxial growth is performed first, followed by low-temperature MBE extension, and different linings are avoided. The effect of the bottom temperature.
  • Embodiment 1 differs from Embodiment 1 in that the fourth sub-battery 400 is a Ge battery in which the thickness of the n+-Ge emitter region is 250 nm, and the impurity concentration is 2 ⁇ 10 18 cm ⁇ 3 ; P+-Ge base region The preferred thickness is 2500 nm°

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Abstract

L'invention concerne une cellule solaire à jonctions multiples retournée et son procédé de préparation, lequel procédé comprend les étapes consistant à : (1) fournir un substrat de croissance pour la croissance épitaxiale d'un matériau semi-conducteur ; (2) mettre le substrat de croissance dans un équipement MOCVD, et faire croître de façon retournée une première structure d'épitaxie, qui comprend une couche stratifiée de sous-cellule à jonctions multiples, sur le substrat à l'aide d'un procédé MOCVD ; (3) transférer la structure développée dans un équipement d'épitaxie par faisceaux moléculaires, faire croître de façon retournée une seconde structure d'épitaxie, qui comprend au moins une sous-cellule à une jonction, sur la structure développée à l'aide d'un procédé d'épitaxie par faisceaux moléculaires, et former une cellule solaire à jonctions multiples retournée en série ; la bande interdite de la première structure d'épitaxie est supérieure à la bande interdite de la seconde structure d'épitaxie.
PCT/CN2016/070463 2015-03-16 2016-01-08 Cellule solaire à jonctions multiples retournée et son procédé de préparation WO2016145936A1 (fr)

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CN104659158A (zh) * 2015-03-16 2015-05-27 天津三安光电有限公司 倒装多结太阳能电池及其制作方法
CN105261659A (zh) * 2015-11-12 2016-01-20 天津三安光电有限公司 太阳能电池及其制备方法
CN105720126B (zh) * 2016-04-27 2017-07-28 天津三安光电有限公司 一种倒装四结太阳能电池结构及其制备方法
CN106252450B (zh) * 2016-09-05 2018-03-23 上海空间电源研究所 一种含有末端小失配子电池的多结太阳电池及其制备方法
CN110556445A (zh) * 2018-05-30 2019-12-10 东泰高科装备科技（北京）有限公司 一种叠层并联太阳能电池
DE102019006094B4 (de) * 2019-08-29 2021-04-22 Azur Space Solar Power Gmbh Zweistufiges Loch-Ätzverfahren

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