WO2013004188A1 - Cellule solaire, système et procédé de fabrication - Google Patents

Cellule solaire, système et procédé de fabrication Download PDF

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Publication number
WO2013004188A1
WO2013004188A1 PCT/CN2012/078233 CN2012078233W WO2013004188A1 WO 2013004188 A1 WO2013004188 A1 WO 2013004188A1 CN 2012078233 W CN2012078233 W CN 2012078233W WO 2013004188 A1 WO2013004188 A1 WO 2013004188A1
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Prior art keywords
layer
sub
cell
band gap
solar cell
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PCT/CN2012/078233
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English (en)
Chinese (zh)
Inventor
毕京锋
林桂江
吴志浩
宋明辉
洪灵愿
林素慧
熊伟平
梁兆暄
刘建庆
吴志强
林志东
方妍妍
王良均
余金中
丁杰
戴江南
陈长清
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厦门市三安光电科技有限公司
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Priority claimed from CN2011101896126A external-priority patent/CN102222734B/zh
Priority claimed from CN201110219051XA external-priority patent/CN102244134B/zh
Priority claimed from CN201110223521XA external-priority patent/CN102244151A/zh
Priority claimed from CN2011102345440A external-priority patent/CN102412337A/zh
Application filed by 厦门市三安光电科技有限公司 filed Critical 厦门市三安光电科技有限公司
Publication of WO2013004188A1 publication Critical patent/WO2013004188A1/fr
Priority to US14/147,498 priority Critical patent/US9318643B2/en
Priority to US14/147,596 priority patent/US20140116494A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687—Multiple junction or tandem solar cells
    • H01L31/06875—Multiple junction or tandem solar cells inverted grown metamorphic [IMM] multiple junction solar cells, e.g. III-V compounds inverted metamorphic multi-junction cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials

Definitions

  • the invention belongs to the field of solar cells, and in particular relates to a solar cell, a system, and a manufacturing method thereof.
  • the III-V compound semiconductor-based multi-junction solar cell which has the advantages of high temperature resistance, strong radiation resistance, good temperature characteristics, etc., and has become a price-insensitive space photovoltaic.
  • the mainstream technology of power supply In recent years, with the development of concentrating photovoltaic technology, ⁇ - ⁇ family semiconductor solar cells have attracted more and more attention due to their high photoelectric conversion efficiency.
  • the concentrating photovoltaic technology saves solar cell wafers on a large scale by concentrating a large area of sunlight, concentrating it, and irradiating it onto a relatively small solar photovoltaic cell to generate electricity.
  • the device utilizes a large-area, inexpensive concentrating device to replace expensive and tightly-charged battery chips, thereby achieving the goal of greatly reducing the cost of solar photovoltaic power generation, and enabling solar photovoltaic power generation to compete with conventional energy sources. Therefore, concentrating photovoltaic technology based on I I I-V compound semiconductor multi-junction solar cells has become a promising photovoltaic technology.
  • the InGaP/GaAs/Ge triple junction solar cell is a relatively mature and efficient II IV compound semiconductor multi-junction solar cell.
  • the cell constants of the sub-cells of this type of solar cell are basically matched, and the band gap width is from top to bottom.
  • InGaP is ⁇ 1.86eV
  • GaAs is ⁇ 1.42eV
  • Ge is ⁇ 0. 78eV
  • AMI. 5 conversion efficiency
  • Emcore The inverted structure GalnP/GaAs/InGaAs multi-junction solar cell invented by the company is also considered to be a promising battery structure.
  • the GalnP/GaAs/InGaAs multi-junction solar cell has an conversion efficiency of 32% in the case of AMO and lsun, and its conversion efficiency can also be achieved under high-concentration conditions (500 X, AMI.5). More than 40%.
  • the GalnP top cell absorbs sunlight having a photon energy greater than 1.83 eV, that is, a spectral short-wavelength region of the wavelength ⁇ ⁇ ⁇ leg;
  • the GaAs cell absorbs sunlight having a photon energy greater than 1.42 eV, that is, the wavelength ⁇ 2 ⁇ 873 The spectral mid-wave region of the leg;
  • the Ge bottom cell absorbs sunlight with a photon energy greater than 0.66 eV, ie a long-wavelength region in the spectrum of the wavelength ⁇ 3 ⁇ 1879 leg.
  • the compound semiconductor solar cell is generally epitaxially epitaxially grown on a substrate such as Ge, Si or GaAs by a vapor phase epitaxy technique or a liquid phase epitaxy technique, and then a solar cell chip is prepared by using an epitaxial wafer of a well-structured solar cell.
  • a method for achieving re-use of an inverted structure multi-junction solar cell substrate comprising the steps of: (1) providing a growth substrate; (2) depositing a layer of Si0 2 on the surface of the growth substrate. a mask layer, forming a patterned substrate; (3) epitaxially growing a sacrificial layer on the patterned substrate, the sacrificial layer enclosing the entire SiO 2 mask pattern; (4) epitaxial growth on the sacrificial layer a buffer layer; (5) epitaxially growing a semiconductor material layer sequence of the inverted solar cell on the buffer layer; (6) bonding the semiconductor material layer sequence of the inverted solar cell to the support substrate; (7) using wet etching selectivity
  • the Si0 2 mask layer is etched away; (8) The sacrificial layer is selectively etched away by wet etching, and the substrate is stripped.
  • the material of the growth substrate is Ge or GaAs.
  • the patterns of the SiO 2 mask layers formed in the step (2) are unidirectionally parallel, or crisscrossed, or intersect each other.
  • the material of the semiconductor sacrificial layer in the step (3) is InGaP or AlGaAs.
  • the support substrate in the step (6) is a Si wafer.
  • the step (6) comprises the steps of: depositing a first metal bonding layer on the surface of the semiconductor material layer of the inverted solar cell; providing a Si epitaxial wafer to form a high doping layer on the surface thereof ( In) a GaAs cap layer; depositing a second metal bonding layer on the cap layer; bonding the semiconductor material layer sequence of the inverted solar cell and the Si wafer together by a bonding process.
  • the SiO 2 mask layer is selectively etched with hydrofluoric acid.
  • the SiO 2 mask layer is selectively etched with ammonium fluoride.
  • the sacrificial layer is etched by using a ratio of hydrochloric acid to phosphoric acid of 1:2 as a selective etching solution.
  • SiO 2 is used as a mask layer, followed by selective etching of the SiO 2 mask layer by wet etching to cause a large number of voids in the sacrificial layer, and a selective etching solution for removing the sacrificial layer is added.
  • the contact area of the sacrificial layer increases the corrosion rate of the sacrificial layer and reduces the difficulty of substrate peeling.
  • the separation of the inverted structure multi-junction solar cell from the substrate can be completed more simply, and the substrate can be reused, thereby reducing the production cost of the solar cell.
  • a structure and method of fabricating a four junction solar cell is presented. Because the Ge-bottom battery of the three-junction solar cell absorbs a large amount of low-energy photons, the photocurrent generated is much larger than that of the top cell and the middle cell. For a laminated battery, the efficiency of each sub-battery is the highest when the currents are equal, and the current mismatch will bring a composite loss of current and reduce the efficiency.
  • the flip-grown GalnP/GaAs/InGaAs triple junction solar cell can effectively solve the problem of current matching, but its late process is complicated and the absorption of low energy photons is weakened. Therefore, one of the effective methods for solving this problem is to insert a sub-cell with a junction band gap of about 1. OeV between the middle battery and the bottom battery, so that the obtained four-junction solar cell has a more matching current than the three-junction battery. , and the increase in the number of knots can further subdivide the solar spectrum and increase efficiency.
  • a high efficiency four-junction solar cell includes: an InP growth substrate; a first subcell formed on a growth substrate having a first energy band gap and a lattice constant matching the substrate lattice a second sub-battery formed on the first sub-cell and having a second energy band gap larger than the first energy band gap, the lattice constant matching the substrate lattice; a third sub-cell formed in the first a second sub-cell having a third energy band gap larger than a second energy band gap, the lattice constant matching the substrate lattice; a composition gradient layer formed on the third sub-cell and having a third ratio a fourth energy band gap having a large band gap; a fourth sub-cell formed on the compositionally graded layer and having a fifth band gap larger than the third band gap, a lattice constant and a substrate crystal Mismatch.
  • a method of fabricating an efficient four-junction solar cell comprising: providing an InP growth substrate; forming a first subcell having a first energy band gap, crystal on the growth substrate a lattice constant matching the substrate; forming a second subcell on the first subcell having a second energy band gap greater than a first energy band gap, the lattice constant matching the substrate lattice; Forming, on the second sub-cell, a third sub-cell having a third energy band gap larger than a second energy band gap, wherein a lattice constant is lattice-matched with the substrate; forming a component on the third sub-cell a graded layer having a fourth band gap larger than a third band gap; forming a fourth subcell having a fifth band gap larger than the third band gap on the compositionally graded layer , the lattice constant is mismatched with the substrate lattice.
  • an InGaAs first subcell having a lattice matching of an InP substrate and a band gap of 0.72 to 0.76 eV is formed on the substrate; forming a lattice match with the InP substrate on the first subcell; a second sub-cell having a band gap of 0.9 - 1. 1 eV, and an InP third sub-cell having a band gap of 1.31 eV; AlSb z A Sl _ z is formed on the three sub-cells, and the layer distribution ratio of the layer is lattice-matched from the InP substrate, and the energy band gap is AlSb around 1.9 eV. . 44 As.
  • the four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A Sl _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm - 2 to minimize the efficiency loss of the sub-cell Chemical.
  • Some embodiments provide a method of fabricating another solar cell, comprising: providing a growth substrate; stacking a semiconductor material layer sequence on the growth substrate, which in turn comprises a ⁇ - ⁇ compound solar cell material layer, a contact layer And sacrificial layer; ⁇ completely etching the sacrificial layer by wet etching, etching stops on the surface of the contact layer, exposing the surface of the contact layer; depositing a first electrode on the surface of the contact layer, defining an electrode pattern, etching away the electrode a contact layer; a second electrode is fabricated.
  • Some embodiments provide a method for fabricating another high efficiency four-junction solar cell, comprising the steps of: providing a double-sided polished substrate for semiconductor epitaxial growth; forming a first sub-cell on the front side of the substrate, having a band gap; forming a gradation buffer layer over the first sub-cell having a second band gap greater than the first band gap; forming a second sub-cell above the gradation buffer layer; a third band gap of the gap; forming a third sub-cell on the back surface of the substrate, which is flip-chip growth, having a fourth band gap smaller than the first band gap; forming a first portion under the third sub-cell A four-cell battery, which is flip-chip grown, has a fifth band gap smaller than the fourth band gap; and a back contact layer is epitaxially formed under the fourth sub-cell.
  • the double-sided polished substrate is preferably a p- ⁇ n substrate.
  • the n-type ion-forming emitter region is implanted on the front side of the germanium-type substrate with the substrate itself as a base region to constitute the first sub-cell.
  • the double-sided polished substrate has a thickness of less than or equal to 200 microns.
  • the n-type ion-forming emitter region is implanted on the front side of the ⁇ -type substrate with the substrate itself as a base region to constitute the first sub-cell.
  • the graded buffer layer is a multilayer structure, the material of which is IG ai — x P.
  • the second band gap is 1.
  • the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 ⁇ 1. 8 eV; The e.g., the fifth band gap is 0. 6 - 0. 9 eV.
  • the second subcell is composed of a p-type InAlAs base region and an n-type InAsAs emitter region
  • the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region, wherein the The three subcells are composed of a p-type InGaAsP base region and an n-type InGaAsP
  • the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
  • an efficient four-junction solar cell comprising: a double-sided polished substrate; a first sub-cell formed by ion implantation of a substrate, having a first band gap; and a graded buffer layer formed on the first a second sub-cell having a second band gap greater than the first band gap; a second sub-cell formed above the graded buffer layer and having a third band gap greater than the second band gap; the third sub-battery, flip-chip growth
  • a fourth band gap having a smaller than the first band gap is formed on the back surface of the substrate; and the fourth sub-cell is flip-chip grown under the third sub-cell and has a fifth band gap smaller than the fourth band gap.
  • the double-sided polished substrate is a p-InP substrate. In some embodiments, the double-sided polished substrate has a thickness of less than or equal to 200 microns.
  • the graded buffer layer is a multilayer structure, the material of which is IG ai — x P.
  • the second band gap is 1. 8 ⁇ 2, the first band gap is 1. 3 - 1. 5 eV; the second band gap is 1. 5 - 1. 8 eV; The e.g., the fifth band gap is 0. 6 ⁇ 0. 9 eV.
  • the second subcell is composed of a P-type InAlAs base region and an n-type InAlAs emitter region;
  • the third subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP emitter region;
  • the subcell is composed of a p-type InGaAsP base region and an n-type InGaAsP;
  • the fourth subcell is composed of a p-type InGaAs base region and an n-type InGaAs emitter region.
  • sub-cells with different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order, which does not match the first subcell lattice.
  • a second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density;
  • third and fourth subcell growth lattice matching the first subcell below the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, and a high-efficiency four-junction solar cell with current matching and high lattice quality is formed.
  • 1 to 7 are schematic views showing a manufacturing process of an inverted solar cell according to a preferred embodiment of the present invention.
  • FIGS. 8-10 are top plan views of a SiO 2 mask pattern in various preferred embodiments of the present invention.
  • Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the associated binary material.
  • Figure 12 is a side cross-sectional view of a high efficiency four junction solar cell in accordance with a preferred embodiment of the present invention.
  • 13 to 14 are schematic views showing a conventional manufacturing process of the I I I-V solar cell.
  • FIG. 15 to FIG. 19 are schematic views showing a manufacturing process of a solar cell according to a preferred embodiment of the present invention.
  • Figure 20 is a schematic view showing the structure of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
  • 21 to 32 are schematic diagrams showing a manufacturing process of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention.
  • the reference numerals in the figure include: 100: patterned substrate; 101: growth substrate; 102: Si0 2 mask layer; 103: sacrificial layer; 104: pore; 200: GaAs buffer layer; 201: inverted solar cell semiconductor material layer sequence 300: support substrate; 301: p-type S i piece; 302: p-type GaAs cap layer; 303: first bonding metal layer; 304: second bonding metal layer; 2001: growing village bottom; 2100: first Subcell; 2101: first sub-battery backfield layer; 2102: first subcell base; 2103: first subcell emissive layer; 2104: first subcell window layer; 2200: second subcell; 2201: Two sub-battery back field layer; 2202: second sub-battery base; 2203: second sub-battery emission layer; 2204: second sub-battery window layer; 2300: third sub-battery; 2301: third sub-battery back-field layer 2302: third sub-batter
  • the cost of substrates in the photovoltaic industry usually accounts for 30-50% of the total cost of solar cells, which is one of the main factors for the high price of solar cells.
  • the conventional substrate stripping process is characterized by selective etching between a sacrificial layer and a buffer layer and a substrate under a specific etching liquid. In the etching process, the etching liquid selectively etches only the sacrificial layer without corroding.
  • the buffer layer and the substrate are used to achieve separation of the substrate from the battery.
  • a conventional substrate stripping process usually requires a certain degree of force on the battery structure, so that the contact area of the selective etching liquid and the sacrificial layer can be gradually increased during the etching process. Since the battery structural material is brittle, the applied force will cause a certain degree of damage to the battery structure, and thus it is difficult to apply on a large scale.
  • the photocurrent generated by the Ge bottom cell of the triple junction solar cell is much larger than that of the top cell and the middle cell.
  • the efficiency of each subcell is equal when the currents of the subcells are equal, and the current mismatch will cause a composite loss of current. , Reduce efficiency.
  • One of the main methods to solve this problem is to insert a junction between the middle cell and the bottom cell to match the Ge substrate and the GaAs material, and the band gap is about 1.
  • Patent application No. CN200910223615 discloses a four-junction solar cell in which a flip-chip structure is grown on a GaAs substrate, specifically using a GaAs or Ge substrate; forming a lattice match with the substrate on the substrate
  • the first sub-cell having a band gap of 1. 9 eV; a lattice matching of the substrate is formed on the first sub-cell, and the band gap is 1.35-1.
  • the cell gap is greater than the substrate, the band gap is 0. 9-1. 1 eV is formed on the first sub-cell.
  • Nearby InGaAs a third sub-cell; forming a second graded interlayer having a compositional gradation on the third sub-cell; forming a lattice constant on the second graded interlayer greater than the third sub-cell material, and having a band gap of 0. 6-0.
  • InGaAs fourth subcell near 8eV.
  • the four-junction solar cell structure requires a flip-chip growth method for subsequent device fabrication, which requires stripping of the substrate, which increases the difficulty of device fabrication and leads to lower yield.
  • the four-junction solar cell has two junctions. The cell's crystal lattice does not match the substrate, which inevitably introduces threading dislocations in the two junction cells, reducing the efficiency of the overall cell.
  • the use of two additional gradient layers also increases the growth time too much. , greatly increase production costs.
  • Some embodiments provide a method of fabricating an inverted solar cell, which mainly includes a patterned substrate forming process, a semiconductor material layer sequence forming process of an inverted solar cell, a supporting substrate bonding process, and a growth substrate stripping process. The details will be described below with reference to Figs. 1 to 7 .
  • a growth substrate 101 is selected, which may be a Ge substrate or a GaAs substrate. In the present embodiment, GaAs is selected as the growth substrate 101.
  • the S i0 2 mask layer 102 is formed on the growth substrate 101 to form a patterned substrate 100.
  • the specific process is as follows: using a PECVD deposited on the GaAs substrate 101 S i0 2 mask layer of a thickness of the legs 100 102, a semiconductor lithographic process to produce a photoresist mask pattern on the mask layer 102 S i0 2 Then, the S i0 2 mask layer is selectively etched away by wet etching, and hydrofluoric acid or ammonium fluoride or the like can be used as the etching solution.
  • hydrofluoric acid is selected as an etching solution, which is first selectively etched for 30 seconds, then rinsed with deionized water for 10 minutes, and finally subjected to a photoresist removal process to form a S i0 2 mask pattern on the GaAs substrate.
  • the S0O 2 mask is uniformly distributed on the surface of the growth substrate 101 to expose the surface of the partially grown substrate.
  • the pattern of the S i0 2 mask may be parallel in one direction, crisscrossed or crossed.
  • the S00 2 mask 102 is in a unidirectional parallel pattern
  • FIG. 9 shows the S i0 2 mask 102 in a crisscross pattern
  • FIG. 10 shows the S00 2 mask 102 intersecting each other. Graphics.
  • a sacrificial layer 103 is epitaxially grown on the patterned substrate 100.
  • Ga is selected. . 5 In. 5 P as the material of the sacrificial layer 103
  • the specific process is as follows: The patterned GaAs substrate 100 is cleaned and loaded into the M0CVD reaction chamber to control the reaction chamber pressure of 300 Torr, the epitaxial growth rate is 1 A/s, first at 750 ° Bake for 10 minutes at C, then cool down to 650 °C, and form a layer of Ga using a lateral epitaxial growth process. . 5 In. 5 P sacrificial layer 103 having a thickness of 150 nm. As shown in Figure 2, Ga. . 5 In. The 5 P sacrificial layer 103 surrounds the entire S i0 2 mask layer 102.
  • a buffer layer 200 is epitaxially formed on the sacrificial layer 103.
  • GaAs is selected as the material of the buffer layer 200, and the specific process thereof is as follows: The pressure of the M0CVD reaction chamber is adjusted to 30 Torr, and the molar flow ratio of the five-three-group reaction source is 40, in Ga. . 5 In. A GaAs buffer layer 200 is grown on the 5 P sacrificial layer 103.
  • a semiconductor material layer sequence of the inverted solar cell is epitaxially grown on the sacrificial layer 103.
  • the solar cell can be a single junction or a multi junction, and in this embodiment an inverted triple junction solar cell is selected. As shown in FIG.
  • Ga is epitaxially grown on the GaAs buffer layer 200 by a conventional M0CVD epitaxial process. . 5 In. . 5 P/GaAs /Ga. . 7 In. 3 As inverted semiconductor material layer sequence 201 of a triple junction solar cell.
  • a support substrate 300 for supporting the semiconductor material layer of the solar cell is prepared.
  • the support 300 may select a material having better heat dissipation, such as a Si sheet or a ceramic substrate.
  • the p-type Si wafer 301 is selected as a supporting substrate, and a highly doped P-type GaAs cap layer 302 is epitaxially formed on the surface thereof by M0CVD.
  • the p-type GaAs cap layer 302 has a doping concentration of 1 X l O'Vcm 3 and a surface roughness of 3 nm.
  • the semiconductor material layer sequence of the inverted solar cell is bonded to the support substrate.
  • a metal bonding layer is respectively formed on the surface of the semiconductor material layer sequence 201 of the inverted solar cell and the surface of the p-type GaAs cap layer 302.
  • the semiconductor material layer sequence of the supporting substrate 300 and the inverted solar cell is performed by a bonding process.
  • 201 is bonded together.
  • the material of the bonding layer is a conductive material and can be selected from materials such as gold, gold-tin alloy, and indium. In the present embodiment, gold is selected as the bonding layer.
  • the specific process is as follows: Using a metal evaporation process, first in Ga. . 5 In. . 5 P /GaAs /Ga.
  • a S inverted triple junction solar cell semiconductor material layer sequence 201 surface evaporation of a layer of 400 leg thick Au as the first metal bonding layer 303; then a layer of 400 legs thick on the surface of the P-type GaAs cap layer 302 Au is used as the second metal bonding layer 304; finally, the substrate 300 and Ga are supported by the Au-Au bonding process. . 5 In. . 5 P/GaA S /Ga. . 7 In.
  • the 3 As inverted triple junction solar cell semiconductor material layer sequence 201 is bonded together. As shown in FIG. 5, a side cross-sectional view of the solar cell after the bonding process is completed.
  • the patterned growth substrate 100 is stripped, which includes removing the S00 2 mask layer 102 and the sacrificial layer 103. ⁇ selectively etching the S i0 2 mask layer 102 and the sacrificial layer 103 by a wet etching process, wherein the etching solution of the S i0 2 mask layer 102 may use hydrofluoric acid or ammonium fluoride, etc., the etching solution of the sacrificial layer 103 Concentrated hydrochloric acid or a mixture of hydrochloric acid and phosphoric acid can be used.
  • hydrofluoric acid is selected as the etching solution of the S i0 2 mask layer 102
  • the mixed solution of hydrochloric acid and phosphoric acid is the etching solution of the sacrificial layer 103.
  • the specific process is as follows: First, selective etching is performed using 20% hydrofluoric acid.
  • the S i0 2 mask layer 102 as shown in FIG. 6, makes Ga. . 5 In.
  • a large number of pores 104 are formed in the 5 P sacrificial layer 103; then, Ga is selectively etched using a hydrochloric acid to phosphoric acid volume ratio of 1:2 as a selective etching solution. . 5 In.
  • the GaAs substrate 101 can be completely peeled off.
  • the surface is cleaned with deionized water, and the surface of the substrate is blown dry with a nitrogen gun to be used again.
  • S i0 2 is used as a mask layer, and then the S i0 2 mask layer is selectively etched by wet etching to cause a lot of voids in the sacrificial layer, and a selective etching solution for sacrificing the sacrificial layer is added and sacrificed.
  • the contact area of the layer improves the corrosion rate of the sacrificial layer, reduces the difficulty of substrate stripping, enables reuse of the substrate, and reduces the production cost of the solar cell.
  • the S i piece is used as the supporting substrate, which has the characteristics of good heat dissipation, low cost, and easy processing of the late chip.
  • Forming an (In) GaAs cap layer on the surface of the S i piece, and then using it for metal bonding process with the inverted structure multi-junction solar cell, which is advantageous for bonding uniformity and reducing stress at the interface to the battery The impact of improving the yield.
  • Figure 11 is a graph showing the band gap of certain binary materials and the lattice constant of the binary material. The band gap and lattice constant of the ternary material are on a line drawn between typical associated binary materials.
  • the ternary material AlGaAs is located between the GaAs point and the AlAs point on the graph, wherein the band gap of the ternary material is between 1.42 eV of GaAs and 2.16 eV of AlAs, depending on the relative amount of individual components. Therefore, depending on the required band gap, the material composition of the ternary material can be appropriately selected for growth.
  • FIG. 12 is a schematic structural view of a high efficiency four-junction solar cell according to a preferred embodiment of the present invention, including an InP growth substrate 2001, a first sub-cell 2100, a second sub-cell 2200, a third sub-cell 2300, and a fourth sub-cell 2400. Each of the junction cells is connected by tunneling junctions 2501, 2502, 2503.
  • a first sub-cell 2100 having a lattice match with the growth substrate and having a band gap of about 0.74 is formed on the growth substrate 2001.
  • the first subcell includes a back field layer 2101, a base region 2102, an emissive layer 2103, and a window layer 2104.
  • p-type InP is selected as the growth substrate 2001, p-type In. . 53 Ga. 47 As the base 2102 of the first sub-cell 2100, n-type In. . 53 Ga. 47 As an emission layer 2103 of the first sub-cell 2100, n-type InP serves as a window layer 2104.
  • the material of the back field layer 2101 is p-type InGaAsP, and the group distribution ratio of the InGaAsP satisfies the lattice constant and the substrate is matched, and the band gap is between 0.9 and 1.1 eV.
  • n-type InP window layer 2104 In 4v As / p ++ "53 Ga.” -. In 4v As, constituting the tunneling junction 2501, for "53 Ga.”.
  • the first sub-cell 2100 is connected to the second sub-cell 2200.
  • a second sub-cell 200 having a lattice gap of 1.0 eV is formed on the tunnel junction 2501 to be lattice-matched to the growth substrate.
  • the second subcell includes a back field layer 2201, a base region 2202, an emission layer 2203, and a window layer 2204.
  • p-type InP is selected as the back field layer 2201
  • p-type InxGa ⁇ ASyP is used as the base region 2202
  • n-type ⁇ n ⁇ is used as the emission layer 2203
  • the n-type InP is used as the window layer 2204.
  • the choice of X, y ensures that the lattice constant of the InxdASyP ⁇ material is the same as that of the substrate, and the band gap is around 1.0 eV.
  • a series of n++-InGaAsP/p++-InGaAsP is deposited on the top n-type InP window layer 2204 of the second sub-cell 2200 to form a tunnel junction 2502 for connecting the second sub-cell 2200 to the third sub-cell 2300.
  • the InGaAsP group distribution ratio satisfies the lattice constant matching with the substrate lattice, and the band gap is around 1.0 eV.
  • a third subcell 2300 having a lattice matching of 1.31 eV is formed on the tunneling junction 2502.
  • the third subcell includes a back field layer 2301, a base region 2302, an emissive layer 2303, and a window layer 2304.
  • p-type AlInAs is selected as the back field layer 2301
  • p-type InP is used as the base region 2302
  • n-type InP is used as the emission layer 2303
  • n-type AlInAs is used as the window layer 2304.
  • the group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate, and the band gap is 1.47 eV.
  • the A1 component is preferably 0.48 and the In composition is 0.52.
  • the group assignment of the window layer is the same as that of the backfield layer 2301.
  • a series of n++-AlInAs/p++-AlInAs is deposited on the top window layer 2304 of the third sub-cell 2300 to form a tunnel junction.
  • the group distribution ratio of this layer is the same as that of the back field layer 2301.
  • a graded layer 2600 is formed on the tunnel junction 2503 with a band gap greater than that of the third subcell 2300.
  • the p-type AlSb z A S l _ z is selected as the gradation layer 2600, the group distribution ratio is lattice-matched from the InP substrate, and the energy band gap is 1. 9 eV in the vicinity of AlSb. . 44 As. 56 gradually changes to AlAs, and the change mode can be step change or linear change.
  • a fourth sub-cell 2400 having a band gap of about 1.88 eV is formed on the composition grade layer 2600.
  • the third subcell includes a back field layer 2401, a base region 2402, an emissive layer 2403, and a window layer 2404.
  • p-type Al lnP is selected as the back field layer 2401
  • p-type is used as the InGaP base region 2402
  • n-type InGaP is used as the emission layer 2403
  • n-type Al InP is used as the window layer 2404.
  • a fourth sub-cell top window layer 2401 is covered with a GaAs contact layer 2700 as a cap layer to form an efficient four-junction solar cell.
  • the present embodiment proposes an InP lining.
  • a four-junction solar cell structure is realized on the bottom.
  • the four-junction solar cell adopts a forward growth structure to facilitate device preparation; the sub-cells have a band gap arrangement suitable, and the lattices of the bottom three sub-cells are perfectly matched with the substrate; and the composition is graded by AlSb z A S l _ z , , can control the threading dislocation density of the top InGaP sub-cell within 10 6 cm -2 , so that the efficiency loss of the sub-cell is reduced.
  • Some embodiments provide a process for preparing a high power concentrating multi-junction solar cell comprising sub-cells 2100, 2200, 2300, 2400 and a process of forming layers between the sub-cells.
  • the lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants.
  • a vapor deposition method such as M0CVD and MBE can be used, but M0CVD is preferably selected as the growth technique of the present embodiment.
  • the specific preparation process of the embodiment comprises the following steps: In the first step, an InP growth substrate 001 is provided.
  • the InP substrate 2001 with a (001) side 9 degree angle was cleaned and placed in an organometallic chemical vapor deposition chamber, first baked at 750 °C for 10 minutes.
  • a first sub-cell 2100 having a band gap of about 0.74 eV is epitaxially grown on the p-type InP substrate 2001 by MOCVD.
  • the singularity of the band gap is 0. 9-1. 1 eV
  • the band gap is 0. 9-1. 1 eV
  • Between the thickness is about 20 nm; then p-type In is grown. . 53 Ga. 47
  • emissive layer 2104 having a doping concentration of 2 ⁇ 10 18 cm - 3 thickness is about 100 nm; Finally, an n-type InP window layer 2104 is grown with a doping concentration of 1 ⁇ 10 18 cm - 3 and a thickness of about 50 nm.
  • a tunnel junction 2501 is grown on the n-type InGaAsP window layer 104 on top of the first sub-cell 2100.
  • an n-type In which is about 15 nm thick and doped with a concentration of lxl O 1 ' cm- 3 is grown. . 53 Ga. 47 A S layer, then a thickness of about 15 nm, a doping concentration of 1 10" cm- 3 of p-type In. 53 Ga.. 47 As layer.
  • the band gap is a second sub-electricity near the OeV. Pool 2200.
  • Mr. Long p-type InP back field layer 2201 which has a thickness of about 20 nm; further grows a p-type InGaAs base region 2202 having a doping concentration of 1 x 10" cm- 3 and a thickness of 3 ⁇ m; and then growing n-type InGaAs
  • the emission layer 2203 has a doping concentration of 1 x 10 18 cm - 3 and a thickness of 100 nm.
  • an n-type InP window layer 2204 is grown with a doping concentration of 1 ⁇ 10 18 cm- 3 and a thickness of 50 nm.
  • a tunneling junction 2502 is grown on the top n-type InP window layer 2204 of the second sub-cell 2200.
  • the distribution ratio of the InGaAsP group of the two layers is matched to the lattice of the substrate, and the band gap is 1. 0 eV. .
  • a third sub-cell 2300 having a band gap of 1.31 eV is epitaxially grown on the tunnel junction 2502 to form a lattice match with the substrate.
  • the p-type AlInAs back field layer 2301 with a thickness of 20 nm is used.
  • the group distribution ratio of the AlInAs back field layer 2301 is matched with the substrate.
  • the band gap is 1.47 eV, and the A1 component is preferably 0.48.
  • the In composition is 0.52; the P-type InP base region 2302 is further grown to have a thickness of 1 ⁇ m and a doping concentration of 1 ⁇ 10" cm - 3 ; then an n-type InP emitter layer is grown.
  • the thickness is 100 nm, the doping concentration is 2 x l0 18 cm- 3 ; finally, the n-type AlInAs window layer 2304 is grown, the group distribution ratio of the layer is the same as the back field layer 2301, and the thickness thereof is 50 nm, doping concentration It is 1 X 10 18 cm_ 3 .
  • the junction 2503 is tunneled over the top n-type AlInAs window layer 2304 of the third sub-cell 2300. Mr. long thickness is
  • the 10" cm- 3 p-type AlInAs layer has a group distribution ratio similar to that of the back field layer 2301.
  • the compositionally graded layer 2600 is epitaxially grown on the tunnel junction 2503.
  • the p-type AlSbxAsl-x graded layer 2600 was grown so that the group distribution ratio of the layer was lattice-matched from the InP substrate, and the band gap was AlSb around 1.9 eV. . 4 4As. 56 changes gradually to AlAs, and the change mode can be step change, linear change, etc., and the change rate of Sb component is 8%/m.
  • each step is 250 nm.
  • a fourth sub-cell 2400 having a band gap of about 1.88 eV is epitaxially grown on the composition-graded layer 2600.
  • n-type GaAs contact layer 2700 is epitaxially grown on the top n-type AllnP window layer 2404 of the fourth sub-cell 2400 to complete the growth of the entire four-junction solar cell structure.
  • the GalnP/GalnAs/Ge multijunction solar cell is taken as an example.
  • the fabrication process is generally as follows: In the M0CVD system, GalnP/GalnAs/ is grown. After the GalnP top cell emitter in the Ge multijunction solar cell, a layer of GaAs cap is grown. GaAs contact layer is the outermost extension The layer, before etching the n-electrode, etches a portion of GaAs to expose the fresh GaAs surface, ensuring the adhesion and ohmic contact properties of the metal electrode in contact with GaAs. Therefore, GaAs-like growth is relatively thick, greater than 0.5 micron; in addition, etching the GaAs contact layer makes the surface more uneven and rough, affecting the photoelectric conversion efficiency.
  • a growth substrate 01 is selected to enter the MOCVD system, and the growth liner is The III-V compound solar cell material layer 02, the contact layer 03, and the sacrificial layer 05 are epitaxially grown on the surface of the bottom 01.
  • the growth substrate is preferably germanium (Ge), but may also be gallium arsenide (GaAs) or other suitable material.
  • the III-V compound solar cell can be a single junction or multi junction solar cell.
  • the single junction cell may have a battery material layer 02 of gallium arsenide (GaAs), indium gallium phosphide (GaInP), indium gallium arsenide (GalnAs), indium gallium arsenide (GalnAsP) or any other suitable III-V. Group compounds are formed.
  • the material layer 02 of the multi-junction solar cell can be formed by any suitable combination of the lattice constants and band gap requirements of the III-group elements listed in the periodic table, and the sub-cells are connected by a ⁇ -penetration junction.
  • Contact layer 03 is a cap layer that achieves good ohmic contact with the electrodes.
  • the material can be Ga(In)As and has a thickness between 50 and 150 legs.
  • the sacrificial layer 05 is used to protect the contact layer and has a thickness of 100 - 1000 legs.
  • the material is selected according to the material of the contact layer to selectively etch away the sacrificial layer and stop at the surface of the contact layer.
  • a GalnP/GalnAs/Ge multijunction solar cell is selected as the ⁇ -V compound solar cell, and gallium arsenide (GaAs) is selected as the contact layer 03, and indium gallium phosphide (GalnP) is used as the sacrificial layer 05.
  • GaAs gallium arsenide
  • GaNP indium gallium phosphide
  • the thickness of the GaAs contact layer 03 is 100 nm
  • the thickness of the GalnP contact layer 05 is 500 nm.
  • the sacrificial layer 05 is completely etched by wet etching, and the etching stops on the surface of the contact layer 03 to expose the surface of the contact layer 03.
  • the etchant should be selected to etch the sacrificial layer and not to etch the contact layer.
  • the GalnP contact layer 05 is etched with HC1 and stopped on the surface of the GaAs contact layer 03.
  • a layer of AuGe is first deposited as a first electrode 04 on the surface of the contact layer 03 exposed in the previous step, and then an electrode pattern is defined, and the electrode is removed by a mask and etching.
  • the contact layer exposes a portion of the surface of the solar cell material layer 02.
  • the GaAs contact layer 03 can be selectively etched using a mixture of citric acid and hydrogen peroxide.
  • an anti-reflection film 06 is vapor-deposited on the surface of the exposed solar cell material layer 02.
  • the specific method is as follows: First, an anti-reflection film is deposited on the surface of the exposed solar cell material layer 02 and the surface of the first electrode 04, and then the photoresist is used to cover the portion outside the electrode, and concentrated hydrofluoric acid is used. The solution etches the anti-reflection film over the electrode and finally removes the photoresist. Thereafter, a second electrode was fabricated in accordance with the structure of a specific III-V compound solar cell.
  • a GaAs cap layer is grown, and a GalnP sacrificial layer is grown on the GaAs cap layer, and the first electrode is wet etched.
  • the sacrificial layer GalnP is removed and stopped on the surface of the GaAs layer. Since the etching of the GalnP solution does not etch the GaAs layer, the GaAs contact layer can be maintained. Atomic level flatness improves photoelectric conversion efficiency.
  • the GaAs contact layer absorbs light
  • the GaAs contact layer needs to be removed after the first electrode is completed, and in the present invention, the GaAs contact layer can be grown thin due to the protection of the GalnP sacrificial layer, so that GaAs is removed.
  • the contact layer is used, the lateral etching is small, and the reliability of the first electrode is ensured, so that the AuGe line width can be made smaller, the shading area is reduced, and the photoelectric conversion efficiency is improved.
  • the structure of an efficient four-junction solar cell includes a first sub-cell 4100, a second sub-cell 4200, a third sub-battery 4300, and a fourth sub-battery 4400. They are connected by tunneling junctions 4501, 4502, and 4503.
  • the first sub-cell 4100 has a growth substrate 4001 as a base region 4120, and an n-type ion-forming emitter region 4130 is formed on the front surface of the p-type substrate to form the first sub-cell, the band gap of which is 1. 3 - 1.5 eV.
  • Four-junction The order of the batteries from bottom to top is: fourth sub-cell, third sub-cell, first sub-cell, second sub-cell.
  • the growth substrate 4001 is double-sided polished and has a thickness of less than or equal to 200 microns.
  • a P-type, 200 micron thick InP substrate having a doping concentration of 2 X 10" cm - 3 to 5 X 10" cm - 3 is preferred as the base of the first sub-cell 4100.
  • Area 4120. Phosphorus is diffused on the front surface of the substrate 001 to form an n-type emitter region 4130 of the first subcell, thereby obtaining a first subcell 4100 having a band gap of 1.35 eV and a diffusion thickness of preferably 100 nm.
  • a p-type ⁇ n ⁇ is epitaxially grown on the back surface of the growth substrate (ie, the surface of the first sub-cell base region 4120) as the back field layer 4110 of the first sub-cell having a thickness of 100 nm and a doping concentration of 1 ⁇ 10 18 .
  • An n-type ⁇ n ⁇ is epitaxially grown on the surface of the emitter region 4130 as a first sub-cell window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 ⁇ 10 18 cm -3 .
  • a tunneling junction 4501 is formed on the first sub-cell window layer 4140 for connecting the first sub-cell 4100 to the second sub-cell 4200.
  • the material is preferably p++_InGaP/n++-InGaP, the thickness is 50 nm, and the doping concentration is as high as 2 x 10" cm- 3 .
  • a graded buffer layer 4600 is formed over the tunnel junction with a band gap of 1.5 - 1.8 eV, and the group distribution ratio is changed from lattice matching with the first subcell to lattice matching with the second subcell.
  • the material is preferably P-type InGaP, which comprises a 6-layer structure each having a thickness of 250 nm and a doping concentration of about 1 x 10 18 cm -3 , wherein the percentage of Ga is increased from 0 to 0.28.
  • the back field layer 4210 of the second subcell is formed over the graded buffer layer.
  • the material is a P-type InGaP having a thickness of 50 nm and a doping concentration of 1 to 2 ⁇ 10 18 cm - 3 .
  • the second sub-cell is formed on the back field layer 4210 with a band gap of 1.8 - 2. 0 eV, which is the top cell of the four-junction solar cell.
  • P-type In is preferable. . 4 Al. 6 As as base 4220
  • n-type In. . 4 Al. 6 As as the emission layer 4230 the band gap is 1.92 eV.
  • the base region 4220 has a thickness of 2 micrometers and a graded doping method with a concentration of 1.5 ⁇ 10" cm - 3 to 5 X 10"cm" 3
  • the emitter region 4230 has a thickness of 100 nm and a doping concentration of about 2 > ⁇ 10 18 cm - 3.
  • the second sub-cell window layer 240 is formed on the emitter region 4230, and the material thereof is preferably InAlAsP.
  • a tunneling junction 4502 is formed on a lower surface of the back field layer 4110 of the first battery for connecting the third battery to the first sub-electric Pool.
  • the material is preferably P++_InP / n++-InP, has a thickness of 50 nm, and has a doping concentration of up to 1 ⁇ 10" cm -3 .
  • the second sub-battery is formed on the tunneling junction 4502, and has a band gap of 0.9 to 1. 2 eV.
  • n-type InP is preferably used as the material of the window layer 4340, and has a thickness of 40 nm and a doping concentration of about 1 ⁇ 10 18 cm - 3 ; n-type InGaAsP and p-type InGaAsP are selected as the region 4320 and the emitter region, respectively.
  • the band gap is 1 eV
  • the base region 4320 has a thickness of 3 ⁇ m
  • the doping concentration is 5 ⁇ 10" cm - 3
  • the emitter region 4330 has a thickness of 100 nm
  • the doping concentration is 2 ⁇ 10 18 cm- 3
  • InP is selected as the material of the back field layer 310, the thickness is 50 nm, and the doping concentration is l ⁇ 2 x l 0 18 cm - 3 .
  • a tunneling junction 4503 is formed below the back field layer of the third subcell for connecting the fourth subcell to the third subcell.
  • p++/n++-GaAs is preferred. . 5 Sb. 5.
  • the fourth sub-battery is formed under the tunnel junction 4503, and has a band gap of 0.6-0.9 nV, which is the bottom battery of the four-junction solar cell.
  • n-type InP is preferably used as the material of the window layer 4440, and has a thickness of 40 nm and a doping concentration of about 1 ⁇ 10 18 cm ⁇ 3 ; n-type In is selected. . 53 Ga.
  • the band gap is 0. 6 eV
  • the base region 4420 has a thickness of 2 ⁇ m
  • the doping concentration is 2 ⁇ 10" cm - 3 ⁇ 5 ⁇ 10" cm - 3
  • the emitter region 4430 has a thickness of 200 nm, and its doping concentration is 1 x 10 18 cm - 3 ⁇ 2 ⁇ 10 18 cm - 3
  • InP is selected as the material of the back field layer 4410, the thickness is 50 nm, doping concentration It is 1 ⁇ 2 ⁇ 10 18 cm- 3 .
  • a layer of heavily doped n++-InAlAsP is deposited over the top cell (ie, the second subcell 4200) as a capping layer 4700 over the second subcell having a thickness of 500 nm and a doping concentration of 1 ⁇ 10" cm- 3
  • a layer of InP is extended as a back contact layer 4800 under the bottom cell (ie, the fourth sub-cell) to form a four-junction solar cell.
  • the sub-cells having different band gaps are epitaxially grown on both sides of the substrate in a high-to-low order on the double-sided polishing substrate, and the first subcell lattice is not
  • a matching second subcell is grown above, a gradient buffer layer is used between the first and second subcells to slowly release stress, reducing dislocation density; third and fourth subcells matching the first subcell lattice Growing below, the band gap of each sub-battery is reasonably configured to broaden the spectral absorption range of the solar cell, forming a highly efficient four-junction solar cell with current matching and high lattice quality.
  • Other embodiments provide a process for preparing a high-concentration multi-junction solar cell including sub-cells 4100, 4200, 4300, 4400 and a process of forming layers between the sub-cells.
  • the lattice constant and electrical properties in the semiconductor structure are controlled according to appropriate growth temperatures and times and by the use of appropriate chemical compositions and dopants.
  • Vapor deposition methods such as Techniques such as MOCVD and MBE, but M0CVD is preferred as the growth technique of the present invention.
  • the specific preparation process includes the following steps: In the first step, a double-sided polished substrate 4001 is provided. In this embodiment, a double-sided polished InP substrate having a p-type thickness of 200 ⁇ m is selected, and the doping concentration thereof is 1 ⁇ 10 17 cm - 3 to 5 X 10 17 cm - 3 .
  • a first sub-battery 4100 is formed with a band gap of 1.3 to 1.5 eV.
  • the growth substrate 4001 itself is used as the base region 4120, and phosphorus is diffused on the front surface of the substrate 4001 to form an n-type emitter region 4130, thereby obtaining a first subcell having a band gap of 1.35 eV, diffusion.
  • the thickness is preferably 100 nm.
  • An n-type ⁇ n ⁇ is grown on the emitter region 4130 as a window layer 4140 having a thickness of 25 nm and a doping concentration of about 1 ⁇ 10 18 cm -3 .
  • heavily doped p++-InGaP/n++-InGaP is epitaxially grown over the first subcell as a tunneling junction 4501 having a thickness of 50 nm and a doping concentration of up to 2 ⁇ 10" cm- 3 , for connecting the first sub-battery to the second sub-battery.
  • a graded buffer layer 4600 is formed over the tunnel junction 4501 with a band gap of 1.5 to 1.8 eV.
  • the graded buffer layer 4600 comprises a 6-layer structure, each layer having a thickness of 250 nm, and a p-type InGaP is selected as the material thereof, wherein the percentage of Ga is increased from 0 to 0.28, and the doping concentration is about lx 10 18 . Cm- 3 .
  • a second subcell is epitaxially grown over the graded buffer layer with a band gap of 1.8 to 2 eV.
  • the specifics are as follows: epitaxially growing a p-type InGaP as a back field layer 4210 of the second sub-cell, having a thickness of 50 nm and a doping concentration of 1 ⁇ 2 X 10 18 cm - 3 ; The p-type In is epitaxially grown over the back field layer 4210 of the subcell. . 4 Al.
  • the band gap is 1.92 eV, the thickness is 2 micrometers, and the gradient is doped with a concentration of 1 ⁇ 5 x l0"cm- 3 ; epitaxial growth is performed over the base region 4220 of the second subcell.
  • the type of In. 4 Al.. 6 As is an emitter region 4230 having a thickness of 100 nm and a doping concentration of about 2 x 10 18 cm- 3 ; epitaxially growing a window layer 4240 as a second subcell over the emitter region 230,
  • the material thereof is preferably InAlAsP.
  • heavily doped n-type InAlAsP is epitaxially grown over the window layer 4240 as a capping layer 4700 having a thickness of 500 nm and a doping concentration of 1 ⁇ 10" cm - 3 .
  • a p-type ⁇ n ⁇ is epitaxially grown on the back surface of the green substrate 4001 as the back field layer 4110 of the first sub-cell, and has a thickness of 100 nm and a doping concentration of 1 to 2 ⁇ 10 18 . Cm- 3 .
  • P++-InP/n++-InP is epitaxially grown under the first sub-battery back field layer 4110 as a tunnel junction 4502 having a thickness of 50 nm and a doping concentration of up to 2 ⁇ 10" cm- 3 , for connecting the third sub-battery to the first sub-battery.
  • a third sub-cell is epitaxially grown under the tunnel junction 4502 with a band gap of 0.9-1.2 eV.
  • the specifics are as follows: Epitaxially growing a layer of n-type InP under the tunneling junction 4502 as a window layer 4340 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 ⁇ 10 18 cm- 3 ; in the window layer 4340
  • the epitaxial growth emitter region 4330 and the base region 4320 are epitaxially grown, and n-type InGaAsP and p-type InGaAsP are selected as the base region 4320 and the emitter region 4330, respectively, and the thickness of the base region is 3 micron, doping concentration is 5 x 10" cm- 3 , the thickness of the emitter is 100 nm, the doping concentration is 2 > ⁇ 10 18 cm - 3 ; a layer of InP is epitaxially grown below the base region as the third sub- The
  • heavily doped p++ GaA S is epitaxially grown under the third subcell. . 5 Sb. . 5 /n++-GaAs. . 5 Sb. 5 as a tunnel junction 4503 having a thickness of 50 nm and a doping concentration of up to 2 x 10" cm- 3 for connecting the fourth subcell to the third subcell.
  • a fourth sub-cell is epitaxially grown under the tunnel junction 4503 with a band gap of 0.6-0.9 eV.
  • the specifics are as follows: An n-type InP is epitaxially grown under the tunnel junction 4503 as a window layer 4440 of the third sub-cell, having a thickness of 40 nm, a doping concentration of about 1 10 18 cm- 3 ; under the window layer 4440 Epitaxial growth emitter region 4430 and base region 4420 are selected as n-type In, respectively. . 53 Ga. 47 As and p-type p-In. . 53 Ga.
  • the base region 4420 and the emitter region 4430 has a thickness of 2 ⁇ m, a doping concentration of 2 10 17 cm - 3 to 5 10" cm - 3 , and an emitter region thickness of 4200 legs, and the doping concentration is 1 10 18 cm - 3 ⁇ 2 10 18 cm- 3 ; epitaxially growing a layer of InP as the back field layer 4410 of the third subcell under the base region, having a thickness of 50 nm and a doping concentration of 1 ⁇ 10 18 cm - 3 ⁇ 2 ⁇ 10 18 cm- 3 .
  • a layer of InP is epitaxially grown under the back field layer 410 of the fourth sub-cell as a back contact layer.
  • the surface of the sample can be subjected to anti-reflection vapor deposition, metal electrode preparation and other post-processes to complete the required solar cell.
  • In 0 . 4 Al 0 . 6 As (l.92 eV) / InP (l.35 eV) / InGaAsP (Pb) prepared by double-sided growth on a double-sided polished InP substrate ( 1 eV) /Instance. 53 Ga opposition. 4v As (0.6 eV) four-junction solar cell, which effectively broadens the absorption spectrum range and increases the current matching between the individual junction cells.

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Abstract

L'invention concerne un procédé de fabrication de cellule solaire consistant : à former une première sous-cellule sur une première surface de substrat, ladite première sous-cellule comprenant une première bande interdite; à former une couche tampon à gradient sur la première sous-cellule, ladite couche tampon à gradient comprenant une deuxième bande interdite plus large que la première; à former une seconde sous-cellule sur la couche tampon à gradient, ladite seconde sous-cellule comprenant une troisième bande interdite plus large que la deuxième; à former une troisième sous-cellule sur une seconde surface du substrat, ladite troisième sous-cellule comprenant une quatrième bande interdite plus petite que la première; à former une quatrième sous-cellule en-dessous de la troisième sous-cellule, ladite quatrième sous-cellule comprenant une cinquième bande interdite plus petite que la quatrième; et à former de manière épitaxiale une couche de contact arrière en-dessous de la quatrième sous-cellule.
PCT/CN2012/078233 2011-07-07 2012-07-05 Cellule solaire, système et procédé de fabrication WO2013004188A1 (fr)

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US14/147,498 US9318643B2 (en) 2011-07-07 2014-01-04 Fabrication method of inverted solar cells
US14/147,596 US20140116494A1 (en) 2011-08-02 2014-01-06 High-Efficiency Four-Junction Solar Cells and Fabrication Methods Thereof

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CN2011101896126A CN102222734B (zh) 2011-07-07 2011-07-07 一种倒置太阳能电池制作方法
CN201110189612.6 2011-07-07
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CN112151635A (zh) * 2019-06-27 2020-12-29 张家港恩达通讯科技有限公司 一种三结太阳能电池及其制备方法
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